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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// REQUIRES: aarch64-registered-target3// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \4// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s5// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \6// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s7// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \8// RUN: -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK9// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \10// RUN: -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK11// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \12// RUN: -S -disable-O0-optnone -Werror -Wall -o /dev/null %s13// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme \14// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s15// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve \16// RUN: -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s17// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme \18// RUN: -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK19// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme \20// RUN: -S -disable-O0-optnone -Werror -Wall -o /dev/null %s21 22#include <arm_sve.h>23 24#if defined(__ARM_FEATURE_SME) && defined(__ARM_FEATURE_SVE)25#define ATTR __arm_streaming_compatible26#elif defined(__ARM_FEATURE_SME)27#define ATTR __arm_streaming28#else29#define ATTR30#endif31 32#ifdef SVE_OVERLOADED_FORMS33// A simple used,unused... macro, long enough to represent any SVE builtin.34#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A335#else36#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A437#endif38 39// CHECK-LABEL: @test_svclamp_s8(40// CHECK-NEXT: entry:41// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sclamp.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])42// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]43//44// CPP-CHECK-LABEL: @_Z15test_svclamp_s8u10__SVInt8_tS_S_(45// CPP-CHECK-NEXT: entry:46// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sclamp.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])47// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]48//49svint8_t test_svclamp_s8(svint8_t op1, svint8_t op2, svint8_t op3) ATTR {50 return SVE_ACLE_FUNC(svclamp, _s8, , )(op1, op2, op3);51}52 53// CHECK-LABEL: @test_svclamp_s16(54// CHECK-NEXT: entry:55// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sclamp.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])56// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]57//58// CPP-CHECK-LABEL: @_Z16test_svclamp_s16u11__SVInt16_tS_S_(59// CPP-CHECK-NEXT: entry:60// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sclamp.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])61// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]]62//63svint16_t test_svclamp_s16(svint16_t op1, svint16_t op2, svint16_t op3) ATTR {64 return SVE_ACLE_FUNC(svclamp, _s16, , )(op1, op2, op3);65}66 67// CHECK-LABEL: @test_svclamp_s32(68// CHECK-NEXT: entry:69// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sclamp.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])70// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]71//72// CPP-CHECK-LABEL: @_Z16test_svclamp_s32u11__SVInt32_tS_S_(73// CPP-CHECK-NEXT: entry:74// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sclamp.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])75// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]]76//77svint32_t test_svclamp_s32(svint32_t op1, svint32_t op2, svint32_t op3) ATTR {78 return SVE_ACLE_FUNC(svclamp, _s32, , )(op1, op2, op3);79}80 81// CHECK-LABEL: @test_svclamp_s64(82// CHECK-NEXT: entry:83// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sclamp.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])84// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]85//86// CPP-CHECK-LABEL: @_Z16test_svclamp_s64u11__SVInt64_tS_S_(87// CPP-CHECK-NEXT: entry:88// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sclamp.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])89// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]]90//91svint64_t test_svclamp_s64(svint64_t op1, svint64_t op2, svint64_t op3) ATTR {92 return SVE_ACLE_FUNC(svclamp, _s64, , )(op1, op2, op3);93}94 95