652 lines · c
1// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +fullfp16\2// RUN: -disable-O0-optnone -emit-llvm -o - %s \3// RUN: | opt -S -passes=mem2reg \4// RUN: | FileCheck %s5 6// REQUIRES: aarch64-registered-target7 8#include <arm_fp16.h>9 10// CHECK-LABEL: test_vabsh_f1611// CHECK: [[ABS:%.*]] = call half @llvm.fabs.f16(half %a)12// CHECK: ret half [[ABS]]13float16_t test_vabsh_f16(float16_t a) {14 return vabsh_f16(a);15}16 17// CHECK-LABEL: test_vceqzh_f1618// CHECK: [[TMP1:%.*]] = fcmp oeq half %a, 0xH000019// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i1620// CHECK: ret i16 [[TMP2]]21uint16_t test_vceqzh_f16(float16_t a) {22 return vceqzh_f16(a);23}24 25// CHECK-LABEL: test_vcgezh_f1626// CHECK: [[TMP1:%.*]] = fcmp oge half %a, 0xH000027// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i1628// CHECK: ret i16 [[TMP2]]29uint16_t test_vcgezh_f16(float16_t a) {30 return vcgezh_f16(a);31}32 33// CHECK-LABEL: test_vcgtzh_f1634// CHECK: [[TMP1:%.*]] = fcmp ogt half %a, 0xH000035// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i1636// CHECK: ret i16 [[TMP2]]37uint16_t test_vcgtzh_f16(float16_t a) {38 return vcgtzh_f16(a);39}40 41// CHECK-LABEL: test_vclezh_f1642// CHECK: [[TMP1:%.*]] = fcmp ole half %a, 0xH000043// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i1644// CHECK: ret i16 [[TMP2]]45uint16_t test_vclezh_f16(float16_t a) {46 return vclezh_f16(a);47}48 49// CHECK-LABEL: test_vcltzh_f1650// CHECK: [[TMP1:%.*]] = fcmp olt half %a, 0xH000051// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i1652// CHECK: ret i16 [[TMP2]]53uint16_t test_vcltzh_f16(float16_t a) {54 return vcltzh_f16(a);55}56 57// CHECK-LABEL: test_vcvth_f16_s1658// CHECK: [[VCVT:%.*]] = sitofp i16 %a to half59// CHECK: ret half [[VCVT]]60float16_t test_vcvth_f16_s16 (int16_t a) {61 return vcvth_f16_s16(a);62}63 64// CHECK-LABEL: test_vcvth_f16_s3265// CHECK: [[VCVT:%.*]] = sitofp i32 %a to half66// CHECK: ret half [[VCVT]]67float16_t test_vcvth_f16_s32 (int32_t a) {68 return vcvth_f16_s32(a);69}70 71// CHECK-LABEL: test_vcvth_f16_s6472// CHECK: [[VCVT:%.*]] = sitofp i64 %a to half73// CHECK: ret half [[VCVT]]74float16_t test_vcvth_f16_s64 (int64_t a) {75 return vcvth_f16_s64(a);76}77 78// CHECK-LABEL: test_vcvth_f16_u1679// CHECK: [[VCVT:%.*]] = uitofp i16 %a to half80// CHECK: ret half [[VCVT]]81float16_t test_vcvth_f16_u16 (uint16_t a) {82 return vcvth_f16_u16(a);83}84 85// CHECK-LABEL: test_vcvth_f16_u3286// CHECK: [[VCVT:%.*]] = uitofp i32 %a to half87// CHECK: ret half [[VCVT]]88float16_t test_vcvth_f16_u32 (uint32_t a) {89 return vcvth_f16_u32(a);90}91 92// CHECK-LABEL: test_vcvth_f16_u6493// CHECK: [[VCVT:%.*]] = uitofp i64 %a to half94// CHECK: ret half [[VCVT]]95float16_t test_vcvth_f16_u64 (uint64_t a) {96 return vcvth_f16_u64(a);97}98 99// CHECK-LABEL: test_vcvth_s16_f16100// CHECK: [[VCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtzs.i16.f16(half %a)101// CHECK: ret i16 [[VCVT]]102int16_t test_vcvth_s16_f16 (float16_t a) {103 return vcvth_s16_f16(a);104}105 106// CHECK-LABEL: test_vcvth_s32_f16107// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f16(half %a)108// CHECK: ret i32 [[VCVT]]109int32_t test_vcvth_s32_f16 (float16_t a) {110 return vcvth_s32_f16(a);111}112 113// CHECK-LABEL: test_vcvth_s64_f16114// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f16(half %a)115// CHECK: ret i64 [[VCVT]]116int64_t test_vcvth_s64_f16 (float16_t a) {117 return vcvth_s64_f16(a);118}119 120// CHECK-LABEL: test_vcvth_u16_f16121// CHECK: [[VCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtzu.i16.f16(half %a)122// CHECK: ret i16 [[VCVT]]123uint16_t test_vcvth_u16_f16 (float16_t a) {124 return vcvth_u16_f16(a);125}126 127// CHECK-LABEL: test_vcvth_u32_f16128// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f16(half %a)129// CHECK: ret i32 [[VCVT]]130uint32_t test_vcvth_u32_f16 (float16_t a) {131 return vcvth_u32_f16(a);132}133 134// CHECK-LABEL: test_vcvth_u64_f16135// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f16(half %a)136// CHECK: ret i64 [[VCVT]]137uint64_t test_vcvth_u64_f16 (float16_t a) {138 return vcvth_u64_f16(a);139}140 141// CHECK-LABEL: test_vcvtah_s16_f16142// CHECK: [[FCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtas.i16.f16(half %a)143// CHECK: ret i16 [[FCVT]]144int16_t test_vcvtah_s16_f16 (float16_t a) {145 return vcvtah_s16_f16(a);146}147 148// CHECK-LABEL: test_vcvtah_s32_f16149// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f16(half %a)150// CHECK: ret i32 [[VCVT]]151int32_t test_vcvtah_s32_f16 (float16_t a) {152 return vcvtah_s32_f16(a);153}154 155// CHECK-LABEL: test_vcvtah_s64_f16156// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f16(half %a)157// CHECK: ret i64 [[VCVT]]158int64_t test_vcvtah_s64_f16 (float16_t a) {159 return vcvtah_s64_f16(a);160}161 162// CHECK-LABEL: test_vcvtah_u16_f16163// CHECK: [[FCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtau.i16.f16(half %a)164// CHECK: ret i16 [[FCVT]]165uint16_t test_vcvtah_u16_f16 (float16_t a) {166 return vcvtah_u16_f16(a);167}168 169// CHECK-LABEL: test_vcvtah_u32_f16170// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f16(half %a)171// CHECK: ret i32 [[VCVT]]172uint32_t test_vcvtah_u32_f16 (float16_t a) {173 return vcvtah_u32_f16(a);174}175 176// CHECK-LABEL: test_vcvtah_u64_f16177// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f16(half %a)178// CHECK: ret i64 [[VCVT]]179uint64_t test_vcvtah_u64_f16 (float16_t a) {180 return vcvtah_u64_f16(a);181}182 183// CHECK-LABEL: test_vcvtmh_s16_f16184// CHECK: [[FCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtms.i16.f16(half %a)185// CHECK: ret i16 [[FCVT]]186int16_t test_vcvtmh_s16_f16 (float16_t a) {187 return vcvtmh_s16_f16(a);188}189 190// CHECK-LABEL: test_vcvtmh_s32_f16191// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f16(half %a)192// CHECK: ret i32 [[VCVT]]193int32_t test_vcvtmh_s32_f16 (float16_t a) {194 return vcvtmh_s32_f16(a);195}196 197// CHECK-LABEL: test_vcvtmh_s64_f16198// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f16(half %a)199// CHECK: ret i64 [[VCVT]]200int64_t test_vcvtmh_s64_f16 (float16_t a) {201 return vcvtmh_s64_f16(a);202}203 204// CHECK-LABEL: test_vcvtmh_u16_f16205// CHECK: [[FCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtmu.i16.f16(half %a)206// CHECK: ret i16 [[FCVT]]207uint16_t test_vcvtmh_u16_f16 (float16_t a) {208 return vcvtmh_u16_f16(a);209}210 211// CHECK-LABEL: test_vcvtmh_u32_f16212// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f16(half %a)213// CHECK: ret i32 [[VCVT]]214uint32_t test_vcvtmh_u32_f16 (float16_t a) {215 return vcvtmh_u32_f16(a);216}217 218// CHECK-LABEL: test_vcvtmh_u64_f16219// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f16(half %a)220// CHECK: ret i64 [[VCVT]]221uint64_t test_vcvtmh_u64_f16 (float16_t a) {222 return vcvtmh_u64_f16(a);223}224 225// CHECK-LABEL: test_vcvtnh_s16_f16226// CHECK: [[FCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtns.i16.f16(half %a)227// CHECK: ret i16 [[FCVT]]228int16_t test_vcvtnh_s16_f16 (float16_t a) {229 return vcvtnh_s16_f16(a);230}231 232// CHECK-LABEL: test_vcvtnh_s32_f16233// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f16(half %a)234// CHECK: ret i32 [[VCVT]]235int32_t test_vcvtnh_s32_f16 (float16_t a) {236 return vcvtnh_s32_f16(a);237}238 239// CHECK-LABEL: test_vcvtnh_s64_f16240// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f16(half %a)241// CHECK: ret i64 [[VCVT]]242int64_t test_vcvtnh_s64_f16 (float16_t a) {243 return vcvtnh_s64_f16(a);244}245 246// CHECK-LABEL: test_vcvtnh_u16_f16247// CHECK: [[FCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtnu.i16.f16(half %a)248// CHECK: ret i16 [[FCVT]]249uint16_t test_vcvtnh_u16_f16 (float16_t a) {250 return vcvtnh_u16_f16(a);251}252 253// CHECK-LABEL: test_vcvtnh_u32_f16254// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f16(half %a)255// CHECK: ret i32 [[VCVT]]256uint32_t test_vcvtnh_u32_f16 (float16_t a) {257 return vcvtnh_u32_f16(a);258}259 260// CHECK-LABEL: test_vcvtnh_u64_f16261// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f16(half %a)262// CHECK: ret i64 [[VCVT]]263uint64_t test_vcvtnh_u64_f16 (float16_t a) {264 return vcvtnh_u64_f16(a);265}266 267// CHECK-LABEL: test_vcvtph_s16_f16268// CHECK: [[FCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtps.i16.f16(half %a)269// CHECK: ret i16 [[FCVT]]270int16_t test_vcvtph_s16_f16 (float16_t a) {271 return vcvtph_s16_f16(a);272}273 274// CHECK-LABEL: test_vcvtph_s32_f16275// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f16(half %a)276// CHECK: ret i32 [[VCVT]]277int32_t test_vcvtph_s32_f16 (float16_t a) {278 return vcvtph_s32_f16(a);279}280 281// CHECK-LABEL: test_vcvtph_s64_f16282// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)283// CHECK: ret i64 [[VCVT]]284int64_t test_vcvtph_s64_f16 (float16_t a) {285 return vcvtph_s64_f16(a);286}287 288// CHECK-LABEL: test_vcvtph_u16_f16289// CHECK: [[FCVT:%.*]] = call i16 @llvm.aarch64.neon.fcvtpu.i16.f16(half %a)290// CHECK: ret i16 [[FCVT]]291uint16_t test_vcvtph_u16_f16 (float16_t a) {292 return vcvtph_u16_f16(a);293}294 295// CHECK-LABEL: test_vcvtph_u32_f16296// CHECK: [[VCVT:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f16(half %a)297// CHECK: ret i32 [[VCVT]]298uint32_t test_vcvtph_u32_f16 (float16_t a) {299 return vcvtph_u32_f16(a);300}301 302// CHECK-LABEL: test_vcvtph_u64_f16303// CHECK: [[VCVT:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f16(half %a)304// CHECK: ret i64 [[VCVT]]305uint64_t test_vcvtph_u64_f16 (float16_t a) {306 return vcvtph_u64_f16(a);307}308 309// CHECK-LABEL: test_vnegh_f16310// CHECK: [[NEG:%.*]] = fneg half %a311// CHECK: ret half [[NEG]]312float16_t test_vnegh_f16(float16_t a) {313 return vnegh_f16(a);314}315 316// CHECK-LABEL: test_vrecpeh_f16317// CHECK: [[VREC:%.*]] = call half @llvm.aarch64.neon.frecpe.f16(half %a)318// CHECK: ret half [[VREC]]319float16_t test_vrecpeh_f16(float16_t a) {320 return vrecpeh_f16(a);321}322 323// CHECK-LABEL: test_vrecpxh_f16324// CHECK: [[VREC:%.*]] = call half @llvm.aarch64.neon.frecpx.f16(half %a)325// CHECK: ret half [[VREC]]326float16_t test_vrecpxh_f16(float16_t a) {327 return vrecpxh_f16(a);328}329 330// CHECK-LABEL: test_vrndh_f16331// CHECK: [[RND:%.*]] = call half @llvm.trunc.f16(half %a)332// CHECK: ret half [[RND]]333float16_t test_vrndh_f16(float16_t a) {334 return vrndh_f16(a);335}336 337// CHECK-LABEL: test_vrndah_f16338// CHECK: [[RND:%.*]] = call half @llvm.round.f16(half %a)339// CHECK: ret half [[RND]]340float16_t test_vrndah_f16(float16_t a) {341 return vrndah_f16(a);342}343 344// CHECK-LABEL: test_vrndih_f16345// CHECK: [[RND:%.*]] = call half @llvm.nearbyint.f16(half %a)346// CHECK: ret half [[RND]]347float16_t test_vrndih_f16(float16_t a) {348 return vrndih_f16(a);349}350 351// CHECK-LABEL: test_vrndmh_f16352// CHECK: [[RND:%.*]] = call half @llvm.floor.f16(half %a)353// CHECK: ret half [[RND]]354float16_t test_vrndmh_f16(float16_t a) {355 return vrndmh_f16(a);356}357 358// CHECK-LABEL: test_vrndnh_f16359// CHECK: [[RND:%.*]] = call half @llvm.roundeven.f16(half %a)360// CHECK: ret half [[RND]]361float16_t test_vrndnh_f16(float16_t a) {362 return vrndnh_f16(a);363}364 365// CHECK-LABEL: test_vrndph_f16366// CHECK: [[RND:%.*]] = call half @llvm.ceil.f16(half %a)367// CHECK: ret half [[RND]]368float16_t test_vrndph_f16(float16_t a) {369 return vrndph_f16(a);370}371 372// CHECK-LABEL: test_vrndxh_f16373// CHECK: [[RND:%.*]] = call half @llvm.rint.f16(half %a)374// CHECK: ret half [[RND]]375float16_t test_vrndxh_f16(float16_t a) {376 return vrndxh_f16(a);377}378 379// CHECK-LABEL: test_vrsqrteh_f16380// CHECK: [[RND:%.*]] = call half @llvm.aarch64.neon.frsqrte.f16(half %a)381// CHECK: ret half [[RND]]382float16_t test_vrsqrteh_f16(float16_t a) {383 return vrsqrteh_f16(a);384}385 386// CHECK-LABEL: test_vsqrth_f16387// CHECK: [[SQR:%.*]] = call half @llvm.sqrt.f16(half %a)388// CHECK: ret half [[SQR]]389float16_t test_vsqrth_f16(float16_t a) {390 return vsqrth_f16(a);391}392 393// CHECK-LABEL: test_vaddh_f16394// CHECK: [[ADD:%.*]] = fadd half %a, %b395// CHECK: ret half [[ADD]]396float16_t test_vaddh_f16(float16_t a, float16_t b) {397 return vaddh_f16(a, b);398}399 400// CHECK-LABEL: test_vabdh_f16401// CHECK: [[ABD:%.*]] = call half @llvm.aarch64.sisd.fabd.f16(half %a, half %b)402// CHECK: ret half [[ABD]]403float16_t test_vabdh_f16(float16_t a, float16_t b) {404 return vabdh_f16(a, b);405}406 407// CHECK-LABEL: test_vcageh_f16408// CHECK: [[FACG:%.*]] = call i32 @llvm.aarch64.neon.facge.i32.f16(half %a, half %b)409// CHECK: [[RET:%.*]] = trunc i32 [[FACG]] to i16410// CHECK: ret i16 [[RET]]411uint16_t test_vcageh_f16(float16_t a, float16_t b) {412 return vcageh_f16(a, b);413}414 415// CHECK-LABEL: test_vcagth_f16416// CHECK: [[FACG:%.*]] = call i32 @llvm.aarch64.neon.facgt.i32.f16(half %a, half %b)417// CHECK: [[RET:%.*]] = trunc i32 [[FACG]] to i16418// CHECK: ret i16 [[RET]]419uint16_t test_vcagth_f16(float16_t a, float16_t b) {420 return vcagth_f16(a, b);421}422 423// CHECK-LABEL: test_vcaleh_f16424// CHECK: [[FACG:%.*]] = call i32 @llvm.aarch64.neon.facge.i32.f16(half %b, half %a)425// CHECK: [[RET:%.*]] = trunc i32 [[FACG]] to i16426// CHECK: ret i16 [[RET]]427uint16_t test_vcaleh_f16(float16_t a, float16_t b) {428 return vcaleh_f16(a, b);429}430 431// CHECK-LABEL: test_vcalth_f16432// CHECK: [[FACG:%.*]] = call i32 @llvm.aarch64.neon.facgt.i32.f16(half %b, half %a)433// CHECK: [[RET:%.*]] = trunc i32 [[FACG]] to i16434// CHECK: ret i16 [[RET]]435uint16_t test_vcalth_f16(float16_t a, float16_t b) {436 return vcalth_f16(a, b);437}438 439// CHECK-LABEL: test_vceqh_f16440// CHECK: [[TMP1:%.*]] = fcmp oeq half %a, %b441// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16442// CHECK: ret i16 [[TMP2]]443uint16_t test_vceqh_f16(float16_t a, float16_t b) {444 return vceqh_f16(a, b);445}446 447// CHECK-LABEL: test_vcgeh_f16448// CHECK: [[TMP1:%.*]] = fcmp oge half %a, %b449// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16450// CHECK: ret i16 [[TMP2]]451uint16_t test_vcgeh_f16(float16_t a, float16_t b) {452 return vcgeh_f16(a, b);453}454 455// CHECK-LABEL: test_vcgth_f16456//CHECK: [[TMP1:%.*]] = fcmp ogt half %a, %b457// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16458// CHECK: ret i16 [[TMP2]]459uint16_t test_vcgth_f16(float16_t a, float16_t b) {460 return vcgth_f16(a, b);461}462 463// CHECK-LABEL: test_vcleh_f16464// CHECK: [[TMP1:%.*]] = fcmp ole half %a, %b465// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16466// CHECK: ret i16 [[TMP2]]467uint16_t test_vcleh_f16(float16_t a, float16_t b) {468 return vcleh_f16(a, b);469}470 471// CHECK-LABEL: test_vclth_f16472// CHECK: [[TMP1:%.*]] = fcmp olt half %a, %b473// CHECK: [[TMP2:%.*]] = sext i1 [[TMP1]] to i16474// CHECK: ret i16 [[TMP2]]475uint16_t test_vclth_f16(float16_t a, float16_t b) {476 return vclth_f16(a, b);477}478 479// CHECK-LABEL: test_vcvth_n_f16_s16480// CHECK: [[SEXT:%.*]] = sext i16 %a to i32481// CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i32(i32 [[SEXT]], i32 1)482// CHECK: ret half [[CVT]]483float16_t test_vcvth_n_f16_s16(int16_t a) {484 return vcvth_n_f16_s16(a, 1);485}486 487// CHECK-LABEL: test_vcvth_n_f16_s32488// CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i32(i32 %a, i32 1)489// CHECK: ret half [[CVT]]490float16_t test_vcvth_n_f16_s32(int32_t a) {491 return vcvth_n_f16_s32(a, 1);492}493 494// CHECK-LABEL: test_vcvth_n_f16_s64495// CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i64(i64 %a, i32 1)496// CHECK: ret half [[CVT]]497float16_t test_vcvth_n_f16_s64(int64_t a) {498 return vcvth_n_f16_s64(a, 1);499}500 501// CHECK-LABEL: test_vcvth_n_s16_f16502// CHECK: [[CVT:%.*]] = call i32 @llvm.aarch64.neon.vcvtfp2fxs.i32.f16(half %a, i32 1)503// CHECK: [[RET:%.*]] = trunc i32 [[CVT]] to i16504// CHECK: ret i16 [[RET]]505int16_t test_vcvth_n_s16_f16(float16_t a) {506 return vcvth_n_s16_f16(a, 1);507}508 509// CHECK-LABEL: test_vcvth_n_s32_f16510// CHECK: [[CVT:%.*]] = call i32 @llvm.aarch64.neon.vcvtfp2fxs.i32.f16(half %a, i32 1)511// CHECK: ret i32 [[CVT]]512int32_t test_vcvth_n_s32_f16(float16_t a) {513 return vcvth_n_s32_f16(a, 1);514}515 516// CHECK-LABEL: test_vcvth_n_s64_f16517// CHECK: [[CVT:%.*]] = call i64 @llvm.aarch64.neon.vcvtfp2fxs.i64.f16(half %a, i32 1)518// CHECK: ret i64 [[CVT]]519int64_t test_vcvth_n_s64_f16(float16_t a) {520 return vcvth_n_s64_f16(a, 1);521}522 523// CHECK-LABEL: test_vcvth_n_f16_u16524// CHECK: [[SEXT:%.*]] = zext i16 %a to i32525// CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxu2fp.f16.i32(i32 [[SEXT]], i32 1)526// CHECK: ret half [[CVT]]527float16_t test_vcvth_n_f16_u16(int16_t a) {528 return vcvth_n_f16_u16(a, 1);529}530 531// CHECK-LABEL: test_vcvth_n_f16_u32532// CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxu2fp.f16.i32(i32 %a, i32 1)533// CHECK: ret half [[CVT]]534float16_t test_vcvth_n_f16_u32(int32_t a) {535 return vcvth_n_f16_u32(a, 1);536}537 538// CHECK-LABEL: test_vcvth_n_f16_u64539// CHECK: [[CVT:%.*]] = call half @llvm.aarch64.neon.vcvtfxu2fp.f16.i64(i64 %a, i32 1)540// CHECK: ret half [[CVT]]541float16_t test_vcvth_n_f16_u64(int64_t a) {542 return vcvth_n_f16_u64(a, 1);543}544 545// CHECK-LABEL: test_vcvth_n_u16_f16546// CHECK: [[CVT:%.*]] = call i32 @llvm.aarch64.neon.vcvtfp2fxu.i32.f16(half %a, i32 1)547// CHECK: [[RET:%.*]] = trunc i32 [[CVT]] to i16548// CHECK: ret i16 [[RET]]549int16_t test_vcvth_n_u16_f16(float16_t a) {550 return vcvth_n_u16_f16(a, 1);551}552 553// CHECK-LABEL: test_vcvth_n_u32_f16554// CHECK: [[CVT:%.*]] = call i32 @llvm.aarch64.neon.vcvtfp2fxu.i32.f16(half %a, i32 1)555// CHECK: ret i32 [[CVT]]556int32_t test_vcvth_n_u32_f16(float16_t a) {557 return vcvth_n_u32_f16(a, 1);558}559 560// CHECK-LABEL: test_vcvth_n_u64_f16561// CHECK: [[CVT:%.*]] = call i64 @llvm.aarch64.neon.vcvtfp2fxu.i64.f16(half %a, i32 1)562// CHECK: ret i64 [[CVT]]563int64_t test_vcvth_n_u64_f16(float16_t a) {564 return vcvth_n_u64_f16(a, 1);565}566 567// CHECK-LABEL: test_vdivh_f16568// CHECK: [[DIV:%.*]] = fdiv half %a, %b569// CHECK: ret half [[DIV]]570float16_t test_vdivh_f16(float16_t a, float16_t b) {571 return vdivh_f16(a, b);572}573 574// CHECK-LABEL: test_vmaxh_f16575// CHECK: [[MAX:%.*]] = call half @llvm.aarch64.neon.fmax.f16(half %a, half %b)576// CHECK: ret half [[MAX]]577float16_t test_vmaxh_f16(float16_t a, float16_t b) {578 return vmaxh_f16(a, b);579}580 581// CHECK-LABEL: test_vmaxnmh_f16582// CHECK: [[MAX:%.*]] = call half @llvm.aarch64.neon.fmaxnm.f16(half %a, half %b)583// CHECK: ret half [[MAX]]584float16_t test_vmaxnmh_f16(float16_t a, float16_t b) {585 return vmaxnmh_f16(a, b);586}587 588// CHECK-LABEL: test_vminh_f16589// CHECK: [[MIN:%.*]] = call half @llvm.aarch64.neon.fmin.f16(half %a, half %b)590// CHECK: ret half [[MIN]]591float16_t test_vminh_f16(float16_t a, float16_t b) {592 return vminh_f16(a, b);593}594 595// CHECK-LABEL: test_vminnmh_f16596// CHECK: [[MIN:%.*]] = call half @llvm.aarch64.neon.fminnm.f16(half %a, half %b)597// CHECK: ret half [[MIN]]598float16_t test_vminnmh_f16(float16_t a, float16_t b) {599 return vminnmh_f16(a, b);600}601 602// CHECK-LABEL: test_vmulh_f16603// CHECK: [[MUL:%.*]] = fmul half %a, %b604// CHECK: ret half [[MUL]]605float16_t test_vmulh_f16(float16_t a, float16_t b) {606 return vmulh_f16(a, b);607}608 609// CHECK-LABEL: test_vmulxh_f16610// CHECK: [[MUL:%.*]] = call half @llvm.aarch64.neon.fmulx.f16(half %a, half %b)611// CHECK: ret half [[MUL]]612float16_t test_vmulxh_f16(float16_t a, float16_t b) {613 return vmulxh_f16(a, b);614}615 616// CHECK-LABEL: test_vrecpsh_f16617// CHECK: [[RECPS:%.*]] = call half @llvm.aarch64.neon.frecps.f16(half %a, half %b)618// CHECK: ret half [[RECPS]]619float16_t test_vrecpsh_f16(float16_t a, float16_t b) {620 return vrecpsh_f16(a, b);621}622 623// CHECK-LABEL: test_vrsqrtsh_f16624// CHECK: [[RSQRTS:%.*]] = call half @llvm.aarch64.neon.frsqrts.f16(half %a, half %b)625// CHECK: ret half [[RSQRTS]]626float16_t test_vrsqrtsh_f16(float16_t a, float16_t b) {627 return vrsqrtsh_f16(a, b);628}629 630// CHECK-LABEL: test_vsubh_f16631// CHECK: [[SUB:%.*]] = fsub half %a, %b632// CHECK: ret half [[SUB]]633float16_t test_vsubh_f16(float16_t a, float16_t b) {634 return vsubh_f16(a, b);635}636 637// CHECK-LABEL: test_vfmah_f16638// CHECK: [[FMA:%.*]] = call half @llvm.fma.f16(half %b, half %c, half %a)639// CHECK: ret half [[FMA]]640float16_t test_vfmah_f16(float16_t a, float16_t b, float16_t c) {641 return vfmah_f16(a, b, c);642}643 644// CHECK-LABEL: test_vfmsh_f16645// CHECK: [[SUB:%.*]] = fneg half %b646// CHECK: [[ADD:%.*]] = call half @llvm.fma.f16(half [[SUB]], half %c, half %a)647// CHECK: ret half [[ADD]]648float16_t test_vfmsh_f16(float16_t a, float16_t b, float16_t c) {649 return vfmsh_f16(a, b, c);650}651 652