2369 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature2// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-feature +fullfp16 -target-feature +v8.2a\3// RUN: -flax-vector-conversions=none -disable-O0-optnone -emit-llvm -o - %s \4// RUN: | opt -S -passes=mem2reg,sroa \5// RUN: | FileCheck %s6 7// REQUIRES: aarch64-registered-target8 9#include <arm_neon.h>10 11// CHECK-LABEL: define {{[^@]+}}@test_vabs_f1612// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {13// CHECK-NEXT: entry:14// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>15// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>16// CHECK-NEXT: [[VABS_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>17// CHECK-NEXT: [[VABS1_I:%.*]] = call <4 x half> @llvm.fabs.v4f16(<4 x half> [[VABS_I]])18// CHECK-NEXT: ret <4 x half> [[VABS1_I]]19//20float16x4_t test_vabs_f16(float16x4_t a) {21 return vabs_f16(a);22}23 24// CHECK-LABEL: define {{[^@]+}}@test_vabsq_f1625// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {26// CHECK-NEXT: entry:27// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>28// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>29// CHECK-NEXT: [[VABS_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>30// CHECK-NEXT: [[VABS1_I:%.*]] = call <8 x half> @llvm.fabs.v8f16(<8 x half> [[VABS_I]])31// CHECK-NEXT: ret <8 x half> [[VABS1_I]]32//33float16x8_t test_vabsq_f16(float16x8_t a) {34 return vabsq_f16(a);35}36 37// CHECK-LABEL: define {{[^@]+}}@test_vceqz_f1638// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {39// CHECK-NEXT: entry:40// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>41// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>42// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>43// CHECK-NEXT: [[TMP3:%.*]] = fcmp oeq <4 x half> [[TMP2]], zeroinitializer44// CHECK-NEXT: [[VCEQZ_I:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i16>45// CHECK-NEXT: ret <4 x i16> [[VCEQZ_I]]46//47uint16x4_t test_vceqz_f16(float16x4_t a) {48 return vceqz_f16(a);49}50 51// CHECK-LABEL: define {{[^@]+}}@test_vceqzq_f1652// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {53// CHECK-NEXT: entry:54// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>55// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>56// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>57// CHECK-NEXT: [[TMP3:%.*]] = fcmp oeq <8 x half> [[TMP2]], zeroinitializer58// CHECK-NEXT: [[VCEQZ_I:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i16>59// CHECK-NEXT: ret <8 x i16> [[VCEQZ_I]]60//61uint16x8_t test_vceqzq_f16(float16x8_t a) {62 return vceqzq_f16(a);63}64 65// CHECK-LABEL: define {{[^@]+}}@test_vcgez_f1666// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {67// CHECK-NEXT: entry:68// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>69// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>70// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>71// CHECK-NEXT: [[TMP3:%.*]] = fcmp oge <4 x half> [[TMP2]], zeroinitializer72// CHECK-NEXT: [[VCGEZ_I:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i16>73// CHECK-NEXT: ret <4 x i16> [[VCGEZ_I]]74//75uint16x4_t test_vcgez_f16(float16x4_t a) {76 return vcgez_f16(a);77}78 79// CHECK-LABEL: define {{[^@]+}}@test_vcgezq_f1680// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {81// CHECK-NEXT: entry:82// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>83// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>84// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>85// CHECK-NEXT: [[TMP3:%.*]] = fcmp oge <8 x half> [[TMP2]], zeroinitializer86// CHECK-NEXT: [[VCGEZ_I:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i16>87// CHECK-NEXT: ret <8 x i16> [[VCGEZ_I]]88//89uint16x8_t test_vcgezq_f16(float16x8_t a) {90 return vcgezq_f16(a);91}92 93// CHECK-LABEL: define {{[^@]+}}@test_vcgtz_f1694// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {95// CHECK-NEXT: entry:96// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>97// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>98// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>99// CHECK-NEXT: [[TMP3:%.*]] = fcmp ogt <4 x half> [[TMP2]], zeroinitializer100// CHECK-NEXT: [[VCGTZ_I:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i16>101// CHECK-NEXT: ret <4 x i16> [[VCGTZ_I]]102//103uint16x4_t test_vcgtz_f16(float16x4_t a) {104 return vcgtz_f16(a);105}106 107// CHECK-LABEL: define {{[^@]+}}@test_vcgtzq_f16108// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {109// CHECK-NEXT: entry:110// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>111// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>112// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>113// CHECK-NEXT: [[TMP3:%.*]] = fcmp ogt <8 x half> [[TMP2]], zeroinitializer114// CHECK-NEXT: [[VCGTZ_I:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i16>115// CHECK-NEXT: ret <8 x i16> [[VCGTZ_I]]116//117uint16x8_t test_vcgtzq_f16(float16x8_t a) {118 return vcgtzq_f16(a);119}120 121// CHECK-LABEL: define {{[^@]+}}@test_vclez_f16122// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {123// CHECK-NEXT: entry:124// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>125// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>126// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>127// CHECK-NEXT: [[TMP3:%.*]] = fcmp ole <4 x half> [[TMP2]], zeroinitializer128// CHECK-NEXT: [[VCLEZ_I:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i16>129// CHECK-NEXT: ret <4 x i16> [[VCLEZ_I]]130//131uint16x4_t test_vclez_f16(float16x4_t a) {132 return vclez_f16(a);133}134 135// CHECK-LABEL: define {{[^@]+}}@test_vclezq_f16136// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {137// CHECK-NEXT: entry:138// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>139// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>140// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>141// CHECK-NEXT: [[TMP3:%.*]] = fcmp ole <8 x half> [[TMP2]], zeroinitializer142// CHECK-NEXT: [[VCLEZ_I:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i16>143// CHECK-NEXT: ret <8 x i16> [[VCLEZ_I]]144//145uint16x8_t test_vclezq_f16(float16x8_t a) {146 return vclezq_f16(a);147}148 149// CHECK-LABEL: define {{[^@]+}}@test_vcltz_f16150// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {151// CHECK-NEXT: entry:152// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>153// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>154// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>155// CHECK-NEXT: [[TMP3:%.*]] = fcmp olt <4 x half> [[TMP2]], zeroinitializer156// CHECK-NEXT: [[VCLTZ_I:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i16>157// CHECK-NEXT: ret <4 x i16> [[VCLTZ_I]]158//159uint16x4_t test_vcltz_f16(float16x4_t a) {160 return vcltz_f16(a);161}162 163// CHECK-LABEL: define {{[^@]+}}@test_vcltzq_f16164// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {165// CHECK-NEXT: entry:166// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>167// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>168// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>169// CHECK-NEXT: [[TMP3:%.*]] = fcmp olt <8 x half> [[TMP2]], zeroinitializer170// CHECK-NEXT: [[VCLTZ_I:%.*]] = sext <8 x i1> [[TMP3]] to <8 x i16>171// CHECK-NEXT: ret <8 x i16> [[VCLTZ_I]]172//173uint16x8_t test_vcltzq_f16(float16x8_t a) {174 return vcltzq_f16(a);175}176 177// CHECK-LABEL: define {{[^@]+}}@test_vcvt_f16_s16178// CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {179// CHECK-NEXT: entry:180// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>181// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>182// CHECK-NEXT: [[VCVT_I:%.*]] = sitofp <4 x i16> [[TMP1]] to <4 x half>183// CHECK-NEXT: ret <4 x half> [[VCVT_I]]184//185float16x4_t test_vcvt_f16_s16 (int16x4_t a) {186 return vcvt_f16_s16(a);187}188 189// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_f16_s16190// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {191// CHECK-NEXT: entry:192// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>193// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>194// CHECK-NEXT: [[VCVT_I:%.*]] = sitofp <8 x i16> [[TMP1]] to <8 x half>195// CHECK-NEXT: ret <8 x half> [[VCVT_I]]196//197float16x8_t test_vcvtq_f16_s16 (int16x8_t a) {198 return vcvtq_f16_s16(a);199}200 201// CHECK-LABEL: define {{[^@]+}}@test_vcvt_f16_u16202// CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {203// CHECK-NEXT: entry:204// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>205// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>206// CHECK-NEXT: [[VCVT_I:%.*]] = uitofp <4 x i16> [[TMP1]] to <4 x half>207// CHECK-NEXT: ret <4 x half> [[VCVT_I]]208//209float16x4_t test_vcvt_f16_u16 (uint16x4_t a) {210 return vcvt_f16_u16(a);211}212 213// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_f16_u16214// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {215// CHECK-NEXT: entry:216// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>217// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>218// CHECK-NEXT: [[VCVT_I:%.*]] = uitofp <8 x i16> [[TMP1]] to <8 x half>219// CHECK-NEXT: ret <8 x half> [[VCVT_I]]220//221float16x8_t test_vcvtq_f16_u16 (uint16x8_t a) {222 return vcvtq_f16_u16(a);223}224 225// CHECK-LABEL: define {{[^@]+}}@test_vcvt_s16_f16226// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {227// CHECK-NEXT: entry:228// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>229// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>230// CHECK-NEXT: [[VCVTZ_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>231// CHECK-NEXT: [[VCVTZ1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtzs.v4i16.v4f16(<4 x half> [[VCVTZ_I]])232// CHECK-NEXT: ret <4 x i16> [[VCVTZ1_I]]233//234int16x4_t test_vcvt_s16_f16 (float16x4_t a) {235 return vcvt_s16_f16(a);236}237 238// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_s16_f16239// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {240// CHECK-NEXT: entry:241// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>242// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>243// CHECK-NEXT: [[VCVTZ_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>244// CHECK-NEXT: [[VCVTZ1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtzs.v8i16.v8f16(<8 x half> [[VCVTZ_I]])245// CHECK-NEXT: ret <8 x i16> [[VCVTZ1_I]]246//247int16x8_t test_vcvtq_s16_f16 (float16x8_t a) {248 return vcvtq_s16_f16(a);249}250 251// CHECK-LABEL: define {{[^@]+}}@test_vcvt_u16_f16252// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {253// CHECK-NEXT: entry:254// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>255// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>256// CHECK-NEXT: [[VCVTZ_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>257// CHECK-NEXT: [[VCVTZ1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtzu.v4i16.v4f16(<4 x half> [[VCVTZ_I]])258// CHECK-NEXT: ret <4 x i16> [[VCVTZ1_I]]259//260uint16x4_t test_vcvt_u16_f16 (float16x4_t a) {261 return vcvt_u16_f16(a);262}263 264// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_u16_f16265// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {266// CHECK-NEXT: entry:267// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>268// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>269// CHECK-NEXT: [[VCVTZ_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>270// CHECK-NEXT: [[VCVTZ1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtzu.v8i16.v8f16(<8 x half> [[VCVTZ_I]])271// CHECK-NEXT: ret <8 x i16> [[VCVTZ1_I]]272//273uint16x8_t test_vcvtq_u16_f16 (float16x8_t a) {274 return vcvtq_u16_f16(a);275}276 277// CHECK-LABEL: define {{[^@]+}}@test_vcvta_s16_f16278// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {279// CHECK-NEXT: entry:280// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>281// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>282// CHECK-NEXT: [[VCVTA_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>283// CHECK-NEXT: [[VCVTA1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtas.v4i16.v4f16(<4 x half> [[VCVTA_I]])284// CHECK-NEXT: ret <4 x i16> [[VCVTA1_I]]285//286int16x4_t test_vcvta_s16_f16 (float16x4_t a) {287 return vcvta_s16_f16(a);288}289 290// CHECK-LABEL: define {{[^@]+}}@test_vcvta_u16_f16291// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {292// CHECK-NEXT: entry:293// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>294// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>295// CHECK-NEXT: [[VCVTA_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>296// CHECK-NEXT: [[VCVTA1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtau.v4i16.v4f16(<4 x half> [[VCVTA_I]])297// CHECK-NEXT: ret <4 x i16> [[VCVTA1_I]]298//299uint16x4_t test_vcvta_u16_f16 (float16x4_t a) {300 return vcvta_u16_f16(a);301}302 303// CHECK-LABEL: define {{[^@]+}}@test_vcvtaq_s16_f16304// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {305// CHECK-NEXT: entry:306// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>307// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>308// CHECK-NEXT: [[VCVTA_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>309// CHECK-NEXT: [[VCVTA1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtas.v8i16.v8f16(<8 x half> [[VCVTA_I]])310// CHECK-NEXT: ret <8 x i16> [[VCVTA1_I]]311//312int16x8_t test_vcvtaq_s16_f16 (float16x8_t a) {313 return vcvtaq_s16_f16(a);314}315 316// CHECK-LABEL: define {{[^@]+}}@test_vcvtm_s16_f16317// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {318// CHECK-NEXT: entry:319// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>320// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>321// CHECK-NEXT: [[VCVTM_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>322// CHECK-NEXT: [[VCVTM1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtms.v4i16.v4f16(<4 x half> [[VCVTM_I]])323// CHECK-NEXT: ret <4 x i16> [[VCVTM1_I]]324//325int16x4_t test_vcvtm_s16_f16 (float16x4_t a) {326 return vcvtm_s16_f16(a);327}328 329// CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_s16_f16330// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {331// CHECK-NEXT: entry:332// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>333// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>334// CHECK-NEXT: [[VCVTM_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>335// CHECK-NEXT: [[VCVTM1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtms.v8i16.v8f16(<8 x half> [[VCVTM_I]])336// CHECK-NEXT: ret <8 x i16> [[VCVTM1_I]]337//338int16x8_t test_vcvtmq_s16_f16 (float16x8_t a) {339 return vcvtmq_s16_f16(a);340}341 342// CHECK-LABEL: define {{[^@]+}}@test_vcvtm_u16_f16343// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {344// CHECK-NEXT: entry:345// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>346// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>347// CHECK-NEXT: [[VCVTM_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>348// CHECK-NEXT: [[VCVTM1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtmu.v4i16.v4f16(<4 x half> [[VCVTM_I]])349// CHECK-NEXT: ret <4 x i16> [[VCVTM1_I]]350//351uint16x4_t test_vcvtm_u16_f16 (float16x4_t a) {352 return vcvtm_u16_f16(a);353}354 355// CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_u16_f16356// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {357// CHECK-NEXT: entry:358// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>359// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>360// CHECK-NEXT: [[VCVTM_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>361// CHECK-NEXT: [[VCVTM1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtmu.v8i16.v8f16(<8 x half> [[VCVTM_I]])362// CHECK-NEXT: ret <8 x i16> [[VCVTM1_I]]363//364uint16x8_t test_vcvtmq_u16_f16 (float16x8_t a) {365 return vcvtmq_u16_f16(a);366}367 368// CHECK-LABEL: define {{[^@]+}}@test_vcvtn_s16_f16369// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {370// CHECK-NEXT: entry:371// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>372// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>373// CHECK-NEXT: [[VCVTN_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>374// CHECK-NEXT: [[VCVTN1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtns.v4i16.v4f16(<4 x half> [[VCVTN_I]])375// CHECK-NEXT: ret <4 x i16> [[VCVTN1_I]]376//377int16x4_t test_vcvtn_s16_f16 (float16x4_t a) {378 return vcvtn_s16_f16(a);379}380 381// CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_s16_f16382// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {383// CHECK-NEXT: entry:384// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>385// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>386// CHECK-NEXT: [[VCVTN_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>387// CHECK-NEXT: [[VCVTN1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtns.v8i16.v8f16(<8 x half> [[VCVTN_I]])388// CHECK-NEXT: ret <8 x i16> [[VCVTN1_I]]389//390int16x8_t test_vcvtnq_s16_f16 (float16x8_t a) {391 return vcvtnq_s16_f16(a);392}393 394// CHECK-LABEL: define {{[^@]+}}@test_vcvtn_u16_f16395// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {396// CHECK-NEXT: entry:397// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>398// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>399// CHECK-NEXT: [[VCVTN_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>400// CHECK-NEXT: [[VCVTN1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtnu.v4i16.v4f16(<4 x half> [[VCVTN_I]])401// CHECK-NEXT: ret <4 x i16> [[VCVTN1_I]]402//403uint16x4_t test_vcvtn_u16_f16 (float16x4_t a) {404 return vcvtn_u16_f16(a);405}406 407// CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_u16_f16408// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {409// CHECK-NEXT: entry:410// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>411// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>412// CHECK-NEXT: [[VCVTN_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>413// CHECK-NEXT: [[VCVTN1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtnu.v8i16.v8f16(<8 x half> [[VCVTN_I]])414// CHECK-NEXT: ret <8 x i16> [[VCVTN1_I]]415//416uint16x8_t test_vcvtnq_u16_f16 (float16x8_t a) {417 return vcvtnq_u16_f16(a);418}419 420// CHECK-LABEL: define {{[^@]+}}@test_vcvtp_s16_f16421// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {422// CHECK-NEXT: entry:423// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>424// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>425// CHECK-NEXT: [[VCVTP_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>426// CHECK-NEXT: [[VCVTP1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtps.v4i16.v4f16(<4 x half> [[VCVTP_I]])427// CHECK-NEXT: ret <4 x i16> [[VCVTP1_I]]428//429int16x4_t test_vcvtp_s16_f16 (float16x4_t a) {430 return vcvtp_s16_f16(a);431}432 433// CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_s16_f16434// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {435// CHECK-NEXT: entry:436// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>437// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>438// CHECK-NEXT: [[VCVTP_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>439// CHECK-NEXT: [[VCVTP1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtps.v8i16.v8f16(<8 x half> [[VCVTP_I]])440// CHECK-NEXT: ret <8 x i16> [[VCVTP1_I]]441//442int16x8_t test_vcvtpq_s16_f16 (float16x8_t a) {443 return vcvtpq_s16_f16(a);444}445 446// CHECK-LABEL: define {{[^@]+}}@test_vcvtp_u16_f16447// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {448// CHECK-NEXT: entry:449// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>450// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>451// CHECK-NEXT: [[VCVTP_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>452// CHECK-NEXT: [[VCVTP1_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtpu.v4i16.v4f16(<4 x half> [[VCVTP_I]])453// CHECK-NEXT: ret <4 x i16> [[VCVTP1_I]]454//455uint16x4_t test_vcvtp_u16_f16 (float16x4_t a) {456 return vcvtp_u16_f16(a);457}458 459// CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_u16_f16460// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {461// CHECK-NEXT: entry:462// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>463// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>464// CHECK-NEXT: [[VCVTP_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>465// CHECK-NEXT: [[VCVTP1_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtpu.v8i16.v8f16(<8 x half> [[VCVTP_I]])466// CHECK-NEXT: ret <8 x i16> [[VCVTP1_I]]467//468uint16x8_t test_vcvtpq_u16_f16 (float16x8_t a) {469 return vcvtpq_u16_f16(a);470}471 472// FIXME: Fix the zero constant when fp16 non-storage-only type becomes available.473// CHECK-LABEL: define {{[^@]+}}@test_vneg_f16474// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {475// CHECK-NEXT: entry:476// CHECK-NEXT: [[FNEG_I:%.*]] = fneg <4 x half> [[A]]477// CHECK-NEXT: ret <4 x half> [[FNEG_I]]478//479float16x4_t test_vneg_f16(float16x4_t a) {480 return vneg_f16(a);481}482 483// CHECK-LABEL: define {{[^@]+}}@test_vnegq_f16484// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {485// CHECK-NEXT: entry:486// CHECK-NEXT: [[FNEG_I:%.*]] = fneg <8 x half> [[A]]487// CHECK-NEXT: ret <8 x half> [[FNEG_I]]488//489float16x8_t test_vnegq_f16(float16x8_t a) {490 return vnegq_f16(a);491}492 493// CHECK-LABEL: define {{[^@]+}}@test_vrecpe_f16494// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {495// CHECK-NEXT: entry:496// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>497// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>498// CHECK-NEXT: [[VRECPE_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>499// CHECK-NEXT: [[VRECPE_V1_I:%.*]] = call <4 x half> @llvm.aarch64.neon.frecpe.v4f16(<4 x half> [[VRECPE_V_I]])500// CHECK-NEXT: ret <4 x half> [[VRECPE_V1_I]]501//502float16x4_t test_vrecpe_f16(float16x4_t a) {503 return vrecpe_f16(a);504}505 506// CHECK-LABEL: define {{[^@]+}}@test_vrecpeq_f16507// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {508// CHECK-NEXT: entry:509// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>510// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>511// CHECK-NEXT: [[VRECPEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>512// CHECK-NEXT: [[VRECPEQ_V1_I:%.*]] = call <8 x half> @llvm.aarch64.neon.frecpe.v8f16(<8 x half> [[VRECPEQ_V_I]])513// CHECK-NEXT: ret <8 x half> [[VRECPEQ_V1_I]]514//515float16x8_t test_vrecpeq_f16(float16x8_t a) {516 return vrecpeq_f16(a);517}518 519// CHECK-LABEL: define {{[^@]+}}@test_vrnd_f16520// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {521// CHECK-NEXT: entry:522// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>523// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>524// CHECK-NEXT: [[VRNDZ_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>525// CHECK-NEXT: [[VRNDZ1_I:%.*]] = call <4 x half> @llvm.trunc.v4f16(<4 x half> [[VRNDZ_I]])526// CHECK-NEXT: ret <4 x half> [[VRNDZ1_I]]527//528float16x4_t test_vrnd_f16(float16x4_t a) {529 return vrnd_f16(a);530}531 532// CHECK-LABEL: define {{[^@]+}}@test_vrndq_f16533// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {534// CHECK-NEXT: entry:535// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>536// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>537// CHECK-NEXT: [[VRNDZ_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>538// CHECK-NEXT: [[VRNDZ1_I:%.*]] = call <8 x half> @llvm.trunc.v8f16(<8 x half> [[VRNDZ_I]])539// CHECK-NEXT: ret <8 x half> [[VRNDZ1_I]]540//541float16x8_t test_vrndq_f16(float16x8_t a) {542 return vrndq_f16(a);543}544 545// CHECK-LABEL: define {{[^@]+}}@test_vrnda_f16546// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {547// CHECK-NEXT: entry:548// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>549// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>550// CHECK-NEXT: [[VRNDA_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>551// CHECK-NEXT: [[VRNDA1_I:%.*]] = call <4 x half> @llvm.round.v4f16(<4 x half> [[VRNDA_I]])552// CHECK-NEXT: ret <4 x half> [[VRNDA1_I]]553//554float16x4_t test_vrnda_f16(float16x4_t a) {555 return vrnda_f16(a);556}557 558// CHECK-LABEL: define {{[^@]+}}@test_vrndaq_f16559// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {560// CHECK-NEXT: entry:561// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>562// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>563// CHECK-NEXT: [[VRNDA_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>564// CHECK-NEXT: [[VRNDA1_I:%.*]] = call <8 x half> @llvm.round.v8f16(<8 x half> [[VRNDA_I]])565// CHECK-NEXT: ret <8 x half> [[VRNDA1_I]]566//567float16x8_t test_vrndaq_f16(float16x8_t a) {568 return vrndaq_f16(a);569}570 571// CHECK-LABEL: define {{[^@]+}}@test_vrndi_f16572// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {573// CHECK-NEXT: entry:574// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>575// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>576// CHECK-NEXT: [[VRNDI_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>577// CHECK-NEXT: [[VRNDI_V1_I:%.*]] = call <4 x half> @llvm.nearbyint.v4f16(<4 x half> [[VRNDI_V_I]])578// CHECK-NEXT: ret <4 x half> [[VRNDI_V1_I]]579//580float16x4_t test_vrndi_f16(float16x4_t a) {581 return vrndi_f16(a);582}583 584// CHECK-LABEL: define {{[^@]+}}@test_vrndiq_f16585// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {586// CHECK-NEXT: entry:587// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>588// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>589// CHECK-NEXT: [[VRNDIQ_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>590// CHECK-NEXT: [[VRNDIQ_V1_I:%.*]] = call <8 x half> @llvm.nearbyint.v8f16(<8 x half> [[VRNDIQ_V_I]])591// CHECK-NEXT: ret <8 x half> [[VRNDIQ_V1_I]]592//593float16x8_t test_vrndiq_f16(float16x8_t a) {594 return vrndiq_f16(a);595}596 597// CHECK-LABEL: define {{[^@]+}}@test_vrndm_f16598// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {599// CHECK-NEXT: entry:600// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>601// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>602// CHECK-NEXT: [[VRNDM_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>603// CHECK-NEXT: [[VRNDM1_I:%.*]] = call <4 x half> @llvm.floor.v4f16(<4 x half> [[VRNDM_I]])604// CHECK-NEXT: ret <4 x half> [[VRNDM1_I]]605//606float16x4_t test_vrndm_f16(float16x4_t a) {607 return vrndm_f16(a);608}609 610// CHECK-LABEL: define {{[^@]+}}@test_vrndmq_f16611// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {612// CHECK-NEXT: entry:613// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>614// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>615// CHECK-NEXT: [[VRNDM_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>616// CHECK-NEXT: [[VRNDM1_I:%.*]] = call <8 x half> @llvm.floor.v8f16(<8 x half> [[VRNDM_I]])617// CHECK-NEXT: ret <8 x half> [[VRNDM1_I]]618//619float16x8_t test_vrndmq_f16(float16x8_t a) {620 return vrndmq_f16(a);621}622 623// CHECK-LABEL: define {{[^@]+}}@test_vrndn_f16624// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {625// CHECK-NEXT: entry:626// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>627// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>628// CHECK-NEXT: [[VRNDN_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>629// CHECK-NEXT: [[VRNDN1_I:%.*]] = call <4 x half> @llvm.roundeven.v4f16(<4 x half> [[VRNDN_I]])630// CHECK-NEXT: ret <4 x half> [[VRNDN1_I]]631//632float16x4_t test_vrndn_f16(float16x4_t a) {633 return vrndn_f16(a);634}635 636// CHECK-LABEL: define {{[^@]+}}@test_vrndnq_f16637// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {638// CHECK-NEXT: entry:639// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>640// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>641// CHECK-NEXT: [[VRNDN_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>642// CHECK-NEXT: [[VRNDN1_I:%.*]] = call <8 x half> @llvm.roundeven.v8f16(<8 x half> [[VRNDN_I]])643// CHECK-NEXT: ret <8 x half> [[VRNDN1_I]]644//645float16x8_t test_vrndnq_f16(float16x8_t a) {646 return vrndnq_f16(a);647}648 649// CHECK-LABEL: define {{[^@]+}}@test_vrndp_f16650// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {651// CHECK-NEXT: entry:652// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>653// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>654// CHECK-NEXT: [[VRNDP_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>655// CHECK-NEXT: [[VRNDP1_I:%.*]] = call <4 x half> @llvm.ceil.v4f16(<4 x half> [[VRNDP_I]])656// CHECK-NEXT: ret <4 x half> [[VRNDP1_I]]657//658float16x4_t test_vrndp_f16(float16x4_t a) {659 return vrndp_f16(a);660}661 662// CHECK-LABEL: define {{[^@]+}}@test_vrndpq_f16663// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {664// CHECK-NEXT: entry:665// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>666// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>667// CHECK-NEXT: [[VRNDP_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>668// CHECK-NEXT: [[VRNDP1_I:%.*]] = call <8 x half> @llvm.ceil.v8f16(<8 x half> [[VRNDP_I]])669// CHECK-NEXT: ret <8 x half> [[VRNDP1_I]]670//671float16x8_t test_vrndpq_f16(float16x8_t a) {672 return vrndpq_f16(a);673}674 675// CHECK-LABEL: define {{[^@]+}}@test_vrndx_f16676// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {677// CHECK-NEXT: entry:678// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>679// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>680// CHECK-NEXT: [[VRNDX_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>681// CHECK-NEXT: [[VRNDX1_I:%.*]] = call <4 x half> @llvm.rint.v4f16(<4 x half> [[VRNDX_I]])682// CHECK-NEXT: ret <4 x half> [[VRNDX1_I]]683//684float16x4_t test_vrndx_f16(float16x4_t a) {685 return vrndx_f16(a);686}687 688// CHECK-LABEL: define {{[^@]+}}@test_vrndxq_f16689// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {690// CHECK-NEXT: entry:691// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>692// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>693// CHECK-NEXT: [[VRNDX_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>694// CHECK-NEXT: [[VRNDX1_I:%.*]] = call <8 x half> @llvm.rint.v8f16(<8 x half> [[VRNDX_I]])695// CHECK-NEXT: ret <8 x half> [[VRNDX1_I]]696//697float16x8_t test_vrndxq_f16(float16x8_t a) {698 return vrndxq_f16(a);699}700 701// CHECK-LABEL: define {{[^@]+}}@test_vrsqrte_f16702// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {703// CHECK-NEXT: entry:704// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>705// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>706// CHECK-NEXT: [[VRSQRTE_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>707// CHECK-NEXT: [[VRSQRTE_V1_I:%.*]] = call <4 x half> @llvm.aarch64.neon.frsqrte.v4f16(<4 x half> [[VRSQRTE_V_I]])708// CHECK-NEXT: ret <4 x half> [[VRSQRTE_V1_I]]709//710float16x4_t test_vrsqrte_f16(float16x4_t a) {711 return vrsqrte_f16(a);712}713 714// CHECK-LABEL: define {{[^@]+}}@test_vrsqrteq_f16715// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {716// CHECK-NEXT: entry:717// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>718// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>719// CHECK-NEXT: [[VRSQRTEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>720// CHECK-NEXT: [[VRSQRTEQ_V1_I:%.*]] = call <8 x half> @llvm.aarch64.neon.frsqrte.v8f16(<8 x half> [[VRSQRTEQ_V_I]])721// CHECK-NEXT: ret <8 x half> [[VRSQRTEQ_V1_I]]722//723float16x8_t test_vrsqrteq_f16(float16x8_t a) {724 return vrsqrteq_f16(a);725}726 727// CHECK-LABEL: define {{[^@]+}}@test_vsqrt_f16728// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {729// CHECK-NEXT: entry:730// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>731// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>732// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>733// CHECK-NEXT: [[VSQRT_I:%.*]] = call <4 x half> @llvm.sqrt.v4f16(<4 x half> [[TMP2]])734// CHECK-NEXT: ret <4 x half> [[VSQRT_I]]735//736float16x4_t test_vsqrt_f16(float16x4_t a) {737 return vsqrt_f16(a);738}739 740// CHECK-LABEL: define {{[^@]+}}@test_vsqrtq_f16741// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {742// CHECK-NEXT: entry:743// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>744// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>745// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>746// CHECK-NEXT: [[VSQRT_I:%.*]] = call <8 x half> @llvm.sqrt.v8f16(<8 x half> [[TMP2]])747// CHECK-NEXT: ret <8 x half> [[VSQRT_I]]748//749float16x8_t test_vsqrtq_f16(float16x8_t a) {750 return vsqrtq_f16(a);751}752 753// CHECK-LABEL: define {{[^@]+}}@test_vadd_f16754// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {755// CHECK-NEXT: entry:756// CHECK-NEXT: [[ADD_I:%.*]] = fadd <4 x half> [[A]], [[B]]757// CHECK-NEXT: ret <4 x half> [[ADD_I]]758//759float16x4_t test_vadd_f16(float16x4_t a, float16x4_t b) {760 return vadd_f16(a, b);761}762 763// CHECK-LABEL: define {{[^@]+}}@test_vaddq_f16764// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {765// CHECK-NEXT: entry:766// CHECK-NEXT: [[ADD_I:%.*]] = fadd <8 x half> [[A]], [[B]]767// CHECK-NEXT: ret <8 x half> [[ADD_I]]768//769float16x8_t test_vaddq_f16(float16x8_t a, float16x8_t b) {770 return vaddq_f16(a, b);771}772 773// CHECK-LABEL: define {{[^@]+}}@test_vabd_f16774// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {775// CHECK-NEXT: entry:776// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>777// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>778// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>779// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>780// CHECK-NEXT: [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>781// CHECK-NEXT: [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>782// CHECK-NEXT: [[VABD2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fabd.v4f16(<4 x half> [[VABD_I]], <4 x half> [[VABD1_I]])783// CHECK-NEXT: ret <4 x half> [[VABD2_I]]784//785float16x4_t test_vabd_f16(float16x4_t a, float16x4_t b) {786 return vabd_f16(a, b);787}788 789// CHECK-LABEL: define {{[^@]+}}@test_vabdq_f16790// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {791// CHECK-NEXT: entry:792// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>793// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>794// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>795// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>796// CHECK-NEXT: [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>797// CHECK-NEXT: [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>798// CHECK-NEXT: [[VABD2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fabd.v8f16(<8 x half> [[VABD_I]], <8 x half> [[VABD1_I]])799// CHECK-NEXT: ret <8 x half> [[VABD2_I]]800//801float16x8_t test_vabdq_f16(float16x8_t a, float16x8_t b) {802 return vabdq_f16(a, b);803}804 805// CHECK-LABEL: define {{[^@]+}}@test_vcage_f16806// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {807// CHECK-NEXT: entry:808// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>809// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>810// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>811// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>812// CHECK-NEXT: [[VCAGE_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>813// CHECK-NEXT: [[VCAGE_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>814// CHECK-NEXT: [[VCAGE_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.facge.v4i16.v4f16(<4 x half> [[VCAGE_V_I]], <4 x half> [[VCAGE_V1_I]])815// CHECK-NEXT: ret <4 x i16> [[VCAGE_V2_I]]816//817uint16x4_t test_vcage_f16(float16x4_t a, float16x4_t b) {818 return vcage_f16(a, b);819}820 821// CHECK-LABEL: define {{[^@]+}}@test_vcageq_f16822// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {823// CHECK-NEXT: entry:824// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>825// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>826// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>827// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>828// CHECK-NEXT: [[VCAGEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>829// CHECK-NEXT: [[VCAGEQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>830// CHECK-NEXT: [[VCAGEQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.facge.v8i16.v8f16(<8 x half> [[VCAGEQ_V_I]], <8 x half> [[VCAGEQ_V1_I]])831// CHECK-NEXT: ret <8 x i16> [[VCAGEQ_V2_I]]832//833uint16x8_t test_vcageq_f16(float16x8_t a, float16x8_t b) {834 return vcageq_f16(a, b);835}836 837// CHECK-LABEL: define {{[^@]+}}@test_vcagt_f16838// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {839// CHECK-NEXT: entry:840// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>841// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>842// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>843// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>844// CHECK-NEXT: [[VCAGT_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>845// CHECK-NEXT: [[VCAGT_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>846// CHECK-NEXT: [[VCAGT_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.facgt.v4i16.v4f16(<4 x half> [[VCAGT_V_I]], <4 x half> [[VCAGT_V1_I]])847// CHECK-NEXT: ret <4 x i16> [[VCAGT_V2_I]]848//849uint16x4_t test_vcagt_f16(float16x4_t a, float16x4_t b) {850 return vcagt_f16(a, b);851}852 853// CHECK-LABEL: define {{[^@]+}}@test_vcagtq_f16854// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {855// CHECK-NEXT: entry:856// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>857// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>858// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>859// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>860// CHECK-NEXT: [[VCAGTQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>861// CHECK-NEXT: [[VCAGTQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>862// CHECK-NEXT: [[VCAGTQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.facgt.v8i16.v8f16(<8 x half> [[VCAGTQ_V_I]], <8 x half> [[VCAGTQ_V1_I]])863// CHECK-NEXT: ret <8 x i16> [[VCAGTQ_V2_I]]864//865uint16x8_t test_vcagtq_f16(float16x8_t a, float16x8_t b) {866 return vcagtq_f16(a, b);867}868 869// CHECK-LABEL: define {{[^@]+}}@test_vcale_f16870// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {871// CHECK-NEXT: entry:872// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>873// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>874// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>875// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>876// CHECK-NEXT: [[VCALE_V_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>877// CHECK-NEXT: [[VCALE_V1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>878// CHECK-NEXT: [[VCALE_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.facge.v4i16.v4f16(<4 x half> [[VCALE_V_I]], <4 x half> [[VCALE_V1_I]])879// CHECK-NEXT: ret <4 x i16> [[VCALE_V2_I]]880//881uint16x4_t test_vcale_f16(float16x4_t a, float16x4_t b) {882 return vcale_f16(a, b);883}884 885// CHECK-LABEL: define {{[^@]+}}@test_vcaleq_f16886// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {887// CHECK-NEXT: entry:888// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>889// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>890// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>891// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>892// CHECK-NEXT: [[VCALEQ_V_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>893// CHECK-NEXT: [[VCALEQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>894// CHECK-NEXT: [[VCALEQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.facge.v8i16.v8f16(<8 x half> [[VCALEQ_V_I]], <8 x half> [[VCALEQ_V1_I]])895// CHECK-NEXT: ret <8 x i16> [[VCALEQ_V2_I]]896//897uint16x8_t test_vcaleq_f16(float16x8_t a, float16x8_t b) {898 return vcaleq_f16(a, b);899}900 901// CHECK-LABEL: define {{[^@]+}}@test_vcalt_f16902// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {903// CHECK-NEXT: entry:904// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>905// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>906// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>907// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>908// CHECK-NEXT: [[VCALT_V_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>909// CHECK-NEXT: [[VCALT_V1_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>910// CHECK-NEXT: [[VCALT_V2_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.facgt.v4i16.v4f16(<4 x half> [[VCALT_V_I]], <4 x half> [[VCALT_V1_I]])911// CHECK-NEXT: ret <4 x i16> [[VCALT_V2_I]]912//913uint16x4_t test_vcalt_f16(float16x4_t a, float16x4_t b) {914 return vcalt_f16(a, b);915}916 917// CHECK-LABEL: define {{[^@]+}}@test_vcaltq_f16918// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {919// CHECK-NEXT: entry:920// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>921// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>922// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>923// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>924// CHECK-NEXT: [[VCALTQ_V_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>925// CHECK-NEXT: [[VCALTQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>926// CHECK-NEXT: [[VCALTQ_V2_I:%.*]] = call <8 x i16> @llvm.aarch64.neon.facgt.v8i16.v8f16(<8 x half> [[VCALTQ_V_I]], <8 x half> [[VCALTQ_V1_I]])927// CHECK-NEXT: ret <8 x i16> [[VCALTQ_V2_I]]928//929uint16x8_t test_vcaltq_f16(float16x8_t a, float16x8_t b) {930 return vcaltq_f16(a, b);931}932 933// CHECK-LABEL: define {{[^@]+}}@test_vceq_f16934// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {935// CHECK-NEXT: entry:936// CHECK-NEXT: [[CMP_I:%.*]] = fcmp oeq <4 x half> [[A]], [[B]]937// CHECK-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>938// CHECK-NEXT: ret <4 x i16> [[SEXT_I]]939//940uint16x4_t test_vceq_f16(float16x4_t a, float16x4_t b) {941 return vceq_f16(a, b);942}943 944// CHECK-LABEL: define {{[^@]+}}@test_vceqq_f16945// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {946// CHECK-NEXT: entry:947// CHECK-NEXT: [[CMP_I:%.*]] = fcmp oeq <8 x half> [[A]], [[B]]948// CHECK-NEXT: [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>949// CHECK-NEXT: ret <8 x i16> [[SEXT_I]]950//951uint16x8_t test_vceqq_f16(float16x8_t a, float16x8_t b) {952 return vceqq_f16(a, b);953}954 955// CHECK-LABEL: define {{[^@]+}}@test_vcge_f16956// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {957// CHECK-NEXT: entry:958// CHECK-NEXT: [[CMP_I:%.*]] = fcmp oge <4 x half> [[A]], [[B]]959// CHECK-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>960// CHECK-NEXT: ret <4 x i16> [[SEXT_I]]961//962uint16x4_t test_vcge_f16(float16x4_t a, float16x4_t b) {963 return vcge_f16(a, b);964}965 966// CHECK-LABEL: define {{[^@]+}}@test_vcgeq_f16967// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {968// CHECK-NEXT: entry:969// CHECK-NEXT: [[CMP_I:%.*]] = fcmp oge <8 x half> [[A]], [[B]]970// CHECK-NEXT: [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>971// CHECK-NEXT: ret <8 x i16> [[SEXT_I]]972//973uint16x8_t test_vcgeq_f16(float16x8_t a, float16x8_t b) {974 return vcgeq_f16(a, b);975}976 977// CHECK-LABEL: define {{[^@]+}}@test_vcgt_f16978// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {979// CHECK-NEXT: entry:980// CHECK-NEXT: [[CMP_I:%.*]] = fcmp ogt <4 x half> [[A]], [[B]]981// CHECK-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>982// CHECK-NEXT: ret <4 x i16> [[SEXT_I]]983//984uint16x4_t test_vcgt_f16(float16x4_t a, float16x4_t b) {985 return vcgt_f16(a, b);986}987 988// CHECK-LABEL: define {{[^@]+}}@test_vcgtq_f16989// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {990// CHECK-NEXT: entry:991// CHECK-NEXT: [[CMP_I:%.*]] = fcmp ogt <8 x half> [[A]], [[B]]992// CHECK-NEXT: [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>993// CHECK-NEXT: ret <8 x i16> [[SEXT_I]]994//995uint16x8_t test_vcgtq_f16(float16x8_t a, float16x8_t b) {996 return vcgtq_f16(a, b);997}998 999// CHECK-LABEL: define {{[^@]+}}@test_vcle_f161000// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1001// CHECK-NEXT: entry:1002// CHECK-NEXT: [[CMP_I:%.*]] = fcmp ole <4 x half> [[A]], [[B]]1003// CHECK-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>1004// CHECK-NEXT: ret <4 x i16> [[SEXT_I]]1005//1006uint16x4_t test_vcle_f16(float16x4_t a, float16x4_t b) {1007 return vcle_f16(a, b);1008}1009 1010// CHECK-LABEL: define {{[^@]+}}@test_vcleq_f161011// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1012// CHECK-NEXT: entry:1013// CHECK-NEXT: [[CMP_I:%.*]] = fcmp ole <8 x half> [[A]], [[B]]1014// CHECK-NEXT: [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>1015// CHECK-NEXT: ret <8 x i16> [[SEXT_I]]1016//1017uint16x8_t test_vcleq_f16(float16x8_t a, float16x8_t b) {1018 return vcleq_f16(a, b);1019}1020 1021// CHECK-LABEL: define {{[^@]+}}@test_vclt_f161022// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1023// CHECK-NEXT: entry:1024// CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt <4 x half> [[A]], [[B]]1025// CHECK-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i16>1026// CHECK-NEXT: ret <4 x i16> [[SEXT_I]]1027//1028uint16x4_t test_vclt_f16(float16x4_t a, float16x4_t b) {1029 return vclt_f16(a, b);1030}1031 1032// CHECK-LABEL: define {{[^@]+}}@test_vcltq_f161033// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1034// CHECK-NEXT: entry:1035// CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt <8 x half> [[A]], [[B]]1036// CHECK-NEXT: [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>1037// CHECK-NEXT: ret <8 x i16> [[SEXT_I]]1038//1039uint16x8_t test_vcltq_f16(float16x8_t a, float16x8_t b) {1040 return vcltq_f16(a, b);1041}1042 1043// CHECK-LABEL: define {{[^@]+}}@test_vcvt_n_f16_s161044// CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {1045// CHECK-NEXT: entry:1046// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>1047// CHECK-NEXT: [[VCVT_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1048// CHECK-NEXT: [[VCVT_N1:%.*]] = call <4 x half> @llvm.aarch64.neon.vcvtfxs2fp.v4f16.v4i16(<4 x i16> [[VCVT_N]], i32 2)1049// CHECK-NEXT: ret <4 x half> [[VCVT_N1]]1050//1051float16x4_t test_vcvt_n_f16_s16(int16x4_t a) {1052 return vcvt_n_f16_s16(a, 2);1053}1054 1055// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_n_f16_s161056// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {1057// CHECK-NEXT: entry:1058// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>1059// CHECK-NEXT: [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1060// CHECK-NEXT: [[VCVT_N1:%.*]] = call <8 x half> @llvm.aarch64.neon.vcvtfxs2fp.v8f16.v8i16(<8 x i16> [[VCVT_N]], i32 2)1061// CHECK-NEXT: ret <8 x half> [[VCVT_N1]]1062//1063float16x8_t test_vcvtq_n_f16_s16(int16x8_t a) {1064 return vcvtq_n_f16_s16(a, 2);1065}1066 1067// CHECK-LABEL: define {{[^@]+}}@test_vcvt_n_f16_u161068// CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] {1069// CHECK-NEXT: entry:1070// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>1071// CHECK-NEXT: [[VCVT_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>1072// CHECK-NEXT: [[VCVT_N1:%.*]] = call <4 x half> @llvm.aarch64.neon.vcvtfxu2fp.v4f16.v4i16(<4 x i16> [[VCVT_N]], i32 2)1073// CHECK-NEXT: ret <4 x half> [[VCVT_N1]]1074//1075float16x4_t test_vcvt_n_f16_u16(uint16x4_t a) {1076 return vcvt_n_f16_u16(a, 2);1077}1078 1079// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_n_f16_u161080// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {1081// CHECK-NEXT: entry:1082// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>1083// CHECK-NEXT: [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>1084// CHECK-NEXT: [[VCVT_N1:%.*]] = call <8 x half> @llvm.aarch64.neon.vcvtfxu2fp.v8f16.v8i16(<8 x i16> [[VCVT_N]], i32 2)1085// CHECK-NEXT: ret <8 x half> [[VCVT_N1]]1086//1087float16x8_t test_vcvtq_n_f16_u16(uint16x8_t a) {1088 return vcvtq_n_f16_u16(a, 2);1089}1090 1091// CHECK-LABEL: define {{[^@]+}}@test_vcvt_n_s16_f161092// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {1093// CHECK-NEXT: entry:1094// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1095// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1096// CHECK-NEXT: [[VCVT_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>1097// CHECK-NEXT: [[VCVT_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.vcvtfp2fxs.v4i16.v4f16(<4 x half> [[VCVT_N]], i32 2)1098// CHECK-NEXT: ret <4 x i16> [[VCVT_N1]]1099//1100int16x4_t test_vcvt_n_s16_f16(float16x4_t a) {1101 return vcvt_n_s16_f16(a, 2);1102}1103 1104// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_n_s16_f161105// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {1106// CHECK-NEXT: entry:1107// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1108// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1109// CHECK-NEXT: [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>1110// CHECK-NEXT: [[VCVT_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.vcvtfp2fxs.v8i16.v8f16(<8 x half> [[VCVT_N]], i32 2)1111// CHECK-NEXT: ret <8 x i16> [[VCVT_N1]]1112//1113int16x8_t test_vcvtq_n_s16_f16(float16x8_t a) {1114 return vcvtq_n_s16_f16(a, 2);1115}1116 1117// CHECK-LABEL: define {{[^@]+}}@test_vcvt_n_u16_f161118// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {1119// CHECK-NEXT: entry:1120// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1121// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1122// CHECK-NEXT: [[VCVT_N:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>1123// CHECK-NEXT: [[VCVT_N1:%.*]] = call <4 x i16> @llvm.aarch64.neon.vcvtfp2fxu.v4i16.v4f16(<4 x half> [[VCVT_N]], i32 2)1124// CHECK-NEXT: ret <4 x i16> [[VCVT_N1]]1125//1126uint16x4_t test_vcvt_n_u16_f16(float16x4_t a) {1127 return vcvt_n_u16_f16(a, 2);1128}1129 1130// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_n_u16_f161131// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {1132// CHECK-NEXT: entry:1133// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1134// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1135// CHECK-NEXT: [[VCVT_N:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>1136// CHECK-NEXT: [[VCVT_N1:%.*]] = call <8 x i16> @llvm.aarch64.neon.vcvtfp2fxu.v8i16.v8f16(<8 x half> [[VCVT_N]], i32 2)1137// CHECK-NEXT: ret <8 x i16> [[VCVT_N1]]1138//1139uint16x8_t test_vcvtq_n_u16_f16(float16x8_t a) {1140 return vcvtq_n_u16_f16(a, 2);1141}1142 1143// CHECK-LABEL: define {{[^@]+}}@test_vdiv_f161144// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1145// CHECK-NEXT: entry:1146// CHECK-NEXT: [[DIV_I:%.*]] = fdiv <4 x half> [[A]], [[B]]1147// CHECK-NEXT: ret <4 x half> [[DIV_I]]1148//1149float16x4_t test_vdiv_f16(float16x4_t a, float16x4_t b) {1150 return vdiv_f16(a, b);1151}1152 1153// CHECK-LABEL: define {{[^@]+}}@test_vdivq_f161154// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1155// CHECK-NEXT: entry:1156// CHECK-NEXT: [[DIV_I:%.*]] = fdiv <8 x half> [[A]], [[B]]1157// CHECK-NEXT: ret <8 x half> [[DIV_I]]1158//1159float16x8_t test_vdivq_f16(float16x8_t a, float16x8_t b) {1160 return vdivq_f16(a, b);1161}1162 1163// CHECK-LABEL: define {{[^@]+}}@test_vmax_f161164// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1165// CHECK-NEXT: entry:1166// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1167// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1168// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1169// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1170// CHECK-NEXT: [[VMAX_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1171// CHECK-NEXT: [[VMAX1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1172// CHECK-NEXT: [[VMAX2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmax.v4f16(<4 x half> [[VMAX_I]], <4 x half> [[VMAX1_I]])1173// CHECK-NEXT: ret <4 x half> [[VMAX2_I]]1174//1175float16x4_t test_vmax_f16(float16x4_t a, float16x4_t b) {1176 return vmax_f16(a, b);1177}1178 1179// CHECK-LABEL: define {{[^@]+}}@test_vmaxq_f161180// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1181// CHECK-NEXT: entry:1182// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1183// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1184// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1185// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1186// CHECK-NEXT: [[VMAX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1187// CHECK-NEXT: [[VMAX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1188// CHECK-NEXT: [[VMAX2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmax.v8f16(<8 x half> [[VMAX_I]], <8 x half> [[VMAX1_I]])1189// CHECK-NEXT: ret <8 x half> [[VMAX2_I]]1190//1191float16x8_t test_vmaxq_f16(float16x8_t a, float16x8_t b) {1192 return vmaxq_f16(a, b);1193}1194 1195// CHECK-LABEL: define {{[^@]+}}@test_vmaxnm_f161196// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1197// CHECK-NEXT: entry:1198// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1199// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1200// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1201// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1202// CHECK-NEXT: [[VMAXNM_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1203// CHECK-NEXT: [[VMAXNM1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1204// CHECK-NEXT: [[VMAXNM2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmaxnm.v4f16(<4 x half> [[VMAXNM_I]], <4 x half> [[VMAXNM1_I]])1205// CHECK-NEXT: ret <4 x half> [[VMAXNM2_I]]1206//1207float16x4_t test_vmaxnm_f16(float16x4_t a, float16x4_t b) {1208 return vmaxnm_f16(a, b);1209}1210 1211// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmq_f161212// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1213// CHECK-NEXT: entry:1214// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1215// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1216// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1217// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1218// CHECK-NEXT: [[VMAXNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1219// CHECK-NEXT: [[VMAXNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1220// CHECK-NEXT: [[VMAXNM2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmaxnm.v8f16(<8 x half> [[VMAXNM_I]], <8 x half> [[VMAXNM1_I]])1221// CHECK-NEXT: ret <8 x half> [[VMAXNM2_I]]1222//1223float16x8_t test_vmaxnmq_f16(float16x8_t a, float16x8_t b) {1224 return vmaxnmq_f16(a, b);1225}1226 1227// CHECK-LABEL: define {{[^@]+}}@test_vmin_f161228// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1229// CHECK-NEXT: entry:1230// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1231// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1232// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1233// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1234// CHECK-NEXT: [[VMIN_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1235// CHECK-NEXT: [[VMIN1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1236// CHECK-NEXT: [[VMIN2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmin.v4f16(<4 x half> [[VMIN_I]], <4 x half> [[VMIN1_I]])1237// CHECK-NEXT: ret <4 x half> [[VMIN2_I]]1238//1239float16x4_t test_vmin_f16(float16x4_t a, float16x4_t b) {1240 return vmin_f16(a, b);1241}1242 1243// CHECK-LABEL: define {{[^@]+}}@test_vminq_f161244// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1245// CHECK-NEXT: entry:1246// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1247// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1248// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1249// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1250// CHECK-NEXT: [[VMIN_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1251// CHECK-NEXT: [[VMIN1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1252// CHECK-NEXT: [[VMIN2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmin.v8f16(<8 x half> [[VMIN_I]], <8 x half> [[VMIN1_I]])1253// CHECK-NEXT: ret <8 x half> [[VMIN2_I]]1254//1255float16x8_t test_vminq_f16(float16x8_t a, float16x8_t b) {1256 return vminq_f16(a, b);1257}1258 1259// CHECK-LABEL: define {{[^@]+}}@test_vminnm_f161260// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1261// CHECK-NEXT: entry:1262// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1263// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1264// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1265// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1266// CHECK-NEXT: [[VMINNM_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1267// CHECK-NEXT: [[VMINNM1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1268// CHECK-NEXT: [[VMINNM2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fminnm.v4f16(<4 x half> [[VMINNM_I]], <4 x half> [[VMINNM1_I]])1269// CHECK-NEXT: ret <4 x half> [[VMINNM2_I]]1270//1271float16x4_t test_vminnm_f16(float16x4_t a, float16x4_t b) {1272 return vminnm_f16(a, b);1273}1274 1275// CHECK-LABEL: define {{[^@]+}}@test_vminnmq_f161276// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1277// CHECK-NEXT: entry:1278// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1279// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1280// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1281// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1282// CHECK-NEXT: [[VMINNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1283// CHECK-NEXT: [[VMINNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1284// CHECK-NEXT: [[VMINNM2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fminnm.v8f16(<8 x half> [[VMINNM_I]], <8 x half> [[VMINNM1_I]])1285// CHECK-NEXT: ret <8 x half> [[VMINNM2_I]]1286//1287float16x8_t test_vminnmq_f16(float16x8_t a, float16x8_t b) {1288 return vminnmq_f16(a, b);1289}1290 1291// CHECK-LABEL: define {{[^@]+}}@test_vmul_f161292// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1293// CHECK-NEXT: entry:1294// CHECK-NEXT: [[MUL_I:%.*]] = fmul <4 x half> [[A]], [[B]]1295// CHECK-NEXT: ret <4 x half> [[MUL_I]]1296//1297float16x4_t test_vmul_f16(float16x4_t a, float16x4_t b) {1298 return vmul_f16(a, b);1299}1300 1301// CHECK-LABEL: define {{[^@]+}}@test_vmulq_f161302// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1303// CHECK-NEXT: entry:1304// CHECK-NEXT: [[MUL_I:%.*]] = fmul <8 x half> [[A]], [[B]]1305// CHECK-NEXT: ret <8 x half> [[MUL_I]]1306//1307float16x8_t test_vmulq_f16(float16x8_t a, float16x8_t b) {1308 return vmulq_f16(a, b);1309}1310 1311// CHECK-LABEL: define {{[^@]+}}@test_vmulx_f161312// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1313// CHECK-NEXT: entry:1314// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1315// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1316// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1317// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1318// CHECK-NEXT: [[VMULX_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1319// CHECK-NEXT: [[VMULX1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1320// CHECK-NEXT: [[VMULX2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half> [[VMULX_I]], <4 x half> [[VMULX1_I]])1321// CHECK-NEXT: ret <4 x half> [[VMULX2_I]]1322//1323float16x4_t test_vmulx_f16(float16x4_t a, float16x4_t b) {1324 return vmulx_f16(a, b);1325}1326 1327// CHECK-LABEL: define {{[^@]+}}@test_vmulxq_f161328// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1329// CHECK-NEXT: entry:1330// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1331// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1332// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1333// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1334// CHECK-NEXT: [[VMULX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1335// CHECK-NEXT: [[VMULX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1336// CHECK-NEXT: [[VMULX2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half> [[VMULX_I]], <8 x half> [[VMULX1_I]])1337// CHECK-NEXT: ret <8 x half> [[VMULX2_I]]1338//1339float16x8_t test_vmulxq_f16(float16x8_t a, float16x8_t b) {1340 return vmulxq_f16(a, b);1341}1342 1343// CHECK-LABEL: define {{[^@]+}}@test_vpadd_f161344// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1345// CHECK-NEXT: entry:1346// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1347// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1348// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1349// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1350// CHECK-NEXT: [[VPADD_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1351// CHECK-NEXT: [[VPADD_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1352// CHECK-NEXT: [[VPADD_V2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.faddp.v4f16(<4 x half> [[VPADD_V_I]], <4 x half> [[VPADD_V1_I]])1353// CHECK-NEXT: [[VPADD_V3_I:%.*]] = bitcast <4 x half> [[VPADD_V2_I]] to <8 x i8>1354// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[VPADD_V3_I]] to <4 x i16>1355// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <4 x half>1356// CHECK-NEXT: ret <4 x half> [[TMP5]]1357//1358float16x4_t test_vpadd_f16(float16x4_t a, float16x4_t b) {1359 return vpadd_f16(a, b);1360}1361 1362// CHECK-LABEL: define {{[^@]+}}@test_vpaddq_f161363// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1364// CHECK-NEXT: entry:1365// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1366// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1367// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1368// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1369// CHECK-NEXT: [[VPADDQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1370// CHECK-NEXT: [[VPADDQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1371// CHECK-NEXT: [[VPADDQ_V2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.faddp.v8f16(<8 x half> [[VPADDQ_V_I]], <8 x half> [[VPADDQ_V1_I]])1372// CHECK-NEXT: [[VPADDQ_V3_I:%.*]] = bitcast <8 x half> [[VPADDQ_V2_I]] to <16 x i8>1373// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[VPADDQ_V3_I]] to <8 x i16>1374// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <8 x half>1375// CHECK-NEXT: ret <8 x half> [[TMP5]]1376//1377float16x8_t test_vpaddq_f16(float16x8_t a, float16x8_t b) {1378 return vpaddq_f16(a, b);1379}1380 1381// CHECK-LABEL: define {{[^@]+}}@test_vpmax_f161382// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1383// CHECK-NEXT: entry:1384// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1385// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1386// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1387// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1388// CHECK-NEXT: [[VPMAX_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1389// CHECK-NEXT: [[VPMAX1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1390// CHECK-NEXT: [[VPMAX2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmaxp.v4f16(<4 x half> [[VPMAX_I]], <4 x half> [[VPMAX1_I]])1391// CHECK-NEXT: ret <4 x half> [[VPMAX2_I]]1392//1393float16x4_t test_vpmax_f16(float16x4_t a, float16x4_t b) {1394 return vpmax_f16(a, b);1395}1396 1397// CHECK-LABEL: define {{[^@]+}}@test_vpmaxq_f161398// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1399// CHECK-NEXT: entry:1400// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1401// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1402// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1403// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1404// CHECK-NEXT: [[VPMAX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1405// CHECK-NEXT: [[VPMAX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1406// CHECK-NEXT: [[VPMAX2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmaxp.v8f16(<8 x half> [[VPMAX_I]], <8 x half> [[VPMAX1_I]])1407// CHECK-NEXT: ret <8 x half> [[VPMAX2_I]]1408//1409float16x8_t test_vpmaxq_f16(float16x8_t a, float16x8_t b) {1410 return vpmaxq_f16(a, b);1411}1412 1413// CHECK-LABEL: define {{[^@]+}}@test_vpmaxnm_f161414// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1415// CHECK-NEXT: entry:1416// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1417// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1418// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1419// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1420// CHECK-NEXT: [[VPMAXNM_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1421// CHECK-NEXT: [[VPMAXNM1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1422// CHECK-NEXT: [[VPMAXNM2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmaxnmp.v4f16(<4 x half> [[VPMAXNM_I]], <4 x half> [[VPMAXNM1_I]])1423// CHECK-NEXT: ret <4 x half> [[VPMAXNM2_I]]1424//1425float16x4_t test_vpmaxnm_f16(float16x4_t a, float16x4_t b) {1426 return vpmaxnm_f16(a, b);1427}1428 1429// CHECK-LABEL: define {{[^@]+}}@test_vpmaxnmq_f161430// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1431// CHECK-NEXT: entry:1432// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1433// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1434// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1435// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1436// CHECK-NEXT: [[VPMAXNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1437// CHECK-NEXT: [[VPMAXNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1438// CHECK-NEXT: [[VPMAXNM2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmaxnmp.v8f16(<8 x half> [[VPMAXNM_I]], <8 x half> [[VPMAXNM1_I]])1439// CHECK-NEXT: ret <8 x half> [[VPMAXNM2_I]]1440//1441float16x8_t test_vpmaxnmq_f16(float16x8_t a, float16x8_t b) {1442 return vpmaxnmq_f16(a, b);1443}1444 1445// CHECK-LABEL: define {{[^@]+}}@test_vpmin_f161446// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1447// CHECK-NEXT: entry:1448// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1449// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1450// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1451// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1452// CHECK-NEXT: [[VPMIN_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1453// CHECK-NEXT: [[VPMIN1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1454// CHECK-NEXT: [[VPMIN2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fminp.v4f16(<4 x half> [[VPMIN_I]], <4 x half> [[VPMIN1_I]])1455// CHECK-NEXT: ret <4 x half> [[VPMIN2_I]]1456//1457float16x4_t test_vpmin_f16(float16x4_t a, float16x4_t b) {1458 return vpmin_f16(a, b);1459}1460 1461// CHECK-LABEL: define {{[^@]+}}@test_vpminq_f161462// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1463// CHECK-NEXT: entry:1464// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1465// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1466// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1467// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1468// CHECK-NEXT: [[VPMIN_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1469// CHECK-NEXT: [[VPMIN1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1470// CHECK-NEXT: [[VPMIN2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fminp.v8f16(<8 x half> [[VPMIN_I]], <8 x half> [[VPMIN1_I]])1471// CHECK-NEXT: ret <8 x half> [[VPMIN2_I]]1472//1473float16x8_t test_vpminq_f16(float16x8_t a, float16x8_t b) {1474 return vpminq_f16(a, b);1475}1476 1477// CHECK-LABEL: define {{[^@]+}}@test_vpminnm_f161478// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1479// CHECK-NEXT: entry:1480// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1481// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1482// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1483// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1484// CHECK-NEXT: [[VPMINNM_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1485// CHECK-NEXT: [[VPMINNM1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1486// CHECK-NEXT: [[VPMINNM2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fminnmp.v4f16(<4 x half> [[VPMINNM_I]], <4 x half> [[VPMINNM1_I]])1487// CHECK-NEXT: ret <4 x half> [[VPMINNM2_I]]1488//1489float16x4_t test_vpminnm_f16(float16x4_t a, float16x4_t b) {1490 return vpminnm_f16(a, b);1491}1492 1493// CHECK-LABEL: define {{[^@]+}}@test_vpminnmq_f161494// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1495// CHECK-NEXT: entry:1496// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1497// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1498// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1499// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1500// CHECK-NEXT: [[VPMINNM_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1501// CHECK-NEXT: [[VPMINNM1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1502// CHECK-NEXT: [[VPMINNM2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fminnmp.v8f16(<8 x half> [[VPMINNM_I]], <8 x half> [[VPMINNM1_I]])1503// CHECK-NEXT: ret <8 x half> [[VPMINNM2_I]]1504//1505float16x8_t test_vpminnmq_f16(float16x8_t a, float16x8_t b) {1506 return vpminnmq_f16(a, b);1507}1508 1509// CHECK-LABEL: define {{[^@]+}}@test_vrecps_f161510// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1511// CHECK-NEXT: entry:1512// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1513// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1514// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1515// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1516// CHECK-NEXT: [[VRECPS_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1517// CHECK-NEXT: [[VRECPS_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1518// CHECK-NEXT: [[VRECPS_V2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.frecps.v4f16(<4 x half> [[VRECPS_V_I]], <4 x half> [[VRECPS_V1_I]])1519// CHECK-NEXT: [[VRECPS_V3_I:%.*]] = bitcast <4 x half> [[VRECPS_V2_I]] to <8 x i8>1520// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[VRECPS_V3_I]] to <4 x i16>1521// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <4 x half>1522// CHECK-NEXT: ret <4 x half> [[TMP5]]1523//1524float16x4_t test_vrecps_f16(float16x4_t a, float16x4_t b) {1525 return vrecps_f16(a, b);1526}1527 1528// CHECK-LABEL: define {{[^@]+}}@test_vrecpsq_f161529// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1530// CHECK-NEXT: entry:1531// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1532// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1533// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1534// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1535// CHECK-NEXT: [[VRECPSQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1536// CHECK-NEXT: [[VRECPSQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1537// CHECK-NEXT: [[VRECPSQ_V2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.frecps.v8f16(<8 x half> [[VRECPSQ_V_I]], <8 x half> [[VRECPSQ_V1_I]])1538// CHECK-NEXT: [[VRECPSQ_V3_I:%.*]] = bitcast <8 x half> [[VRECPSQ_V2_I]] to <16 x i8>1539// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[VRECPSQ_V3_I]] to <8 x i16>1540// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <8 x half>1541// CHECK-NEXT: ret <8 x half> [[TMP5]]1542//1543float16x8_t test_vrecpsq_f16(float16x8_t a, float16x8_t b) {1544 return vrecpsq_f16(a, b);1545}1546 1547// CHECK-LABEL: define {{[^@]+}}@test_vrsqrts_f161548// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1549// CHECK-NEXT: entry:1550// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1551// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1552// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1553// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1554// CHECK-NEXT: [[VRSQRTS_V_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>1555// CHECK-NEXT: [[VRSQRTS_V1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1556// CHECK-NEXT: [[VRSQRTS_V2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.frsqrts.v4f16(<4 x half> [[VRSQRTS_V_I]], <4 x half> [[VRSQRTS_V1_I]])1557// CHECK-NEXT: [[VRSQRTS_V3_I:%.*]] = bitcast <4 x half> [[VRSQRTS_V2_I]] to <8 x i8>1558// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8> [[VRSQRTS_V3_I]] to <4 x i16>1559// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <4 x half>1560// CHECK-NEXT: ret <4 x half> [[TMP5]]1561//1562float16x4_t test_vrsqrts_f16(float16x4_t a, float16x4_t b) {1563 return vrsqrts_f16(a, b);1564}1565 1566// CHECK-LABEL: define {{[^@]+}}@test_vrsqrtsq_f161567// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1568// CHECK-NEXT: entry:1569// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1570// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1571// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1572// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1573// CHECK-NEXT: [[VRSQRTSQ_V_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>1574// CHECK-NEXT: [[VRSQRTSQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1575// CHECK-NEXT: [[VRSQRTSQ_V2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.frsqrts.v8f16(<8 x half> [[VRSQRTSQ_V_I]], <8 x half> [[VRSQRTSQ_V1_I]])1576// CHECK-NEXT: [[VRSQRTSQ_V3_I:%.*]] = bitcast <8 x half> [[VRSQRTSQ_V2_I]] to <16 x i8>1577// CHECK-NEXT: [[TMP4:%.*]] = bitcast <16 x i8> [[VRSQRTSQ_V3_I]] to <8 x i16>1578// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <8 x half>1579// CHECK-NEXT: ret <8 x half> [[TMP5]]1580//1581float16x8_t test_vrsqrtsq_f16(float16x8_t a, float16x8_t b) {1582 return vrsqrtsq_f16(a, b);1583}1584 1585// CHECK-LABEL: define {{[^@]+}}@test_vsub_f161586// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {1587// CHECK-NEXT: entry:1588// CHECK-NEXT: [[SUB_I:%.*]] = fsub <4 x half> [[A]], [[B]]1589// CHECK-NEXT: ret <4 x half> [[SUB_I]]1590//1591float16x4_t test_vsub_f16(float16x4_t a, float16x4_t b) {1592 return vsub_f16(a, b);1593}1594 1595// CHECK-LABEL: define {{[^@]+}}@test_vsubq_f161596// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {1597// CHECK-NEXT: entry:1598// CHECK-NEXT: [[SUB_I:%.*]] = fsub <8 x half> [[A]], [[B]]1599// CHECK-NEXT: ret <8 x half> [[SUB_I]]1600//1601float16x8_t test_vsubq_f16(float16x8_t a, float16x8_t b) {1602 return vsubq_f16(a, b);1603}1604 1605// CHECK-LABEL: define {{[^@]+}}@test_vfma_f161606// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] {1607// CHECK-NEXT: entry:1608// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1609// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1610// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[C]] to <4 x i16>1611// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1612// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1613// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>1614// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1615// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>1616// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>1617// CHECK-NEXT: [[TMP9:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[TMP7]], <4 x half> [[TMP8]], <4 x half> [[TMP6]])1618// CHECK-NEXT: ret <4 x half> [[TMP9]]1619//1620float16x4_t test_vfma_f16(float16x4_t a, float16x4_t b, float16x4_t c) {1621 return vfma_f16(a, b, c);1622}1623 1624// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_f161625// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR0]] {1626// CHECK-NEXT: entry:1627// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1628// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1629// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[C]] to <8 x i16>1630// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1631// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1632// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>1633// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1634// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>1635// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>1636// CHECK-NEXT: [[TMP9:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[TMP7]], <8 x half> [[TMP8]], <8 x half> [[TMP6]])1637// CHECK-NEXT: ret <8 x half> [[TMP9]]1638//1639float16x8_t test_vfmaq_f16(float16x8_t a, float16x8_t b, float16x8_t c) {1640 return vfmaq_f16(a, b, c);1641}1642 1643// CHECK-LABEL: define {{[^@]+}}@test_vfms_f161644// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] {1645// CHECK-NEXT: entry:1646// CHECK-NEXT: [[FNEG_I:%.*]] = fneg <4 x half> [[B]]1647// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1648// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[FNEG_I]] to <4 x i16>1649// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[C]] to <4 x i16>1650// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1651// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1652// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>1653// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1654// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>1655// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>1656// CHECK-NEXT: [[TMP9:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[TMP7]], <4 x half> [[TMP8]], <4 x half> [[TMP6]])1657// CHECK-NEXT: ret <4 x half> [[TMP9]]1658//1659float16x4_t test_vfms_f16(float16x4_t a, float16x4_t b, float16x4_t c) {1660 return vfms_f16(a, b, c);1661}1662 1663// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_f161664// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR0]] {1665// CHECK-NEXT: entry:1666// CHECK-NEXT: [[FNEG_I:%.*]] = fneg <8 x half> [[B]]1667// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1668// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[FNEG_I]] to <8 x i16>1669// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[C]] to <8 x i16>1670// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1671// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1672// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>1673// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1674// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>1675// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>1676// CHECK-NEXT: [[TMP9:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[TMP7]], <8 x half> [[TMP8]], <8 x half> [[TMP6]])1677// CHECK-NEXT: ret <8 x half> [[TMP9]]1678//1679float16x8_t test_vfmsq_f16(float16x8_t a, float16x8_t b, float16x8_t c) {1680 return vfmsq_f16(a, b, c);1681}1682 1683// CHECK-LABEL: define {{[^@]+}}@test_vfma_lane_f161684// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] {1685// CHECK-NEXT: entry:1686// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1687// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1688// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[C]] to <4 x i16>1689// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1690// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1691// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>1692// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>1693// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x half> [[TMP6]], <4 x half> [[TMP6]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>1694// CHECK-NEXT: [[FMLA:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>1695// CHECK-NEXT: [[FMLA1:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1696// CHECK-NEXT: [[FMLA2:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[FMLA]], <4 x half> [[LANE]], <4 x half> [[FMLA1]])1697// CHECK-NEXT: ret <4 x half> [[FMLA2]]1698//1699float16x4_t test_vfma_lane_f16(float16x4_t a, float16x4_t b, float16x4_t c) {1700 return vfma_lane_f16(a, b, c, 3);1701}1702 1703// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_lane_f161704// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] {1705// CHECK-NEXT: entry:1706// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1707// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1708// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[C]] to <4 x i16>1709// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1710// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1711// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>1712// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>1713// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x half> [[TMP6]], <4 x half> [[TMP6]], <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>1714// CHECK-NEXT: [[FMLA:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>1715// CHECK-NEXT: [[FMLA1:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1716// CHECK-NEXT: [[FMLA2:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[FMLA]], <8 x half> [[LANE]], <8 x half> [[FMLA1]])1717// CHECK-NEXT: ret <8 x half> [[FMLA2]]1718//1719float16x8_t test_vfmaq_lane_f16(float16x8_t a, float16x8_t b, float16x4_t c) {1720 return vfmaq_lane_f16(a, b, c, 3);1721}1722 1723// CHECK-LABEL: define {{[^@]+}}@test_vfma_laneq_f161724// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR0]] {1725// CHECK-NEXT: entry:1726// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1727// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1728// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[C]] to <8 x i16>1729// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1730// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1731// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>1732// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1733// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>1734// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>1735// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x half> [[TMP8]], <8 x half> [[TMP8]], <4 x i32> <i32 7, i32 7, i32 7, i32 7>1736// CHECK-NEXT: [[TMP9:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[LANE]], <4 x half> [[TMP7]], <4 x half> [[TMP6]])1737// CHECK-NEXT: ret <4 x half> [[TMP9]]1738//1739float16x4_t test_vfma_laneq_f16(float16x4_t a, float16x4_t b, float16x8_t c) {1740 return vfma_laneq_f16(a, b, c, 7);1741}1742 1743// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_laneq_f161744// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR0]] {1745// CHECK-NEXT: entry:1746// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1747// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1748// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[C]] to <8 x i16>1749// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1750// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1751// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>1752// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1753// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>1754// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>1755// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x half> [[TMP8]], <8 x half> [[TMP8]], <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>1756// CHECK-NEXT: [[TMP9:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[LANE]], <8 x half> [[TMP7]], <8 x half> [[TMP6]])1757// CHECK-NEXT: ret <8 x half> [[TMP9]]1758//1759float16x8_t test_vfmaq_laneq_f16(float16x8_t a, float16x8_t b, float16x8_t c) {1760 return vfmaq_laneq_f16(a, b, c, 7);1761}1762 1763// CHECK-LABEL: define {{[^@]+}}@test_vfma_n_f161764// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], half noundef [[C:%.*]]) #[[ATTR0]] {1765// CHECK-NEXT: entry:1766// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> poison, half [[C]], i32 01767// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x half> [[VECINIT]], half [[C]], i32 11768// CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <4 x half> [[VECINIT1]], half [[C]], i32 21769// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <4 x half> [[VECINIT2]], half [[C]], i32 31770// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1771// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>1772// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[VECINIT3]] to <4 x i16>1773// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1774// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1775// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>1776// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1777// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>1778// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>1779// CHECK-NEXT: [[TMP9:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[TMP7]], <4 x half> [[TMP8]], <4 x half> [[TMP6]])1780// CHECK-NEXT: ret <4 x half> [[TMP9]]1781//1782float16x4_t test_vfma_n_f16(float16x4_t a, float16x4_t b, float16_t c) {1783 return vfma_n_f16(a, b, c);1784}1785 1786// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_n_f161787// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], half noundef [[C:%.*]]) #[[ATTR0]] {1788// CHECK-NEXT: entry:1789// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> poison, half [[C]], i32 01790// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <8 x half> [[VECINIT]], half [[C]], i32 11791// CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <8 x half> [[VECINIT1]], half [[C]], i32 21792// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <8 x half> [[VECINIT2]], half [[C]], i32 31793// CHECK-NEXT: [[VECINIT4:%.*]] = insertelement <8 x half> [[VECINIT3]], half [[C]], i32 41794// CHECK-NEXT: [[VECINIT5:%.*]] = insertelement <8 x half> [[VECINIT4]], half [[C]], i32 51795// CHECK-NEXT: [[VECINIT6:%.*]] = insertelement <8 x half> [[VECINIT5]], half [[C]], i32 61796// CHECK-NEXT: [[VECINIT7:%.*]] = insertelement <8 x half> [[VECINIT6]], half [[C]], i32 71797// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1798// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>1799// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[VECINIT7]] to <8 x i16>1800// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1801// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1802// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>1803// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1804// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>1805// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>1806// CHECK-NEXT: [[TMP9:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[TMP7]], <8 x half> [[TMP8]], <8 x half> [[TMP6]])1807// CHECK-NEXT: ret <8 x half> [[TMP9]]1808//1809float16x8_t test_vfmaq_n_f16(float16x8_t a, float16x8_t b, float16_t c) {1810 return vfmaq_n_f16(a, b, c);1811}1812 1813// CHECK-LABEL: define {{[^@]+}}@test_vfmah_lane_f161814// CHECK-SAME: (half noundef [[A:%.*]], half noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] {1815// CHECK-NEXT: entry:1816// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x half> [[C]], i32 31817// CHECK-NEXT: [[TMP0:%.*]] = call half @llvm.fma.f16(half [[B]], half [[EXTRACT]], half [[A]])1818// CHECK-NEXT: ret half [[TMP0]]1819//1820float16_t test_vfmah_lane_f16(float16_t a, float16_t b, float16x4_t c) {1821 return vfmah_lane_f16(a, b, c, 3);1822}1823 1824// CHECK-LABEL: define {{[^@]+}}@test_vfmah_laneq_f161825// CHECK-SAME: (half noundef [[A:%.*]], half noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR0]] {1826// CHECK-NEXT: entry:1827// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <8 x half> [[C]], i32 71828// CHECK-NEXT: [[TMP0:%.*]] = call half @llvm.fma.f16(half [[B]], half [[EXTRACT]], half [[A]])1829// CHECK-NEXT: ret half [[TMP0]]1830//1831float16_t test_vfmah_laneq_f16(float16_t a, float16_t b, float16x8_t c) {1832 return vfmah_laneq_f16(a, b, c, 7);1833}1834 1835// CHECK-LABEL: define {{[^@]+}}@test_vfms_lane_f161836// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] {1837// CHECK-NEXT: entry:1838// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1839// CHECK-NEXT: [[FNEG:%.*]] = fneg <4 x half> [[B]]1840// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[FNEG]] to <4 x i16>1841// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[C]] to <4 x i16>1842// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1843// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1844// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>1845// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>1846// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x half> [[TMP6]], <4 x half> [[TMP6]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>1847// CHECK-NEXT: [[FMLA:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>1848// CHECK-NEXT: [[FMLA1:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1849// CHECK-NEXT: [[FMLA2:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[FMLA]], <4 x half> [[LANE]], <4 x half> [[FMLA1]])1850// CHECK-NEXT: ret <4 x half> [[FMLA2]]1851//1852float16x4_t test_vfms_lane_f16(float16x4_t a, float16x4_t b, float16x4_t c) {1853 return vfms_lane_f16(a, b, c, 3);1854}1855 1856// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_lane_f161857// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] {1858// CHECK-NEXT: entry:1859// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1860// CHECK-NEXT: [[FNEG:%.*]] = fneg <8 x half> [[B]]1861// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[FNEG]] to <8 x i16>1862// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[C]] to <4 x i16>1863// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1864// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1865// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>1866// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>1867// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x half> [[TMP6]], <4 x half> [[TMP6]], <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>1868// CHECK-NEXT: [[FMLA:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>1869// CHECK-NEXT: [[FMLA1:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1870// CHECK-NEXT: [[FMLA2:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[FMLA]], <8 x half> [[LANE]], <8 x half> [[FMLA1]])1871// CHECK-NEXT: ret <8 x half> [[FMLA2]]1872//1873float16x8_t test_vfmsq_lane_f16(float16x8_t a, float16x8_t b, float16x4_t c) {1874 return vfmsq_lane_f16(a, b, c, 3);1875}1876 1877// CHECK-LABEL: define {{[^@]+}}@test_vfms_laneq_f161878// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR0]] {1879// CHECK-NEXT: entry:1880// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1881// CHECK-NEXT: [[FNEG:%.*]] = fneg <4 x half> [[B]]1882// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[FNEG]] to <4 x i16>1883// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[C]] to <8 x i16>1884// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1885// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1886// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>1887// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1888// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>1889// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>1890// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x half> [[TMP8]], <8 x half> [[TMP8]], <4 x i32> <i32 7, i32 7, i32 7, i32 7>1891// CHECK-NEXT: [[TMP9:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[LANE]], <4 x half> [[TMP7]], <4 x half> [[TMP6]])1892// CHECK-NEXT: ret <4 x half> [[TMP9]]1893//1894float16x4_t test_vfms_laneq_f16(float16x4_t a, float16x4_t b, float16x8_t c) {1895 return vfms_laneq_f16(a, b, c, 7);1896}1897 1898// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_laneq_f161899// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR0]] {1900// CHECK-NEXT: entry:1901// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1902// CHECK-NEXT: [[FNEG:%.*]] = fneg <8 x half> [[B]]1903// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[FNEG]] to <8 x i16>1904// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[C]] to <8 x i16>1905// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1906// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1907// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>1908// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1909// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>1910// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>1911// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x half> [[TMP8]], <8 x half> [[TMP8]], <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>1912// CHECK-NEXT: [[TMP9:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[LANE]], <8 x half> [[TMP7]], <8 x half> [[TMP6]])1913// CHECK-NEXT: ret <8 x half> [[TMP9]]1914//1915float16x8_t test_vfmsq_laneq_f16(float16x8_t a, float16x8_t b, float16x8_t c) {1916 return vfmsq_laneq_f16(a, b, c, 7);1917}1918 1919// CHECK-LABEL: define {{[^@]+}}@test_vfms_n_f161920// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], half noundef [[C:%.*]]) #[[ATTR0]] {1921// CHECK-NEXT: entry:1922// CHECK-NEXT: [[FNEG:%.*]] = fneg <4 x half> [[B]]1923// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> poison, half [[C]], i32 01924// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x half> [[VECINIT]], half [[C]], i32 11925// CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <4 x half> [[VECINIT1]], half [[C]], i32 21926// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <4 x half> [[VECINIT2]], half [[C]], i32 31927// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>1928// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[FNEG]] to <4 x i16>1929// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[VECINIT3]] to <4 x i16>1930// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>1931// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>1932// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP2]] to <8 x i8>1933// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>1934// CHECK-NEXT: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half>1935// CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>1936// CHECK-NEXT: [[TMP9:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[TMP7]], <4 x half> [[TMP8]], <4 x half> [[TMP6]])1937// CHECK-NEXT: ret <4 x half> [[TMP9]]1938//1939float16x4_t test_vfms_n_f16(float16x4_t a, float16x4_t b, float16_t c) {1940 return vfms_n_f16(a, b, c);1941}1942 1943// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_n_f161944// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], half noundef [[C:%.*]]) #[[ATTR0]] {1945// CHECK-NEXT: entry:1946// CHECK-NEXT: [[FNEG:%.*]] = fneg <8 x half> [[B]]1947// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> poison, half [[C]], i32 01948// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <8 x half> [[VECINIT]], half [[C]], i32 11949// CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <8 x half> [[VECINIT1]], half [[C]], i32 21950// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <8 x half> [[VECINIT2]], half [[C]], i32 31951// CHECK-NEXT: [[VECINIT4:%.*]] = insertelement <8 x half> [[VECINIT3]], half [[C]], i32 41952// CHECK-NEXT: [[VECINIT5:%.*]] = insertelement <8 x half> [[VECINIT4]], half [[C]], i32 51953// CHECK-NEXT: [[VECINIT6:%.*]] = insertelement <8 x half> [[VECINIT5]], half [[C]], i32 61954// CHECK-NEXT: [[VECINIT7:%.*]] = insertelement <8 x half> [[VECINIT6]], half [[C]], i32 71955// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>1956// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[FNEG]] to <8 x i16>1957// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[VECINIT7]] to <8 x i16>1958// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>1959// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>1960// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP2]] to <16 x i8>1961// CHECK-NEXT: [[TMP6:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>1962// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half>1963// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>1964// CHECK-NEXT: [[TMP9:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[TMP7]], <8 x half> [[TMP8]], <8 x half> [[TMP6]])1965// CHECK-NEXT: ret <8 x half> [[TMP9]]1966//1967float16x8_t test_vfmsq_n_f16(float16x8_t a, float16x8_t b, float16_t c) {1968 return vfmsq_n_f16(a, b, c);1969}1970 1971// CHECK-LABEL: define {{[^@]+}}@test_vfmsh_lane_f161972// CHECK-SAME: (half noundef [[A:%.*]], half noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] {1973// CHECK-NEXT: entry:1974// CHECK-NEXT: [[CONV:%.*]] = fpext half [[B]] to float1975// CHECK-NEXT: [[FNEG:%.*]] = fneg float [[CONV]]1976// CHECK-NEXT: [[TMP0:%.*]] = fptrunc float [[FNEG]] to half1977// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x half> [[C]], i32 31978// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fma.f16(half [[TMP0]], half [[EXTRACT]], half [[A]])1979// CHECK-NEXT: ret half [[TMP1]]1980//1981float16_t test_vfmsh_lane_f16(float16_t a, float16_t b, float16x4_t c) {1982 return vfmsh_lane_f16(a, b, c, 3);1983}1984 1985// CHECK-LABEL: define {{[^@]+}}@test_vfmsh_laneq_f161986// CHECK-SAME: (half noundef [[A:%.*]], half noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR0]] {1987// CHECK-NEXT: entry:1988// CHECK-NEXT: [[CONV:%.*]] = fpext half [[B]] to float1989// CHECK-NEXT: [[FNEG:%.*]] = fneg float [[CONV]]1990// CHECK-NEXT: [[TMP0:%.*]] = fptrunc float [[FNEG]] to half1991// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <8 x half> [[C]], i32 71992// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fma.f16(half [[TMP0]], half [[EXTRACT]], half [[A]])1993// CHECK-NEXT: ret half [[TMP1]]1994//1995float16_t test_vfmsh_laneq_f16(float16_t a, float16_t b, float16x8_t c) {1996 return vfmsh_laneq_f16(a, b, c, 7);1997}1998 1999// CHECK-LABEL: define {{[^@]+}}@test_vmul_lane_f162000// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {2001// CHECK-NEXT: entry:2002// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>2003// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2004// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>2005// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x half> [[TMP2]], <4 x half> [[TMP2]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>2006// CHECK-NEXT: [[MUL:%.*]] = fmul <4 x half> [[A]], [[LANE]]2007// CHECK-NEXT: ret <4 x half> [[MUL]]2008//2009float16x4_t test_vmul_lane_f16(float16x4_t a, float16x4_t b) {2010 return vmul_lane_f16(a, b, 3);2011}2012 2013// CHECK-LABEL: define {{[^@]+}}@test_vmulq_lane_f162014// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {2015// CHECK-NEXT: entry:2016// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>2017// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2018// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>2019// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x half> [[TMP2]], <4 x half> [[TMP2]], <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>2020// CHECK-NEXT: [[MUL:%.*]] = fmul <8 x half> [[A]], [[LANE]]2021// CHECK-NEXT: ret <8 x half> [[MUL]]2022//2023float16x8_t test_vmulq_lane_f16(float16x8_t a, float16x4_t b) {2024 return vmulq_lane_f16(a, b, 3);2025}2026 2027// CHECK-LABEL: define {{[^@]+}}@test_vmul_laneq_f162028// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {2029// CHECK-NEXT: entry:2030// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>2031// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2032// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>2033// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x half> [[TMP2]], <8 x half> [[TMP2]], <4 x i32> <i32 7, i32 7, i32 7, i32 7>2034// CHECK-NEXT: [[MUL:%.*]] = fmul <4 x half> [[A]], [[LANE]]2035// CHECK-NEXT: ret <4 x half> [[MUL]]2036//2037float16x4_t test_vmul_laneq_f16(float16x4_t a, float16x8_t b) {2038 return vmul_laneq_f16(a, b, 7);2039}2040 2041// CHECK-LABEL: define {{[^@]+}}@test_vmulq_laneq_f162042// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {2043// CHECK-NEXT: entry:2044// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>2045// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2046// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>2047// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x half> [[TMP2]], <8 x half> [[TMP2]], <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>2048// CHECK-NEXT: [[MUL:%.*]] = fmul <8 x half> [[A]], [[LANE]]2049// CHECK-NEXT: ret <8 x half> [[MUL]]2050//2051float16x8_t test_vmulq_laneq_f16(float16x8_t a, float16x8_t b) {2052 return vmulq_laneq_f16(a, b, 7);2053}2054 2055// CHECK-LABEL: define {{[^@]+}}@test_vmul_n_f162056// CHECK-SAME: (<4 x half> noundef [[A:%.*]], half noundef [[B:%.*]]) #[[ATTR0]] {2057// CHECK-NEXT: entry:2058// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> poison, half [[B]], i32 02059// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x half> [[VECINIT]], half [[B]], i32 12060// CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <4 x half> [[VECINIT1]], half [[B]], i32 22061// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <4 x half> [[VECINIT2]], half [[B]], i32 32062// CHECK-NEXT: [[MUL:%.*]] = fmul <4 x half> [[A]], [[VECINIT3]]2063// CHECK-NEXT: ret <4 x half> [[MUL]]2064//2065float16x4_t test_vmul_n_f16(float16x4_t a, float16_t b) {2066 return vmul_n_f16(a, b);2067}2068 2069// CHECK-LABEL: define {{[^@]+}}@test_vmulq_n_f162070// CHECK-SAME: (<8 x half> noundef [[A:%.*]], half noundef [[B:%.*]]) #[[ATTR0]] {2071// CHECK-NEXT: entry:2072// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> poison, half [[B]], i32 02073// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <8 x half> [[VECINIT]], half [[B]], i32 12074// CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <8 x half> [[VECINIT1]], half [[B]], i32 22075// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <8 x half> [[VECINIT2]], half [[B]], i32 32076// CHECK-NEXT: [[VECINIT4:%.*]] = insertelement <8 x half> [[VECINIT3]], half [[B]], i32 42077// CHECK-NEXT: [[VECINIT5:%.*]] = insertelement <8 x half> [[VECINIT4]], half [[B]], i32 52078// CHECK-NEXT: [[VECINIT6:%.*]] = insertelement <8 x half> [[VECINIT5]], half [[B]], i32 62079// CHECK-NEXT: [[VECINIT7:%.*]] = insertelement <8 x half> [[VECINIT6]], half [[B]], i32 72080// CHECK-NEXT: [[MUL:%.*]] = fmul <8 x half> [[A]], [[VECINIT7]]2081// CHECK-NEXT: ret <8 x half> [[MUL]]2082//2083float16x8_t test_vmulq_n_f16(float16x8_t a, float16_t b) {2084 return vmulq_n_f16(a, b);2085}2086 2087// FIXME: Fix it when fp16 non-storage-only type becomes available.2088// CHECK-LABEL: define {{[^@]+}}@test_vmulh_lane_f162089// CHECK-SAME: (half noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {2090// CHECK-NEXT: entry:2091// CHECK-NEXT: [[CONV:%.*]] = fpext half [[A]] to float2092// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>2093// CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <4 x i16> [[TMP0]], i32 32094// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[VGET_LANE]] to half2095// CHECK-NEXT: [[CONV3:%.*]] = fpext half [[TMP1]] to float2096// CHECK-NEXT: [[MUL:%.*]] = fmul float [[CONV]], [[CONV3]]2097// CHECK-NEXT: [[TMP2:%.*]] = fptrunc float [[MUL]] to half2098// CHECK-NEXT: ret half [[TMP2]]2099//2100float16_t test_vmulh_lane_f16(float16_t a, float16x4_t b) {2101 return vmulh_lane_f16(a, b, 3);2102}2103 2104// CHECK-LABEL: define {{[^@]+}}@test_vmulh_laneq_f162105// CHECK-SAME: (half noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {2106// CHECK-NEXT: entry:2107// CHECK-NEXT: [[CONV:%.*]] = fpext half [[A]] to float2108// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>2109// CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> [[TMP0]], i32 72110// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[VGETQ_LANE]] to half2111// CHECK-NEXT: [[CONV3:%.*]] = fpext half [[TMP1]] to float2112// CHECK-NEXT: [[MUL:%.*]] = fmul float [[CONV]], [[CONV3]]2113// CHECK-NEXT: [[TMP2:%.*]] = fptrunc float [[MUL]] to half2114// CHECK-NEXT: ret half [[TMP2]]2115//2116float16_t test_vmulh_laneq_f16(float16_t a, float16x8_t b) {2117 return vmulh_laneq_f16(a, b, 7);2118}2119 2120// CHECK-LABEL: define {{[^@]+}}@test_vmulx_lane_f162121// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {2122// CHECK-NEXT: entry:2123// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>2124// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2125// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>2126// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x half> [[TMP2]], <4 x half> [[TMP2]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>2127// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>2128// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x half> [[LANE]] to <4 x i16>2129// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8>2130// CHECK-NEXT: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8>2131// CHECK-NEXT: [[VMULX_I:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>2132// CHECK-NEXT: [[VMULX1_I:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x half>2133// CHECK-NEXT: [[VMULX2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half> [[VMULX_I]], <4 x half> [[VMULX1_I]])2134// CHECK-NEXT: ret <4 x half> [[VMULX2_I]]2135//2136float16x4_t test_vmulx_lane_f16(float16x4_t a, float16x4_t b) {2137 return vmulx_lane_f16(a, b, 3);2138}2139 2140// CHECK-LABEL: define {{[^@]+}}@test_vmulxq_lane_f162141// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {2142// CHECK-NEXT: entry:2143// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <4 x i16>2144// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2145// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>2146// CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x half> [[TMP2]], <4 x half> [[TMP2]], <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>2147// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>2148// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x half> [[LANE]] to <8 x i16>2149// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8>2150// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8>2151// CHECK-NEXT: [[VMULX_I:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>2152// CHECK-NEXT: [[VMULX1_I:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x half>2153// CHECK-NEXT: [[VMULX2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half> [[VMULX_I]], <8 x half> [[VMULX1_I]])2154// CHECK-NEXT: ret <8 x half> [[VMULX2_I]]2155//2156float16x8_t test_vmulxq_lane_f16(float16x8_t a, float16x4_t b) {2157 return vmulxq_lane_f16(a, b, 3);2158}2159 2160// CHECK-LABEL: define {{[^@]+}}@test_vmulx_laneq_f162161// CHECK-SAME: (<4 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {2162// CHECK-NEXT: entry:2163// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>2164// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2165// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>2166// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x half> [[TMP2]], <8 x half> [[TMP2]], <4 x i32> <i32 7, i32 7, i32 7, i32 7>2167// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>2168// CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x half> [[LANE]] to <4 x i16>2169// CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8>2170// CHECK-NEXT: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8>2171// CHECK-NEXT: [[VMULX_I:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half>2172// CHECK-NEXT: [[VMULX1_I:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x half>2173// CHECK-NEXT: [[VMULX2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half> [[VMULX_I]], <4 x half> [[VMULX1_I]])2174// CHECK-NEXT: ret <4 x half> [[VMULX2_I]]2175//2176float16x4_t test_vmulx_laneq_f16(float16x4_t a, float16x8_t b) {2177 return vmulx_laneq_f16(a, b, 7);2178}2179 2180// CHECK-LABEL: define {{[^@]+}}@test_vmulxq_laneq_f162181// CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {2182// CHECK-NEXT: entry:2183// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <8 x i16>2184// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2185// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>2186// CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x half> [[TMP2]], <8 x half> [[TMP2]], <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>2187// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>2188// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x half> [[LANE]] to <8 x i16>2189// CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8>2190// CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8>2191// CHECK-NEXT: [[VMULX_I:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half>2192// CHECK-NEXT: [[VMULX1_I:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x half>2193// CHECK-NEXT: [[VMULX2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half> [[VMULX_I]], <8 x half> [[VMULX1_I]])2194// CHECK-NEXT: ret <8 x half> [[VMULX2_I]]2195//2196float16x8_t test_vmulxq_laneq_f16(float16x8_t a, float16x8_t b) {2197 return vmulxq_laneq_f16(a, b, 7);2198}2199 2200// CHECK-LABEL: define {{[^@]+}}@test_vmulx_n_f162201// CHECK-SAME: (<4 x half> noundef [[A:%.*]], half noundef [[B:%.*]]) #[[ATTR0]] {2202// CHECK-NEXT: entry:2203// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> poison, half [[B]], i32 02204// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x half> [[VECINIT]], half [[B]], i32 12205// CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <4 x half> [[VECINIT1]], half [[B]], i32 22206// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <4 x half> [[VECINIT2]], half [[B]], i32 32207// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>2208// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[VECINIT3]] to <4 x i16>2209// CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2210// CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i16> [[TMP1]] to <8 x i8>2211// CHECK-NEXT: [[VMULX_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x half>2212// CHECK-NEXT: [[VMULX1_I:%.*]] = bitcast <8 x i8> [[TMP3]] to <4 x half>2213// CHECK-NEXT: [[VMULX2_I:%.*]] = call <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half> [[VMULX_I]], <4 x half> [[VMULX1_I]])2214// CHECK-NEXT: ret <4 x half> [[VMULX2_I]]2215//2216float16x4_t test_vmulx_n_f16(float16x4_t a, float16_t b) {2217 return vmulx_n_f16(a, b);2218}2219 2220// CHECK-LABEL: define {{[^@]+}}@test_vmulxq_n_f162221// CHECK-SAME: (<8 x half> noundef [[A:%.*]], half noundef [[B:%.*]]) #[[ATTR0]] {2222// CHECK-NEXT: entry:2223// CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> poison, half [[B]], i32 02224// CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <8 x half> [[VECINIT]], half [[B]], i32 12225// CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <8 x half> [[VECINIT1]], half [[B]], i32 22226// CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <8 x half> [[VECINIT2]], half [[B]], i32 32227// CHECK-NEXT: [[VECINIT4:%.*]] = insertelement <8 x half> [[VECINIT3]], half [[B]], i32 42228// CHECK-NEXT: [[VECINIT5:%.*]] = insertelement <8 x half> [[VECINIT4]], half [[B]], i32 52229// CHECK-NEXT: [[VECINIT6:%.*]] = insertelement <8 x half> [[VECINIT5]], half [[B]], i32 62230// CHECK-NEXT: [[VECINIT7:%.*]] = insertelement <8 x half> [[VECINIT6]], half [[B]], i32 72231// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>2232// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x half> [[VECINIT7]] to <8 x i16>2233// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2234// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[TMP1]] to <16 x i8>2235// CHECK-NEXT: [[VMULX_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x half>2236// CHECK-NEXT: [[VMULX1_I:%.*]] = bitcast <16 x i8> [[TMP3]] to <8 x half>2237// CHECK-NEXT: [[VMULX2_I:%.*]] = call <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half> [[VMULX_I]], <8 x half> [[VMULX1_I]])2238// CHECK-NEXT: ret <8 x half> [[VMULX2_I]]2239//2240float16x8_t test_vmulxq_n_f16(float16x8_t a, float16_t b) {2241 return vmulxq_n_f16(a, b);2242}2243 2244// CHECK-LABEL: define {{[^@]+}}@test_vmulxh_lane_f162245// CHECK-SAME: (half noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] {2246// CHECK-NEXT: entry:2247// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x half> [[B]], i32 32248// CHECK-NEXT: [[VMULX:%.*]] = call half @llvm.aarch64.neon.fmulx.f16(half [[A]], half [[EXTRACT]])2249// CHECK-NEXT: ret half [[VMULX]]2250//2251float16_t test_vmulxh_lane_f16(float16_t a, float16x4_t b) {2252 return vmulxh_lane_f16(a, b, 3);2253}2254 2255// CHECK-LABEL: define {{[^@]+}}@test_vmulxh_laneq_f162256// CHECK-SAME: (half noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR0]] {2257// CHECK-NEXT: entry:2258// CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <8 x half> [[B]], i32 72259// CHECK-NEXT: [[VMULX:%.*]] = call half @llvm.aarch64.neon.fmulx.f16(half [[A]], half [[EXTRACT]])2260// CHECK-NEXT: ret half [[VMULX]]2261//2262float16_t test_vmulxh_laneq_f16(float16_t a, float16x8_t b) {2263 return vmulxh_laneq_f16(a, b, 7);2264}2265 2266// CHECK-LABEL: define {{[^@]+}}@test_vmaxv_f162267// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {2268// CHECK-NEXT: entry:2269// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>2270// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2271// CHECK-NEXT: [[VMAXV:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>2272// CHECK-NEXT: [[VMAXV1:%.*]] = call half @llvm.aarch64.neon.fmaxv.f16.v4f16(<4 x half> [[VMAXV]])2273// CHECK-NEXT: ret half [[VMAXV1]]2274//2275float16_t test_vmaxv_f16(float16x4_t a) {2276 return vmaxv_f16(a);2277}2278 2279// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_f162280// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {2281// CHECK-NEXT: entry:2282// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>2283// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2284// CHECK-NEXT: [[VMAXV:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>2285// CHECK-NEXT: [[VMAXV1:%.*]] = call half @llvm.aarch64.neon.fmaxv.f16.v8f16(<8 x half> [[VMAXV]])2286// CHECK-NEXT: ret half [[VMAXV1]]2287//2288float16_t test_vmaxvq_f16(float16x8_t a) {2289 return vmaxvq_f16(a);2290}2291 2292// CHECK-LABEL: define {{[^@]+}}@test_vminv_f162293// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {2294// CHECK-NEXT: entry:2295// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>2296// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2297// CHECK-NEXT: [[VMINV:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>2298// CHECK-NEXT: [[VMINV1:%.*]] = call half @llvm.aarch64.neon.fminv.f16.v4f16(<4 x half> [[VMINV]])2299// CHECK-NEXT: ret half [[VMINV1]]2300//2301float16_t test_vminv_f16(float16x4_t a) {2302 return vminv_f16(a);2303}2304 2305// CHECK-LABEL: define {{[^@]+}}@test_vminvq_f162306// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {2307// CHECK-NEXT: entry:2308// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>2309// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2310// CHECK-NEXT: [[VMINV:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>2311// CHECK-NEXT: [[VMINV1:%.*]] = call half @llvm.aarch64.neon.fminv.f16.v8f16(<8 x half> [[VMINV]])2312// CHECK-NEXT: ret half [[VMINV1]]2313//2314float16_t test_vminvq_f16(float16x8_t a) {2315 return vminvq_f16(a);2316}2317 2318// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmv_f162319// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {2320// CHECK-NEXT: entry:2321// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>2322// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2323// CHECK-NEXT: [[VMAXNMV:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>2324// CHECK-NEXT: [[VMAXNMV1:%.*]] = call half @llvm.aarch64.neon.fmaxnmv.f16.v4f16(<4 x half> [[VMAXNMV]])2325// CHECK-NEXT: ret half [[VMAXNMV1]]2326//2327float16_t test_vmaxnmv_f16(float16x4_t a) {2328 return vmaxnmv_f16(a);2329}2330 2331// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmvq_f162332// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {2333// CHECK-NEXT: entry:2334// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>2335// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2336// CHECK-NEXT: [[VMAXNMV:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>2337// CHECK-NEXT: [[VMAXNMV1:%.*]] = call half @llvm.aarch64.neon.fmaxnmv.f16.v8f16(<8 x half> [[VMAXNMV]])2338// CHECK-NEXT: ret half [[VMAXNMV1]]2339//2340float16_t test_vmaxnmvq_f16(float16x8_t a) {2341 return vmaxnmvq_f16(a);2342}2343 2344// CHECK-LABEL: define {{[^@]+}}@test_vminnmv_f162345// CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] {2346// CHECK-NEXT: entry:2347// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <4 x i16>2348// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i16> [[TMP0]] to <8 x i8>2349// CHECK-NEXT: [[VMINNMV:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half>2350// CHECK-NEXT: [[VMINNMV1:%.*]] = call half @llvm.aarch64.neon.fminnmv.f16.v4f16(<4 x half> [[VMINNMV]])2351// CHECK-NEXT: ret half [[VMINNMV1]]2352//2353float16_t test_vminnmv_f16(float16x4_t a) {2354 return vminnmv_f16(a);2355}2356 2357// CHECK-LABEL: define {{[^@]+}}@test_vminnmvq_f162358// CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR0]] {2359// CHECK-NEXT: entry:2360// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <8 x i16>2361// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <16 x i8>2362// CHECK-NEXT: [[VMINNMV:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half>2363// CHECK-NEXT: [[VMINNMV1:%.*]] = call half @llvm.aarch64.neon.fminnmv.f16.v8f16(<8 x half> [[VMINNMV]])2364// CHECK-NEXT: ret half [[VMINNMV1]]2365//2366float16_t test_vminnmvq_f16(float16x8_t a) {2367 return vminnmvq_f16(a);2368}2369