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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 52// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-feature +v9.6a -target-feature +f8f32mm -target-feature +fp8 \3// RUN: -disable-O0-optnone -emit-llvm -o - %s \4// RUN: | opt -S -passes=mem2reg,sroa \5// RUN: | FileCheck %s6 7// REQUIRES: aarch64-registered-target8 9#include <arm_neon.h>10 11// CHECK-LABEL: define dso_local <4 x float> @test_vmmlaq_f32_mf8(12// CHECK-SAME: <4 x float> noundef [[P0:%.*]], <16 x i8> [[P1:%.*]], <16 x i8> [[P2:%.*]], i64 noundef [[P3:%.*]]) #[[ATTR0:[0-9]+]] {13// CHECK-NEXT: [[ENTRY:.*:]]14// CHECK-NEXT: call void @llvm.aarch64.set.fpmr(i64 [[P3]])15// CHECK-NEXT: [[FMMLA_I:%.*]] = call <4 x float> @llvm.aarch64.neon.fmmla.v4f32.v16i8(<4 x float> [[P0]], <16 x i8> [[P1]], <16 x i8> [[P2]])16// CHECK-NEXT: ret <4 x float> [[FMMLA_I]]17//18float32x4_t test_vmmlaq_f32_mf8(float32x4_t p0, mfloat8x16_t p1, mfloat8x16_t p2, fpm_t p3) {19 return vmmlaq_f32_mf8_fpm(p0, p1, p2, p3);20}21 22