324 lines · c
1// RUN: %clang_cc1 -triple csky -emit-llvm %s -o - | FileCheck %s2// RUN: %clang_cc1 -triple csky -target-feature +fpuv2_df -target-feature +fpuv2_sf \3// RUN: -target-feature +hard-float -target-feature +hard-float-abi -emit-llvm %s -o - | FileCheck %s4 5// This file contains test cases that will have the same output for the hard-float6// and soft-float ABIs.7 8#include <stddef.h>9#include <stdint.h>10 11// CHECK-LABEL: define{{.*}} void @f_void()12void f_void(void) {}13 14// Scalar arguments and return values smaller than the word size are extended15// according to the sign of their type, up to 32 bits16 17// CHECK-LABEL: define{{.*}} zeroext i1 @f_scalar_0(i1 noundef zeroext %x)18_Bool f_scalar_0(_Bool x) { return x; }19 20// CHECK-LABEL: define{{.*}} signext i8 @f_scalar_1(i8 noundef signext %x)21int8_t f_scalar_1(int8_t x) { return x; }22 23// CHECK-LABEL: define{{.*}} zeroext i8 @f_scalar_2(i8 noundef zeroext %x)24uint8_t f_scalar_2(uint8_t x) { return x; }25 26// CHECK-LABEL: define{{.*}} i32 @f_scalar_3(i32 noundef %x)27int32_t f_scalar_3(int32_t x) { return x; }28 29// CHECK-LABEL: define{{.*}} i64 @f_scalar_4(i64 noundef %x)30int64_t f_scalar_4(int64_t x) { return x; }31 32// CHECK-LABEL: define{{.*}} float @f_fp_scalar_1(float noundef %x)33float f_fp_scalar_1(float x) { return x; }34 35// CHECK-LABEL: define{{.*}} double @f_fp_scalar_2(double noundef %x)36double f_fp_scalar_2(double x) { return x; }37 38// CHECK-LABEL: define{{.*}} double @f_fp_scalar_3(double noundef %x)39long double f_fp_scalar_3(long double x) { return x; }40 41// Empty structs or unions are ignored.42 43struct empty_s {};44 45// CHECK-LABEL: define{{.*}} void @f_agg_empty_struct()46struct empty_s f_agg_empty_struct(struct empty_s x) {47 return x;48}49 50union empty_u {};51 52// CHECK-LABEL: define{{.*}} void @f_agg_empty_union()53union empty_u f_agg_empty_union(union empty_u x) {54 return x;55}56 57// Aggregates <= 4*xlen may be passed in registers, so will be coerced to58// integer arguments. The rules for return are <= 2*xlen.59 60struct tiny {61 uint8_t a, b, c, d;62};63 64// CHECK-LABEL: define{{.*}} void @f_agg_tiny(i32 %x.coerce)65void f_agg_tiny(struct tiny x) {66 x.a += x.b;67 x.c += x.d;68}69 70// CHECK-LABEL: define{{.*}} i32 @f_agg_tiny_ret()71struct tiny f_agg_tiny_ret(void) {72 return (struct tiny){1, 2, 3, 4};73}74 75struct small {76 int32_t a, *b;77};78 79// CHECK-LABEL: define{{.*}} void @f_agg_small([2 x i32] %x.coerce)80void f_agg_small(struct small x) {81 x.a += *x.b;82 x.b = &x.a;83}84 85// CHECK-LABEL: define{{.*}} [2 x i32] @f_agg_small_ret()86struct small f_agg_small_ret(void) {87 return (struct small){1, 0};88}89 90struct small_aligned {91 int64_t a;92};93 94// CHECK-LABEL: define{{.*}} void @f_agg_small_aligned(i64 %x.coerce)95void f_agg_small_aligned(struct small_aligned x) {96 x.a += x.a;97}98 99// CHECK-LABEL: define{{.*}} i64 @f_agg_small_aligned_ret(i64 %x.coerce)100struct small_aligned f_agg_small_aligned_ret(struct small_aligned x) {101 return (struct small_aligned){10};102}103 104// For argument type, the first 4*XLen parts of aggregate will be passed105// in registers, and the rest will be passed in stack.106// So we can coerce to integers directly and let backend handle it correctly.107// For return type, aggregate which <= 2*XLen will be returned in registers.108// Otherwise, aggregate will be returned indirectly.109struct large {110 int32_t a, b, c, d;111};112 113// CHECK-LABEL: define{{.*}} void @f_agg_large([4 x i32] %x.coerce)114void f_agg_large(struct large x) {115 x.a = x.b + x.c + x.d;116}117 118// The address where the struct should be written to will be the first119// argument120// CHECK-LABEL: define{{.*}} void @f_agg_large_ret(ptr dead_on_unwind noalias writable sret(%struct.large) align 4 %agg.result, i32 noundef %i, i8 noundef signext %j)121struct large f_agg_large_ret(int32_t i, int8_t j) {122 return (struct large){1, 2, 3, 4};123}124 125typedef unsigned char v16i8 __attribute__((vector_size(16)));126 127// CHECK-LABEL: define{{.*}} void @f_vec_large_v16i8(<16 x i8> noundef %x)128void f_vec_large_v16i8(v16i8 x) {129 x[0] = x[7];130}131 132// CHECK-LABEL: define{{.*}} <16 x i8> @f_vec_large_v16i8_ret()133v16i8 f_vec_large_v16i8_ret(void) {134 return (v16i8){1, 2, 3, 4, 5, 6, 7, 8};135}136 137// CHECK-LABEL: define{{.*}} i32 @f_scalar_stack_1(i32 %a.coerce, [2 x i32] %b.coerce, i64 %c.coerce, [4 x i32] %d.coerce, i8 noundef zeroext %e, i8 noundef signext %f, i8 noundef zeroext %g, i8 noundef signext %h)138int f_scalar_stack_1(struct tiny a, struct small b, struct small_aligned c,139 struct large d, uint8_t e, int8_t f, uint8_t g, int8_t h) {140 return g + h;141}142 143// Ensure that scalars passed on the stack are still determined correctly in144// the presence of large return values that consume a register due to the need145// to pass a pointer.146 147// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(ptr dead_on_unwind noalias writable sret(%struct.large) align 4 %agg.result, i32 noundef %a, i64 noundef %b, i64 noundef %c, double noundef %d, i8 noundef zeroext %e, i8 noundef signext %f, i8 noundef zeroext %g)148struct large f_scalar_stack_2(int32_t a, int64_t b, int64_t c, long double d,149 uint8_t e, int8_t f, uint8_t g) {150 return (struct large){a, e, f, g};151}152 153// CHECK-LABEL: define{{.*}} double @f_scalar_stack_4(i32 noundef %a, i64 noundef %b, i64 noundef %c, double noundef %d, i8 noundef zeroext %e, i8 noundef signext %f, i8 noundef zeroext %g)154long double f_scalar_stack_4(int32_t a, int64_t b, int64_t c, long double d,155 uint8_t e, int8_t f, uint8_t g) {156 return d;157}158 159// Aggregates should be coerced integer arrary.160 161// CHECK-LABEL: define{{.*}} void @f_scalar_stack_5(double noundef %a, i64 noundef %b, double noundef %c, i64 noundef %d, i32 noundef %e, i64 noundef %f, float noundef %g, double noundef %h, double noundef %i)162void f_scalar_stack_5(double a, int64_t b, double c, int64_t d, int e,163 int64_t f, float g, double h, long double i) {}164 165// CHECK-LABEL: define{{.*}} void @f_agg_stack(double noundef %a, i64 noundef %b, double noundef %c, i64 noundef %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, [4 x i32] %h.coerce)166void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e,167 struct small f, struct small_aligned g, struct large h) {}168 169// Ensure that ABI lowering happens as expected for vararg calls. For CSKY170// with the base integer calling convention there will be no observable171// differences in the lowered IR for a call with varargs vs without.172 173int f_va_callee(int, ...);174 175// CHECK-LABEL: define{{.*}} void @f_va_caller()176// CHECK: call i32 (i32, ...) @f_va_callee(i32 noundef 1, i32 noundef 2, i64 noundef 3, double noundef 4.000000e+00, double noundef 5.000000e+00, i32 {{%.*}}, [2 x i32] {{%.*}}, i64 {{%.*}}, [4 x i32] {{%.*}})177void f_va_caller(void) {178 f_va_callee(1, 2, 3LL, 4.0f, 5.0, (struct tiny){6, 7, 8, 9},179 (struct small){10, NULL}, (struct small_aligned){11},180 (struct large){12, 13, 14, 15});181}182 183// CHECK-LABEL: define{{.*}} i32 @f_va_1(ptr noundef %fmt, ...) {{.*}} {184// CHECK: [[FMT_ADDR:%.*]] = alloca ptr, align 4185// CHECK: [[VA:%.*]] = alloca ptr, align 4186// CHECK: [[V:%.*]] = alloca i32, align 4187// CHECK: store ptr %fmt, ptr [[FMT_ADDR]], align 4188// CHECK: call void @llvm.va_start.p0(ptr [[VA]])189// CHECK: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4190// CHECK: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4191// CHECK: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4192// CHECK: [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 4193// CHECK: store i32 [[TMP1]], ptr [[V]], align 4194// CHECK: call void @llvm.va_end.p0(ptr [[VA]])195// CHECK: [[TMP2:%.*]] = load i32, ptr [[V]], align 4196// CHECK: ret i32 [[TMP2]]197// CHECK: }198int f_va_1(char *fmt, ...) {199 __builtin_va_list va;200 201 __builtin_va_start(va, fmt);202 int v = __builtin_va_arg(va, int);203 __builtin_va_end(va);204 205 return v;206}207 208// CHECK-LABEL: @f_va_2(209// CHECK: [[FMT_ADDR:%.*]] = alloca ptr, align 4210// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 4211// CHECK-NEXT: [[V:%.*]] = alloca double, align 4212// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4213// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])214// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4215// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8216// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4217// CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[ARGP_CUR]], align 4218// CHECK-NEXT: store double [[TMP4]], ptr [[V]], align 4219// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])220// CHECK-NEXT: [[TMP5:%.*]] = load double, ptr [[V]], align 4221// CHECK-NEXT: ret double [[TMP5]]222double f_va_2(char *fmt, ...) {223 __builtin_va_list va;224 225 __builtin_va_start(va, fmt);226 double v = __builtin_va_arg(va, double);227 __builtin_va_end(va);228 229 return v;230}231 232// CHECK-LABEL: @f_va_3(233// CHECK: [[FMT_ADDR:%.*]] = alloca ptr, align 4234// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 4235// CHECK-NEXT: [[V:%.*]] = alloca double, align 4236// CHECK-NEXT: [[W:%.*]] = alloca i32, align 4237// CHECK-NEXT: [[X:%.*]] = alloca double, align 4238// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4239// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])240// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4241// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8242// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4243// CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[ARGP_CUR]], align 4244// CHECK-NEXT: store double [[TMP4]], ptr [[V]], align 4245// CHECK-NEXT: [[ARGP_CUR2:%.*]] = load ptr, ptr [[VA]], align 4246// CHECK-NEXT: [[ARGP_NEXT3:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR2]], i32 4247// CHECK-NEXT: store ptr [[ARGP_NEXT3]], ptr [[VA]], align 4248// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARGP_CUR2]], align 4249// CHECK-NEXT: store i32 [[TMP6]], ptr [[W]], align 4250// CHECK-NEXT: [[ARGP_CUR4:%.*]] = load ptr, ptr [[VA]], align 4251// CHECK-NEXT: [[ARGP_NEXT5:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR4]], i32 8252// CHECK-NEXT: store ptr [[ARGP_NEXT5]], ptr [[VA]], align 4253// CHECK-NEXT: [[TMP11:%.*]] = load double, ptr [[ARGP_CUR4]], align 4254// CHECK-NEXT: store double [[TMP11]], ptr [[X]], align 4255// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])256// CHECK-NEXT: [[TMP12:%.*]] = load double, ptr [[V]], align 4257// CHECK-NEXT: [[TMP13:%.*]] = load double, ptr [[X]], align 4258// CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP12]], [[TMP13]]259// CHECK-NEXT: ret double [[ADD]]260double f_va_3(char *fmt, ...) {261 __builtin_va_list va;262 263 __builtin_va_start(va, fmt);264 double v = __builtin_va_arg(va, double);265 int w = __builtin_va_arg(va, int);266 double x = __builtin_va_arg(va, double);267 __builtin_va_end(va);268 269 return v + x;270}271 272// CHECK-LABEL: define{{.*}} i32 @f_va_4(ptr noundef %fmt, ...) {{.*}} {273// CHECK: [[FMT_ADDR:%.*]] = alloca ptr, align 4274// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 4275// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4276// CHECK-NEXT: [[LD:%.*]] = alloca double, align 4277// CHECK-NEXT: [[TS:%.*]] = alloca [[STRUCT_TINY:%.*]], align 1278// CHECK-NEXT: [[SS:%.*]] = alloca [[STRUCT_SMALL:%.*]], align 4279// CHECK-NEXT: [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 4280// CHECK-NEXT: [[RET:%.*]] = alloca i32, align 4281// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4282// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])283// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4284// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4285// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4286// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 4287// CHECK-NEXT: store i32 [[TMP1]], ptr [[V]], align 4288// CHECK-NEXT: [[ARGP_CUR2:%.*]] = load ptr, ptr [[VA]], align 4289// CHECK-NEXT: [[ARGP_NEXT3:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR2]], i32 8290// CHECK-NEXT: store ptr [[ARGP_NEXT3]], ptr [[VA]], align 4291// CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[ARGP_CUR2]], align 4292// CHECK-NEXT: store double [[TMP4]], ptr [[LD]], align 4293// CHECK-NEXT: [[ARGP_CUR4:%.*]] = load ptr, ptr [[VA]], align 4294// CHECK-NEXT: [[ARGP_NEXT5:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR4]], i32 4295// CHECK-NEXT: store ptr [[ARGP_NEXT5]], ptr [[VA]], align 4296// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[TS]], ptr align 4 [[ARGP_CUR4]], i32 4, i1 false)297// CHECK-NEXT: [[ARGP_CUR6:%.*]] = load ptr, ptr [[VA]], align 4298// CHECK-NEXT: [[ARGP_NEXT7:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR6]], i32 8299// CHECK-NEXT: store ptr [[ARGP_NEXT7]], ptr [[VA]], align 4300// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[SS]], ptr align 4 [[ARGP_CUR6]], i32 8, i1 false)301// CHECK-NEXT: [[ARGP_CUR8:%.*]] = load ptr, ptr [[VA]], align 4302// CHECK-NEXT: [[ARGP_NEXT9:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR8]], i32 16303// CHECK-NEXT: store ptr [[ARGP_NEXT9]], ptr [[VA]], align 4304// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[LS]], ptr align 4 [[ARGP_CUR8]], i32 16, i1 false)305// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])306int f_va_4(char *fmt, ...) {307 __builtin_va_list va;308 309 __builtin_va_start(va, fmt);310 int v = __builtin_va_arg(va, int);311 long double ld = __builtin_va_arg(va, long double);312 struct tiny ts = __builtin_va_arg(va, struct tiny);313 struct small ss = __builtin_va_arg(va, struct small);314 struct large ls = __builtin_va_arg(va, struct large);315 __builtin_va_end(va);316 317 int ret = (int)((long double)v + ld);318 ret = ret + ts.a + ts.b + ts.c + ts.d;319 ret = ret + ss.a + (int)ss.b;320 ret = ret + ls.a + ls.b + ls.c + ls.d;321 322 return ret;323}324