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1// REQUIRES: powerpc-registered-target2// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \3// RUN: -triple powerpc64-unknown-linux -emit-llvm %s -o - | FileCheck %s4//5// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \6// RUN: -triple powerpc64le-unknown-linux -emit-llvm %s -o - | FileCheck %s 7 8// RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \9// RUN: -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s10#include <altivec.h>11 12// CHECK-LABEL: @test_vaddeuqm_c(13// CHECK:  entry:14// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>15// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>16// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>17// CHECK-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])18// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>19// CHECK-NEXT:    ret <16 x i8> [[TMP4]]20vector unsigned char test_vaddeuqm_c(vector unsigned char a, vector unsigned char b,21                                vector unsigned char c) {22  return __builtin_altivec_vaddeuqm_c(a, b, c);23}24 25// CHECK-LABEL: @test_vaddcuq_c(26// CHECK:  entry:27// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>28// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>29// CHECK-NEXT:    [[TMP2:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]])30// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i128> [[TMP2]] to <16 x i8>31// CHECK-NEXT:    ret <16 x i8> [[TMP3]]32vector unsigned char test_vaddcuq_c(vector unsigned char a, vector unsigned char b) {33  return __builtin_altivec_vaddcuq_c(a, b);34}35 36// CHECK-LABEL: @test_vaddecuq_c(37// CHECK:  entry:38// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>39// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>40// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>41// CHECK-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])42// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>43// CHECK-NEXT:    ret <16 x i8> [[TMP4]]44vector unsigned char test_vaddecuq_c(vector unsigned char a, vector unsigned char b,45                                vector unsigned char c) {46  return __builtin_altivec_vaddecuq_c(a, b, c);47}48 49// CHECK-LABEL: @test_vsubeuqm_c(50// CHECK:  entry:51// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>52// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>53// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>54// CHECK-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])55// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>56// CHECK-NEXT:    ret <16 x i8> [[TMP4]]57vector unsigned char test_vsubeuqm_c(vector unsigned char a, vector unsigned char b,58                                vector unsigned char c) {59  return __builtin_altivec_vsubeuqm_c(a, b, c);60}61 62// CHECK-LABEL: @test_vsubcuq_c(63// CHECK:  entry:64// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>65// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>66// CHECK-NEXT:    [[TMP2:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]])67// CHECK-NEXT:    [[TMP3:%.*]] = bitcast <1 x i128> [[TMP2]] to <16 x i8>68// CHECK-NEXT:    ret <16 x i8> [[TMP3]]69vector unsigned char test_vsubcuq_c(vector unsigned char a, vector unsigned char b) {70  return __builtin_altivec_vsubcuq_c(a, b);71}72 73// CHECK-LABEL: @test_vsubecuq_c(74// CHECK:  entry:75// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>76// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>77// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>78// CHECK-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])79// CHECK-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>80// CHECK-NEXT:    ret <16 x i8> [[TMP4]]81vector unsigned char test_vsubecuq_c(vector unsigned char a, vector unsigned char b,82                                vector unsigned char c) {83  return __builtin_altivec_vsubecuq_c(a, b, c);84}85