142 lines · c
1// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm %s \2// RUN: -target-cpu pwr7 -o - | FileCheck %s3// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm %s \4// RUN: -target-cpu pwr8 -o - | FileCheck %s5// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \6// RUN: -target-cpu pwr7 -o - | FileCheck %s7// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s \8// RUN: -target-cpu pwr7 -o - | FileCheck %s9 10// CHECK-LABEL: @mtfsb0(11// CHECK: call void @llvm.ppc.mtfsb0(i32 10)12// CHECK-NEXT: ret void13//14void mtfsb0 (void) {15 __mtfsb0 (10);16}17 18// CHECK-LABEL: @mtfsb1(19// CHECK: call void @llvm.ppc.mtfsb1(i32 0)20// CHECK-NEXT: ret void21//22void mtfsb1 (void) {23 __mtfsb1 (0);24}25 26// CHECK-LABEL: @mtfsf(27// CHECK: [[TMP0:%.*]] = uitofp i32 %{{.*}} to double28// CHECK-NEXT: call void @llvm.ppc.mtfsf(i32 8, double [[TMP0]])29// CHECK-NEXT: ret void30//31void mtfsf (unsigned int ui) {32 __mtfsf (8, ui);33}34 35// CHECK-LABEL: @mtfsfi(36// CHECK: call void @llvm.ppc.mtfsfi(i32 7, i32 15)37// CHECK-NEXT: ret void38//39void mtfsfi (void) {40 __mtfsfi (7, 15);41}42 43// CHECK-LABEL: @fmsub(44// CHECK: [[D_ADDR:%.*]] = alloca double, align 845// CHECK-NEXT: store double [[D:%.*]], ptr [[D_ADDR]], align 846// CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 847// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[D_ADDR]], align 848// CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[D_ADDR]], align 849// CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.ppc.fmsub(double [[TMP0]], double [[TMP1]], double [[TMP2]])50// CHECK-NEXT: ret double [[TMP3]]51//52double fmsub (double d) {53 return __fmsub (d, d, d);54}55 56// CHECK-LABEL: @fmsubs(57// CHECK: [[F_ADDR:%.*]] = alloca float, align 458// CHECK-NEXT: store float [[F:%.*]], ptr [[F_ADDR]], align 459// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[F_ADDR]], align 460// CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[F_ADDR]], align 461// CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[F_ADDR]], align 462// CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.ppc.fmsubs(float [[TMP0]], float [[TMP1]], float [[TMP2]])63// CHECK-NEXT: ret float [[TMP3]]64//65float fmsubs (float f) {66 return __fmsubs (f, f, f);67}68 69// CHECK-LABEL: @fnmadd(70// CHECK: [[D_ADDR:%.*]] = alloca double, align 871// CHECK-NEXT: store double [[D:%.*]], ptr [[D_ADDR]], align 872// CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 873// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[D_ADDR]], align 874// CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[D_ADDR]], align 875// CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.ppc.fnmadd(double [[TMP0]], double [[TMP1]], double [[TMP2]])76// CHECK-NEXT: ret double [[TMP3]]77//78double fnmadd (double d) {79 return __fnmadd (d, d, d);80}81 82// CHECK-LABEL: @fnmadds(83// CHECK: [[F_ADDR:%.*]] = alloca float, align 484// CHECK-NEXT: store float [[F:%.*]], ptr [[F_ADDR]], align 485// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[F_ADDR]], align 486// CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[F_ADDR]], align 487// CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[F_ADDR]], align 488// CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.ppc.fnmadds(float [[TMP0]], float [[TMP1]], float [[TMP2]])89// CHECK-NEXT: ret float [[TMP3]]90//91float fnmadds (float f) {92 return __fnmadds (f, f, f);93}94 95// CHECK-LABEL: @fnmsub(96// CHECK: [[D_ADDR:%.*]] = alloca double, align 897// CHECK-NEXT: store double [[D:%.*]], ptr [[D_ADDR]], align 898// CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 899// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[D_ADDR]], align 8100// CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[D_ADDR]], align 8101// CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.ppc.fnmsub.f64(double [[TMP0]], double [[TMP1]], double [[TMP2]])102// CHECK-NEXT: ret double [[TMP3]]103//104double fnmsub (double d) {105 return __fnmsub (d, d, d);106}107 108// CHECK-LABEL: @fnmsubs(109// CHECK: [[F_ADDR:%.*]] = alloca float, align 4110// CHECK-NEXT: store float [[F:%.*]], ptr [[F_ADDR]], align 4111// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[F_ADDR]], align 4112// CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[F_ADDR]], align 4113// CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[F_ADDR]], align 4114// CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.ppc.fnmsub.f32(float [[TMP0]], float [[TMP1]], float [[TMP2]])115// CHECK-NEXT: ret float [[TMP3]]116//117float fnmsubs (float f) {118 return __fnmsubs (f, f, f);119}120 121// CHECK-LABEL: @fre(122// CHECK: [[D_ADDR:%.*]] = alloca double, align 8123// CHECK-NEXT: store double [[D:%.*]], ptr [[D_ADDR]], align 8124// CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8125// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.ppc.fre(double [[TMP0]])126// CHECK-NEXT: ret double [[TMP1]]127//128double fre (double d) {129 return __fre (d);130}131 132// CHECK-LABEL: @fres(133// CHECK: [[F_ADDR:%.*]] = alloca float, align 4134// CHECK-NEXT: store float [[F:%.*]], ptr [[F_ADDR]], align 4135// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[F_ADDR]], align 4136// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.ppc.fres(float [[TMP0]])137// CHECK-NEXT: ret float [[TMP1]]138//139float fres (float f) {140 return __fres (f);141}142