153 lines · c
1// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \2// RUN: -faltivec-src-compat=mixed -triple powerpc-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR3// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \4// RUN: -faltivec-src-compat=gcc -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s5// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \6// RUN: -faltivec-src-compat=xl -triple powerpc-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR7// RUN: %clang -mcpu=pwr8 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s8// RUN: %clang -mcpu=pwr9 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s9 10// CHECK-LABEL: @ui8(11// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 1612// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 1613// CHECK-NEXT: store <16 x i8> [[A:%.*]], ptr [[A_ADDR]], align 1614// CHECK-NEXT: store <16 x i8> [[B:%.*]], ptr [[B_ADDR]], align 1615// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[A_ADDR]], align 1616// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr [[B_ADDR]], align 1617// CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]]18// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>19// CHECK-NEXT: ret <16 x i8> [[SEXT]]20//21// ERROR: returning 'int' from a function with incompatible result type22vector unsigned char ui8(vector unsigned char a, vector unsigned char b) {23 return a == b;24}25 26// CHECK-LABEL: @si8(27// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 1628// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 1629// CHECK-NEXT: store <16 x i8> [[A:%.*]], ptr [[A_ADDR]], align 1630// CHECK-NEXT: store <16 x i8> [[B:%.*]], ptr [[B_ADDR]], align 1631// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[A_ADDR]], align 1632// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr [[B_ADDR]], align 1633// CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]]34// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>35// CHECK-NEXT: ret <16 x i8> [[SEXT]]36//37// ERROR: returning 'int' from a function with incompatible result type38vector signed char si8(vector signed char a, vector signed char b) {39 return a == b;40}41 42// CHECK-LABEL: @ui16(43// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 1644// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 1645// CHECK-NEXT: store <8 x i16> [[A:%.*]], ptr [[A_ADDR]], align 1646// CHECK-NEXT: store <8 x i16> [[B:%.*]], ptr [[B_ADDR]], align 1647// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[A_ADDR]], align 1648// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr [[B_ADDR]], align 1649// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]]50// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16>51// CHECK-NEXT: ret <8 x i16> [[SEXT]]52//53// ERROR: returning 'int' from a function with incompatible result type54vector unsigned short ui16(vector unsigned short a, vector unsigned short b) {55 return a == b;56}57 58// CHECK-LABEL: @si16(59// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 1660// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 1661// CHECK-NEXT: store <8 x i16> [[A:%.*]], ptr [[A_ADDR]], align 1662// CHECK-NEXT: store <8 x i16> [[B:%.*]], ptr [[B_ADDR]], align 1663// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[A_ADDR]], align 1664// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr [[B_ADDR]], align 1665// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]]66// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16>67// CHECK-NEXT: ret <8 x i16> [[SEXT]]68//69// ERROR: returning 'int' from a function with incompatible result type70vector signed short si16(vector signed short a, vector signed short b) {71 return a == b;72}73 74// CHECK-LABEL: @ui32(75// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 1676// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 1677// CHECK-NEXT: store <4 x i32> [[A:%.*]], ptr [[A_ADDR]], align 1678// CHECK-NEXT: store <4 x i32> [[B:%.*]], ptr [[B_ADDR]], align 1679// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[A_ADDR]], align 1680// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[B_ADDR]], align 1681// CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP0]], [[TMP1]]82// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>83// CHECK-NEXT: ret <4 x i32> [[SEXT]]84//85// ERROR: returning 'int' from a function with incompatible result type86vector unsigned int ui32(vector unsigned int a, vector unsigned int b) {87 return a == b;88}89 90// CHECK-LABEL: @si32(91// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 1692// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 1693// CHECK-NEXT: store <4 x i32> [[A:%.*]], ptr [[A_ADDR]], align 1694// CHECK-NEXT: store <4 x i32> [[B:%.*]], ptr [[B_ADDR]], align 1695// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[A_ADDR]], align 1696// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[B_ADDR]], align 1697// CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP0]], [[TMP1]]98// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>99// CHECK-NEXT: ret <4 x i32> [[SEXT]]100//101// ERROR: returning 'int' from a function with incompatible result type102vector signed int si32(vector signed int a, vector signed int b) {103 return a == b;104}105 106// CHECK-LABEL: @si64(107// CHECK: [[A_ADDR:%.*]] = alloca <2 x i64>, align 16108// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x i64>, align 16109// CHECK-NEXT: store <2 x i64> [[A:%.*]], ptr [[A_ADDR]], align 16110// CHECK-NEXT: store <2 x i64> [[B:%.*]], ptr [[B_ADDR]], align 16111// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr [[A_ADDR]], align 16112// CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[B_ADDR]], align 16113// CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i64> [[TMP0]], [[TMP1]]114// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>115// CHECK-NEXT: ret <2 x i64> [[SEXT]]116//117// ERROR: returning 'int' from a function with incompatible result type118vector long long si64(vector long long a, vector long long b) {119 return a == b;120}121 122// CHECK-LABEL: @f32(123// CHECK: [[A_ADDR:%.*]] = alloca <4 x float>, align 16124// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x float>, align 16125// CHECK-NEXT: store <4 x float> [[A:%.*]], ptr [[A_ADDR]], align 16126// CHECK-NEXT: store <4 x float> [[B:%.*]], ptr [[B_ADDR]], align 16127// CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A_ADDR]], align 16128// CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[B_ADDR]], align 16129// CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <4 x float> [[TMP0]], [[TMP1]]130// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>131// CHECK-NEXT: ret <4 x i32> [[SEXT]]132//133// ERROR: returning 'int' from a function with incompatible result type134vector int f32(vector float a, vector float b) {135 return a == b;136}137 138// CHECK-LABEL: @f64(139// CHECK: [[A_ADDR:%.*]] = alloca <2 x double>, align 16140// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x double>, align 16141// CHECK-NEXT: store <2 x double> [[A:%.*]], ptr [[A_ADDR]], align 16142// CHECK-NEXT: store <2 x double> [[B:%.*]], ptr [[B_ADDR]], align 16143// CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[A_ADDR]], align 16144// CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[B_ADDR]], align 16145// CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <2 x double> [[TMP0]], [[TMP1]]146// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>147// CHECK-NEXT: ret <2 x i64> [[SEXT]]148//149// ERROR: returning 'int' from a function with incompatible result type150vector long long f64(vector double a, vector double b) {151 return a == b;152}153