53 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// RUN: %clang_cc1 -triple riscv32 -emit-llvm %s -o - \3// RUN: | FileCheck -check-prefix=NOHALF %s4// RUN: %clang_cc1 -triple riscv64 -emit-llvm %s -o - \5// RUN: | FileCheck -check-prefix=NOHALF %s6// RUN: %clang_cc1 -triple riscv32 -target-feature +zfh -emit-llvm %s -o - \7// RUN: | FileCheck -check-prefix=ZFH %s8// RUN: %clang_cc1 -triple riscv64 -target-feature +zfh -emit-llvm %s -o - \9// RUN: | FileCheck -check-prefix=ZFH %s10// RUN: %clang_cc1 -triple riscv32 -target-feature +zhinx -emit-llvm %s -o - \11// RUN: | FileCheck -check-prefix=ZHINX %s12// RUN: %clang_cc1 -triple riscv64 -target-feature +zhinx -emit-llvm %s -o - \13// RUN: | FileCheck -check-prefix=ZHINX %s14 15_Float16 x, y, z;16 17// With no native half type support (no zfh), f16 will be promoted to f32.18// With zfh, it shouldn't be.19 20// NOHALF-LABEL: define dso_local void @f16_add21// NOHALF-SAME: () #[[ATTR0:[0-9]+]] {22// NOHALF-NEXT: entry:23// NOHALF-NEXT: [[TMP0:%.*]] = load half, ptr @y, align 224// NOHALF-NEXT: [[EXT:%.*]] = fpext half [[TMP0]] to float25// NOHALF-NEXT: [[TMP1:%.*]] = load half, ptr @z, align 226// NOHALF-NEXT: [[EXT1:%.*]] = fpext half [[TMP1]] to float27// NOHALF-NEXT: [[ADD:%.*]] = fadd float [[EXT]], [[EXT1]]28// NOHALF-NEXT: [[UNPROMOTION:%.*]] = fptrunc float [[ADD]] to half29// NOHALF-NEXT: store half [[UNPROMOTION]], ptr @x, align 230// NOHALF-NEXT: ret void31//32// ZFH-LABEL: define dso_local void @f16_add33// ZFH-SAME: () #[[ATTR0:[0-9]+]] {34// ZFH-NEXT: entry:35// ZFH-NEXT: [[TMP0:%.*]] = load half, ptr @y, align 236// ZFH-NEXT: [[TMP1:%.*]] = load half, ptr @z, align 237// ZFH-NEXT: [[ADD:%.*]] = fadd half [[TMP0]], [[TMP1]]38// ZFH-NEXT: store half [[ADD]], ptr @x, align 239// ZFH-NEXT: ret void40//41// ZHINX-LABEL: define dso_local void @f16_add42// ZHINX-SAME: () #[[ATTR0:[0-9]+]] {43// ZHINX-NEXT: entry:44// ZHINX-NEXT: [[TMP0:%.*]] = load half, ptr @y, align 245// ZHINX-NEXT: [[TMP1:%.*]] = load half, ptr @z, align 246// ZHINX-NEXT: [[ADD:%.*]] = fadd half [[TMP0]], [[TMP1]]47// ZHINX-NEXT: store half [[ADD]], ptr @x, align 248// ZHINX-NEXT: ret void49//50void f16_add() {51 x = y + z;52}53