149 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \4// RUN: -target-feature +xandesvsintload -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <andes_vector.h>9 10// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_nds_vln8_v_i8mf811// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.nds.vln.nxv1i8.p0.i64(<vscale x 1 x i8> poison, ptr [[BASE]], i64 [[VL]])14// CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]15//16vint8mf8_t test_nds_vln8_v_i8mf8(const void *base, size_t vl) {17 return __riscv_nds_vln8_v_i8mf8(base, vl);18}19 20// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_nds_vln8_v_i8mf421// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {22// CHECK-RV64-NEXT: entry:23// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.nds.vln.nxv2i8.p0.i64(<vscale x 2 x i8> poison, ptr [[BASE]], i64 [[VL]])24// CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]25//26vint8mf4_t test_nds_vln8_v_i8mf4(const void *base, size_t vl) {27 return __riscv_nds_vln8_v_i8mf4(base, vl);28}29 30// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_nds_vln8_v_i8mf231// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {32// CHECK-RV64-NEXT: entry:33// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.nds.vln.nxv4i8.p0.i64(<vscale x 4 x i8> poison, ptr [[BASE]], i64 [[VL]])34// CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]35//36vint8mf2_t test_nds_vln8_v_i8mf2(const void *base, size_t vl) {37 return __riscv_nds_vln8_v_i8mf2(base, vl);38}39 40// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_nds_vln8_v_i8m141// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {42// CHECK-RV64-NEXT: entry:43// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.nds.vln.nxv8i8.p0.i64(<vscale x 8 x i8> poison, ptr [[BASE]], i64 [[VL]])44// CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]45//46vint8m1_t test_nds_vln8_v_i8m1(const void *base, size_t vl) {47 return __riscv_nds_vln8_v_i8m1(base, vl);48}49 50// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_nds_vln8_v_i8m251// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {52// CHECK-RV64-NEXT: entry:53// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.nds.vln.nxv16i8.p0.i64(<vscale x 16 x i8> poison, ptr [[BASE]], i64 [[VL]])54// CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]55//56vint8m2_t test_nds_vln8_v_i8m2(const void *base, size_t vl) {57 return __riscv_nds_vln8_v_i8m2(base, vl);58}59 60// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_nds_vln8_v_i8m461// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {62// CHECK-RV64-NEXT: entry:63// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.nds.vln.nxv32i8.p0.i64(<vscale x 32 x i8> poison, ptr [[BASE]], i64 [[VL]])64// CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]65//66vint8m4_t test_nds_vln8_v_i8m4(const void *base, size_t vl) {67 return __riscv_nds_vln8_v_i8m4(base, vl);68}69 70// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_nds_vln8_v_i8m871// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {72// CHECK-RV64-NEXT: entry:73// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.nds.vln.nxv64i8.p0.i64(<vscale x 64 x i8> poison, ptr [[BASE]], i64 [[VL]])74// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]75//76vint8m8_t test_nds_vln8_v_i8m8(const void *base, size_t vl) {77 return __riscv_nds_vln8_v_i8m8(base, vl);78}79 80// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_nds_vln8_v_i8mf8_m81// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {82// CHECK-RV64-NEXT: entry:83// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.nds.vln.mask.nxv1i8.p0.i64(<vscale x 1 x i8> poison, ptr [[BASE]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)84// CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]85//86vint8mf8_t test_nds_vln8_v_i8mf8_m(vbool64_t mask, const void *base, size_t vl) {87 return __riscv_nds_vln8_v_i8mf8_m(mask, base, vl);88}89 90// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_nds_vln8_v_i8mf4_m91// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {92// CHECK-RV64-NEXT: entry:93// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.nds.vln.mask.nxv2i8.p0.i64(<vscale x 2 x i8> poison, ptr [[BASE]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)94// CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]95//96vint8mf4_t test_nds_vln8_v_i8mf4_m(vbool32_t mask, const void *base, size_t vl) {97 return __riscv_nds_vln8_v_i8mf4_m(mask, base, vl);98}99 100// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_nds_vln8_v_i8mf2_m101// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {102// CHECK-RV64-NEXT: entry:103// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.nds.vln.mask.nxv4i8.p0.i64(<vscale x 4 x i8> poison, ptr [[BASE]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)104// CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]105//106vint8mf2_t test_nds_vln8_v_i8mf2_m(vbool16_t mask, const void *base, size_t vl) {107 return __riscv_nds_vln8_v_i8mf2_m(mask, base, vl);108}109 110// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_nds_vln8_v_i8m1_m111// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {112// CHECK-RV64-NEXT: entry:113// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.nds.vln.mask.nxv8i8.p0.i64(<vscale x 8 x i8> poison, ptr [[BASE]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)114// CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]115//116vint8m1_t test_nds_vln8_v_i8m1_m(vbool8_t mask, const void *base, size_t vl) {117 return __riscv_nds_vln8_v_i8m1_m(mask, base, vl);118}119 120// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_nds_vln8_v_i8m2_m121// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {122// CHECK-RV64-NEXT: entry:123// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.nds.vln.mask.nxv16i8.p0.i64(<vscale x 16 x i8> poison, ptr [[BASE]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)124// CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]125//126vint8m2_t test_nds_vln8_v_i8m2_m(vbool4_t mask, const void *base, size_t vl) {127 return __riscv_nds_vln8_v_i8m2_m(mask, base, vl);128}129 130// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_nds_vln8_v_i8m4_m131// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {132// CHECK-RV64-NEXT: entry:133// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.nds.vln.mask.nxv32i8.p0.i64(<vscale x 32 x i8> poison, ptr [[BASE]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)134// CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]135//136vint8m4_t test_nds_vln8_v_i8m4_m(vbool2_t mask, const void *base, size_t vl) {137 return __riscv_nds_vln8_v_i8m4_m(mask, base, vl);138}139 140// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_nds_vln8_v_i8m8_m141// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {142// CHECK-RV64-NEXT: entry:143// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.nds.vln.mask.nxv64i8.p0.i64(<vscale x 64 x i8> poison, ptr [[BASE]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)144// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]145//146vint8m8_t test_nds_vln8_v_i8m8_m(vbool1_t mask, const void *base, size_t vl) {147 return __riscv_nds_vln8_v_i8m8_m(mask, base, vl);148}149