67 lines · c
1// REQUIRES: riscv-registered-target2 3// RUN: %clang_cc1 -triple riscv32 -target-feature +v \4// RUN: -mvscale-min=2 -mvscale-max=2 -O2 -emit-llvm %s -o - \5// RUN: | FileCheck %s6// RUN: %clang_cc1 -triple riscv64 -target-feature +v \7// RUN: -mvscale-min=2 -mvscale-max=2 -O2 -emit-llvm %s -o - \8// RUN: | FileCheck %s9 10// Test RISC-V V-extension fixed-length vector inline assembly constraints.11#include <riscv_vector.h>12#include <stdbool.h>13 14typedef vbool1_t fixed_bool1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));15typedef vint32m1_t fixed_i32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));16typedef vint8mf2_t fixed_i8mf2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen / 2)));17 18typedef bool bx2 __attribute__((ext_vector_type(16)));19typedef int i32x2 __attribute__((ext_vector_type(2)));20typedef char i8x4 __attribute__((ext_vector_type(4)));21 22fixed_i32m1_t test_vr(fixed_i32m1_t a) {23// CHECK-LABEL: define{{.*}} @test_vr24// CHECK: %0 = tail call <4 x i32> asm sideeffect "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"(<4 x i32> %a, <4 x i32> %a)25 fixed_i32m1_t ret;26 asm volatile ("vadd.vv %0, %1, %2" : "=vr"(ret) : "vr"(a), "vr"(a));27 return ret;28}29 30i32x2 test_vr2(i32x2 a) {31// CHECK-LABEL: define{{.*}} @test_vr232// CHECK: %1 = tail call <2 x i32> asm sideeffect "vadd.vv $0, $1, $2", "=^vr,^vr,^vr"(<2 x i32> %0, <2 x i32> %0)33 i32x2 ret;34 asm volatile ("vadd.vv %0, %1, %2" : "=vr"(ret) : "vr"(a), "vr"(a));35 return ret;36}37 38fixed_i8mf2_t test_vd(fixed_i8mf2_t a) {39// CHECK-LABEL: define{{.*}} @test_vd40// CHECK: %0 = tail call <8 x i8> asm sideeffect "vadd.vv $0, $1, $2", "=^vd,^vr,^vr"(<8 x i8> %a, <8 x i8> %a)41 fixed_i8mf2_t ret;42 asm volatile ("vadd.vv %0, %1, %2" : "=vd"(ret) : "vr"(a), "vr"(a));43 return ret;44}45 46i8x4 test_vd2(i8x4 a) {47// CHECK-LABEL: define{{.*}} @test_vd248// CHECK: %1 = tail call <4 x i8> asm sideeffect "vadd.vv $0, $1, $2", "=^vd,^vr,^vr"(<4 x i8> %0, <4 x i8> %0)49 i8x4 ret;50 asm volatile ("vadd.vv %0, %1, %2" : "=vd"(ret) : "vr"(a), "vr"(a));51 return ret;52}53 54fixed_bool1_t test_vm(fixed_bool1_t a) {55// CHECK-LABEL: define{{.*}} @test_vm56// CHECK: %1 = tail call <16 x i8> asm sideeffect "vmand.mm $0, $1, $2", "=^vm,^vm,^vm"(<16 x i8> %a, <16 x i8> %a)57 fixed_bool1_t ret;58 asm volatile ("vmand.mm %0, %1, %2" : "=vm"(ret) : "vm"(a), "vm"(a));59 return ret;60}61 62void test_vm2(bx2 a) {63// CHECK-LABEL: define{{.*}} @test_vm264// CHECK: tail call void asm sideeffect "dummy $0", "^vm"(<16 x i1> %a1)65 asm volatile ("dummy %0" :: "vm"(a));66}67