201 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple riscv32 -target-feature +xcvalu -emit-llvm %s -o - \3// RUN: -disable-O0-optnone | opt -S -passes=mem2reg | FileCheck %s4 5#include <stdint.h>6#include <riscv_corev_alu.h>7 8// CHECK-LABEL: @test_alu_sle(9// CHECK-NEXT: entry:10// CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[A:%.*]], [[B:%.*]]11// CHECK-NEXT: [[SLE_I:%.*]] = zext i1 [[TMP0]] to i3212// CHECK-NEXT: ret i32 [[SLE_I]]13//14int test_alu_sle(int32_t a, int32_t b) {15 return __riscv_cv_alu_sle(a, b);16}17 18// CHECK-LABEL: @test_alu_sleu(19// CHECK-NEXT: entry:20// CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[A:%.*]], [[B:%.*]]21// CHECK-NEXT: [[SLEU_I:%.*]] = zext i1 [[TMP0]] to i3222// CHECK-NEXT: ret i32 [[SLEU_I]]23//24int test_alu_sleu(uint32_t a, uint32_t b) {25 return __riscv_cv_alu_sleu(a, b);26}27 28// CHECK-LABEL: @test_alu_min(29// CHECK-NEXT: entry:30// CHECK-NEXT: [[ELT_MIN_I:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 [[B:%.*]])31// CHECK-NEXT: ret i32 [[ELT_MIN_I]]32//33int test_alu_min(int32_t a, int32_t b) {34 return __riscv_cv_alu_min(a, b);35}36 37// CHECK-LABEL: @test_alu_minu(38// CHECK-NEXT: entry:39// CHECK-NEXT: [[ELT_MIN_I:%.*]] = call i32 @llvm.umin.i32(i32 [[A:%.*]], i32 [[B:%.*]])40// CHECK-NEXT: ret i32 [[ELT_MIN_I]]41//42int test_alu_minu(uint32_t a, uint32_t b) {43 return __riscv_cv_alu_minu(a, b);44}45 46// CHECK-LABEL: @test_alu_max(47// CHECK-NEXT: entry:48// CHECK-NEXT: [[ELT_MAX_I:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 [[B:%.*]])49// CHECK-NEXT: ret i32 [[ELT_MAX_I]]50//51int test_alu_max(int32_t a, int32_t b) {52 return __riscv_cv_alu_max(a, b);53}54 55// CHECK-LABEL: @test_alu_maxu(56// CHECK-NEXT: entry:57// CHECK-NEXT: [[ELT_MAX_I:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 [[B:%.*]])58// CHECK-NEXT: ret i32 [[ELT_MAX_I]]59//60int test_alu_maxu(uint32_t a, uint32_t b) {61 return __riscv_cv_alu_maxu(a, b);62}63 64// CHECK-LABEL: @test_alu_exths(65// CHECK-NEXT: entry:66// CHECK-NEXT: [[CONV_I:%.*]] = sext i16 [[A:%.*]] to i3267// CHECK-NEXT: [[EXTHS_I:%.*]] = sext i16 [[A]] to i3268// CHECK-NEXT: ret i32 [[EXTHS_I]]69//70int test_alu_exths(int16_t a) {71 return __riscv_cv_alu_exths(a);72}73 74// CHECK-LABEL: @test_alu_exthz(75// CHECK-NEXT: entry:76// CHECK-NEXT: [[CONV_I:%.*]] = zext i16 [[A:%.*]] to i3277// CHECK-NEXT: [[EXTHZ_I:%.*]] = zext i16 [[A]] to i3278// CHECK-NEXT: ret i32 [[EXTHZ_I]]79//80int test_alu_exthz(uint16_t a) {81 return __riscv_cv_alu_exthz(a);82}83 84// CHECK-LABEL: @test_alu_extbs(85// CHECK-NEXT: entry:86// CHECK-NEXT: [[CONV_I:%.*]] = sext i8 [[A:%.*]] to i3287// CHECK-NEXT: [[EXTBS_I:%.*]] = sext i8 [[A]] to i3288// CHECK-NEXT: ret i32 [[EXTBS_I]]89//90int test_alu_extbs(int8_t a) {91 return __riscv_cv_alu_extbs(a);92}93 94// CHECK-LABEL: @test_alu_extbz(95// CHECK-NEXT: entry:96// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 [[A:%.*]] to i3297// CHECK-NEXT: [[EXTBZ_I:%.*]] = zext i8 [[A]] to i3298// CHECK-NEXT: ret i32 [[EXTBZ_I]]99//100int test_alu_extbz(uint8_t a) {101 return __riscv_cv_alu_extbz(a);102}103 104// CHECK-LABEL: @test_alu_clip(105// CHECK-NEXT: entry:106// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.clip(i32 [[A:%.*]], i32 0)107// CHECK-NEXT: ret i32 [[TMP0]]108//109int test_alu_clip(int32_t a) {110 return __riscv_cv_alu_clip(a, 0);111}112 113// CHECK-LABEL: @test_alu_clipu(114// CHECK-NEXT: entry:115// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.clipu(i32 [[A:%.*]], i32 0)116// CHECK-NEXT: ret i32 [[TMP0]]117//118int test_alu_clipu(uint32_t a) {119 return __riscv_cv_alu_clipu(a, 0);120}121 122// CHECK-LABEL: @test_alu_addN(123// CHECK-NEXT: entry:124// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 0 to i32125// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.addN(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[CONV_I]])126// CHECK-NEXT: ret i32 [[TMP0]]127//128int test_alu_addN(int32_t a, int32_t b) {129 return __riscv_cv_alu_addN(a, b, 0);130}131 132// CHECK-LABEL: @test_alu_adduN(133// CHECK-NEXT: entry:134// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 0 to i32135// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.adduN(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[CONV_I]])136// CHECK-NEXT: ret i32 [[TMP0]]137//138int test_alu_adduN(uint32_t a, uint32_t b) {139 return __riscv_cv_alu_adduN(a, b, 0);140}141 142// CHECK-LABEL: @test_alu_addRN(143// CHECK-NEXT: entry:144// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 0 to i32145// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.addRN(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[CONV_I]])146// CHECK-NEXT: ret i32 [[TMP0]]147//148int test_alu_addRN(int32_t a, int32_t b) {149 return __riscv_cv_alu_addRN(a, b, 0);150}151 152// CHECK-LABEL: @test_alu_adduRN(153// CHECK-NEXT: entry:154// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 0 to i32155// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.adduRN(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[CONV_I]])156// CHECK-NEXT: ret i32 [[TMP0]]157//158int test_alu_adduRN(uint32_t a, uint32_t b) {159 return __riscv_cv_alu_adduRN(a, b, 0);160}161 162// CHECK-LABEL: @test_alu_subN(163// CHECK-NEXT: entry:164// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 0 to i32165// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.subN(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[CONV_I]])166// CHECK-NEXT: ret i32 [[TMP0]]167//168int test_alu_subN(int32_t a, int32_t b) {169 return __riscv_cv_alu_subN(a, b, 0);170}171 172// CHECK-LABEL: @test_alu_subuN(173// CHECK-NEXT: entry:174// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 0 to i32175// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.subuN(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[CONV_I]])176// CHECK-NEXT: ret i32 [[TMP0]]177//178int test_alu_subuN(uint32_t a, uint32_t b) {179 return __riscv_cv_alu_subuN(a, b, 0);180}181 182// CHECK-LABEL: @test_alu_subRN(183// CHECK-NEXT: entry:184// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 0 to i32185// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.subRN(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[CONV_I]])186// CHECK-NEXT: ret i32 [[TMP0]]187//188int test_alu_subRN(int32_t a, int32_t b) {189 return __riscv_cv_alu_subRN(a, b, 0);190}191 192// CHECK-LABEL: @test_alu_subuRN(193// CHECK-NEXT: entry:194// CHECK-NEXT: [[CONV_I:%.*]] = zext i8 0 to i32195// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.subuRN(i32 [[A:%.*]], i32 [[B:%.*]], i32 [[CONV_I]])196// CHECK-NEXT: ret i32 [[TMP0]]197//198int test_alu_subuRN(uint32_t a, uint32_t b) {199 return __riscv_cv_alu_subuRN(a, b, 0);200}201