169 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple riscv32 -target-feature +xcvalu -emit-llvm %s -o - \3// RUN: -disable-O0-optnone | opt -S -passes=mem2reg | FileCheck %s4 5#include <stdint.h>6 7// CHECK-LABEL: @test_abs(8// CHECK-NEXT: entry:9// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.abs.i32(i32 [[A:%.*]], i1 true)10// CHECK-NEXT: ret i32 [[TMP0]]11//12int test_abs(int a) {13 return __builtin_abs(a);14}15 16// CHECK-LABEL: @test_alu_sle(17// CHECK-NEXT: entry:18// CHECK-NEXT: [[TMP0:%.*]] = icmp sle i32 [[A:%.*]], [[B:%.*]]19// CHECK-NEXT: [[SLE:%.*]] = zext i1 [[TMP0]] to i3220// CHECK-NEXT: ret i32 [[SLE]]21//22int test_alu_sle(int32_t a, int32_t b) {23 return __builtin_riscv_cv_alu_sle(a, b);24}25 26// CHECK-LABEL: @test_alu_sleu(27// CHECK-NEXT: entry:28// CHECK-NEXT: [[TMP0:%.*]] = icmp ule i32 [[A:%.*]], [[B:%.*]]29// CHECK-NEXT: [[SLEU:%.*]] = zext i1 [[TMP0]] to i3230// CHECK-NEXT: ret i32 [[SLEU]]31//32int test_alu_sleu(uint32_t a, uint32_t b) {33 return __builtin_riscv_cv_alu_sleu(a, b);34}35 36// CHECK-LABEL: @test_alu_exths(37// CHECK-NEXT: entry:38// CHECK-NEXT: [[CONV:%.*]] = sext i16 [[A:%.*]] to i3239// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[CONV]] to i1640// CHECK-NEXT: [[EXTHS:%.*]] = sext i16 [[TMP0]] to i3241// CHECK-NEXT: ret i32 [[EXTHS]]42//43int test_alu_exths(int16_t a) {44 return __builtin_riscv_cv_alu_exths(a);45}46 47// CHECK-LABEL: @test_alu_exthz(48// CHECK-NEXT: entry:49// CHECK-NEXT: [[CONV:%.*]] = zext i16 [[A:%.*]] to i3250// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[CONV]] to i1651// CHECK-NEXT: [[EXTHZ:%.*]] = zext i16 [[TMP0]] to i3252// CHECK-NEXT: ret i32 [[EXTHZ]]53//54int test_alu_exthz(uint16_t a) {55 return __builtin_riscv_cv_alu_exthz(a);56}57 58// CHECK-LABEL: @test_alu_extbs(59// CHECK-NEXT: entry:60// CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i3261// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[CONV]] to i862// CHECK-NEXT: [[EXTBS:%.*]] = sext i8 [[TMP0]] to i3263// CHECK-NEXT: ret i32 [[EXTBS]]64//65int test_alu_extbs(int8_t a) {66 return __builtin_riscv_cv_alu_extbs(a);67}68 69// CHECK-LABEL: @test_alu_extbz(70// CHECK-NEXT: entry:71// CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i3272// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[CONV]] to i873// CHECK-NEXT: [[EXTBZ:%.*]] = zext i8 [[TMP0]] to i3274// CHECK-NEXT: ret i32 [[EXTBZ]]75//76int test_alu_extbz(uint8_t a) {77 return __builtin_riscv_cv_alu_extbz(a);78}79 80// CHECK-LABEL: @test_alu_clip(81// CHECK-NEXT: entry:82// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.clip(i32 [[A:%.*]], i32 15)83// CHECK-NEXT: ret i32 [[TMP0]]84//85int test_alu_clip(int32_t a) {86 return __builtin_riscv_cv_alu_clip(a, 15);87}88 89// CHECK-LABEL: @test_alu_clipu(90// CHECK-NEXT: entry:91// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.clipu(i32 [[A:%.*]], i32 15)92// CHECK-NEXT: ret i32 [[TMP0]]93//94int test_alu_clipu(uint32_t a) {95 return __builtin_riscv_cv_alu_clipu(a, 15);96}97 98// CHECK-LABEL: @test_alu_addN(99// CHECK-NEXT: entry:100// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.addN(i32 [[A:%.*]], i32 [[B:%.*]], i32 0)101// CHECK-NEXT: ret i32 [[TMP0]]102//103int test_alu_addN(int32_t a, int32_t b) {104 return __builtin_riscv_cv_alu_addN(a, b, 0);105}106 107// CHECK-LABEL: @test_alu_adduN(108// CHECK-NEXT: entry:109// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.adduN(i32 [[A:%.*]], i32 [[B:%.*]], i32 0)110// CHECK-NEXT: ret i32 [[TMP0]]111//112int test_alu_adduN(uint32_t a, uint32_t b) {113 return __builtin_riscv_cv_alu_adduN(a, b, 0);114}115 116// CHECK-LABEL: @test_alu_addRN(117// CHECK-NEXT: entry:118// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.addRN(i32 [[A:%.*]], i32 [[B:%.*]], i32 0)119// CHECK-NEXT: ret i32 [[TMP0]]120//121int test_alu_addRN(int32_t a, int32_t b) {122 return __builtin_riscv_cv_alu_addRN(a, b, 0);123}124 125// CHECK-LABEL: @test_alu_adduRN(126// CHECK-NEXT: entry:127// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.adduRN(i32 [[A:%.*]], i32 [[B:%.*]], i32 0)128// CHECK-NEXT: ret i32 [[TMP0]]129//130int test_alu_adduRN(uint32_t a, uint32_t b) {131 return __builtin_riscv_cv_alu_adduRN(a, b, 0);132}133 134// CHECK-LABEL: @test_alu_subN(135// CHECK-NEXT: entry:136// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.subN(i32 [[A:%.*]], i32 [[B:%.*]], i32 0)137// CHECK-NEXT: ret i32 [[TMP0]]138//139int test_alu_subN(int32_t a, int32_t b) {140 return __builtin_riscv_cv_alu_subN(a, b, 0);141}142 143// CHECK-LABEL: @test_alu_subuN(144// CHECK-NEXT: entry:145// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.subuN(i32 [[A:%.*]], i32 [[B:%.*]], i32 0)146// CHECK-NEXT: ret i32 [[TMP0]]147//148int test_alu_subuN(uint32_t a, uint32_t b) {149 return __builtin_riscv_cv_alu_subuN(a, b, 0);150}151 152// CHECK-LABEL: @test_alu_subRN(153// CHECK-NEXT: entry:154// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.subRN(i32 [[A:%.*]], i32 [[B:%.*]], i32 0)155// CHECK-NEXT: ret i32 [[TMP0]]156//157int test_alu_subRN(int32_t a, int32_t b) {158 return __builtin_riscv_cv_alu_subRN(a, b, 0);159}160 161// CHECK-LABEL: @test_alu_subuRN(162// CHECK-NEXT: entry:163// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.cv.alu.subuRN(i32 [[A:%.*]], i32 [[B:%.*]], i32 0)164// CHECK-NEXT: ret i32 [[TMP0]]165//166int test_alu_subuRN(uint32_t a, uint32_t b) {167 return __builtin_riscv_cv_alu_subuRN(a, b, 0);168}169