45 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple riscv64 -target-feature +xtheadbb -emit-llvm %s -o - \3// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \4// RUN: | FileCheck %s -check-prefix=RV64XTHEADBB5 6// RV64XTHEADBB-LABEL: @clz_32(7// RV64XTHEADBB-NEXT: entry:8// RV64XTHEADBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[A:%.*]], i1 false)9// RV64XTHEADBB-NEXT: ret i32 [[TMP0]]10//11unsigned int clz_32(unsigned int a) {12 return __builtin_riscv_clz_32(a);13}14 15// RV64XTHEADBB-LABEL: @clo_32(16// RV64XTHEADBB-NEXT: entry:17// RV64XTHEADBB-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -118// RV64XTHEADBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[NOT]], i1 false)19// RV64XTHEADBB-NEXT: ret i32 [[TMP0]]20//21unsigned int clo_32(unsigned int a) {22 return __builtin_riscv_clz_32(~a);23}24 25// RV64XTHEADBB-LABEL: @clz_64(26// RV64XTHEADBB-NEXT: entry:27// RV64XTHEADBB-NEXT: [[TMP0:%.*]] = call i64 @llvm.ctlz.i64(i64 [[A:%.*]], i1 false)28// RV64XTHEADBB-NEXT: [[CAST:%.*]] = trunc i64 [[TMP0]] to i3229// RV64XTHEADBB-NEXT: ret i32 [[CAST]]30//31unsigned int clz_64(unsigned long a) {32 return __builtin_riscv_clz_64(a);33}34 35// RV64XTHEADBB-LABEL: @clo_64(36// RV64XTHEADBB-NEXT: entry:37// RV64XTHEADBB-NEXT: [[NOT:%.*]] = xor i64 [[A:%.*]], -138// RV64XTHEADBB-NEXT: [[TMP0:%.*]] = call i64 @llvm.ctlz.i64(i64 [[NOT]], i1 false)39// RV64XTHEADBB-NEXT: [[CAST:%.*]] = trunc i64 [[TMP0]] to i3240// RV64XTHEADBB-NEXT: ret i32 [[CAST]]41//42unsigned int clo_64(unsigned long a) {43 return __builtin_riscv_clz_64(~a);44}45