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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple riscv32 -target-feature +zbkb -emit-llvm %s -o - \3// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \4// RUN: | FileCheck %s -check-prefix=RV32ZBKB5// RUN: %clang_cc1 -triple riscv64 -target-feature +zbkb -emit-llvm %s -o - \6// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \7// RUN: | FileCheck %s -check-prefix=RV64ZBKB8 9#include <riscv_bitmanip.h>10 11// RV32ZBKB-LABEL: @brev8_32(12// RV32ZBKB-NEXT: entry:13// RV32ZBKB-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.brev8.i32(i32 [[RS1:%.*]])14// RV32ZBKB-NEXT: ret i32 [[TMP0]]15//16// RV64ZBKB-LABEL: @brev8_32(17// RV64ZBKB-NEXT: entry:18// RV64ZBKB-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.brev8.i32(i32 [[RS1:%.*]])19// RV64ZBKB-NEXT: ret i32 [[TMP0]]20//21uint32_t brev8_32(uint32_t rs1)22{23 return __riscv_brev8_32(rs1);24}25 26#if __riscv_xlen == 6427// RV64ZBKB-LABEL: @brev8_64(28// RV64ZBKB-NEXT: entry:29// RV64ZBKB-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.brev8.i64(i64 [[RS1:%.*]])30// RV64ZBKB-NEXT: ret i64 [[TMP0]]31//32uint64_t brev8_64(uint64_t rs1)33{34 return __riscv_brev8_64(rs1);35}36#endif37 38#if __riscv_xlen == 3239// RV32ZBKB-LABEL: @zip(40// RV32ZBKB-NEXT: entry:41// RV32ZBKB-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.zip.i32(i32 [[RS1:%.*]])42// RV32ZBKB-NEXT: ret i32 [[TMP0]]43//44uint32_t zip(uint32_t rs1)45{46 return __riscv_zip_32(rs1);47}48 49// RV32ZBKB-LABEL: @unzip(50// RV32ZBKB-NEXT: entry:51// RV32ZBKB-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.unzip.i32(i32 [[RS1:%.*]])52// RV32ZBKB-NEXT: ret i32 [[TMP0]]53//54uint32_t unzip(uint32_t rs1)55{56 return __riscv_unzip_32(rs1);57}58#endif59