38 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple riscv32 -target-feature +zksed -emit-llvm %s -o - \3// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \4// RUN: | FileCheck %s -check-prefix=RV32ZKSED5// RUN: %clang_cc1 -triple riscv64 -target-feature +zksed -emit-llvm %s -o - \6// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \7// RUN: | FileCheck %s -check-prefix=RV64ZKSED8 9#include <riscv_crypto.h>10 11// RV32ZKSED-LABEL: @sm4ks(12// RV32ZKSED-NEXT: entry:13// RV32ZKSED-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.sm4ks(i32 [[RS1:%.*]], i32 [[RS2:%.*]], i32 0)14// RV32ZKSED-NEXT: ret i32 [[TMP0]]15//16// RV64ZKSED-LABEL: @sm4ks(17// RV64ZKSED-NEXT: entry:18// RV64ZKSED-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.sm4ks(i32 [[RS1:%.*]], i32 [[RS2:%.*]], i32 0)19// RV64ZKSED-NEXT: ret i32 [[TMP0]]20//21uint32_t sm4ks(uint32_t rs1, uint32_t rs2) {22 return __riscv_sm4ks(rs1, rs2, 0);23}24 25// RV32ZKSED-LABEL: @sm4ed(26// RV32ZKSED-NEXT: entry:27// RV32ZKSED-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.sm4ed(i32 [[RS1:%.*]], i32 [[RS2:%.*]], i32 0)28// RV32ZKSED-NEXT: ret i32 [[TMP0]]29//30// RV64ZKSED-LABEL: @sm4ed(31// RV64ZKSED-NEXT: entry:32// RV64ZKSED-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.sm4ed(i32 [[RS1:%.*]], i32 [[RS2:%.*]], i32 0)33// RV64ZKSED-NEXT: ret i32 [[TMP0]]34//35uint32_t sm4ed(uint32_t rs1, uint32_t rs2) {36 return __riscv_sm4ed(rs1, rs2, 0);37}38