890 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \4// RUN: -target-feature +zvfhmin -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vloxei64_v_f16mf411// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vloxei.nxv1f16.p0.nxv1i64.i64(<vscale x 1 x half> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])14// CHECK-RV64-NEXT: ret <vscale x 1 x half> [[TMP0]]15//16vfloat16mf4_t test_vloxei64_v_f16mf4(const _Float16 *base, vuint64m1_t bindex, size_t vl) {17 return __riscv_vloxei64_v_f16mf4(base, bindex, vl);18}19 20// CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vloxei64_v_f16mf221// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {22// CHECK-RV64-NEXT: entry:23// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vloxei.nxv2f16.p0.nxv2i64.i64(<vscale x 2 x half> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])24// CHECK-RV64-NEXT: ret <vscale x 2 x half> [[TMP0]]25//26vfloat16mf2_t test_vloxei64_v_f16mf2(const _Float16 *base, vuint64m2_t bindex, size_t vl) {27 return __riscv_vloxei64_v_f16mf2(base, bindex, vl);28}29 30// CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vloxei64_v_f16m131// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {32// CHECK-RV64-NEXT: entry:33// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vloxei.nxv4f16.p0.nxv4i64.i64(<vscale x 4 x half> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])34// CHECK-RV64-NEXT: ret <vscale x 4 x half> [[TMP0]]35//36vfloat16m1_t test_vloxei64_v_f16m1(const _Float16 *base, vuint64m4_t bindex, size_t vl) {37 return __riscv_vloxei64_v_f16m1(base, bindex, vl);38}39 40// CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vloxei64_v_f16m241// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {42// CHECK-RV64-NEXT: entry:43// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vloxei.nxv8f16.p0.nxv8i64.i64(<vscale x 8 x half> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])44// CHECK-RV64-NEXT: ret <vscale x 8 x half> [[TMP0]]45//46vfloat16m2_t test_vloxei64_v_f16m2(const _Float16 *base, vuint64m8_t bindex, size_t vl) {47 return __riscv_vloxei64_v_f16m2(base, bindex, vl);48}49 50// CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vloxei64_v_f32mf251// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {52// CHECK-RV64-NEXT: entry:53// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vloxei.nxv1f32.p0.nxv1i64.i64(<vscale x 1 x float> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])54// CHECK-RV64-NEXT: ret <vscale x 1 x float> [[TMP0]]55//56vfloat32mf2_t test_vloxei64_v_f32mf2(const float *base, vuint64m1_t bindex, size_t vl) {57 return __riscv_vloxei64_v_f32mf2(base, bindex, vl);58}59 60// CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vloxei64_v_f32m161// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {62// CHECK-RV64-NEXT: entry:63// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vloxei.nxv2f32.p0.nxv2i64.i64(<vscale x 2 x float> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])64// CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]65//66vfloat32m1_t test_vloxei64_v_f32m1(const float *base, vuint64m2_t bindex, size_t vl) {67 return __riscv_vloxei64_v_f32m1(base, bindex, vl);68}69 70// CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vloxei64_v_f32m271// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {72// CHECK-RV64-NEXT: entry:73// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vloxei.nxv4f32.p0.nxv4i64.i64(<vscale x 4 x float> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])74// CHECK-RV64-NEXT: ret <vscale x 4 x float> [[TMP0]]75//76vfloat32m2_t test_vloxei64_v_f32m2(const float *base, vuint64m4_t bindex, size_t vl) {77 return __riscv_vloxei64_v_f32m2(base, bindex, vl);78}79 80// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vloxei64_v_f32m481// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {82// CHECK-RV64-NEXT: entry:83// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vloxei.nxv8f32.p0.nxv8i64.i64(<vscale x 8 x float> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])84// CHECK-RV64-NEXT: ret <vscale x 8 x float> [[TMP0]]85//86vfloat32m4_t test_vloxei64_v_f32m4(const float *base, vuint64m8_t bindex, size_t vl) {87 return __riscv_vloxei64_v_f32m4(base, bindex, vl);88}89 90// CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vloxei64_v_f64m191// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {92// CHECK-RV64-NEXT: entry:93// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vloxei.nxv1f64.p0.nxv1i64.i64(<vscale x 1 x double> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])94// CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]95//96vfloat64m1_t test_vloxei64_v_f64m1(const double *base, vuint64m1_t bindex, size_t vl) {97 return __riscv_vloxei64_v_f64m1(base, bindex, vl);98}99 100// CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vloxei64_v_f64m2101// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {102// CHECK-RV64-NEXT: entry:103// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vloxei.nxv2f64.p0.nxv2i64.i64(<vscale x 2 x double> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])104// CHECK-RV64-NEXT: ret <vscale x 2 x double> [[TMP0]]105//106vfloat64m2_t test_vloxei64_v_f64m2(const double *base, vuint64m2_t bindex, size_t vl) {107 return __riscv_vloxei64_v_f64m2(base, bindex, vl);108}109 110// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vloxei64_v_f64m4111// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {112// CHECK-RV64-NEXT: entry:113// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vloxei.nxv4f64.p0.nxv4i64.i64(<vscale x 4 x double> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])114// CHECK-RV64-NEXT: ret <vscale x 4 x double> [[TMP0]]115//116vfloat64m4_t test_vloxei64_v_f64m4(const double *base, vuint64m4_t bindex, size_t vl) {117 return __riscv_vloxei64_v_f64m4(base, bindex, vl);118}119 120// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vloxei64_v_f64m8121// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {122// CHECK-RV64-NEXT: entry:123// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vloxei.nxv8f64.p0.nxv8i64.i64(<vscale x 8 x double> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])124// CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]125//126vfloat64m8_t test_vloxei64_v_f64m8(const double *base, vuint64m8_t bindex, size_t vl) {127 return __riscv_vloxei64_v_f64m8(base, bindex, vl);128}129 130// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vloxei64_v_i8mf8131// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {132// CHECK-RV64-NEXT: entry:133// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vloxei.nxv1i8.p0.nxv1i64.i64(<vscale x 1 x i8> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])134// CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]135//136vint8mf8_t test_vloxei64_v_i8mf8(const int8_t *base, vuint64m1_t bindex, size_t vl) {137 return __riscv_vloxei64_v_i8mf8(base, bindex, vl);138}139 140// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vloxei64_v_i8mf4141// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {142// CHECK-RV64-NEXT: entry:143// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vloxei.nxv2i8.p0.nxv2i64.i64(<vscale x 2 x i8> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])144// CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]145//146vint8mf4_t test_vloxei64_v_i8mf4(const int8_t *base, vuint64m2_t bindex, size_t vl) {147 return __riscv_vloxei64_v_i8mf4(base, bindex, vl);148}149 150// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vloxei64_v_i8mf2151// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {152// CHECK-RV64-NEXT: entry:153// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vloxei.nxv4i8.p0.nxv4i64.i64(<vscale x 4 x i8> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])154// CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]155//156vint8mf2_t test_vloxei64_v_i8mf2(const int8_t *base, vuint64m4_t bindex, size_t vl) {157 return __riscv_vloxei64_v_i8mf2(base, bindex, vl);158}159 160// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vloxei64_v_i8m1161// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {162// CHECK-RV64-NEXT: entry:163// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vloxei.nxv8i8.p0.nxv8i64.i64(<vscale x 8 x i8> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])164// CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]165//166vint8m1_t test_vloxei64_v_i8m1(const int8_t *base, vuint64m8_t bindex, size_t vl) {167 return __riscv_vloxei64_v_i8m1(base, bindex, vl);168}169 170// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vloxei64_v_i16mf4171// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {172// CHECK-RV64-NEXT: entry:173// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vloxei.nxv1i16.p0.nxv1i64.i64(<vscale x 1 x i16> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])174// CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]175//176vint16mf4_t test_vloxei64_v_i16mf4(const int16_t *base, vuint64m1_t bindex, size_t vl) {177 return __riscv_vloxei64_v_i16mf4(base, bindex, vl);178}179 180// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vloxei64_v_i16mf2181// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {182// CHECK-RV64-NEXT: entry:183// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vloxei.nxv2i16.p0.nxv2i64.i64(<vscale x 2 x i16> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])184// CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]185//186vint16mf2_t test_vloxei64_v_i16mf2(const int16_t *base, vuint64m2_t bindex, size_t vl) {187 return __riscv_vloxei64_v_i16mf2(base, bindex, vl);188}189 190// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vloxei64_v_i16m1191// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {192// CHECK-RV64-NEXT: entry:193// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vloxei.nxv4i16.p0.nxv4i64.i64(<vscale x 4 x i16> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])194// CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]195//196vint16m1_t test_vloxei64_v_i16m1(const int16_t *base, vuint64m4_t bindex, size_t vl) {197 return __riscv_vloxei64_v_i16m1(base, bindex, vl);198}199 200// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vloxei64_v_i16m2201// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {202// CHECK-RV64-NEXT: entry:203// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vloxei.nxv8i16.p0.nxv8i64.i64(<vscale x 8 x i16> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])204// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]205//206vint16m2_t test_vloxei64_v_i16m2(const int16_t *base, vuint64m8_t bindex, size_t vl) {207 return __riscv_vloxei64_v_i16m2(base, bindex, vl);208}209 210// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vloxei64_v_i32mf2211// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {212// CHECK-RV64-NEXT: entry:213// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vloxei.nxv1i32.p0.nxv1i64.i64(<vscale x 1 x i32> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])214// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]215//216vint32mf2_t test_vloxei64_v_i32mf2(const int32_t *base, vuint64m1_t bindex, size_t vl) {217 return __riscv_vloxei64_v_i32mf2(base, bindex, vl);218}219 220// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vloxei64_v_i32m1221// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {222// CHECK-RV64-NEXT: entry:223// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vloxei.nxv2i32.p0.nxv2i64.i64(<vscale x 2 x i32> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])224// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]225//226vint32m1_t test_vloxei64_v_i32m1(const int32_t *base, vuint64m2_t bindex, size_t vl) {227 return __riscv_vloxei64_v_i32m1(base, bindex, vl);228}229 230// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vloxei64_v_i32m2231// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {232// CHECK-RV64-NEXT: entry:233// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vloxei.nxv4i32.p0.nxv4i64.i64(<vscale x 4 x i32> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])234// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]235//236vint32m2_t test_vloxei64_v_i32m2(const int32_t *base, vuint64m4_t bindex, size_t vl) {237 return __riscv_vloxei64_v_i32m2(base, bindex, vl);238}239 240// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vloxei64_v_i32m4241// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {242// CHECK-RV64-NEXT: entry:243// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vloxei.nxv8i32.p0.nxv8i64.i64(<vscale x 8 x i32> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])244// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]245//246vint32m4_t test_vloxei64_v_i32m4(const int32_t *base, vuint64m8_t bindex, size_t vl) {247 return __riscv_vloxei64_v_i32m4(base, bindex, vl);248}249 250// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vloxei64_v_i64m1251// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {252// CHECK-RV64-NEXT: entry:253// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vloxei.nxv1i64.p0.nxv1i64.i64(<vscale x 1 x i64> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])254// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]255//256vint64m1_t test_vloxei64_v_i64m1(const int64_t *base, vuint64m1_t bindex, size_t vl) {257 return __riscv_vloxei64_v_i64m1(base, bindex, vl);258}259 260// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vloxei64_v_i64m2261// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {262// CHECK-RV64-NEXT: entry:263// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vloxei.nxv2i64.p0.nxv2i64.i64(<vscale x 2 x i64> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])264// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]265//266vint64m2_t test_vloxei64_v_i64m2(const int64_t *base, vuint64m2_t bindex, size_t vl) {267 return __riscv_vloxei64_v_i64m2(base, bindex, vl);268}269 270// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vloxei64_v_i64m4271// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {272// CHECK-RV64-NEXT: entry:273// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vloxei.nxv4i64.p0.nxv4i64.i64(<vscale x 4 x i64> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])274// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]275//276vint64m4_t test_vloxei64_v_i64m4(const int64_t *base, vuint64m4_t bindex, size_t vl) {277 return __riscv_vloxei64_v_i64m4(base, bindex, vl);278}279 280// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vloxei64_v_i64m8281// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {282// CHECK-RV64-NEXT: entry:283// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vloxei.nxv8i64.p0.nxv8i64.i64(<vscale x 8 x i64> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])284// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]285//286vint64m8_t test_vloxei64_v_i64m8(const int64_t *base, vuint64m8_t bindex, size_t vl) {287 return __riscv_vloxei64_v_i64m8(base, bindex, vl);288}289 290// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vloxei64_v_u8mf8291// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {292// CHECK-RV64-NEXT: entry:293// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vloxei.nxv1i8.p0.nxv1i64.i64(<vscale x 1 x i8> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])294// CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]295//296vuint8mf8_t test_vloxei64_v_u8mf8(const uint8_t *base, vuint64m1_t bindex, size_t vl) {297 return __riscv_vloxei64_v_u8mf8(base, bindex, vl);298}299 300// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vloxei64_v_u8mf4301// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {302// CHECK-RV64-NEXT: entry:303// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vloxei.nxv2i8.p0.nxv2i64.i64(<vscale x 2 x i8> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])304// CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]305//306vuint8mf4_t test_vloxei64_v_u8mf4(const uint8_t *base, vuint64m2_t bindex, size_t vl) {307 return __riscv_vloxei64_v_u8mf4(base, bindex, vl);308}309 310// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vloxei64_v_u8mf2311// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {312// CHECK-RV64-NEXT: entry:313// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vloxei.nxv4i8.p0.nxv4i64.i64(<vscale x 4 x i8> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])314// CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]315//316vuint8mf2_t test_vloxei64_v_u8mf2(const uint8_t *base, vuint64m4_t bindex, size_t vl) {317 return __riscv_vloxei64_v_u8mf2(base, bindex, vl);318}319 320// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vloxei64_v_u8m1321// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {322// CHECK-RV64-NEXT: entry:323// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vloxei.nxv8i8.p0.nxv8i64.i64(<vscale x 8 x i8> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])324// CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]325//326vuint8m1_t test_vloxei64_v_u8m1(const uint8_t *base, vuint64m8_t bindex, size_t vl) {327 return __riscv_vloxei64_v_u8m1(base, bindex, vl);328}329 330// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vloxei64_v_u16mf4331// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {332// CHECK-RV64-NEXT: entry:333// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vloxei.nxv1i16.p0.nxv1i64.i64(<vscale x 1 x i16> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])334// CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]335//336vuint16mf4_t test_vloxei64_v_u16mf4(const uint16_t *base, vuint64m1_t bindex, size_t vl) {337 return __riscv_vloxei64_v_u16mf4(base, bindex, vl);338}339 340// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vloxei64_v_u16mf2341// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {342// CHECK-RV64-NEXT: entry:343// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vloxei.nxv2i16.p0.nxv2i64.i64(<vscale x 2 x i16> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])344// CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]345//346vuint16mf2_t test_vloxei64_v_u16mf2(const uint16_t *base, vuint64m2_t bindex, size_t vl) {347 return __riscv_vloxei64_v_u16mf2(base, bindex, vl);348}349 350// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vloxei64_v_u16m1351// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {352// CHECK-RV64-NEXT: entry:353// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vloxei.nxv4i16.p0.nxv4i64.i64(<vscale x 4 x i16> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])354// CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]355//356vuint16m1_t test_vloxei64_v_u16m1(const uint16_t *base, vuint64m4_t bindex, size_t vl) {357 return __riscv_vloxei64_v_u16m1(base, bindex, vl);358}359 360// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vloxei64_v_u16m2361// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {362// CHECK-RV64-NEXT: entry:363// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vloxei.nxv8i16.p0.nxv8i64.i64(<vscale x 8 x i16> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])364// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]365//366vuint16m2_t test_vloxei64_v_u16m2(const uint16_t *base, vuint64m8_t bindex, size_t vl) {367 return __riscv_vloxei64_v_u16m2(base, bindex, vl);368}369 370// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vloxei64_v_u32mf2371// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {372// CHECK-RV64-NEXT: entry:373// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vloxei.nxv1i32.p0.nxv1i64.i64(<vscale x 1 x i32> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])374// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]375//376vuint32mf2_t test_vloxei64_v_u32mf2(const uint32_t *base, vuint64m1_t bindex, size_t vl) {377 return __riscv_vloxei64_v_u32mf2(base, bindex, vl);378}379 380// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vloxei64_v_u32m1381// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {382// CHECK-RV64-NEXT: entry:383// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vloxei.nxv2i32.p0.nxv2i64.i64(<vscale x 2 x i32> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])384// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]385//386vuint32m1_t test_vloxei64_v_u32m1(const uint32_t *base, vuint64m2_t bindex, size_t vl) {387 return __riscv_vloxei64_v_u32m1(base, bindex, vl);388}389 390// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vloxei64_v_u32m2391// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {392// CHECK-RV64-NEXT: entry:393// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vloxei.nxv4i32.p0.nxv4i64.i64(<vscale x 4 x i32> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])394// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]395//396vuint32m2_t test_vloxei64_v_u32m2(const uint32_t *base, vuint64m4_t bindex, size_t vl) {397 return __riscv_vloxei64_v_u32m2(base, bindex, vl);398}399 400// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vloxei64_v_u32m4401// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {402// CHECK-RV64-NEXT: entry:403// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vloxei.nxv8i32.p0.nxv8i64.i64(<vscale x 8 x i32> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])404// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]405//406vuint32m4_t test_vloxei64_v_u32m4(const uint32_t *base, vuint64m8_t bindex, size_t vl) {407 return __riscv_vloxei64_v_u32m4(base, bindex, vl);408}409 410// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vloxei64_v_u64m1411// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {412// CHECK-RV64-NEXT: entry:413// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vloxei.nxv1i64.p0.nxv1i64.i64(<vscale x 1 x i64> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], i64 [[VL]])414// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]415//416vuint64m1_t test_vloxei64_v_u64m1(const uint64_t *base, vuint64m1_t bindex, size_t vl) {417 return __riscv_vloxei64_v_u64m1(base, bindex, vl);418}419 420// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vloxei64_v_u64m2421// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {422// CHECK-RV64-NEXT: entry:423// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vloxei.nxv2i64.p0.nxv2i64.i64(<vscale x 2 x i64> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], i64 [[VL]])424// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]425//426vuint64m2_t test_vloxei64_v_u64m2(const uint64_t *base, vuint64m2_t bindex, size_t vl) {427 return __riscv_vloxei64_v_u64m2(base, bindex, vl);428}429 430// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vloxei64_v_u64m4431// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {432// CHECK-RV64-NEXT: entry:433// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vloxei.nxv4i64.p0.nxv4i64.i64(<vscale x 4 x i64> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], i64 [[VL]])434// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]435//436vuint64m4_t test_vloxei64_v_u64m4(const uint64_t *base, vuint64m4_t bindex, size_t vl) {437 return __riscv_vloxei64_v_u64m4(base, bindex, vl);438}439 440// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vloxei64_v_u64m8441// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {442// CHECK-RV64-NEXT: entry:443// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vloxei.nxv8i64.p0.nxv8i64.i64(<vscale x 8 x i64> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], i64 [[VL]])444// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]445//446vuint64m8_t test_vloxei64_v_u64m8(const uint64_t *base, vuint64m8_t bindex, size_t vl) {447 return __riscv_vloxei64_v_u64m8(base, bindex, vl);448}449 450// CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vloxei64_v_f16mf4_m451// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {452// CHECK-RV64-NEXT: entry:453// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vloxei.mask.nxv1f16.p0.nxv1i64.i64(<vscale x 1 x half> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)454// CHECK-RV64-NEXT: ret <vscale x 1 x half> [[TMP0]]455//456vfloat16mf4_t test_vloxei64_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) {457 return __riscv_vloxei64_v_f16mf4_m(mask, base, bindex, vl);458}459 460// CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vloxei64_v_f16mf2_m461// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {462// CHECK-RV64-NEXT: entry:463// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vloxei.mask.nxv2f16.p0.nxv2i64.i64(<vscale x 2 x half> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)464// CHECK-RV64-NEXT: ret <vscale x 2 x half> [[TMP0]]465//466vfloat16mf2_t test_vloxei64_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) {467 return __riscv_vloxei64_v_f16mf2_m(mask, base, bindex, vl);468}469 470// CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vloxei64_v_f16m1_m471// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {472// CHECK-RV64-NEXT: entry:473// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vloxei.mask.nxv4f16.p0.nxv4i64.i64(<vscale x 4 x half> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)474// CHECK-RV64-NEXT: ret <vscale x 4 x half> [[TMP0]]475//476vfloat16m1_t test_vloxei64_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) {477 return __riscv_vloxei64_v_f16m1_m(mask, base, bindex, vl);478}479 480// CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vloxei64_v_f16m2_m481// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {482// CHECK-RV64-NEXT: entry:483// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vloxei.mask.nxv8f16.p0.nxv8i64.i64(<vscale x 8 x half> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)484// CHECK-RV64-NEXT: ret <vscale x 8 x half> [[TMP0]]485//486vfloat16m2_t test_vloxei64_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) {487 return __riscv_vloxei64_v_f16m2_m(mask, base, bindex, vl);488}489 490// CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vloxei64_v_f32mf2_m491// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {492// CHECK-RV64-NEXT: entry:493// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vloxei.mask.nxv1f32.p0.nxv1i64.i64(<vscale x 1 x float> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)494// CHECK-RV64-NEXT: ret <vscale x 1 x float> [[TMP0]]495//496vfloat32mf2_t test_vloxei64_v_f32mf2_m(vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) {497 return __riscv_vloxei64_v_f32mf2_m(mask, base, bindex, vl);498}499 500// CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vloxei64_v_f32m1_m501// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {502// CHECK-RV64-NEXT: entry:503// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vloxei.mask.nxv2f32.p0.nxv2i64.i64(<vscale x 2 x float> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)504// CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]505//506vfloat32m1_t test_vloxei64_v_f32m1_m(vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) {507 return __riscv_vloxei64_v_f32m1_m(mask, base, bindex, vl);508}509 510// CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vloxei64_v_f32m2_m511// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {512// CHECK-RV64-NEXT: entry:513// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vloxei.mask.nxv4f32.p0.nxv4i64.i64(<vscale x 4 x float> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)514// CHECK-RV64-NEXT: ret <vscale x 4 x float> [[TMP0]]515//516vfloat32m2_t test_vloxei64_v_f32m2_m(vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) {517 return __riscv_vloxei64_v_f32m2_m(mask, base, bindex, vl);518}519 520// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vloxei64_v_f32m4_m521// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {522// CHECK-RV64-NEXT: entry:523// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vloxei.mask.nxv8f32.p0.nxv8i64.i64(<vscale x 8 x float> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)524// CHECK-RV64-NEXT: ret <vscale x 8 x float> [[TMP0]]525//526vfloat32m4_t test_vloxei64_v_f32m4_m(vbool8_t mask, const float *base, vuint64m8_t bindex, size_t vl) {527 return __riscv_vloxei64_v_f32m4_m(mask, base, bindex, vl);528}529 530// CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vloxei64_v_f64m1_m531// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {532// CHECK-RV64-NEXT: entry:533// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vloxei.mask.nxv1f64.p0.nxv1i64.i64(<vscale x 1 x double> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)534// CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]535//536vfloat64m1_t test_vloxei64_v_f64m1_m(vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) {537 return __riscv_vloxei64_v_f64m1_m(mask, base, bindex, vl);538}539 540// CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vloxei64_v_f64m2_m541// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {542// CHECK-RV64-NEXT: entry:543// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vloxei.mask.nxv2f64.p0.nxv2i64.i64(<vscale x 2 x double> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)544// CHECK-RV64-NEXT: ret <vscale x 2 x double> [[TMP0]]545//546vfloat64m2_t test_vloxei64_v_f64m2_m(vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) {547 return __riscv_vloxei64_v_f64m2_m(mask, base, bindex, vl);548}549 550// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vloxei64_v_f64m4_m551// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {552// CHECK-RV64-NEXT: entry:553// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vloxei.mask.nxv4f64.p0.nxv4i64.i64(<vscale x 4 x double> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)554// CHECK-RV64-NEXT: ret <vscale x 4 x double> [[TMP0]]555//556vfloat64m4_t test_vloxei64_v_f64m4_m(vbool16_t mask, const double *base, vuint64m4_t bindex, size_t vl) {557 return __riscv_vloxei64_v_f64m4_m(mask, base, bindex, vl);558}559 560// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vloxei64_v_f64m8_m561// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {562// CHECK-RV64-NEXT: entry:563// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vloxei.mask.nxv8f64.p0.nxv8i64.i64(<vscale x 8 x double> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)564// CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]565//566vfloat64m8_t test_vloxei64_v_f64m8_m(vbool8_t mask, const double *base, vuint64m8_t bindex, size_t vl) {567 return __riscv_vloxei64_v_f64m8_m(mask, base, bindex, vl);568}569 570// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vloxei64_v_i8mf8_m571// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {572// CHECK-RV64-NEXT: entry:573// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vloxei.mask.nxv1i8.p0.nxv1i64.i64(<vscale x 1 x i8> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)574// CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]575//576vint8mf8_t test_vloxei64_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) {577 return __riscv_vloxei64_v_i8mf8_m(mask, base, bindex, vl);578}579 580// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vloxei64_v_i8mf4_m581// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {582// CHECK-RV64-NEXT: entry:583// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vloxei.mask.nxv2i8.p0.nxv2i64.i64(<vscale x 2 x i8> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)584// CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]585//586vint8mf4_t test_vloxei64_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) {587 return __riscv_vloxei64_v_i8mf4_m(mask, base, bindex, vl);588}589 590// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vloxei64_v_i8mf2_m591// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {592// CHECK-RV64-NEXT: entry:593// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vloxei.mask.nxv4i8.p0.nxv4i64.i64(<vscale x 4 x i8> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)594// CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]595//596vint8mf2_t test_vloxei64_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) {597 return __riscv_vloxei64_v_i8mf2_m(mask, base, bindex, vl);598}599 600// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vloxei64_v_i8m1_m601// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {602// CHECK-RV64-NEXT: entry:603// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vloxei.mask.nxv8i8.p0.nxv8i64.i64(<vscale x 8 x i8> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)604// CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]605//606vint8m1_t test_vloxei64_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) {607 return __riscv_vloxei64_v_i8m1_m(mask, base, bindex, vl);608}609 610// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vloxei64_v_i16mf4_m611// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {612// CHECK-RV64-NEXT: entry:613// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vloxei.mask.nxv1i16.p0.nxv1i64.i64(<vscale x 1 x i16> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)614// CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]615//616vint16mf4_t test_vloxei64_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) {617 return __riscv_vloxei64_v_i16mf4_m(mask, base, bindex, vl);618}619 620// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vloxei64_v_i16mf2_m621// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {622// CHECK-RV64-NEXT: entry:623// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vloxei.mask.nxv2i16.p0.nxv2i64.i64(<vscale x 2 x i16> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)624// CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]625//626vint16mf2_t test_vloxei64_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) {627 return __riscv_vloxei64_v_i16mf2_m(mask, base, bindex, vl);628}629 630// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vloxei64_v_i16m1_m631// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {632// CHECK-RV64-NEXT: entry:633// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vloxei.mask.nxv4i16.p0.nxv4i64.i64(<vscale x 4 x i16> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)634// CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]635//636vint16m1_t test_vloxei64_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) {637 return __riscv_vloxei64_v_i16m1_m(mask, base, bindex, vl);638}639 640// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vloxei64_v_i16m2_m641// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {642// CHECK-RV64-NEXT: entry:643// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vloxei.mask.nxv8i16.p0.nxv8i64.i64(<vscale x 8 x i16> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)644// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]645//646vint16m2_t test_vloxei64_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) {647 return __riscv_vloxei64_v_i16m2_m(mask, base, bindex, vl);648}649 650// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vloxei64_v_i32mf2_m651// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {652// CHECK-RV64-NEXT: entry:653// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vloxei.mask.nxv1i32.p0.nxv1i64.i64(<vscale x 1 x i32> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)654// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]655//656vint32mf2_t test_vloxei64_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) {657 return __riscv_vloxei64_v_i32mf2_m(mask, base, bindex, vl);658}659 660// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vloxei64_v_i32m1_m661// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {662// CHECK-RV64-NEXT: entry:663// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vloxei.mask.nxv2i32.p0.nxv2i64.i64(<vscale x 2 x i32> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)664// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]665//666vint32m1_t test_vloxei64_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) {667 return __riscv_vloxei64_v_i32m1_m(mask, base, bindex, vl);668}669 670// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vloxei64_v_i32m2_m671// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {672// CHECK-RV64-NEXT: entry:673// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vloxei.mask.nxv4i32.p0.nxv4i64.i64(<vscale x 4 x i32> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)674// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]675//676vint32m2_t test_vloxei64_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) {677 return __riscv_vloxei64_v_i32m2_m(mask, base, bindex, vl);678}679 680// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vloxei64_v_i32m4_m681// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {682// CHECK-RV64-NEXT: entry:683// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vloxei.mask.nxv8i32.p0.nxv8i64.i64(<vscale x 8 x i32> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)684// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]685//686vint32m4_t test_vloxei64_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint64m8_t bindex, size_t vl) {687 return __riscv_vloxei64_v_i32m4_m(mask, base, bindex, vl);688}689 690// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vloxei64_v_i64m1_m691// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {692// CHECK-RV64-NEXT: entry:693// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vloxei.mask.nxv1i64.p0.nxv1i64.i64(<vscale x 1 x i64> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)694// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]695//696vint64m1_t test_vloxei64_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) {697 return __riscv_vloxei64_v_i64m1_m(mask, base, bindex, vl);698}699 700// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vloxei64_v_i64m2_m701// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {702// CHECK-RV64-NEXT: entry:703// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vloxei.mask.nxv2i64.p0.nxv2i64.i64(<vscale x 2 x i64> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)704// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]705//706vint64m2_t test_vloxei64_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) {707 return __riscv_vloxei64_v_i64m2_m(mask, base, bindex, vl);708}709 710// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vloxei64_v_i64m4_m711// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {712// CHECK-RV64-NEXT: entry:713// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vloxei.mask.nxv4i64.p0.nxv4i64.i64(<vscale x 4 x i64> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)714// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]715//716vint64m4_t test_vloxei64_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint64m4_t bindex, size_t vl) {717 return __riscv_vloxei64_v_i64m4_m(mask, base, bindex, vl);718}719 720// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vloxei64_v_i64m8_m721// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {722// CHECK-RV64-NEXT: entry:723// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vloxei.mask.nxv8i64.p0.nxv8i64.i64(<vscale x 8 x i64> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)724// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]725//726vint64m8_t test_vloxei64_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint64m8_t bindex, size_t vl) {727 return __riscv_vloxei64_v_i64m8_m(mask, base, bindex, vl);728}729 730// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vloxei64_v_u8mf8_m731// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {732// CHECK-RV64-NEXT: entry:733// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vloxei.mask.nxv1i8.p0.nxv1i64.i64(<vscale x 1 x i8> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)734// CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]735//736vuint8mf8_t test_vloxei64_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) {737 return __riscv_vloxei64_v_u8mf8_m(mask, base, bindex, vl);738}739 740// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vloxei64_v_u8mf4_m741// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {742// CHECK-RV64-NEXT: entry:743// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vloxei.mask.nxv2i8.p0.nxv2i64.i64(<vscale x 2 x i8> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)744// CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]745//746vuint8mf4_t test_vloxei64_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) {747 return __riscv_vloxei64_v_u8mf4_m(mask, base, bindex, vl);748}749 750// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vloxei64_v_u8mf2_m751// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {752// CHECK-RV64-NEXT: entry:753// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vloxei.mask.nxv4i8.p0.nxv4i64.i64(<vscale x 4 x i8> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)754// CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]755//756vuint8mf2_t test_vloxei64_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) {757 return __riscv_vloxei64_v_u8mf2_m(mask, base, bindex, vl);758}759 760// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vloxei64_v_u8m1_m761// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {762// CHECK-RV64-NEXT: entry:763// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vloxei.mask.nxv8i8.p0.nxv8i64.i64(<vscale x 8 x i8> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)764// CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]765//766vuint8m1_t test_vloxei64_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) {767 return __riscv_vloxei64_v_u8m1_m(mask, base, bindex, vl);768}769 770// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vloxei64_v_u16mf4_m771// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {772// CHECK-RV64-NEXT: entry:773// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vloxei.mask.nxv1i16.p0.nxv1i64.i64(<vscale x 1 x i16> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)774// CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]775//776vuint16mf4_t test_vloxei64_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) {777 return __riscv_vloxei64_v_u16mf4_m(mask, base, bindex, vl);778}779 780// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vloxei64_v_u16mf2_m781// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {782// CHECK-RV64-NEXT: entry:783// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vloxei.mask.nxv2i16.p0.nxv2i64.i64(<vscale x 2 x i16> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)784// CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]785//786vuint16mf2_t test_vloxei64_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) {787 return __riscv_vloxei64_v_u16mf2_m(mask, base, bindex, vl);788}789 790// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vloxei64_v_u16m1_m791// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {792// CHECK-RV64-NEXT: entry:793// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vloxei.mask.nxv4i16.p0.nxv4i64.i64(<vscale x 4 x i16> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)794// CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]795//796vuint16m1_t test_vloxei64_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) {797 return __riscv_vloxei64_v_u16m1_m(mask, base, bindex, vl);798}799 800// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vloxei64_v_u16m2_m801// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {802// CHECK-RV64-NEXT: entry:803// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vloxei.mask.nxv8i16.p0.nxv8i64.i64(<vscale x 8 x i16> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)804// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]805//806vuint16m2_t test_vloxei64_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) {807 return __riscv_vloxei64_v_u16m2_m(mask, base, bindex, vl);808}809 810// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vloxei64_v_u32mf2_m811// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {812// CHECK-RV64-NEXT: entry:813// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vloxei.mask.nxv1i32.p0.nxv1i64.i64(<vscale x 1 x i32> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)814// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]815//816vuint32mf2_t test_vloxei64_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) {817 return __riscv_vloxei64_v_u32mf2_m(mask, base, bindex, vl);818}819 820// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vloxei64_v_u32m1_m821// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {822// CHECK-RV64-NEXT: entry:823// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vloxei.mask.nxv2i32.p0.nxv2i64.i64(<vscale x 2 x i32> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)824// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]825//826vuint32m1_t test_vloxei64_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) {827 return __riscv_vloxei64_v_u32m1_m(mask, base, bindex, vl);828}829 830// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vloxei64_v_u32m2_m831// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {832// CHECK-RV64-NEXT: entry:833// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vloxei.mask.nxv4i32.p0.nxv4i64.i64(<vscale x 4 x i32> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)834// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]835//836vuint32m2_t test_vloxei64_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) {837 return __riscv_vloxei64_v_u32m2_m(mask, base, bindex, vl);838}839 840// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vloxei64_v_u32m4_m841// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {842// CHECK-RV64-NEXT: entry:843// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vloxei.mask.nxv8i32.p0.nxv8i64.i64(<vscale x 8 x i32> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)844// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]845//846vuint32m4_t test_vloxei64_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint64m8_t bindex, size_t vl) {847 return __riscv_vloxei64_v_u32m4_m(mask, base, bindex, vl);848}849 850// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vloxei64_v_u64m1_m851// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {852// CHECK-RV64-NEXT: entry:853// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vloxei.mask.nxv1i64.p0.nxv1i64.i64(<vscale x 1 x i64> poison, ptr [[BASE]], <vscale x 1 x i64> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)854// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]855//856vuint64m1_t test_vloxei64_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) {857 return __riscv_vloxei64_v_u64m1_m(mask, base, bindex, vl);858}859 860// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vloxei64_v_u64m2_m861// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {862// CHECK-RV64-NEXT: entry:863// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vloxei.mask.nxv2i64.p0.nxv2i64.i64(<vscale x 2 x i64> poison, ptr [[BASE]], <vscale x 2 x i64> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)864// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]865//866vuint64m2_t test_vloxei64_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) {867 return __riscv_vloxei64_v_u64m2_m(mask, base, bindex, vl);868}869 870// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vloxei64_v_u64m4_m871// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {872// CHECK-RV64-NEXT: entry:873// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vloxei.mask.nxv4i64.p0.nxv4i64.i64(<vscale x 4 x i64> poison, ptr [[BASE]], <vscale x 4 x i64> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)874// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]875//876vuint64m4_t test_vloxei64_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint64m4_t bindex, size_t vl) {877 return __riscv_vloxei64_v_u64m4_m(mask, base, bindex, vl);878}879 880// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vloxei64_v_u64m8_m881// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i64> [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {882// CHECK-RV64-NEXT: entry:883// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vloxei.mask.nxv8i64.p0.nxv8i64.i64(<vscale x 8 x i64> poison, ptr [[BASE]], <vscale x 8 x i64> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)884// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]885//886vuint64m8_t test_vloxei64_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint64m8_t bindex, size_t vl) {887 return __riscv_vloxei64_v_u64m8_m(mask, base, bindex, vl);888}889 890