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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \4// RUN: -target-feature +zvfh -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vv_f16mf4_b6411// CHECK-RV64-SAME: (<vscale x 1 x half> [[OP1:%.*]], <vscale x 1 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.nxv1f16.nxv1f16.i64(<vscale x 1 x half> [[OP1]], <vscale x 1 x half> [[OP2]], i64 [[VL]])14// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]15//16vbool64_t test_vmfne_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) {17 return __riscv_vmfne_vv_f16mf4_b64(op1, op2, vl);18}19 20// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vf_f16mf4_b6421// CHECK-RV64-SAME: (<vscale x 1 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {22// CHECK-RV64-NEXT: entry:23// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.nxv1f16.f16.i64(<vscale x 1 x half> [[OP1]], half [[OP2]], i64 [[VL]])24// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]25//26vbool64_t test_vmfne_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) {27 return __riscv_vmfne_vf_f16mf4_b64(op1, op2, vl);28}29 30// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vv_f16mf2_b3231// CHECK-RV64-SAME: (<vscale x 2 x half> [[OP1:%.*]], <vscale x 2 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {32// CHECK-RV64-NEXT: entry:33// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.nxv2f16.nxv2f16.i64(<vscale x 2 x half> [[OP1]], <vscale x 2 x half> [[OP2]], i64 [[VL]])34// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]35//36vbool32_t test_vmfne_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) {37 return __riscv_vmfne_vv_f16mf2_b32(op1, op2, vl);38}39 40// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vf_f16mf2_b3241// CHECK-RV64-SAME: (<vscale x 2 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {42// CHECK-RV64-NEXT: entry:43// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.nxv2f16.f16.i64(<vscale x 2 x half> [[OP1]], half [[OP2]], i64 [[VL]])44// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]45//46vbool32_t test_vmfne_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) {47 return __riscv_vmfne_vf_f16mf2_b32(op1, op2, vl);48}49 50// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vv_f16m1_b1651// CHECK-RV64-SAME: (<vscale x 4 x half> [[OP1:%.*]], <vscale x 4 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {52// CHECK-RV64-NEXT: entry:53// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.nxv4f16.nxv4f16.i64(<vscale x 4 x half> [[OP1]], <vscale x 4 x half> [[OP2]], i64 [[VL]])54// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]55//56vbool16_t test_vmfne_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) {57 return __riscv_vmfne_vv_f16m1_b16(op1, op2, vl);58}59 60// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vf_f16m1_b1661// CHECK-RV64-SAME: (<vscale x 4 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {62// CHECK-RV64-NEXT: entry:63// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.nxv4f16.f16.i64(<vscale x 4 x half> [[OP1]], half [[OP2]], i64 [[VL]])64// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]65//66vbool16_t test_vmfne_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) {67 return __riscv_vmfne_vf_f16m1_b16(op1, op2, vl);68}69 70// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vv_f16m2_b871// CHECK-RV64-SAME: (<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {72// CHECK-RV64-NEXT: entry:73// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.nxv8f16.nxv8f16.i64(<vscale x 8 x half> [[OP1]], <vscale x 8 x half> [[OP2]], i64 [[VL]])74// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]75//76vbool8_t test_vmfne_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) {77 return __riscv_vmfne_vv_f16m2_b8(op1, op2, vl);78}79 80// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vf_f16m2_b881// CHECK-RV64-SAME: (<vscale x 8 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {82// CHECK-RV64-NEXT: entry:83// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.nxv8f16.f16.i64(<vscale x 8 x half> [[OP1]], half [[OP2]], i64 [[VL]])84// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]85//86vbool8_t test_vmfne_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) {87 return __riscv_vmfne_vf_f16m2_b8(op1, op2, vl);88}89 90// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i1> @test_vmfne_vv_f16m4_b491// CHECK-RV64-SAME: (<vscale x 16 x half> [[OP1:%.*]], <vscale x 16 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {92// CHECK-RV64-NEXT: entry:93// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.riscv.vmfne.nxv16f16.nxv16f16.i64(<vscale x 16 x half> [[OP1]], <vscale x 16 x half> [[OP2]], i64 [[VL]])94// CHECK-RV64-NEXT: ret <vscale x 16 x i1> [[TMP0]]95//96vbool4_t test_vmfne_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) {97 return __riscv_vmfne_vv_f16m4_b4(op1, op2, vl);98}99 100// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i1> @test_vmfne_vf_f16m4_b4101// CHECK-RV64-SAME: (<vscale x 16 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {102// CHECK-RV64-NEXT: entry:103// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.riscv.vmfne.nxv16f16.f16.i64(<vscale x 16 x half> [[OP1]], half [[OP2]], i64 [[VL]])104// CHECK-RV64-NEXT: ret <vscale x 16 x i1> [[TMP0]]105//106vbool4_t test_vmfne_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) {107 return __riscv_vmfne_vf_f16m4_b4(op1, op2, vl);108}109 110// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i1> @test_vmfne_vv_f16m8_b2111// CHECK-RV64-SAME: (<vscale x 32 x half> [[OP1:%.*]], <vscale x 32 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {112// CHECK-RV64-NEXT: entry:113// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i1> @llvm.riscv.vmfne.nxv32f16.nxv32f16.i64(<vscale x 32 x half> [[OP1]], <vscale x 32 x half> [[OP2]], i64 [[VL]])114// CHECK-RV64-NEXT: ret <vscale x 32 x i1> [[TMP0]]115//116vbool2_t test_vmfne_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) {117 return __riscv_vmfne_vv_f16m8_b2(op1, op2, vl);118}119 120// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i1> @test_vmfne_vf_f16m8_b2121// CHECK-RV64-SAME: (<vscale x 32 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {122// CHECK-RV64-NEXT: entry:123// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i1> @llvm.riscv.vmfne.nxv32f16.f16.i64(<vscale x 32 x half> [[OP1]], half [[OP2]], i64 [[VL]])124// CHECK-RV64-NEXT: ret <vscale x 32 x i1> [[TMP0]]125//126vbool2_t test_vmfne_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) {127 return __riscv_vmfne_vf_f16m8_b2(op1, op2, vl);128}129 130// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vv_f32mf2_b64131// CHECK-RV64-SAME: (<vscale x 1 x float> [[OP1:%.*]], <vscale x 1 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {132// CHECK-RV64-NEXT: entry:133// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.nxv1f32.nxv1f32.i64(<vscale x 1 x float> [[OP1]], <vscale x 1 x float> [[OP2]], i64 [[VL]])134// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]135//136vbool64_t test_vmfne_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) {137 return __riscv_vmfne_vv_f32mf2_b64(op1, op2, vl);138}139 140// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vf_f32mf2_b64141// CHECK-RV64-SAME: (<vscale x 1 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {142// CHECK-RV64-NEXT: entry:143// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.nxv1f32.f32.i64(<vscale x 1 x float> [[OP1]], float [[OP2]], i64 [[VL]])144// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]145//146vbool64_t test_vmfne_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) {147 return __riscv_vmfne_vf_f32mf2_b64(op1, op2, vl);148}149 150// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vv_f32m1_b32151// CHECK-RV64-SAME: (<vscale x 2 x float> [[OP1:%.*]], <vscale x 2 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {152// CHECK-RV64-NEXT: entry:153// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.nxv2f32.nxv2f32.i64(<vscale x 2 x float> [[OP1]], <vscale x 2 x float> [[OP2]], i64 [[VL]])154// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]155//156vbool32_t test_vmfne_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) {157 return __riscv_vmfne_vv_f32m1_b32(op1, op2, vl);158}159 160// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vf_f32m1_b32161// CHECK-RV64-SAME: (<vscale x 2 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {162// CHECK-RV64-NEXT: entry:163// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.nxv2f32.f32.i64(<vscale x 2 x float> [[OP1]], float [[OP2]], i64 [[VL]])164// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]165//166vbool32_t test_vmfne_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) {167 return __riscv_vmfne_vf_f32m1_b32(op1, op2, vl);168}169 170// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vv_f32m2_b16171// CHECK-RV64-SAME: (<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {172// CHECK-RV64-NEXT: entry:173// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.nxv4f32.nxv4f32.i64(<vscale x 4 x float> [[OP1]], <vscale x 4 x float> [[OP2]], i64 [[VL]])174// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]175//176vbool16_t test_vmfne_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) {177 return __riscv_vmfne_vv_f32m2_b16(op1, op2, vl);178}179 180// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vf_f32m2_b16181// CHECK-RV64-SAME: (<vscale x 4 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {182// CHECK-RV64-NEXT: entry:183// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.nxv4f32.f32.i64(<vscale x 4 x float> [[OP1]], float [[OP2]], i64 [[VL]])184// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]185//186vbool16_t test_vmfne_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) {187 return __riscv_vmfne_vf_f32m2_b16(op1, op2, vl);188}189 190// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vv_f32m4_b8191// CHECK-RV64-SAME: (<vscale x 8 x float> [[OP1:%.*]], <vscale x 8 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {192// CHECK-RV64-NEXT: entry:193// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.nxv8f32.nxv8f32.i64(<vscale x 8 x float> [[OP1]], <vscale x 8 x float> [[OP2]], i64 [[VL]])194// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]195//196vbool8_t test_vmfne_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) {197 return __riscv_vmfne_vv_f32m4_b8(op1, op2, vl);198}199 200// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vf_f32m4_b8201// CHECK-RV64-SAME: (<vscale x 8 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {202// CHECK-RV64-NEXT: entry:203// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.nxv8f32.f32.i64(<vscale x 8 x float> [[OP1]], float [[OP2]], i64 [[VL]])204// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]205//206vbool8_t test_vmfne_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) {207 return __riscv_vmfne_vf_f32m4_b8(op1, op2, vl);208}209 210// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i1> @test_vmfne_vv_f32m8_b4211// CHECK-RV64-SAME: (<vscale x 16 x float> [[OP1:%.*]], <vscale x 16 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {212// CHECK-RV64-NEXT: entry:213// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.riscv.vmfne.nxv16f32.nxv16f32.i64(<vscale x 16 x float> [[OP1]], <vscale x 16 x float> [[OP2]], i64 [[VL]])214// CHECK-RV64-NEXT: ret <vscale x 16 x i1> [[TMP0]]215//216vbool4_t test_vmfne_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) {217 return __riscv_vmfne_vv_f32m8_b4(op1, op2, vl);218}219 220// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i1> @test_vmfne_vf_f32m8_b4221// CHECK-RV64-SAME: (<vscale x 16 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {222// CHECK-RV64-NEXT: entry:223// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.riscv.vmfne.nxv16f32.f32.i64(<vscale x 16 x float> [[OP1]], float [[OP2]], i64 [[VL]])224// CHECK-RV64-NEXT: ret <vscale x 16 x i1> [[TMP0]]225//226vbool4_t test_vmfne_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) {227 return __riscv_vmfne_vf_f32m8_b4(op1, op2, vl);228}229 230// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vv_f64m1_b64231// CHECK-RV64-SAME: (<vscale x 1 x double> [[OP1:%.*]], <vscale x 1 x double> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {232// CHECK-RV64-NEXT: entry:233// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.nxv1f64.nxv1f64.i64(<vscale x 1 x double> [[OP1]], <vscale x 1 x double> [[OP2]], i64 [[VL]])234// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]235//236vbool64_t test_vmfne_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) {237 return __riscv_vmfne_vv_f64m1_b64(op1, op2, vl);238}239 240// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vf_f64m1_b64241// CHECK-RV64-SAME: (<vscale x 1 x double> [[OP1:%.*]], double noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {242// CHECK-RV64-NEXT: entry:243// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.nxv1f64.f64.i64(<vscale x 1 x double> [[OP1]], double [[OP2]], i64 [[VL]])244// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]245//246vbool64_t test_vmfne_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) {247 return __riscv_vmfne_vf_f64m1_b64(op1, op2, vl);248}249 250// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vv_f64m2_b32251// CHECK-RV64-SAME: (<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {252// CHECK-RV64-NEXT: entry:253// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.nxv2f64.nxv2f64.i64(<vscale x 2 x double> [[OP1]], <vscale x 2 x double> [[OP2]], i64 [[VL]])254// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]255//256vbool32_t test_vmfne_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) {257 return __riscv_vmfne_vv_f64m2_b32(op1, op2, vl);258}259 260// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vf_f64m2_b32261// CHECK-RV64-SAME: (<vscale x 2 x double> [[OP1:%.*]], double noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {262// CHECK-RV64-NEXT: entry:263// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.nxv2f64.f64.i64(<vscale x 2 x double> [[OP1]], double [[OP2]], i64 [[VL]])264// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]265//266vbool32_t test_vmfne_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) {267 return __riscv_vmfne_vf_f64m2_b32(op1, op2, vl);268}269 270// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vv_f64m4_b16271// CHECK-RV64-SAME: (<vscale x 4 x double> [[OP1:%.*]], <vscale x 4 x double> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {272// CHECK-RV64-NEXT: entry:273// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.nxv4f64.nxv4f64.i64(<vscale x 4 x double> [[OP1]], <vscale x 4 x double> [[OP2]], i64 [[VL]])274// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]275//276vbool16_t test_vmfne_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) {277 return __riscv_vmfne_vv_f64m4_b16(op1, op2, vl);278}279 280// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vf_f64m4_b16281// CHECK-RV64-SAME: (<vscale x 4 x double> [[OP1:%.*]], double noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {282// CHECK-RV64-NEXT: entry:283// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.nxv4f64.f64.i64(<vscale x 4 x double> [[OP1]], double [[OP2]], i64 [[VL]])284// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]285//286vbool16_t test_vmfne_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) {287 return __riscv_vmfne_vf_f64m4_b16(op1, op2, vl);288}289 290// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vv_f64m8_b8291// CHECK-RV64-SAME: (<vscale x 8 x double> [[OP1:%.*]], <vscale x 8 x double> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {292// CHECK-RV64-NEXT: entry:293// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.nxv8f64.nxv8f64.i64(<vscale x 8 x double> [[OP1]], <vscale x 8 x double> [[OP2]], i64 [[VL]])294// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]295//296vbool8_t test_vmfne_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) {297 return __riscv_vmfne_vv_f64m8_b8(op1, op2, vl);298}299 300// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vf_f64m8_b8301// CHECK-RV64-SAME: (<vscale x 8 x double> [[OP1:%.*]], double noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {302// CHECK-RV64-NEXT: entry:303// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.nxv8f64.f64.i64(<vscale x 8 x double> [[OP1]], double [[OP2]], i64 [[VL]])304// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]305//306vbool8_t test_vmfne_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) {307 return __riscv_vmfne_vf_f64m8_b8(op1, op2, vl);308}309 310// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vv_f16mf4_b64_m311// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x half> [[OP1:%.*]], <vscale x 1 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {312// CHECK-RV64-NEXT: entry:313// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.mask.nxv1f16.nxv1f16.i64(<vscale x 1 x i1> poison, <vscale x 1 x half> [[OP1]], <vscale x 1 x half> [[OP2]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])314// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]315//316vbool64_t test_vmfne_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) {317 return __riscv_vmfne_vv_f16mf4_b64_m(mask, op1, op2, vl);318}319 320// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vf_f16mf4_b64_m321// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {322// CHECK-RV64-NEXT: entry:323// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.mask.nxv1f16.f16.i64(<vscale x 1 x i1> poison, <vscale x 1 x half> [[OP1]], half [[OP2]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])324// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]325//326vbool64_t test_vmfne_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) {327 return __riscv_vmfne_vf_f16mf4_b64_m(mask, op1, op2, vl);328}329 330// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vv_f16mf2_b32_m331// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x half> [[OP1:%.*]], <vscale x 2 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {332// CHECK-RV64-NEXT: entry:333// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.mask.nxv2f16.nxv2f16.i64(<vscale x 2 x i1> poison, <vscale x 2 x half> [[OP1]], <vscale x 2 x half> [[OP2]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])334// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]335//336vbool32_t test_vmfne_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) {337 return __riscv_vmfne_vv_f16mf2_b32_m(mask, op1, op2, vl);338}339 340// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vf_f16mf2_b32_m341// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {342// CHECK-RV64-NEXT: entry:343// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.mask.nxv2f16.f16.i64(<vscale x 2 x i1> poison, <vscale x 2 x half> [[OP1]], half [[OP2]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])344// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]345//346vbool32_t test_vmfne_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) {347 return __riscv_vmfne_vf_f16mf2_b32_m(mask, op1, op2, vl);348}349 350// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vv_f16m1_b16_m351// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x half> [[OP1:%.*]], <vscale x 4 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {352// CHECK-RV64-NEXT: entry:353// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.mask.nxv4f16.nxv4f16.i64(<vscale x 4 x i1> poison, <vscale x 4 x half> [[OP1]], <vscale x 4 x half> [[OP2]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])354// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]355//356vbool16_t test_vmfne_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) {357 return __riscv_vmfne_vv_f16m1_b16_m(mask, op1, op2, vl);358}359 360// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vf_f16m1_b16_m361// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {362// CHECK-RV64-NEXT: entry:363// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.mask.nxv4f16.f16.i64(<vscale x 4 x i1> poison, <vscale x 4 x half> [[OP1]], half [[OP2]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])364// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]365//366vbool16_t test_vmfne_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) {367 return __riscv_vmfne_vf_f16m1_b16_m(mask, op1, op2, vl);368}369 370// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vv_f16m2_b8_m371// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {372// CHECK-RV64-NEXT: entry:373// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.mask.nxv8f16.nxv8f16.i64(<vscale x 8 x i1> poison, <vscale x 8 x half> [[OP1]], <vscale x 8 x half> [[OP2]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])374// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]375//376vbool8_t test_vmfne_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) {377 return __riscv_vmfne_vv_f16m2_b8_m(mask, op1, op2, vl);378}379 380// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vf_f16m2_b8_m381// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {382// CHECK-RV64-NEXT: entry:383// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.mask.nxv8f16.f16.i64(<vscale x 8 x i1> poison, <vscale x 8 x half> [[OP1]], half [[OP2]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])384// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]385//386vbool8_t test_vmfne_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) {387 return __riscv_vmfne_vf_f16m2_b8_m(mask, op1, op2, vl);388}389 390// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i1> @test_vmfne_vv_f16m4_b4_m391// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x half> [[OP1:%.*]], <vscale x 16 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {392// CHECK-RV64-NEXT: entry:393// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.riscv.vmfne.mask.nxv16f16.nxv16f16.i64(<vscale x 16 x i1> poison, <vscale x 16 x half> [[OP1]], <vscale x 16 x half> [[OP2]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])394// CHECK-RV64-NEXT: ret <vscale x 16 x i1> [[TMP0]]395//396vbool4_t test_vmfne_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) {397 return __riscv_vmfne_vv_f16m4_b4_m(mask, op1, op2, vl);398}399 400// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i1> @test_vmfne_vf_f16m4_b4_m401// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {402// CHECK-RV64-NEXT: entry:403// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.riscv.vmfne.mask.nxv16f16.f16.i64(<vscale x 16 x i1> poison, <vscale x 16 x half> [[OP1]], half [[OP2]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])404// CHECK-RV64-NEXT: ret <vscale x 16 x i1> [[TMP0]]405//406vbool4_t test_vmfne_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) {407 return __riscv_vmfne_vf_f16m4_b4_m(mask, op1, op2, vl);408}409 410// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i1> @test_vmfne_vv_f16m8_b2_m411// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x half> [[OP1:%.*]], <vscale x 32 x half> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {412// CHECK-RV64-NEXT: entry:413// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i1> @llvm.riscv.vmfne.mask.nxv32f16.nxv32f16.i64(<vscale x 32 x i1> poison, <vscale x 32 x half> [[OP1]], <vscale x 32 x half> [[OP2]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])414// CHECK-RV64-NEXT: ret <vscale x 32 x i1> [[TMP0]]415//416vbool2_t test_vmfne_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) {417 return __riscv_vmfne_vv_f16m8_b2_m(mask, op1, op2, vl);418}419 420// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i1> @test_vmfne_vf_f16m8_b2_m421// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x half> [[OP1:%.*]], half noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {422// CHECK-RV64-NEXT: entry:423// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i1> @llvm.riscv.vmfne.mask.nxv32f16.f16.i64(<vscale x 32 x i1> poison, <vscale x 32 x half> [[OP1]], half [[OP2]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])424// CHECK-RV64-NEXT: ret <vscale x 32 x i1> [[TMP0]]425//426vbool2_t test_vmfne_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) {427 return __riscv_vmfne_vf_f16m8_b2_m(mask, op1, op2, vl);428}429 430// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vv_f32mf2_b64_m431// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x float> [[OP1:%.*]], <vscale x 1 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {432// CHECK-RV64-NEXT: entry:433// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.mask.nxv1f32.nxv1f32.i64(<vscale x 1 x i1> poison, <vscale x 1 x float> [[OP1]], <vscale x 1 x float> [[OP2]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])434// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]435//436vbool64_t test_vmfne_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) {437 return __riscv_vmfne_vv_f32mf2_b64_m(mask, op1, op2, vl);438}439 440// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vf_f32mf2_b64_m441// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {442// CHECK-RV64-NEXT: entry:443// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.mask.nxv1f32.f32.i64(<vscale x 1 x i1> poison, <vscale x 1 x float> [[OP1]], float [[OP2]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])444// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]445//446vbool64_t test_vmfne_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) {447 return __riscv_vmfne_vf_f32mf2_b64_m(mask, op1, op2, vl);448}449 450// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vv_f32m1_b32_m451// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x float> [[OP1:%.*]], <vscale x 2 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {452// CHECK-RV64-NEXT: entry:453// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.mask.nxv2f32.nxv2f32.i64(<vscale x 2 x i1> poison, <vscale x 2 x float> [[OP1]], <vscale x 2 x float> [[OP2]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])454// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]455//456vbool32_t test_vmfne_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) {457 return __riscv_vmfne_vv_f32m1_b32_m(mask, op1, op2, vl);458}459 460// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vf_f32m1_b32_m461// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {462// CHECK-RV64-NEXT: entry:463// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.mask.nxv2f32.f32.i64(<vscale x 2 x i1> poison, <vscale x 2 x float> [[OP1]], float [[OP2]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])464// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]465//466vbool32_t test_vmfne_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) {467 return __riscv_vmfne_vf_f32m1_b32_m(mask, op1, op2, vl);468}469 470// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vv_f32m2_b16_m471// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {472// CHECK-RV64-NEXT: entry:473// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.mask.nxv4f32.nxv4f32.i64(<vscale x 4 x i1> poison, <vscale x 4 x float> [[OP1]], <vscale x 4 x float> [[OP2]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])474// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]475//476vbool16_t test_vmfne_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) {477 return __riscv_vmfne_vv_f32m2_b16_m(mask, op1, op2, vl);478}479 480// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vf_f32m2_b16_m481// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {482// CHECK-RV64-NEXT: entry:483// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.mask.nxv4f32.f32.i64(<vscale x 4 x i1> poison, <vscale x 4 x float> [[OP1]], float [[OP2]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])484// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]485//486vbool16_t test_vmfne_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) {487 return __riscv_vmfne_vf_f32m2_b16_m(mask, op1, op2, vl);488}489 490// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vv_f32m4_b8_m491// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x float> [[OP1:%.*]], <vscale x 8 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {492// CHECK-RV64-NEXT: entry:493// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.mask.nxv8f32.nxv8f32.i64(<vscale x 8 x i1> poison, <vscale x 8 x float> [[OP1]], <vscale x 8 x float> [[OP2]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])494// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]495//496vbool8_t test_vmfne_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) {497 return __riscv_vmfne_vv_f32m4_b8_m(mask, op1, op2, vl);498}499 500// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vf_f32m4_b8_m501// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {502// CHECK-RV64-NEXT: entry:503// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.mask.nxv8f32.f32.i64(<vscale x 8 x i1> poison, <vscale x 8 x float> [[OP1]], float [[OP2]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])504// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]505//506vbool8_t test_vmfne_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) {507 return __riscv_vmfne_vf_f32m4_b8_m(mask, op1, op2, vl);508}509 510// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i1> @test_vmfne_vv_f32m8_b4_m511// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x float> [[OP1:%.*]], <vscale x 16 x float> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {512// CHECK-RV64-NEXT: entry:513// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.riscv.vmfne.mask.nxv16f32.nxv16f32.i64(<vscale x 16 x i1> poison, <vscale x 16 x float> [[OP1]], <vscale x 16 x float> [[OP2]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])514// CHECK-RV64-NEXT: ret <vscale x 16 x i1> [[TMP0]]515//516vbool4_t test_vmfne_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) {517 return __riscv_vmfne_vv_f32m8_b4_m(mask, op1, op2, vl);518}519 520// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i1> @test_vmfne_vf_f32m8_b4_m521// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x float> [[OP1:%.*]], float noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {522// CHECK-RV64-NEXT: entry:523// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.riscv.vmfne.mask.nxv16f32.f32.i64(<vscale x 16 x i1> poison, <vscale x 16 x float> [[OP1]], float [[OP2]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])524// CHECK-RV64-NEXT: ret <vscale x 16 x i1> [[TMP0]]525//526vbool4_t test_vmfne_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) {527 return __riscv_vmfne_vf_f32m8_b4_m(mask, op1, op2, vl);528}529 530// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vv_f64m1_b64_m531// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x double> [[OP1:%.*]], <vscale x 1 x double> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {532// CHECK-RV64-NEXT: entry:533// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.mask.nxv1f64.nxv1f64.i64(<vscale x 1 x i1> poison, <vscale x 1 x double> [[OP1]], <vscale x 1 x double> [[OP2]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])534// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]535//536vbool64_t test_vmfne_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) {537 return __riscv_vmfne_vv_f64m1_b64_m(mask, op1, op2, vl);538}539 540// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i1> @test_vmfne_vf_f64m1_b64_m541// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x double> [[OP1:%.*]], double noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {542// CHECK-RV64-NEXT: entry:543// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i1> @llvm.riscv.vmfne.mask.nxv1f64.f64.i64(<vscale x 1 x i1> poison, <vscale x 1 x double> [[OP1]], double [[OP2]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])544// CHECK-RV64-NEXT: ret <vscale x 1 x i1> [[TMP0]]545//546vbool64_t test_vmfne_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) {547 return __riscv_vmfne_vf_f64m1_b64_m(mask, op1, op2, vl);548}549 550// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vv_f64m2_b32_m551// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {552// CHECK-RV64-NEXT: entry:553// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.mask.nxv2f64.nxv2f64.i64(<vscale x 2 x i1> poison, <vscale x 2 x double> [[OP1]], <vscale x 2 x double> [[OP2]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])554// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]555//556vbool32_t test_vmfne_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) {557 return __riscv_vmfne_vv_f64m2_b32_m(mask, op1, op2, vl);558}559 560// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i1> @test_vmfne_vf_f64m2_b32_m561// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x double> [[OP1:%.*]], double noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {562// CHECK-RV64-NEXT: entry:563// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i1> @llvm.riscv.vmfne.mask.nxv2f64.f64.i64(<vscale x 2 x i1> poison, <vscale x 2 x double> [[OP1]], double [[OP2]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])564// CHECK-RV64-NEXT: ret <vscale x 2 x i1> [[TMP0]]565//566vbool32_t test_vmfne_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) {567 return __riscv_vmfne_vf_f64m2_b32_m(mask, op1, op2, vl);568}569 570// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vv_f64m4_b16_m571// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x double> [[OP1:%.*]], <vscale x 4 x double> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {572// CHECK-RV64-NEXT: entry:573// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.mask.nxv4f64.nxv4f64.i64(<vscale x 4 x i1> poison, <vscale x 4 x double> [[OP1]], <vscale x 4 x double> [[OP2]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])574// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]575//576vbool16_t test_vmfne_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) {577 return __riscv_vmfne_vv_f64m4_b16_m(mask, op1, op2, vl);578}579 580// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i1> @test_vmfne_vf_f64m4_b16_m581// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x double> [[OP1:%.*]], double noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {582// CHECK-RV64-NEXT: entry:583// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i1> @llvm.riscv.vmfne.mask.nxv4f64.f64.i64(<vscale x 4 x i1> poison, <vscale x 4 x double> [[OP1]], double [[OP2]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])584// CHECK-RV64-NEXT: ret <vscale x 4 x i1> [[TMP0]]585//586vbool16_t test_vmfne_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) {587 return __riscv_vmfne_vf_f64m4_b16_m(mask, op1, op2, vl);588}589 590// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vv_f64m8_b8_m591// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x double> [[OP1:%.*]], <vscale x 8 x double> [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {592// CHECK-RV64-NEXT: entry:593// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.mask.nxv8f64.nxv8f64.i64(<vscale x 8 x i1> poison, <vscale x 8 x double> [[OP1]], <vscale x 8 x double> [[OP2]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])594// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]595//596vbool8_t test_vmfne_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) {597 return __riscv_vmfne_vv_f64m8_b8_m(mask, op1, op2, vl);598}599 600// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i1> @test_vmfne_vf_f64m8_b8_m601// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x double> [[OP1:%.*]], double noundef [[OP2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {602// CHECK-RV64-NEXT: entry:603// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i1> @llvm.riscv.vmfne.mask.nxv8f64.f64.i64(<vscale x 8 x i1> poison, <vscale x 8 x double> [[OP1]], double [[OP2]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])604// CHECK-RV64-NEXT: ret <vscale x 8 x i1> [[TMP0]]605//606vbool8_t test_vmfne_vf_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) {607 return __riscv_vmfne_vf_f64m8_b8_m(mask, op1, op2, vl);608}609 610