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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \4// RUN:   -target-feature +zvfhmin -target-feature +zvfbfmin -disable-O0-optnone  \5// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN:   FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vrgather_vv_f16mf411// CHECK-RV64-SAME: (<vscale x 1 x half> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT:  entry:13// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vrgather.vv.nxv1f16.i64(<vscale x 1 x half> poison, <vscale x 1 x half> [[OP1]], <vscale x 1 x i16> [[INDEX]], i64 [[VL]])14// CHECK-RV64-NEXT:    ret <vscale x 1 x half> [[TMP0]]15//16vfloat16mf4_t test_vrgather_vv_f16mf4(vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) {17  return __riscv_vrgather_vv_f16mf4(op1, index, vl);18}19 20// CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vrgather_vx_f16mf421// CHECK-RV64-SAME: (<vscale x 1 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {22// CHECK-RV64-NEXT:  entry:23// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vrgather.vx.nxv1f16.i64(<vscale x 1 x half> poison, <vscale x 1 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])24// CHECK-RV64-NEXT:    ret <vscale x 1 x half> [[TMP0]]25//26vfloat16mf4_t test_vrgather_vx_f16mf4(vfloat16mf4_t op1, size_t index, size_t vl) {27  return __riscv_vrgather_vx_f16mf4(op1, index, vl);28}29 30// CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vrgather_vv_f16mf231// CHECK-RV64-SAME: (<vscale x 2 x half> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {32// CHECK-RV64-NEXT:  entry:33// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vrgather.vv.nxv2f16.i64(<vscale x 2 x half> poison, <vscale x 2 x half> [[OP1]], <vscale x 2 x i16> [[INDEX]], i64 [[VL]])34// CHECK-RV64-NEXT:    ret <vscale x 2 x half> [[TMP0]]35//36vfloat16mf2_t test_vrgather_vv_f16mf2(vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) {37  return __riscv_vrgather_vv_f16mf2(op1, index, vl);38}39 40// CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vrgather_vx_f16mf241// CHECK-RV64-SAME: (<vscale x 2 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {42// CHECK-RV64-NEXT:  entry:43// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vrgather.vx.nxv2f16.i64(<vscale x 2 x half> poison, <vscale x 2 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])44// CHECK-RV64-NEXT:    ret <vscale x 2 x half> [[TMP0]]45//46vfloat16mf2_t test_vrgather_vx_f16mf2(vfloat16mf2_t op1, size_t index, size_t vl) {47  return __riscv_vrgather_vx_f16mf2(op1, index, vl);48}49 50// CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vrgather_vv_f16m151// CHECK-RV64-SAME: (<vscale x 4 x half> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {52// CHECK-RV64-NEXT:  entry:53// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vrgather.vv.nxv4f16.i64(<vscale x 4 x half> poison, <vscale x 4 x half> [[OP1]], <vscale x 4 x i16> [[INDEX]], i64 [[VL]])54// CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]55//56vfloat16m1_t test_vrgather_vv_f16m1(vfloat16m1_t op1, vuint16m1_t index, size_t vl) {57  return __riscv_vrgather_vv_f16m1(op1, index, vl);58}59 60// CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vrgather_vx_f16m161// CHECK-RV64-SAME: (<vscale x 4 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {62// CHECK-RV64-NEXT:  entry:63// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vrgather.vx.nxv4f16.i64(<vscale x 4 x half> poison, <vscale x 4 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])64// CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]65//66vfloat16m1_t test_vrgather_vx_f16m1(vfloat16m1_t op1, size_t index, size_t vl) {67  return __riscv_vrgather_vx_f16m1(op1, index, vl);68}69 70// CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vrgather_vv_f16m271// CHECK-RV64-SAME: (<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {72// CHECK-RV64-NEXT:  entry:73// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vrgather.vv.nxv8f16.i64(<vscale x 8 x half> poison, <vscale x 8 x half> [[OP1]], <vscale x 8 x i16> [[INDEX]], i64 [[VL]])74// CHECK-RV64-NEXT:    ret <vscale x 8 x half> [[TMP0]]75//76vfloat16m2_t test_vrgather_vv_f16m2(vfloat16m2_t op1, vuint16m2_t index, size_t vl) {77  return __riscv_vrgather_vv_f16m2(op1, index, vl);78}79 80// CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vrgather_vx_f16m281// CHECK-RV64-SAME: (<vscale x 8 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {82// CHECK-RV64-NEXT:  entry:83// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vrgather.vx.nxv8f16.i64(<vscale x 8 x half> poison, <vscale x 8 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])84// CHECK-RV64-NEXT:    ret <vscale x 8 x half> [[TMP0]]85//86vfloat16m2_t test_vrgather_vx_f16m2(vfloat16m2_t op1, size_t index, size_t vl) {87  return __riscv_vrgather_vx_f16m2(op1, index, vl);88}89 90// CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vrgather_vv_f16m491// CHECK-RV64-SAME: (<vscale x 16 x half> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {92// CHECK-RV64-NEXT:  entry:93// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.riscv.vrgather.vv.nxv16f16.i64(<vscale x 16 x half> poison, <vscale x 16 x half> [[OP1]], <vscale x 16 x i16> [[INDEX]], i64 [[VL]])94// CHECK-RV64-NEXT:    ret <vscale x 16 x half> [[TMP0]]95//96vfloat16m4_t test_vrgather_vv_f16m4(vfloat16m4_t op1, vuint16m4_t index, size_t vl) {97  return __riscv_vrgather_vv_f16m4(op1, index, vl);98}99 100// CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vrgather_vx_f16m4101// CHECK-RV64-SAME: (<vscale x 16 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {102// CHECK-RV64-NEXT:  entry:103// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.riscv.vrgather.vx.nxv16f16.i64(<vscale x 16 x half> poison, <vscale x 16 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])104// CHECK-RV64-NEXT:    ret <vscale x 16 x half> [[TMP0]]105//106vfloat16m4_t test_vrgather_vx_f16m4(vfloat16m4_t op1, size_t index, size_t vl) {107  return __riscv_vrgather_vx_f16m4(op1, index, vl);108}109 110// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vrgather_vv_f16m8111// CHECK-RV64-SAME: (<vscale x 32 x half> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {112// CHECK-RV64-NEXT:  entry:113// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.vrgather.vv.nxv32f16.i64(<vscale x 32 x half> poison, <vscale x 32 x half> [[OP1]], <vscale x 32 x i16> [[INDEX]], i64 [[VL]])114// CHECK-RV64-NEXT:    ret <vscale x 32 x half> [[TMP0]]115//116vfloat16m8_t test_vrgather_vv_f16m8(vfloat16m8_t op1, vuint16m8_t index, size_t vl) {117  return __riscv_vrgather_vv_f16m8(op1, index, vl);118}119 120// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vrgather_vx_f16m8121// CHECK-RV64-SAME: (<vscale x 32 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {122// CHECK-RV64-NEXT:  entry:123// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.vrgather.vx.nxv32f16.i64(<vscale x 32 x half> poison, <vscale x 32 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])124// CHECK-RV64-NEXT:    ret <vscale x 32 x half> [[TMP0]]125//126vfloat16m8_t test_vrgather_vx_f16m8(vfloat16m8_t op1, size_t index, size_t vl) {127  return __riscv_vrgather_vx_f16m8(op1, index, vl);128}129 130// CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vrgather_vv_f32mf2131// CHECK-RV64-SAME: (<vscale x 1 x float> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {132// CHECK-RV64-NEXT:  entry:133// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vrgather.vv.nxv1f32.i64(<vscale x 1 x float> poison, <vscale x 1 x float> [[OP1]], <vscale x 1 x i32> [[INDEX]], i64 [[VL]])134// CHECK-RV64-NEXT:    ret <vscale x 1 x float> [[TMP0]]135//136vfloat32mf2_t test_vrgather_vv_f32mf2(vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) {137  return __riscv_vrgather_vv_f32mf2(op1, index, vl);138}139 140// CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vrgather_vx_f32mf2141// CHECK-RV64-SAME: (<vscale x 1 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {142// CHECK-RV64-NEXT:  entry:143// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vrgather.vx.nxv1f32.i64(<vscale x 1 x float> poison, <vscale x 1 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])144// CHECK-RV64-NEXT:    ret <vscale x 1 x float> [[TMP0]]145//146vfloat32mf2_t test_vrgather_vx_f32mf2(vfloat32mf2_t op1, size_t index, size_t vl) {147  return __riscv_vrgather_vx_f32mf2(op1, index, vl);148}149 150// CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vrgather_vv_f32m1151// CHECK-RV64-SAME: (<vscale x 2 x float> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {152// CHECK-RV64-NEXT:  entry:153// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vrgather.vv.nxv2f32.i64(<vscale x 2 x float> poison, <vscale x 2 x float> [[OP1]], <vscale x 2 x i32> [[INDEX]], i64 [[VL]])154// CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]155//156vfloat32m1_t test_vrgather_vv_f32m1(vfloat32m1_t op1, vuint32m1_t index, size_t vl) {157  return __riscv_vrgather_vv_f32m1(op1, index, vl);158}159 160// CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vrgather_vx_f32m1161// CHECK-RV64-SAME: (<vscale x 2 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {162// CHECK-RV64-NEXT:  entry:163// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vrgather.vx.nxv2f32.i64(<vscale x 2 x float> poison, <vscale x 2 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])164// CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]165//166vfloat32m1_t test_vrgather_vx_f32m1(vfloat32m1_t op1, size_t index, size_t vl) {167  return __riscv_vrgather_vx_f32m1(op1, index, vl);168}169 170// CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vrgather_vv_f32m2171// CHECK-RV64-SAME: (<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {172// CHECK-RV64-NEXT:  entry:173// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vrgather.vv.nxv4f32.i64(<vscale x 4 x float> poison, <vscale x 4 x float> [[OP1]], <vscale x 4 x i32> [[INDEX]], i64 [[VL]])174// CHECK-RV64-NEXT:    ret <vscale x 4 x float> [[TMP0]]175//176vfloat32m2_t test_vrgather_vv_f32m2(vfloat32m2_t op1, vuint32m2_t index, size_t vl) {177  return __riscv_vrgather_vv_f32m2(op1, index, vl);178}179 180// CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vrgather_vx_f32m2181// CHECK-RV64-SAME: (<vscale x 4 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {182// CHECK-RV64-NEXT:  entry:183// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vrgather.vx.nxv4f32.i64(<vscale x 4 x float> poison, <vscale x 4 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])184// CHECK-RV64-NEXT:    ret <vscale x 4 x float> [[TMP0]]185//186vfloat32m2_t test_vrgather_vx_f32m2(vfloat32m2_t op1, size_t index, size_t vl) {187  return __riscv_vrgather_vx_f32m2(op1, index, vl);188}189 190// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vrgather_vv_f32m4191// CHECK-RV64-SAME: (<vscale x 8 x float> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {192// CHECK-RV64-NEXT:  entry:193// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vrgather.vv.nxv8f32.i64(<vscale x 8 x float> poison, <vscale x 8 x float> [[OP1]], <vscale x 8 x i32> [[INDEX]], i64 [[VL]])194// CHECK-RV64-NEXT:    ret <vscale x 8 x float> [[TMP0]]195//196vfloat32m4_t test_vrgather_vv_f32m4(vfloat32m4_t op1, vuint32m4_t index, size_t vl) {197  return __riscv_vrgather_vv_f32m4(op1, index, vl);198}199 200// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vrgather_vx_f32m4201// CHECK-RV64-SAME: (<vscale x 8 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {202// CHECK-RV64-NEXT:  entry:203// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vrgather.vx.nxv8f32.i64(<vscale x 8 x float> poison, <vscale x 8 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])204// CHECK-RV64-NEXT:    ret <vscale x 8 x float> [[TMP0]]205//206vfloat32m4_t test_vrgather_vx_f32m4(vfloat32m4_t op1, size_t index, size_t vl) {207  return __riscv_vrgather_vx_f32m4(op1, index, vl);208}209 210// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vrgather_vv_f32m8211// CHECK-RV64-SAME: (<vscale x 16 x float> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {212// CHECK-RV64-NEXT:  entry:213// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.vrgather.vv.nxv16f32.i64(<vscale x 16 x float> poison, <vscale x 16 x float> [[OP1]], <vscale x 16 x i32> [[INDEX]], i64 [[VL]])214// CHECK-RV64-NEXT:    ret <vscale x 16 x float> [[TMP0]]215//216vfloat32m8_t test_vrgather_vv_f32m8(vfloat32m8_t op1, vuint32m8_t index, size_t vl) {217  return __riscv_vrgather_vv_f32m8(op1, index, vl);218}219 220// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vrgather_vx_f32m8221// CHECK-RV64-SAME: (<vscale x 16 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {222// CHECK-RV64-NEXT:  entry:223// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.vrgather.vx.nxv16f32.i64(<vscale x 16 x float> poison, <vscale x 16 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])224// CHECK-RV64-NEXT:    ret <vscale x 16 x float> [[TMP0]]225//226vfloat32m8_t test_vrgather_vx_f32m8(vfloat32m8_t op1, size_t index, size_t vl) {227  return __riscv_vrgather_vx_f32m8(op1, index, vl);228}229 230// CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vrgather_vv_f64m1231// CHECK-RV64-SAME: (<vscale x 1 x double> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {232// CHECK-RV64-NEXT:  entry:233// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vrgather.vv.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> [[OP1]], <vscale x 1 x i64> [[INDEX]], i64 [[VL]])234// CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]235//236vfloat64m1_t test_vrgather_vv_f64m1(vfloat64m1_t op1, vuint64m1_t index, size_t vl) {237  return __riscv_vrgather_vv_f64m1(op1, index, vl);238}239 240// CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vrgather_vx_f64m1241// CHECK-RV64-SAME: (<vscale x 1 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {242// CHECK-RV64-NEXT:  entry:243// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vrgather.vx.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> [[OP1]], i64 [[INDEX]], i64 [[VL]])244// CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]245//246vfloat64m1_t test_vrgather_vx_f64m1(vfloat64m1_t op1, size_t index, size_t vl) {247  return __riscv_vrgather_vx_f64m1(op1, index, vl);248}249 250// CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vrgather_vv_f64m2251// CHECK-RV64-SAME: (<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {252// CHECK-RV64-NEXT:  entry:253// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vrgather.vv.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> [[OP1]], <vscale x 2 x i64> [[INDEX]], i64 [[VL]])254// CHECK-RV64-NEXT:    ret <vscale x 2 x double> [[TMP0]]255//256vfloat64m2_t test_vrgather_vv_f64m2(vfloat64m2_t op1, vuint64m2_t index, size_t vl) {257  return __riscv_vrgather_vv_f64m2(op1, index, vl);258}259 260// CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vrgather_vx_f64m2261// CHECK-RV64-SAME: (<vscale x 2 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {262// CHECK-RV64-NEXT:  entry:263// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vrgather.vx.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> [[OP1]], i64 [[INDEX]], i64 [[VL]])264// CHECK-RV64-NEXT:    ret <vscale x 2 x double> [[TMP0]]265//266vfloat64m2_t test_vrgather_vx_f64m2(vfloat64m2_t op1, size_t index, size_t vl) {267  return __riscv_vrgather_vx_f64m2(op1, index, vl);268}269 270// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vrgather_vv_f64m4271// CHECK-RV64-SAME: (<vscale x 4 x double> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {272// CHECK-RV64-NEXT:  entry:273// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vrgather.vv.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> [[OP1]], <vscale x 4 x i64> [[INDEX]], i64 [[VL]])274// CHECK-RV64-NEXT:    ret <vscale x 4 x double> [[TMP0]]275//276vfloat64m4_t test_vrgather_vv_f64m4(vfloat64m4_t op1, vuint64m4_t index, size_t vl) {277  return __riscv_vrgather_vv_f64m4(op1, index, vl);278}279 280// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vrgather_vx_f64m4281// CHECK-RV64-SAME: (<vscale x 4 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {282// CHECK-RV64-NEXT:  entry:283// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vrgather.vx.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> [[OP1]], i64 [[INDEX]], i64 [[VL]])284// CHECK-RV64-NEXT:    ret <vscale x 4 x double> [[TMP0]]285//286vfloat64m4_t test_vrgather_vx_f64m4(vfloat64m4_t op1, size_t index, size_t vl) {287  return __riscv_vrgather_vx_f64m4(op1, index, vl);288}289 290// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vrgather_vv_f64m8291// CHECK-RV64-SAME: (<vscale x 8 x double> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {292// CHECK-RV64-NEXT:  entry:293// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vrgather.vv.nxv8f64.i64(<vscale x 8 x double> poison, <vscale x 8 x double> [[OP1]], <vscale x 8 x i64> [[INDEX]], i64 [[VL]])294// CHECK-RV64-NEXT:    ret <vscale x 8 x double> [[TMP0]]295//296vfloat64m8_t test_vrgather_vv_f64m8(vfloat64m8_t op1, vuint64m8_t index, size_t vl) {297  return __riscv_vrgather_vv_f64m8(op1, index, vl);298}299 300// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vrgather_vx_f64m8301// CHECK-RV64-SAME: (<vscale x 8 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {302// CHECK-RV64-NEXT:  entry:303// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vrgather.vx.nxv8f64.i64(<vscale x 8 x double> poison, <vscale x 8 x double> [[OP1]], i64 [[INDEX]], i64 [[VL]])304// CHECK-RV64-NEXT:    ret <vscale x 8 x double> [[TMP0]]305//306vfloat64m8_t test_vrgather_vx_f64m8(vfloat64m8_t op1, size_t index, size_t vl) {307  return __riscv_vrgather_vx_f64m8(op1, index, vl);308}309 310// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vv_i8mf8311// CHECK-RV64-SAME: (<vscale x 1 x i8> [[OP1:%.*]], <vscale x 1 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {312// CHECK-RV64-NEXT:  entry:313// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], <vscale x 1 x i8> [[INDEX]], i64 [[VL]])314// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> [[TMP0]]315//316vint8mf8_t test_vrgather_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t index, size_t vl) {317  return __riscv_vrgather_vv_i8mf8(op1, index, vl);318}319 320// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vx_i8mf8321// CHECK-RV64-SAME: (<vscale x 1 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {322// CHECK-RV64-NEXT:  entry:323// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])324// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> [[TMP0]]325//326vint8mf8_t test_vrgather_vx_i8mf8(vint8mf8_t op1, size_t index, size_t vl) {327  return __riscv_vrgather_vx_i8mf8(op1, index, vl);328}329 330// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vv_i8mf4331// CHECK-RV64-SAME: (<vscale x 2 x i8> [[OP1:%.*]], <vscale x 2 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {332// CHECK-RV64-NEXT:  entry:333// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], <vscale x 2 x i8> [[INDEX]], i64 [[VL]])334// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> [[TMP0]]335//336vint8mf4_t test_vrgather_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t index, size_t vl) {337  return __riscv_vrgather_vv_i8mf4(op1, index, vl);338}339 340// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vx_i8mf4341// CHECK-RV64-SAME: (<vscale x 2 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {342// CHECK-RV64-NEXT:  entry:343// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])344// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> [[TMP0]]345//346vint8mf4_t test_vrgather_vx_i8mf4(vint8mf4_t op1, size_t index, size_t vl) {347  return __riscv_vrgather_vx_i8mf4(op1, index, vl);348}349 350// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vv_i8mf2351// CHECK-RV64-SAME: (<vscale x 4 x i8> [[OP1:%.*]], <vscale x 4 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {352// CHECK-RV64-NEXT:  entry:353// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], <vscale x 4 x i8> [[INDEX]], i64 [[VL]])354// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> [[TMP0]]355//356vint8mf2_t test_vrgather_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t index, size_t vl) {357  return __riscv_vrgather_vv_i8mf2(op1, index, vl);358}359 360// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vx_i8mf2361// CHECK-RV64-SAME: (<vscale x 4 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {362// CHECK-RV64-NEXT:  entry:363// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])364// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> [[TMP0]]365//366vint8mf2_t test_vrgather_vx_i8mf2(vint8mf2_t op1, size_t index, size_t vl) {367  return __riscv_vrgather_vx_i8mf2(op1, index, vl);368}369 370// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vv_i8m1371// CHECK-RV64-SAME: (<vscale x 8 x i8> [[OP1:%.*]], <vscale x 8 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {372// CHECK-RV64-NEXT:  entry:373// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], <vscale x 8 x i8> [[INDEX]], i64 [[VL]])374// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> [[TMP0]]375//376vint8m1_t test_vrgather_vv_i8m1(vint8m1_t op1, vuint8m1_t index, size_t vl) {377  return __riscv_vrgather_vv_i8m1(op1, index, vl);378}379 380// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vx_i8m1381// CHECK-RV64-SAME: (<vscale x 8 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {382// CHECK-RV64-NEXT:  entry:383// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])384// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> [[TMP0]]385//386vint8m1_t test_vrgather_vx_i8m1(vint8m1_t op1, size_t index, size_t vl) {387  return __riscv_vrgather_vx_i8m1(op1, index, vl);388}389 390// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vv_i8m2391// CHECK-RV64-SAME: (<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {392// CHECK-RV64-NEXT:  entry:393// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], <vscale x 16 x i8> [[INDEX]], i64 [[VL]])394// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> [[TMP0]]395//396vint8m2_t test_vrgather_vv_i8m2(vint8m2_t op1, vuint8m2_t index, size_t vl) {397  return __riscv_vrgather_vv_i8m2(op1, index, vl);398}399 400// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vx_i8m2401// CHECK-RV64-SAME: (<vscale x 16 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {402// CHECK-RV64-NEXT:  entry:403// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])404// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> [[TMP0]]405//406vint8m2_t test_vrgather_vx_i8m2(vint8m2_t op1, size_t index, size_t vl) {407  return __riscv_vrgather_vx_i8m2(op1, index, vl);408}409 410// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vv_i8m4411// CHECK-RV64-SAME: (<vscale x 32 x i8> [[OP1:%.*]], <vscale x 32 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {412// CHECK-RV64-NEXT:  entry:413// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], <vscale x 32 x i8> [[INDEX]], i64 [[VL]])414// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> [[TMP0]]415//416vint8m4_t test_vrgather_vv_i8m4(vint8m4_t op1, vuint8m4_t index, size_t vl) {417  return __riscv_vrgather_vv_i8m4(op1, index, vl);418}419 420// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vx_i8m4421// CHECK-RV64-SAME: (<vscale x 32 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {422// CHECK-RV64-NEXT:  entry:423// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])424// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> [[TMP0]]425//426vint8m4_t test_vrgather_vx_i8m4(vint8m4_t op1, size_t index, size_t vl) {427  return __riscv_vrgather_vx_i8m4(op1, index, vl);428}429 430// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vv_i8m8431// CHECK-RV64-SAME: (<vscale x 64 x i8> [[OP1:%.*]], <vscale x 64 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {432// CHECK-RV64-NEXT:  entry:433// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], <vscale x 64 x i8> [[INDEX]], i64 [[VL]])434// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> [[TMP0]]435//436vint8m8_t test_vrgather_vv_i8m8(vint8m8_t op1, vuint8m8_t index, size_t vl) {437  return __riscv_vrgather_vv_i8m8(op1, index, vl);438}439 440// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vx_i8m8441// CHECK-RV64-SAME: (<vscale x 64 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {442// CHECK-RV64-NEXT:  entry:443// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])444// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> [[TMP0]]445//446vint8m8_t test_vrgather_vx_i8m8(vint8m8_t op1, size_t index, size_t vl) {447  return __riscv_vrgather_vx_i8m8(op1, index, vl);448}449 450// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vv_i16mf4451// CHECK-RV64-SAME: (<vscale x 1 x i16> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {452// CHECK-RV64-NEXT:  entry:453// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], <vscale x 1 x i16> [[INDEX]], i64 [[VL]])454// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> [[TMP0]]455//456vint16mf4_t test_vrgather_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t index, size_t vl) {457  return __riscv_vrgather_vv_i16mf4(op1, index, vl);458}459 460// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vx_i16mf4461// CHECK-RV64-SAME: (<vscale x 1 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {462// CHECK-RV64-NEXT:  entry:463// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])464// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> [[TMP0]]465//466vint16mf4_t test_vrgather_vx_i16mf4(vint16mf4_t op1, size_t index, size_t vl) {467  return __riscv_vrgather_vx_i16mf4(op1, index, vl);468}469 470// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vv_i16mf2471// CHECK-RV64-SAME: (<vscale x 2 x i16> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {472// CHECK-RV64-NEXT:  entry:473// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], <vscale x 2 x i16> [[INDEX]], i64 [[VL]])474// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> [[TMP0]]475//476vint16mf2_t test_vrgather_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t index, size_t vl) {477  return __riscv_vrgather_vv_i16mf2(op1, index, vl);478}479 480// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vx_i16mf2481// CHECK-RV64-SAME: (<vscale x 2 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {482// CHECK-RV64-NEXT:  entry:483// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])484// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> [[TMP0]]485//486vint16mf2_t test_vrgather_vx_i16mf2(vint16mf2_t op1, size_t index, size_t vl) {487  return __riscv_vrgather_vx_i16mf2(op1, index, vl);488}489 490// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vv_i16m1491// CHECK-RV64-SAME: (<vscale x 4 x i16> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {492// CHECK-RV64-NEXT:  entry:493// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], <vscale x 4 x i16> [[INDEX]], i64 [[VL]])494// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> [[TMP0]]495//496vint16m1_t test_vrgather_vv_i16m1(vint16m1_t op1, vuint16m1_t index, size_t vl) {497  return __riscv_vrgather_vv_i16m1(op1, index, vl);498}499 500// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vx_i16m1501// CHECK-RV64-SAME: (<vscale x 4 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {502// CHECK-RV64-NEXT:  entry:503// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])504// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> [[TMP0]]505//506vint16m1_t test_vrgather_vx_i16m1(vint16m1_t op1, size_t index, size_t vl) {507  return __riscv_vrgather_vx_i16m1(op1, index, vl);508}509 510// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vv_i16m2511// CHECK-RV64-SAME: (<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {512// CHECK-RV64-NEXT:  entry:513// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], <vscale x 8 x i16> [[INDEX]], i64 [[VL]])514// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> [[TMP0]]515//516vint16m2_t test_vrgather_vv_i16m2(vint16m2_t op1, vuint16m2_t index, size_t vl) {517  return __riscv_vrgather_vv_i16m2(op1, index, vl);518}519 520// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vx_i16m2521// CHECK-RV64-SAME: (<vscale x 8 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {522// CHECK-RV64-NEXT:  entry:523// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])524// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> [[TMP0]]525//526vint16m2_t test_vrgather_vx_i16m2(vint16m2_t op1, size_t index, size_t vl) {527  return __riscv_vrgather_vx_i16m2(op1, index, vl);528}529 530// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vv_i16m4531// CHECK-RV64-SAME: (<vscale x 16 x i16> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {532// CHECK-RV64-NEXT:  entry:533// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], <vscale x 16 x i16> [[INDEX]], i64 [[VL]])534// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> [[TMP0]]535//536vint16m4_t test_vrgather_vv_i16m4(vint16m4_t op1, vuint16m4_t index, size_t vl) {537  return __riscv_vrgather_vv_i16m4(op1, index, vl);538}539 540// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vx_i16m4541// CHECK-RV64-SAME: (<vscale x 16 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {542// CHECK-RV64-NEXT:  entry:543// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])544// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> [[TMP0]]545//546vint16m4_t test_vrgather_vx_i16m4(vint16m4_t op1, size_t index, size_t vl) {547  return __riscv_vrgather_vx_i16m4(op1, index, vl);548}549 550// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vv_i16m8551// CHECK-RV64-SAME: (<vscale x 32 x i16> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {552// CHECK-RV64-NEXT:  entry:553// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], <vscale x 32 x i16> [[INDEX]], i64 [[VL]])554// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> [[TMP0]]555//556vint16m8_t test_vrgather_vv_i16m8(vint16m8_t op1, vuint16m8_t index, size_t vl) {557  return __riscv_vrgather_vv_i16m8(op1, index, vl);558}559 560// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vx_i16m8561// CHECK-RV64-SAME: (<vscale x 32 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {562// CHECK-RV64-NEXT:  entry:563// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])564// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> [[TMP0]]565//566vint16m8_t test_vrgather_vx_i16m8(vint16m8_t op1, size_t index, size_t vl) {567  return __riscv_vrgather_vx_i16m8(op1, index, vl);568}569 570// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vv_i32mf2571// CHECK-RV64-SAME: (<vscale x 1 x i32> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {572// CHECK-RV64-NEXT:  entry:573// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], <vscale x 1 x i32> [[INDEX]], i64 [[VL]])574// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> [[TMP0]]575//576vint32mf2_t test_vrgather_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t index, size_t vl) {577  return __riscv_vrgather_vv_i32mf2(op1, index, vl);578}579 580// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vx_i32mf2581// CHECK-RV64-SAME: (<vscale x 1 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {582// CHECK-RV64-NEXT:  entry:583// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])584// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> [[TMP0]]585//586vint32mf2_t test_vrgather_vx_i32mf2(vint32mf2_t op1, size_t index, size_t vl) {587  return __riscv_vrgather_vx_i32mf2(op1, index, vl);588}589 590// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vv_i32m1591// CHECK-RV64-SAME: (<vscale x 2 x i32> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {592// CHECK-RV64-NEXT:  entry:593// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], <vscale x 2 x i32> [[INDEX]], i64 [[VL]])594// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> [[TMP0]]595//596vint32m1_t test_vrgather_vv_i32m1(vint32m1_t op1, vuint32m1_t index, size_t vl) {597  return __riscv_vrgather_vv_i32m1(op1, index, vl);598}599 600// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vx_i32m1601// CHECK-RV64-SAME: (<vscale x 2 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {602// CHECK-RV64-NEXT:  entry:603// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])604// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> [[TMP0]]605//606vint32m1_t test_vrgather_vx_i32m1(vint32m1_t op1, size_t index, size_t vl) {607  return __riscv_vrgather_vx_i32m1(op1, index, vl);608}609 610// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vv_i32m2611// CHECK-RV64-SAME: (<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {612// CHECK-RV64-NEXT:  entry:613// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], <vscale x 4 x i32> [[INDEX]], i64 [[VL]])614// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> [[TMP0]]615//616vint32m2_t test_vrgather_vv_i32m2(vint32m2_t op1, vuint32m2_t index, size_t vl) {617  return __riscv_vrgather_vv_i32m2(op1, index, vl);618}619 620// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vx_i32m2621// CHECK-RV64-SAME: (<vscale x 4 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {622// CHECK-RV64-NEXT:  entry:623// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])624// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> [[TMP0]]625//626vint32m2_t test_vrgather_vx_i32m2(vint32m2_t op1, size_t index, size_t vl) {627  return __riscv_vrgather_vx_i32m2(op1, index, vl);628}629 630// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vv_i32m4631// CHECK-RV64-SAME: (<vscale x 8 x i32> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {632// CHECK-RV64-NEXT:  entry:633// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], <vscale x 8 x i32> [[INDEX]], i64 [[VL]])634// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> [[TMP0]]635//636vint32m4_t test_vrgather_vv_i32m4(vint32m4_t op1, vuint32m4_t index, size_t vl) {637  return __riscv_vrgather_vv_i32m4(op1, index, vl);638}639 640// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vx_i32m4641// CHECK-RV64-SAME: (<vscale x 8 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {642// CHECK-RV64-NEXT:  entry:643// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])644// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> [[TMP0]]645//646vint32m4_t test_vrgather_vx_i32m4(vint32m4_t op1, size_t index, size_t vl) {647  return __riscv_vrgather_vx_i32m4(op1, index, vl);648}649 650// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vv_i32m8651// CHECK-RV64-SAME: (<vscale x 16 x i32> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {652// CHECK-RV64-NEXT:  entry:653// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], <vscale x 16 x i32> [[INDEX]], i64 [[VL]])654// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> [[TMP0]]655//656vint32m8_t test_vrgather_vv_i32m8(vint32m8_t op1, vuint32m8_t index, size_t vl) {657  return __riscv_vrgather_vv_i32m8(op1, index, vl);658}659 660// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vx_i32m8661// CHECK-RV64-SAME: (<vscale x 16 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {662// CHECK-RV64-NEXT:  entry:663// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])664// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> [[TMP0]]665//666vint32m8_t test_vrgather_vx_i32m8(vint32m8_t op1, size_t index, size_t vl) {667  return __riscv_vrgather_vx_i32m8(op1, index, vl);668}669 670// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vv_i64m1671// CHECK-RV64-SAME: (<vscale x 1 x i64> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {672// CHECK-RV64-NEXT:  entry:673// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], <vscale x 1 x i64> [[INDEX]], i64 [[VL]])674// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> [[TMP0]]675//676vint64m1_t test_vrgather_vv_i64m1(vint64m1_t op1, vuint64m1_t index, size_t vl) {677  return __riscv_vrgather_vv_i64m1(op1, index, vl);678}679 680// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vx_i64m1681// CHECK-RV64-SAME: (<vscale x 1 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {682// CHECK-RV64-NEXT:  entry:683// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])684// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> [[TMP0]]685//686vint64m1_t test_vrgather_vx_i64m1(vint64m1_t op1, size_t index, size_t vl) {687  return __riscv_vrgather_vx_i64m1(op1, index, vl);688}689 690// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vv_i64m2691// CHECK-RV64-SAME: (<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {692// CHECK-RV64-NEXT:  entry:693// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], <vscale x 2 x i64> [[INDEX]], i64 [[VL]])694// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> [[TMP0]]695//696vint64m2_t test_vrgather_vv_i64m2(vint64m2_t op1, vuint64m2_t index, size_t vl) {697  return __riscv_vrgather_vv_i64m2(op1, index, vl);698}699 700// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vx_i64m2701// CHECK-RV64-SAME: (<vscale x 2 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {702// CHECK-RV64-NEXT:  entry:703// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])704// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> [[TMP0]]705//706vint64m2_t test_vrgather_vx_i64m2(vint64m2_t op1, size_t index, size_t vl) {707  return __riscv_vrgather_vx_i64m2(op1, index, vl);708}709 710// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vv_i64m4711// CHECK-RV64-SAME: (<vscale x 4 x i64> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {712// CHECK-RV64-NEXT:  entry:713// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], <vscale x 4 x i64> [[INDEX]], i64 [[VL]])714// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> [[TMP0]]715//716vint64m4_t test_vrgather_vv_i64m4(vint64m4_t op1, vuint64m4_t index, size_t vl) {717  return __riscv_vrgather_vv_i64m4(op1, index, vl);718}719 720// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vx_i64m4721// CHECK-RV64-SAME: (<vscale x 4 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {722// CHECK-RV64-NEXT:  entry:723// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])724// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> [[TMP0]]725//726vint64m4_t test_vrgather_vx_i64m4(vint64m4_t op1, size_t index, size_t vl) {727  return __riscv_vrgather_vx_i64m4(op1, index, vl);728}729 730// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vv_i64m8731// CHECK-RV64-SAME: (<vscale x 8 x i64> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {732// CHECK-RV64-NEXT:  entry:733// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], <vscale x 8 x i64> [[INDEX]], i64 [[VL]])734// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> [[TMP0]]735//736vint64m8_t test_vrgather_vv_i64m8(vint64m8_t op1, vuint64m8_t index, size_t vl) {737  return __riscv_vrgather_vv_i64m8(op1, index, vl);738}739 740// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vx_i64m8741// CHECK-RV64-SAME: (<vscale x 8 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {742// CHECK-RV64-NEXT:  entry:743// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])744// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> [[TMP0]]745//746vint64m8_t test_vrgather_vx_i64m8(vint64m8_t op1, size_t index, size_t vl) {747  return __riscv_vrgather_vx_i64m8(op1, index, vl);748}749 750// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vv_u8mf8751// CHECK-RV64-SAME: (<vscale x 1 x i8> [[OP1:%.*]], <vscale x 1 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {752// CHECK-RV64-NEXT:  entry:753// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], <vscale x 1 x i8> [[INDEX]], i64 [[VL]])754// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> [[TMP0]]755//756vuint8mf8_t test_vrgather_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t index, size_t vl) {757  return __riscv_vrgather_vv_u8mf8(op1, index, vl);758}759 760// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vx_u8mf8761// CHECK-RV64-SAME: (<vscale x 1 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {762// CHECK-RV64-NEXT:  entry:763// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])764// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> [[TMP0]]765//766vuint8mf8_t test_vrgather_vx_u8mf8(vuint8mf8_t op1, size_t index, size_t vl) {767  return __riscv_vrgather_vx_u8mf8(op1, index, vl);768}769 770// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vv_u8mf4771// CHECK-RV64-SAME: (<vscale x 2 x i8> [[OP1:%.*]], <vscale x 2 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {772// CHECK-RV64-NEXT:  entry:773// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], <vscale x 2 x i8> [[INDEX]], i64 [[VL]])774// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> [[TMP0]]775//776vuint8mf4_t test_vrgather_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t index, size_t vl) {777  return __riscv_vrgather_vv_u8mf4(op1, index, vl);778}779 780// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vx_u8mf4781// CHECK-RV64-SAME: (<vscale x 2 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {782// CHECK-RV64-NEXT:  entry:783// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])784// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> [[TMP0]]785//786vuint8mf4_t test_vrgather_vx_u8mf4(vuint8mf4_t op1, size_t index, size_t vl) {787  return __riscv_vrgather_vx_u8mf4(op1, index, vl);788}789 790// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vv_u8mf2791// CHECK-RV64-SAME: (<vscale x 4 x i8> [[OP1:%.*]], <vscale x 4 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {792// CHECK-RV64-NEXT:  entry:793// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], <vscale x 4 x i8> [[INDEX]], i64 [[VL]])794// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> [[TMP0]]795//796vuint8mf2_t test_vrgather_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t index, size_t vl) {797  return __riscv_vrgather_vv_u8mf2(op1, index, vl);798}799 800// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vx_u8mf2801// CHECK-RV64-SAME: (<vscale x 4 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {802// CHECK-RV64-NEXT:  entry:803// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])804// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> [[TMP0]]805//806vuint8mf2_t test_vrgather_vx_u8mf2(vuint8mf2_t op1, size_t index, size_t vl) {807  return __riscv_vrgather_vx_u8mf2(op1, index, vl);808}809 810// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vv_u8m1811// CHECK-RV64-SAME: (<vscale x 8 x i8> [[OP1:%.*]], <vscale x 8 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {812// CHECK-RV64-NEXT:  entry:813// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], <vscale x 8 x i8> [[INDEX]], i64 [[VL]])814// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> [[TMP0]]815//816vuint8m1_t test_vrgather_vv_u8m1(vuint8m1_t op1, vuint8m1_t index, size_t vl) {817  return __riscv_vrgather_vv_u8m1(op1, index, vl);818}819 820// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vx_u8m1821// CHECK-RV64-SAME: (<vscale x 8 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {822// CHECK-RV64-NEXT:  entry:823// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])824// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> [[TMP0]]825//826vuint8m1_t test_vrgather_vx_u8m1(vuint8m1_t op1, size_t index, size_t vl) {827  return __riscv_vrgather_vx_u8m1(op1, index, vl);828}829 830// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vv_u8m2831// CHECK-RV64-SAME: (<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {832// CHECK-RV64-NEXT:  entry:833// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], <vscale x 16 x i8> [[INDEX]], i64 [[VL]])834// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> [[TMP0]]835//836vuint8m2_t test_vrgather_vv_u8m2(vuint8m2_t op1, vuint8m2_t index, size_t vl) {837  return __riscv_vrgather_vv_u8m2(op1, index, vl);838}839 840// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vx_u8m2841// CHECK-RV64-SAME: (<vscale x 16 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {842// CHECK-RV64-NEXT:  entry:843// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])844// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> [[TMP0]]845//846vuint8m2_t test_vrgather_vx_u8m2(vuint8m2_t op1, size_t index, size_t vl) {847  return __riscv_vrgather_vx_u8m2(op1, index, vl);848}849 850// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vv_u8m4851// CHECK-RV64-SAME: (<vscale x 32 x i8> [[OP1:%.*]], <vscale x 32 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {852// CHECK-RV64-NEXT:  entry:853// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], <vscale x 32 x i8> [[INDEX]], i64 [[VL]])854// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> [[TMP0]]855//856vuint8m4_t test_vrgather_vv_u8m4(vuint8m4_t op1, vuint8m4_t index, size_t vl) {857  return __riscv_vrgather_vv_u8m4(op1, index, vl);858}859 860// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vx_u8m4861// CHECK-RV64-SAME: (<vscale x 32 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {862// CHECK-RV64-NEXT:  entry:863// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])864// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> [[TMP0]]865//866vuint8m4_t test_vrgather_vx_u8m4(vuint8m4_t op1, size_t index, size_t vl) {867  return __riscv_vrgather_vx_u8m4(op1, index, vl);868}869 870// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vv_u8m8871// CHECK-RV64-SAME: (<vscale x 64 x i8> [[OP1:%.*]], <vscale x 64 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {872// CHECK-RV64-NEXT:  entry:873// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], <vscale x 64 x i8> [[INDEX]], i64 [[VL]])874// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> [[TMP0]]875//876vuint8m8_t test_vrgather_vv_u8m8(vuint8m8_t op1, vuint8m8_t index, size_t vl) {877  return __riscv_vrgather_vv_u8m8(op1, index, vl);878}879 880// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vx_u8m8881// CHECK-RV64-SAME: (<vscale x 64 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {882// CHECK-RV64-NEXT:  entry:883// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])884// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> [[TMP0]]885//886vuint8m8_t test_vrgather_vx_u8m8(vuint8m8_t op1, size_t index, size_t vl) {887  return __riscv_vrgather_vx_u8m8(op1, index, vl);888}889 890// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vv_u16mf4891// CHECK-RV64-SAME: (<vscale x 1 x i16> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {892// CHECK-RV64-NEXT:  entry:893// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], <vscale x 1 x i16> [[INDEX]], i64 [[VL]])894// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> [[TMP0]]895//896vuint16mf4_t test_vrgather_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t index, size_t vl) {897  return __riscv_vrgather_vv_u16mf4(op1, index, vl);898}899 900// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vx_u16mf4901// CHECK-RV64-SAME: (<vscale x 1 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {902// CHECK-RV64-NEXT:  entry:903// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])904// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> [[TMP0]]905//906vuint16mf4_t test_vrgather_vx_u16mf4(vuint16mf4_t op1, size_t index, size_t vl) {907  return __riscv_vrgather_vx_u16mf4(op1, index, vl);908}909 910// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vv_u16mf2911// CHECK-RV64-SAME: (<vscale x 2 x i16> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {912// CHECK-RV64-NEXT:  entry:913// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], <vscale x 2 x i16> [[INDEX]], i64 [[VL]])914// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> [[TMP0]]915//916vuint16mf2_t test_vrgather_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t index, size_t vl) {917  return __riscv_vrgather_vv_u16mf2(op1, index, vl);918}919 920// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vx_u16mf2921// CHECK-RV64-SAME: (<vscale x 2 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {922// CHECK-RV64-NEXT:  entry:923// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])924// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> [[TMP0]]925//926vuint16mf2_t test_vrgather_vx_u16mf2(vuint16mf2_t op1, size_t index, size_t vl) {927  return __riscv_vrgather_vx_u16mf2(op1, index, vl);928}929 930// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vv_u16m1931// CHECK-RV64-SAME: (<vscale x 4 x i16> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {932// CHECK-RV64-NEXT:  entry:933// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], <vscale x 4 x i16> [[INDEX]], i64 [[VL]])934// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> [[TMP0]]935//936vuint16m1_t test_vrgather_vv_u16m1(vuint16m1_t op1, vuint16m1_t index, size_t vl) {937  return __riscv_vrgather_vv_u16m1(op1, index, vl);938}939 940// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vx_u16m1941// CHECK-RV64-SAME: (<vscale x 4 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {942// CHECK-RV64-NEXT:  entry:943// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])944// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> [[TMP0]]945//946vuint16m1_t test_vrgather_vx_u16m1(vuint16m1_t op1, size_t index, size_t vl) {947  return __riscv_vrgather_vx_u16m1(op1, index, vl);948}949 950// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vv_u16m2951// CHECK-RV64-SAME: (<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {952// CHECK-RV64-NEXT:  entry:953// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], <vscale x 8 x i16> [[INDEX]], i64 [[VL]])954// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> [[TMP0]]955//956vuint16m2_t test_vrgather_vv_u16m2(vuint16m2_t op1, vuint16m2_t index, size_t vl) {957  return __riscv_vrgather_vv_u16m2(op1, index, vl);958}959 960// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vx_u16m2961// CHECK-RV64-SAME: (<vscale x 8 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {962// CHECK-RV64-NEXT:  entry:963// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])964// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> [[TMP0]]965//966vuint16m2_t test_vrgather_vx_u16m2(vuint16m2_t op1, size_t index, size_t vl) {967  return __riscv_vrgather_vx_u16m2(op1, index, vl);968}969 970// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vv_u16m4971// CHECK-RV64-SAME: (<vscale x 16 x i16> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {972// CHECK-RV64-NEXT:  entry:973// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], <vscale x 16 x i16> [[INDEX]], i64 [[VL]])974// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> [[TMP0]]975//976vuint16m4_t test_vrgather_vv_u16m4(vuint16m4_t op1, vuint16m4_t index, size_t vl) {977  return __riscv_vrgather_vv_u16m4(op1, index, vl);978}979 980// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vx_u16m4981// CHECK-RV64-SAME: (<vscale x 16 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {982// CHECK-RV64-NEXT:  entry:983// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])984// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> [[TMP0]]985//986vuint16m4_t test_vrgather_vx_u16m4(vuint16m4_t op1, size_t index, size_t vl) {987  return __riscv_vrgather_vx_u16m4(op1, index, vl);988}989 990// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vv_u16m8991// CHECK-RV64-SAME: (<vscale x 32 x i16> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {992// CHECK-RV64-NEXT:  entry:993// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], <vscale x 32 x i16> [[INDEX]], i64 [[VL]])994// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> [[TMP0]]995//996vuint16m8_t test_vrgather_vv_u16m8(vuint16m8_t op1, vuint16m8_t index, size_t vl) {997  return __riscv_vrgather_vv_u16m8(op1, index, vl);998}999 1000// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vx_u16m81001// CHECK-RV64-SAME: (<vscale x 32 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1002// CHECK-RV64-NEXT:  entry:1003// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])1004// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> [[TMP0]]1005//1006vuint16m8_t test_vrgather_vx_u16m8(vuint16m8_t op1, size_t index, size_t vl) {1007  return __riscv_vrgather_vx_u16m8(op1, index, vl);1008}1009 1010// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vv_u32mf21011// CHECK-RV64-SAME: (<vscale x 1 x i32> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1012// CHECK-RV64-NEXT:  entry:1013// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], <vscale x 1 x i32> [[INDEX]], i64 [[VL]])1014// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> [[TMP0]]1015//1016vuint32mf2_t test_vrgather_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t index, size_t vl) {1017  return __riscv_vrgather_vv_u32mf2(op1, index, vl);1018}1019 1020// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vx_u32mf21021// CHECK-RV64-SAME: (<vscale x 1 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1022// CHECK-RV64-NEXT:  entry:1023// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])1024// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> [[TMP0]]1025//1026vuint32mf2_t test_vrgather_vx_u32mf2(vuint32mf2_t op1, size_t index, size_t vl) {1027  return __riscv_vrgather_vx_u32mf2(op1, index, vl);1028}1029 1030// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vv_u32m11031// CHECK-RV64-SAME: (<vscale x 2 x i32> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1032// CHECK-RV64-NEXT:  entry:1033// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], <vscale x 2 x i32> [[INDEX]], i64 [[VL]])1034// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> [[TMP0]]1035//1036vuint32m1_t test_vrgather_vv_u32m1(vuint32m1_t op1, vuint32m1_t index, size_t vl) {1037  return __riscv_vrgather_vv_u32m1(op1, index, vl);1038}1039 1040// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vx_u32m11041// CHECK-RV64-SAME: (<vscale x 2 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1042// CHECK-RV64-NEXT:  entry:1043// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])1044// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> [[TMP0]]1045//1046vuint32m1_t test_vrgather_vx_u32m1(vuint32m1_t op1, size_t index, size_t vl) {1047  return __riscv_vrgather_vx_u32m1(op1, index, vl);1048}1049 1050// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vv_u32m21051// CHECK-RV64-SAME: (<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1052// CHECK-RV64-NEXT:  entry:1053// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], <vscale x 4 x i32> [[INDEX]], i64 [[VL]])1054// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> [[TMP0]]1055//1056vuint32m2_t test_vrgather_vv_u32m2(vuint32m2_t op1, vuint32m2_t index, size_t vl) {1057  return __riscv_vrgather_vv_u32m2(op1, index, vl);1058}1059 1060// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vx_u32m21061// CHECK-RV64-SAME: (<vscale x 4 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1062// CHECK-RV64-NEXT:  entry:1063// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])1064// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> [[TMP0]]1065//1066vuint32m2_t test_vrgather_vx_u32m2(vuint32m2_t op1, size_t index, size_t vl) {1067  return __riscv_vrgather_vx_u32m2(op1, index, vl);1068}1069 1070// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vv_u32m41071// CHECK-RV64-SAME: (<vscale x 8 x i32> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1072// CHECK-RV64-NEXT:  entry:1073// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], <vscale x 8 x i32> [[INDEX]], i64 [[VL]])1074// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> [[TMP0]]1075//1076vuint32m4_t test_vrgather_vv_u32m4(vuint32m4_t op1, vuint32m4_t index, size_t vl) {1077  return __riscv_vrgather_vv_u32m4(op1, index, vl);1078}1079 1080// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vx_u32m41081// CHECK-RV64-SAME: (<vscale x 8 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1082// CHECK-RV64-NEXT:  entry:1083// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])1084// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> [[TMP0]]1085//1086vuint32m4_t test_vrgather_vx_u32m4(vuint32m4_t op1, size_t index, size_t vl) {1087  return __riscv_vrgather_vx_u32m4(op1, index, vl);1088}1089 1090// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vv_u32m81091// CHECK-RV64-SAME: (<vscale x 16 x i32> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1092// CHECK-RV64-NEXT:  entry:1093// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], <vscale x 16 x i32> [[INDEX]], i64 [[VL]])1094// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> [[TMP0]]1095//1096vuint32m8_t test_vrgather_vv_u32m8(vuint32m8_t op1, vuint32m8_t index, size_t vl) {1097  return __riscv_vrgather_vv_u32m8(op1, index, vl);1098}1099 1100// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vx_u32m81101// CHECK-RV64-SAME: (<vscale x 16 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1102// CHECK-RV64-NEXT:  entry:1103// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])1104// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> [[TMP0]]1105//1106vuint32m8_t test_vrgather_vx_u32m8(vuint32m8_t op1, size_t index, size_t vl) {1107  return __riscv_vrgather_vx_u32m8(op1, index, vl);1108}1109 1110// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vv_u64m11111// CHECK-RV64-SAME: (<vscale x 1 x i64> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1112// CHECK-RV64-NEXT:  entry:1113// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], <vscale x 1 x i64> [[INDEX]], i64 [[VL]])1114// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> [[TMP0]]1115//1116vuint64m1_t test_vrgather_vv_u64m1(vuint64m1_t op1, vuint64m1_t index, size_t vl) {1117  return __riscv_vrgather_vv_u64m1(op1, index, vl);1118}1119 1120// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vx_u64m11121// CHECK-RV64-SAME: (<vscale x 1 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1122// CHECK-RV64-NEXT:  entry:1123// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])1124// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> [[TMP0]]1125//1126vuint64m1_t test_vrgather_vx_u64m1(vuint64m1_t op1, size_t index, size_t vl) {1127  return __riscv_vrgather_vx_u64m1(op1, index, vl);1128}1129 1130// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vv_u64m21131// CHECK-RV64-SAME: (<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1132// CHECK-RV64-NEXT:  entry:1133// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], <vscale x 2 x i64> [[INDEX]], i64 [[VL]])1134// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> [[TMP0]]1135//1136vuint64m2_t test_vrgather_vv_u64m2(vuint64m2_t op1, vuint64m2_t index, size_t vl) {1137  return __riscv_vrgather_vv_u64m2(op1, index, vl);1138}1139 1140// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vx_u64m21141// CHECK-RV64-SAME: (<vscale x 2 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1142// CHECK-RV64-NEXT:  entry:1143// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])1144// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> [[TMP0]]1145//1146vuint64m2_t test_vrgather_vx_u64m2(vuint64m2_t op1, size_t index, size_t vl) {1147  return __riscv_vrgather_vx_u64m2(op1, index, vl);1148}1149 1150// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vv_u64m41151// CHECK-RV64-SAME: (<vscale x 4 x i64> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1152// CHECK-RV64-NEXT:  entry:1153// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], <vscale x 4 x i64> [[INDEX]], i64 [[VL]])1154// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> [[TMP0]]1155//1156vuint64m4_t test_vrgather_vv_u64m4(vuint64m4_t op1, vuint64m4_t index, size_t vl) {1157  return __riscv_vrgather_vv_u64m4(op1, index, vl);1158}1159 1160// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vx_u64m41161// CHECK-RV64-SAME: (<vscale x 4 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1162// CHECK-RV64-NEXT:  entry:1163// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])1164// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> [[TMP0]]1165//1166vuint64m4_t test_vrgather_vx_u64m4(vuint64m4_t op1, size_t index, size_t vl) {1167  return __riscv_vrgather_vx_u64m4(op1, index, vl);1168}1169 1170// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vv_u64m81171// CHECK-RV64-SAME: (<vscale x 8 x i64> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1172// CHECK-RV64-NEXT:  entry:1173// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], <vscale x 8 x i64> [[INDEX]], i64 [[VL]])1174// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> [[TMP0]]1175//1176vuint64m8_t test_vrgather_vv_u64m8(vuint64m8_t op1, vuint64m8_t index, size_t vl) {1177  return __riscv_vrgather_vv_u64m8(op1, index, vl);1178}1179 1180// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vx_u64m81181// CHECK-RV64-SAME: (<vscale x 8 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1182// CHECK-RV64-NEXT:  entry:1183// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])1184// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> [[TMP0]]1185//1186vuint64m8_t test_vrgather_vx_u64m8(vuint64m8_t op1, size_t index, size_t vl) {1187  return __riscv_vrgather_vx_u64m8(op1, index, vl);1188}1189 1190// CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vrgather_vv_f16mf4_m1191// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x half> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1192// CHECK-RV64-NEXT:  entry:1193// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vrgather.vv.mask.nxv1f16.i64(<vscale x 1 x half> poison, <vscale x 1 x half> [[OP1]], <vscale x 1 x i16> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1194// CHECK-RV64-NEXT:    ret <vscale x 1 x half> [[TMP0]]1195//1196vfloat16mf4_t test_vrgather_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) {1197  return __riscv_vrgather_vv_f16mf4_m(mask, op1, index, vl);1198}1199 1200// CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vrgather_vx_f16mf4_m1201// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1202// CHECK-RV64-NEXT:  entry:1203// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vrgather.vx.mask.nxv1f16.i64(<vscale x 1 x half> poison, <vscale x 1 x half> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1204// CHECK-RV64-NEXT:    ret <vscale x 1 x half> [[TMP0]]1205//1206vfloat16mf4_t test_vrgather_vx_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t index, size_t vl) {1207  return __riscv_vrgather_vx_f16mf4_m(mask, op1, index, vl);1208}1209 1210// CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vrgather_vv_f16mf2_m1211// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x half> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1212// CHECK-RV64-NEXT:  entry:1213// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vrgather.vv.mask.nxv2f16.i64(<vscale x 2 x half> poison, <vscale x 2 x half> [[OP1]], <vscale x 2 x i16> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1214// CHECK-RV64-NEXT:    ret <vscale x 2 x half> [[TMP0]]1215//1216vfloat16mf2_t test_vrgather_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) {1217  return __riscv_vrgather_vv_f16mf2_m(mask, op1, index, vl);1218}1219 1220// CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vrgather_vx_f16mf2_m1221// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1222// CHECK-RV64-NEXT:  entry:1223// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vrgather.vx.mask.nxv2f16.i64(<vscale x 2 x half> poison, <vscale x 2 x half> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1224// CHECK-RV64-NEXT:    ret <vscale x 2 x half> [[TMP0]]1225//1226vfloat16mf2_t test_vrgather_vx_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t index, size_t vl) {1227  return __riscv_vrgather_vx_f16mf2_m(mask, op1, index, vl);1228}1229 1230// CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vrgather_vv_f16m1_m1231// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x half> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1232// CHECK-RV64-NEXT:  entry:1233// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vrgather.vv.mask.nxv4f16.i64(<vscale x 4 x half> poison, <vscale x 4 x half> [[OP1]], <vscale x 4 x i16> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1234// CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]1235//1236vfloat16m1_t test_vrgather_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vuint16m1_t index, size_t vl) {1237  return __riscv_vrgather_vv_f16m1_m(mask, op1, index, vl);1238}1239 1240// CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vrgather_vx_f16m1_m1241// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1242// CHECK-RV64-NEXT:  entry:1243// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vrgather.vx.mask.nxv4f16.i64(<vscale x 4 x half> poison, <vscale x 4 x half> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1244// CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]1245//1246vfloat16m1_t test_vrgather_vx_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t index, size_t vl) {1247  return __riscv_vrgather_vx_f16m1_m(mask, op1, index, vl);1248}1249 1250// CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vrgather_vv_f16m2_m1251// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1252// CHECK-RV64-NEXT:  entry:1253// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vrgather.vv.mask.nxv8f16.i64(<vscale x 8 x half> poison, <vscale x 8 x half> [[OP1]], <vscale x 8 x i16> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1254// CHECK-RV64-NEXT:    ret <vscale x 8 x half> [[TMP0]]1255//1256vfloat16m2_t test_vrgather_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vuint16m2_t index, size_t vl) {1257  return __riscv_vrgather_vv_f16m2_m(mask, op1, index, vl);1258}1259 1260// CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vrgather_vx_f16m2_m1261// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1262// CHECK-RV64-NEXT:  entry:1263// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vrgather.vx.mask.nxv8f16.i64(<vscale x 8 x half> poison, <vscale x 8 x half> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1264// CHECK-RV64-NEXT:    ret <vscale x 8 x half> [[TMP0]]1265//1266vfloat16m2_t test_vrgather_vx_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t index, size_t vl) {1267  return __riscv_vrgather_vx_f16m2_m(mask, op1, index, vl);1268}1269 1270// CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vrgather_vv_f16m4_m1271// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x half> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1272// CHECK-RV64-NEXT:  entry:1273// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.riscv.vrgather.vv.mask.nxv16f16.i64(<vscale x 16 x half> poison, <vscale x 16 x half> [[OP1]], <vscale x 16 x i16> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1274// CHECK-RV64-NEXT:    ret <vscale x 16 x half> [[TMP0]]1275//1276vfloat16m4_t test_vrgather_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vuint16m4_t index, size_t vl) {1277  return __riscv_vrgather_vv_f16m4_m(mask, op1, index, vl);1278}1279 1280// CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vrgather_vx_f16m4_m1281// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1282// CHECK-RV64-NEXT:  entry:1283// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.riscv.vrgather.vx.mask.nxv16f16.i64(<vscale x 16 x half> poison, <vscale x 16 x half> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1284// CHECK-RV64-NEXT:    ret <vscale x 16 x half> [[TMP0]]1285//1286vfloat16m4_t test_vrgather_vx_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t index, size_t vl) {1287  return __riscv_vrgather_vx_f16m4_m(mask, op1, index, vl);1288}1289 1290// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vrgather_vv_f16m8_m1291// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x half> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1292// CHECK-RV64-NEXT:  entry:1293// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.vrgather.vv.mask.nxv32f16.i64(<vscale x 32 x half> poison, <vscale x 32 x half> [[OP1]], <vscale x 32 x i16> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)1294// CHECK-RV64-NEXT:    ret <vscale x 32 x half> [[TMP0]]1295//1296vfloat16m8_t test_vrgather_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vuint16m8_t index, size_t vl) {1297  return __riscv_vrgather_vv_f16m8_m(mask, op1, index, vl);1298}1299 1300// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vrgather_vx_f16m8_m1301// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1302// CHECK-RV64-NEXT:  entry:1303// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.vrgather.vx.mask.nxv32f16.i64(<vscale x 32 x half> poison, <vscale x 32 x half> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)1304// CHECK-RV64-NEXT:    ret <vscale x 32 x half> [[TMP0]]1305//1306vfloat16m8_t test_vrgather_vx_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t index, size_t vl) {1307  return __riscv_vrgather_vx_f16m8_m(mask, op1, index, vl);1308}1309 1310// CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vrgather_vv_f32mf2_m1311// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x float> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1312// CHECK-RV64-NEXT:  entry:1313// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vrgather.vv.mask.nxv1f32.i64(<vscale x 1 x float> poison, <vscale x 1 x float> [[OP1]], <vscale x 1 x i32> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1314// CHECK-RV64-NEXT:    ret <vscale x 1 x float> [[TMP0]]1315//1316vfloat32mf2_t test_vrgather_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) {1317  return __riscv_vrgather_vv_f32mf2_m(mask, op1, index, vl);1318}1319 1320// CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vrgather_vx_f32mf2_m1321// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1322// CHECK-RV64-NEXT:  entry:1323// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vrgather.vx.mask.nxv1f32.i64(<vscale x 1 x float> poison, <vscale x 1 x float> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1324// CHECK-RV64-NEXT:    ret <vscale x 1 x float> [[TMP0]]1325//1326vfloat32mf2_t test_vrgather_vx_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t index, size_t vl) {1327  return __riscv_vrgather_vx_f32mf2_m(mask, op1, index, vl);1328}1329 1330// CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vrgather_vv_f32m1_m1331// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x float> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1332// CHECK-RV64-NEXT:  entry:1333// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vrgather.vv.mask.nxv2f32.i64(<vscale x 2 x float> poison, <vscale x 2 x float> [[OP1]], <vscale x 2 x i32> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1334// CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]1335//1336vfloat32m1_t test_vrgather_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vuint32m1_t index, size_t vl) {1337  return __riscv_vrgather_vv_f32m1_m(mask, op1, index, vl);1338}1339 1340// CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vrgather_vx_f32m1_m1341// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1342// CHECK-RV64-NEXT:  entry:1343// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vrgather.vx.mask.nxv2f32.i64(<vscale x 2 x float> poison, <vscale x 2 x float> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1344// CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]1345//1346vfloat32m1_t test_vrgather_vx_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t index, size_t vl) {1347  return __riscv_vrgather_vx_f32m1_m(mask, op1, index, vl);1348}1349 1350// CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vrgather_vv_f32m2_m1351// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1352// CHECK-RV64-NEXT:  entry:1353// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vrgather.vv.mask.nxv4f32.i64(<vscale x 4 x float> poison, <vscale x 4 x float> [[OP1]], <vscale x 4 x i32> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1354// CHECK-RV64-NEXT:    ret <vscale x 4 x float> [[TMP0]]1355//1356vfloat32m2_t test_vrgather_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vuint32m2_t index, size_t vl) {1357  return __riscv_vrgather_vv_f32m2_m(mask, op1, index, vl);1358}1359 1360// CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vrgather_vx_f32m2_m1361// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1362// CHECK-RV64-NEXT:  entry:1363// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vrgather.vx.mask.nxv4f32.i64(<vscale x 4 x float> poison, <vscale x 4 x float> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1364// CHECK-RV64-NEXT:    ret <vscale x 4 x float> [[TMP0]]1365//1366vfloat32m2_t test_vrgather_vx_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t index, size_t vl) {1367  return __riscv_vrgather_vx_f32m2_m(mask, op1, index, vl);1368}1369 1370// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vrgather_vv_f32m4_m1371// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x float> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1372// CHECK-RV64-NEXT:  entry:1373// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vrgather.vv.mask.nxv8f32.i64(<vscale x 8 x float> poison, <vscale x 8 x float> [[OP1]], <vscale x 8 x i32> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1374// CHECK-RV64-NEXT:    ret <vscale x 8 x float> [[TMP0]]1375//1376vfloat32m4_t test_vrgather_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vuint32m4_t index, size_t vl) {1377  return __riscv_vrgather_vv_f32m4_m(mask, op1, index, vl);1378}1379 1380// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vrgather_vx_f32m4_m1381// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1382// CHECK-RV64-NEXT:  entry:1383// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vrgather.vx.mask.nxv8f32.i64(<vscale x 8 x float> poison, <vscale x 8 x float> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1384// CHECK-RV64-NEXT:    ret <vscale x 8 x float> [[TMP0]]1385//1386vfloat32m4_t test_vrgather_vx_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t index, size_t vl) {1387  return __riscv_vrgather_vx_f32m4_m(mask, op1, index, vl);1388}1389 1390// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vrgather_vv_f32m8_m1391// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x float> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1392// CHECK-RV64-NEXT:  entry:1393// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.vrgather.vv.mask.nxv16f32.i64(<vscale x 16 x float> poison, <vscale x 16 x float> [[OP1]], <vscale x 16 x i32> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1394// CHECK-RV64-NEXT:    ret <vscale x 16 x float> [[TMP0]]1395//1396vfloat32m8_t test_vrgather_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vuint32m8_t index, size_t vl) {1397  return __riscv_vrgather_vv_f32m8_m(mask, op1, index, vl);1398}1399 1400// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vrgather_vx_f32m8_m1401// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1402// CHECK-RV64-NEXT:  entry:1403// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.vrgather.vx.mask.nxv16f32.i64(<vscale x 16 x float> poison, <vscale x 16 x float> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1404// CHECK-RV64-NEXT:    ret <vscale x 16 x float> [[TMP0]]1405//1406vfloat32m8_t test_vrgather_vx_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t index, size_t vl) {1407  return __riscv_vrgather_vx_f32m8_m(mask, op1, index, vl);1408}1409 1410// CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vrgather_vv_f64m1_m1411// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x double> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1412// CHECK-RV64-NEXT:  entry:1413// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vrgather.vv.mask.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> [[OP1]], <vscale x 1 x i64> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1414// CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]1415//1416vfloat64m1_t test_vrgather_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vuint64m1_t index, size_t vl) {1417  return __riscv_vrgather_vv_f64m1_m(mask, op1, index, vl);1418}1419 1420// CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vrgather_vx_f64m1_m1421// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1422// CHECK-RV64-NEXT:  entry:1423// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vrgather.vx.mask.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1424// CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]1425//1426vfloat64m1_t test_vrgather_vx_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t index, size_t vl) {1427  return __riscv_vrgather_vx_f64m1_m(mask, op1, index, vl);1428}1429 1430// CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vrgather_vv_f64m2_m1431// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1432// CHECK-RV64-NEXT:  entry:1433// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vrgather.vv.mask.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> [[OP1]], <vscale x 2 x i64> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1434// CHECK-RV64-NEXT:    ret <vscale x 2 x double> [[TMP0]]1435//1436vfloat64m2_t test_vrgather_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vuint64m2_t index, size_t vl) {1437  return __riscv_vrgather_vv_f64m2_m(mask, op1, index, vl);1438}1439 1440// CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vrgather_vx_f64m2_m1441// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1442// CHECK-RV64-NEXT:  entry:1443// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vrgather.vx.mask.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1444// CHECK-RV64-NEXT:    ret <vscale x 2 x double> [[TMP0]]1445//1446vfloat64m2_t test_vrgather_vx_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t index, size_t vl) {1447  return __riscv_vrgather_vx_f64m2_m(mask, op1, index, vl);1448}1449 1450// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vrgather_vv_f64m4_m1451// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x double> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1452// CHECK-RV64-NEXT:  entry:1453// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vrgather.vv.mask.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> [[OP1]], <vscale x 4 x i64> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1454// CHECK-RV64-NEXT:    ret <vscale x 4 x double> [[TMP0]]1455//1456vfloat64m4_t test_vrgather_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vuint64m4_t index, size_t vl) {1457  return __riscv_vrgather_vv_f64m4_m(mask, op1, index, vl);1458}1459 1460// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vrgather_vx_f64m4_m1461// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1462// CHECK-RV64-NEXT:  entry:1463// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vrgather.vx.mask.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1464// CHECK-RV64-NEXT:    ret <vscale x 4 x double> [[TMP0]]1465//1466vfloat64m4_t test_vrgather_vx_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t index, size_t vl) {1467  return __riscv_vrgather_vx_f64m4_m(mask, op1, index, vl);1468}1469 1470// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vrgather_vv_f64m8_m1471// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x double> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1472// CHECK-RV64-NEXT:  entry:1473// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vrgather.vv.mask.nxv8f64.i64(<vscale x 8 x double> poison, <vscale x 8 x double> [[OP1]], <vscale x 8 x i64> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1474// CHECK-RV64-NEXT:    ret <vscale x 8 x double> [[TMP0]]1475//1476vfloat64m8_t test_vrgather_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vuint64m8_t index, size_t vl) {1477  return __riscv_vrgather_vv_f64m8_m(mask, op1, index, vl);1478}1479 1480// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vrgather_vx_f64m8_m1481// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1482// CHECK-RV64-NEXT:  entry:1483// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vrgather.vx.mask.nxv8f64.i64(<vscale x 8 x double> poison, <vscale x 8 x double> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1484// CHECK-RV64-NEXT:    ret <vscale x 8 x double> [[TMP0]]1485//1486vfloat64m8_t test_vrgather_vx_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t index, size_t vl) {1487  return __riscv_vrgather_vx_f64m8_m(mask, op1, index, vl);1488}1489 1490// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vv_i8mf8_m1491// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i8> [[OP1:%.*]], <vscale x 1 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1492// CHECK-RV64-NEXT:  entry:1493// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.mask.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], <vscale x 1 x i8> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1494// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> [[TMP0]]1495//1496vint8mf8_t test_vrgather_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t index, size_t vl) {1497  return __riscv_vrgather_vv_i8mf8_m(mask, op1, index, vl);1498}1499 1500// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vx_i8mf8_m1501// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1502// CHECK-RV64-NEXT:  entry:1503// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.mask.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1504// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> [[TMP0]]1505//1506vint8mf8_t test_vrgather_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t index, size_t vl) {1507  return __riscv_vrgather_vx_i8mf8_m(mask, op1, index, vl);1508}1509 1510// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vv_i8mf4_m1511// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i8> [[OP1:%.*]], <vscale x 2 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1512// CHECK-RV64-NEXT:  entry:1513// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.mask.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], <vscale x 2 x i8> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1514// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> [[TMP0]]1515//1516vint8mf4_t test_vrgather_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t index, size_t vl) {1517  return __riscv_vrgather_vv_i8mf4_m(mask, op1, index, vl);1518}1519 1520// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vx_i8mf4_m1521// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1522// CHECK-RV64-NEXT:  entry:1523// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.mask.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1524// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> [[TMP0]]1525//1526vint8mf4_t test_vrgather_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t index, size_t vl) {1527  return __riscv_vrgather_vx_i8mf4_m(mask, op1, index, vl);1528}1529 1530// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vv_i8mf2_m1531// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i8> [[OP1:%.*]], <vscale x 4 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1532// CHECK-RV64-NEXT:  entry:1533// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.mask.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], <vscale x 4 x i8> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1534// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> [[TMP0]]1535//1536vint8mf2_t test_vrgather_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t index, size_t vl) {1537  return __riscv_vrgather_vv_i8mf2_m(mask, op1, index, vl);1538}1539 1540// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vx_i8mf2_m1541// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1542// CHECK-RV64-NEXT:  entry:1543// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.mask.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1544// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> [[TMP0]]1545//1546vint8mf2_t test_vrgather_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t index, size_t vl) {1547  return __riscv_vrgather_vx_i8mf2_m(mask, op1, index, vl);1548}1549 1550// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vv_i8m1_m1551// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i8> [[OP1:%.*]], <vscale x 8 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1552// CHECK-RV64-NEXT:  entry:1553// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.mask.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], <vscale x 8 x i8> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1554// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> [[TMP0]]1555//1556vint8m1_t test_vrgather_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t index, size_t vl) {1557  return __riscv_vrgather_vv_i8m1_m(mask, op1, index, vl);1558}1559 1560// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vx_i8m1_m1561// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1562// CHECK-RV64-NEXT:  entry:1563// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.mask.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1564// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> [[TMP0]]1565//1566vint8m1_t test_vrgather_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t index, size_t vl) {1567  return __riscv_vrgather_vx_i8m1_m(mask, op1, index, vl);1568}1569 1570// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vv_i8m2_m1571// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1572// CHECK-RV64-NEXT:  entry:1573// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.mask.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], <vscale x 16 x i8> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1574// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1575//1576vint8m2_t test_vrgather_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t index, size_t vl) {1577  return __riscv_vrgather_vv_i8m2_m(mask, op1, index, vl);1578}1579 1580// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vx_i8m2_m1581// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1582// CHECK-RV64-NEXT:  entry:1583// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.mask.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1584// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> [[TMP0]]1585//1586vint8m2_t test_vrgather_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t index, size_t vl) {1587  return __riscv_vrgather_vx_i8m2_m(mask, op1, index, vl);1588}1589 1590// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vv_i8m4_m1591// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i8> [[OP1:%.*]], <vscale x 32 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1592// CHECK-RV64-NEXT:  entry:1593// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.mask.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], <vscale x 32 x i8> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)1594// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> [[TMP0]]1595//1596vint8m4_t test_vrgather_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t index, size_t vl) {1597  return __riscv_vrgather_vv_i8m4_m(mask, op1, index, vl);1598}1599 1600// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vx_i8m4_m1601// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1602// CHECK-RV64-NEXT:  entry:1603// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.mask.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)1604// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> [[TMP0]]1605//1606vint8m4_t test_vrgather_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t index, size_t vl) {1607  return __riscv_vrgather_vx_i8m4_m(mask, op1, index, vl);1608}1609 1610// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vv_i8m8_m1611// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], <vscale x 64 x i8> [[OP1:%.*]], <vscale x 64 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1612// CHECK-RV64-NEXT:  entry:1613// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.mask.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], <vscale x 64 x i8> [[INDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)1614// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> [[TMP0]]1615//1616vint8m8_t test_vrgather_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t index, size_t vl) {1617  return __riscv_vrgather_vv_i8m8_m(mask, op1, index, vl);1618}1619 1620// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vx_i8m8_m1621// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], <vscale x 64 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1622// CHECK-RV64-NEXT:  entry:1623// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.mask.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], i64 [[INDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)1624// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> [[TMP0]]1625//1626vint8m8_t test_vrgather_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t index, size_t vl) {1627  return __riscv_vrgather_vx_i8m8_m(mask, op1, index, vl);1628}1629 1630// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vv_i16mf4_m1631// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i16> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1632// CHECK-RV64-NEXT:  entry:1633// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.mask.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], <vscale x 1 x i16> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1634// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> [[TMP0]]1635//1636vint16mf4_t test_vrgather_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t index, size_t vl) {1637  return __riscv_vrgather_vv_i16mf4_m(mask, op1, index, vl);1638}1639 1640// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vx_i16mf4_m1641// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1642// CHECK-RV64-NEXT:  entry:1643// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.mask.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1644// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> [[TMP0]]1645//1646vint16mf4_t test_vrgather_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t index, size_t vl) {1647  return __riscv_vrgather_vx_i16mf4_m(mask, op1, index, vl);1648}1649 1650// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vv_i16mf2_m1651// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i16> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1652// CHECK-RV64-NEXT:  entry:1653// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.mask.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], <vscale x 2 x i16> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1654// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> [[TMP0]]1655//1656vint16mf2_t test_vrgather_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t index, size_t vl) {1657  return __riscv_vrgather_vv_i16mf2_m(mask, op1, index, vl);1658}1659 1660// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vx_i16mf2_m1661// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1662// CHECK-RV64-NEXT:  entry:1663// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.mask.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1664// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> [[TMP0]]1665//1666vint16mf2_t test_vrgather_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t index, size_t vl) {1667  return __riscv_vrgather_vx_i16mf2_m(mask, op1, index, vl);1668}1669 1670// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vv_i16m1_m1671// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i16> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1672// CHECK-RV64-NEXT:  entry:1673// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.mask.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], <vscale x 4 x i16> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1674// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> [[TMP0]]1675//1676vint16m1_t test_vrgather_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t index, size_t vl) {1677  return __riscv_vrgather_vv_i16m1_m(mask, op1, index, vl);1678}1679 1680// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vx_i16m1_m1681// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1682// CHECK-RV64-NEXT:  entry:1683// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.mask.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1684// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> [[TMP0]]1685//1686vint16m1_t test_vrgather_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t index, size_t vl) {1687  return __riscv_vrgather_vx_i16m1_m(mask, op1, index, vl);1688}1689 1690// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vv_i16m2_m1691// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1692// CHECK-RV64-NEXT:  entry:1693// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.mask.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], <vscale x 8 x i16> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1694// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> [[TMP0]]1695//1696vint16m2_t test_vrgather_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t index, size_t vl) {1697  return __riscv_vrgather_vv_i16m2_m(mask, op1, index, vl);1698}1699 1700// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vx_i16m2_m1701// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1702// CHECK-RV64-NEXT:  entry:1703// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.mask.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1704// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> [[TMP0]]1705//1706vint16m2_t test_vrgather_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t index, size_t vl) {1707  return __riscv_vrgather_vx_i16m2_m(mask, op1, index, vl);1708}1709 1710// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vv_i16m4_m1711// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i16> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1712// CHECK-RV64-NEXT:  entry:1713// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.mask.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], <vscale x 16 x i16> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1714// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> [[TMP0]]1715//1716vint16m4_t test_vrgather_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t index, size_t vl) {1717  return __riscv_vrgather_vv_i16m4_m(mask, op1, index, vl);1718}1719 1720// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vx_i16m4_m1721// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1722// CHECK-RV64-NEXT:  entry:1723// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.mask.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1724// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> [[TMP0]]1725//1726vint16m4_t test_vrgather_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t index, size_t vl) {1727  return __riscv_vrgather_vx_i16m4_m(mask, op1, index, vl);1728}1729 1730// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vv_i16m8_m1731// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i16> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1732// CHECK-RV64-NEXT:  entry:1733// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.mask.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], <vscale x 32 x i16> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)1734// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> [[TMP0]]1735//1736vint16m8_t test_vrgather_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t index, size_t vl) {1737  return __riscv_vrgather_vv_i16m8_m(mask, op1, index, vl);1738}1739 1740// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vx_i16m8_m1741// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1742// CHECK-RV64-NEXT:  entry:1743// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.mask.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)1744// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> [[TMP0]]1745//1746vint16m8_t test_vrgather_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t index, size_t vl) {1747  return __riscv_vrgather_vx_i16m8_m(mask, op1, index, vl);1748}1749 1750// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vv_i32mf2_m1751// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i32> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1752// CHECK-RV64-NEXT:  entry:1753// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.mask.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], <vscale x 1 x i32> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1754// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> [[TMP0]]1755//1756vint32mf2_t test_vrgather_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t index, size_t vl) {1757  return __riscv_vrgather_vv_i32mf2_m(mask, op1, index, vl);1758}1759 1760// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vx_i32mf2_m1761// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1762// CHECK-RV64-NEXT:  entry:1763// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.mask.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1764// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> [[TMP0]]1765//1766vint32mf2_t test_vrgather_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t index, size_t vl) {1767  return __riscv_vrgather_vx_i32mf2_m(mask, op1, index, vl);1768}1769 1770// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vv_i32m1_m1771// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i32> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1772// CHECK-RV64-NEXT:  entry:1773// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.mask.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], <vscale x 2 x i32> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1774// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> [[TMP0]]1775//1776vint32m1_t test_vrgather_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t index, size_t vl) {1777  return __riscv_vrgather_vv_i32m1_m(mask, op1, index, vl);1778}1779 1780// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vx_i32m1_m1781// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1782// CHECK-RV64-NEXT:  entry:1783// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.mask.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1784// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> [[TMP0]]1785//1786vint32m1_t test_vrgather_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t index, size_t vl) {1787  return __riscv_vrgather_vx_i32m1_m(mask, op1, index, vl);1788}1789 1790// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vv_i32m2_m1791// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1792// CHECK-RV64-NEXT:  entry:1793// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.mask.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], <vscale x 4 x i32> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1794// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> [[TMP0]]1795//1796vint32m2_t test_vrgather_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t index, size_t vl) {1797  return __riscv_vrgather_vv_i32m2_m(mask, op1, index, vl);1798}1799 1800// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vx_i32m2_m1801// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1802// CHECK-RV64-NEXT:  entry:1803// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.mask.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1804// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> [[TMP0]]1805//1806vint32m2_t test_vrgather_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t index, size_t vl) {1807  return __riscv_vrgather_vx_i32m2_m(mask, op1, index, vl);1808}1809 1810// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vv_i32m4_m1811// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i32> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1812// CHECK-RV64-NEXT:  entry:1813// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.mask.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], <vscale x 8 x i32> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1814// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> [[TMP0]]1815//1816vint32m4_t test_vrgather_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t index, size_t vl) {1817  return __riscv_vrgather_vv_i32m4_m(mask, op1, index, vl);1818}1819 1820// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vx_i32m4_m1821// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1822// CHECK-RV64-NEXT:  entry:1823// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.mask.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1824// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> [[TMP0]]1825//1826vint32m4_t test_vrgather_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t index, size_t vl) {1827  return __riscv_vrgather_vx_i32m4_m(mask, op1, index, vl);1828}1829 1830// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vv_i32m8_m1831// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i32> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1832// CHECK-RV64-NEXT:  entry:1833// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.mask.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], <vscale x 16 x i32> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1834// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> [[TMP0]]1835//1836vint32m8_t test_vrgather_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t index, size_t vl) {1837  return __riscv_vrgather_vv_i32m8_m(mask, op1, index, vl);1838}1839 1840// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vx_i32m8_m1841// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1842// CHECK-RV64-NEXT:  entry:1843// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.mask.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)1844// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> [[TMP0]]1845//1846vint32m8_t test_vrgather_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t index, size_t vl) {1847  return __riscv_vrgather_vx_i32m8_m(mask, op1, index, vl);1848}1849 1850// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vv_i64m1_m1851// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i64> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1852// CHECK-RV64-NEXT:  entry:1853// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], <vscale x 1 x i64> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1854// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> [[TMP0]]1855//1856vint64m1_t test_vrgather_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t index, size_t vl) {1857  return __riscv_vrgather_vv_i64m1_m(mask, op1, index, vl);1858}1859 1860// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vx_i64m1_m1861// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1862// CHECK-RV64-NEXT:  entry:1863// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1864// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> [[TMP0]]1865//1866vint64m1_t test_vrgather_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t index, size_t vl) {1867  return __riscv_vrgather_vx_i64m1_m(mask, op1, index, vl);1868}1869 1870// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vv_i64m2_m1871// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1872// CHECK-RV64-NEXT:  entry:1873// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], <vscale x 2 x i64> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1874// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> [[TMP0]]1875//1876vint64m2_t test_vrgather_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t index, size_t vl) {1877  return __riscv_vrgather_vv_i64m2_m(mask, op1, index, vl);1878}1879 1880// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vx_i64m2_m1881// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1882// CHECK-RV64-NEXT:  entry:1883// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1884// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> [[TMP0]]1885//1886vint64m2_t test_vrgather_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t index, size_t vl) {1887  return __riscv_vrgather_vx_i64m2_m(mask, op1, index, vl);1888}1889 1890// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vv_i64m4_m1891// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i64> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1892// CHECK-RV64-NEXT:  entry:1893// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], <vscale x 4 x i64> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1894// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> [[TMP0]]1895//1896vint64m4_t test_vrgather_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t index, size_t vl) {1897  return __riscv_vrgather_vv_i64m4_m(mask, op1, index, vl);1898}1899 1900// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vx_i64m4_m1901// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1902// CHECK-RV64-NEXT:  entry:1903// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1904// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> [[TMP0]]1905//1906vint64m4_t test_vrgather_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t index, size_t vl) {1907  return __riscv_vrgather_vx_i64m4_m(mask, op1, index, vl);1908}1909 1910// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vv_i64m8_m1911// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i64> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1912// CHECK-RV64-NEXT:  entry:1913// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.mask.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], <vscale x 8 x i64> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1914// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> [[TMP0]]1915//1916vint64m8_t test_vrgather_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t index, size_t vl) {1917  return __riscv_vrgather_vv_i64m8_m(mask, op1, index, vl);1918}1919 1920// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vx_i64m8_m1921// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1922// CHECK-RV64-NEXT:  entry:1923// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.mask.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1924// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> [[TMP0]]1925//1926vint64m8_t test_vrgather_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t index, size_t vl) {1927  return __riscv_vrgather_vx_i64m8_m(mask, op1, index, vl);1928}1929 1930// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vv_u8mf8_m1931// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i8> [[OP1:%.*]], <vscale x 1 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1932// CHECK-RV64-NEXT:  entry:1933// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.mask.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], <vscale x 1 x i8> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1934// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> [[TMP0]]1935//1936vuint8mf8_t test_vrgather_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t index, size_t vl) {1937  return __riscv_vrgather_vv_u8mf8_m(mask, op1, index, vl);1938}1939 1940// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vx_u8mf8_m1941// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1942// CHECK-RV64-NEXT:  entry:1943// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.mask.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)1944// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> [[TMP0]]1945//1946vuint8mf8_t test_vrgather_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t index, size_t vl) {1947  return __riscv_vrgather_vx_u8mf8_m(mask, op1, index, vl);1948}1949 1950// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vv_u8mf4_m1951// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i8> [[OP1:%.*]], <vscale x 2 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1952// CHECK-RV64-NEXT:  entry:1953// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.mask.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], <vscale x 2 x i8> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1954// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> [[TMP0]]1955//1956vuint8mf4_t test_vrgather_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t index, size_t vl) {1957  return __riscv_vrgather_vv_u8mf4_m(mask, op1, index, vl);1958}1959 1960// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vx_u8mf4_m1961// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1962// CHECK-RV64-NEXT:  entry:1963// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.mask.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)1964// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> [[TMP0]]1965//1966vuint8mf4_t test_vrgather_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t index, size_t vl) {1967  return __riscv_vrgather_vx_u8mf4_m(mask, op1, index, vl);1968}1969 1970// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vv_u8mf2_m1971// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i8> [[OP1:%.*]], <vscale x 4 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1972// CHECK-RV64-NEXT:  entry:1973// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.mask.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], <vscale x 4 x i8> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1974// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> [[TMP0]]1975//1976vuint8mf2_t test_vrgather_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t index, size_t vl) {1977  return __riscv_vrgather_vv_u8mf2_m(mask, op1, index, vl);1978}1979 1980// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vx_u8mf2_m1981// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1982// CHECK-RV64-NEXT:  entry:1983// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.mask.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)1984// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> [[TMP0]]1985//1986vuint8mf2_t test_vrgather_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t index, size_t vl) {1987  return __riscv_vrgather_vx_u8mf2_m(mask, op1, index, vl);1988}1989 1990// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vv_u8m1_m1991// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i8> [[OP1:%.*]], <vscale x 8 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1992// CHECK-RV64-NEXT:  entry:1993// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.mask.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], <vscale x 8 x i8> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)1994// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> [[TMP0]]1995//1996vuint8m1_t test_vrgather_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t index, size_t vl) {1997  return __riscv_vrgather_vv_u8m1_m(mask, op1, index, vl);1998}1999 2000// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vx_u8m1_m2001// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2002// CHECK-RV64-NEXT:  entry:2003// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.mask.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2004// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> [[TMP0]]2005//2006vuint8m1_t test_vrgather_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t index, size_t vl) {2007  return __riscv_vrgather_vx_u8m1_m(mask, op1, index, vl);2008}2009 2010// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vv_u8m2_m2011// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2012// CHECK-RV64-NEXT:  entry:2013// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.mask.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], <vscale x 16 x i8> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)2014// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> [[TMP0]]2015//2016vuint8m2_t test_vrgather_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t index, size_t vl) {2017  return __riscv_vrgather_vv_u8m2_m(mask, op1, index, vl);2018}2019 2020// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vx_u8m2_m2021// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2022// CHECK-RV64-NEXT:  entry:2023// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.mask.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)2024// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> [[TMP0]]2025//2026vuint8m2_t test_vrgather_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t index, size_t vl) {2027  return __riscv_vrgather_vx_u8m2_m(mask, op1, index, vl);2028}2029 2030// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vv_u8m4_m2031// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i8> [[OP1:%.*]], <vscale x 32 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2032// CHECK-RV64-NEXT:  entry:2033// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.mask.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], <vscale x 32 x i8> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)2034// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> [[TMP0]]2035//2036vuint8m4_t test_vrgather_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t index, size_t vl) {2037  return __riscv_vrgather_vv_u8m4_m(mask, op1, index, vl);2038}2039 2040// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vx_u8m4_m2041// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2042// CHECK-RV64-NEXT:  entry:2043// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.mask.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)2044// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> [[TMP0]]2045//2046vuint8m4_t test_vrgather_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t index, size_t vl) {2047  return __riscv_vrgather_vx_u8m4_m(mask, op1, index, vl);2048}2049 2050// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vv_u8m8_m2051// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], <vscale x 64 x i8> [[OP1:%.*]], <vscale x 64 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2052// CHECK-RV64-NEXT:  entry:2053// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.mask.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], <vscale x 64 x i8> [[INDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)2054// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> [[TMP0]]2055//2056vuint8m8_t test_vrgather_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t index, size_t vl) {2057  return __riscv_vrgather_vv_u8m8_m(mask, op1, index, vl);2058}2059 2060// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vx_u8m8_m2061// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], <vscale x 64 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2062// CHECK-RV64-NEXT:  entry:2063// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.mask.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], i64 [[INDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)2064// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> [[TMP0]]2065//2066vuint8m8_t test_vrgather_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t index, size_t vl) {2067  return __riscv_vrgather_vx_u8m8_m(mask, op1, index, vl);2068}2069 2070// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vv_u16mf4_m2071// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i16> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2072// CHECK-RV64-NEXT:  entry:2073// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.mask.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], <vscale x 1 x i16> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)2074// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> [[TMP0]]2075//2076vuint16mf4_t test_vrgather_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t index, size_t vl) {2077  return __riscv_vrgather_vv_u16mf4_m(mask, op1, index, vl);2078}2079 2080// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vx_u16mf4_m2081// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2082// CHECK-RV64-NEXT:  entry:2083// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.mask.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)2084// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> [[TMP0]]2085//2086vuint16mf4_t test_vrgather_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t index, size_t vl) {2087  return __riscv_vrgather_vx_u16mf4_m(mask, op1, index, vl);2088}2089 2090// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vv_u16mf2_m2091// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i16> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2092// CHECK-RV64-NEXT:  entry:2093// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.mask.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], <vscale x 2 x i16> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)2094// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> [[TMP0]]2095//2096vuint16mf2_t test_vrgather_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t index, size_t vl) {2097  return __riscv_vrgather_vv_u16mf2_m(mask, op1, index, vl);2098}2099 2100// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vx_u16mf2_m2101// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2102// CHECK-RV64-NEXT:  entry:2103// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.mask.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)2104// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> [[TMP0]]2105//2106vuint16mf2_t test_vrgather_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t index, size_t vl) {2107  return __riscv_vrgather_vx_u16mf2_m(mask, op1, index, vl);2108}2109 2110// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vv_u16m1_m2111// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i16> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2112// CHECK-RV64-NEXT:  entry:2113// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.mask.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], <vscale x 4 x i16> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)2114// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> [[TMP0]]2115//2116vuint16m1_t test_vrgather_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t index, size_t vl) {2117  return __riscv_vrgather_vv_u16m1_m(mask, op1, index, vl);2118}2119 2120// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vx_u16m1_m2121// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2122// CHECK-RV64-NEXT:  entry:2123// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.mask.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)2124// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> [[TMP0]]2125//2126vuint16m1_t test_vrgather_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t index, size_t vl) {2127  return __riscv_vrgather_vx_u16m1_m(mask, op1, index, vl);2128}2129 2130// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vv_u16m2_m2131// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2132// CHECK-RV64-NEXT:  entry:2133// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.mask.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], <vscale x 8 x i16> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2134// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> [[TMP0]]2135//2136vuint16m2_t test_vrgather_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t index, size_t vl) {2137  return __riscv_vrgather_vv_u16m2_m(mask, op1, index, vl);2138}2139 2140// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vx_u16m2_m2141// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2142// CHECK-RV64-NEXT:  entry:2143// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.mask.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2144// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> [[TMP0]]2145//2146vuint16m2_t test_vrgather_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t index, size_t vl) {2147  return __riscv_vrgather_vx_u16m2_m(mask, op1, index, vl);2148}2149 2150// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vv_u16m4_m2151// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i16> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2152// CHECK-RV64-NEXT:  entry:2153// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.mask.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], <vscale x 16 x i16> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)2154// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> [[TMP0]]2155//2156vuint16m4_t test_vrgather_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t index, size_t vl) {2157  return __riscv_vrgather_vv_u16m4_m(mask, op1, index, vl);2158}2159 2160// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vx_u16m4_m2161// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2162// CHECK-RV64-NEXT:  entry:2163// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.mask.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)2164// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> [[TMP0]]2165//2166vuint16m4_t test_vrgather_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t index, size_t vl) {2167  return __riscv_vrgather_vx_u16m4_m(mask, op1, index, vl);2168}2169 2170// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vv_u16m8_m2171// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i16> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2172// CHECK-RV64-NEXT:  entry:2173// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.mask.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], <vscale x 32 x i16> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)2174// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> [[TMP0]]2175//2176vuint16m8_t test_vrgather_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t index, size_t vl) {2177  return __riscv_vrgather_vv_u16m8_m(mask, op1, index, vl);2178}2179 2180// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vx_u16m8_m2181// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2182// CHECK-RV64-NEXT:  entry:2183// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.mask.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)2184// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> [[TMP0]]2185//2186vuint16m8_t test_vrgather_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t index, size_t vl) {2187  return __riscv_vrgather_vx_u16m8_m(mask, op1, index, vl);2188}2189 2190// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vv_u32mf2_m2191// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i32> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2192// CHECK-RV64-NEXT:  entry:2193// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.mask.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], <vscale x 1 x i32> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)2194// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> [[TMP0]]2195//2196vuint32mf2_t test_vrgather_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t index, size_t vl) {2197  return __riscv_vrgather_vv_u32mf2_m(mask, op1, index, vl);2198}2199 2200// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vx_u32mf2_m2201// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2202// CHECK-RV64-NEXT:  entry:2203// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.mask.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)2204// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> [[TMP0]]2205//2206vuint32mf2_t test_vrgather_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t index, size_t vl) {2207  return __riscv_vrgather_vx_u32mf2_m(mask, op1, index, vl);2208}2209 2210// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vv_u32m1_m2211// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i32> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2212// CHECK-RV64-NEXT:  entry:2213// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.mask.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], <vscale x 2 x i32> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)2214// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> [[TMP0]]2215//2216vuint32m1_t test_vrgather_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t index, size_t vl) {2217  return __riscv_vrgather_vv_u32m1_m(mask, op1, index, vl);2218}2219 2220// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vx_u32m1_m2221// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2222// CHECK-RV64-NEXT:  entry:2223// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.mask.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)2224// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> [[TMP0]]2225//2226vuint32m1_t test_vrgather_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t index, size_t vl) {2227  return __riscv_vrgather_vx_u32m1_m(mask, op1, index, vl);2228}2229 2230// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vv_u32m2_m2231// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2232// CHECK-RV64-NEXT:  entry:2233// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.mask.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], <vscale x 4 x i32> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)2234// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> [[TMP0]]2235//2236vuint32m2_t test_vrgather_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t index, size_t vl) {2237  return __riscv_vrgather_vv_u32m2_m(mask, op1, index, vl);2238}2239 2240// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vx_u32m2_m2241// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2242// CHECK-RV64-NEXT:  entry:2243// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.mask.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)2244// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> [[TMP0]]2245//2246vuint32m2_t test_vrgather_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t index, size_t vl) {2247  return __riscv_vrgather_vx_u32m2_m(mask, op1, index, vl);2248}2249 2250// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vv_u32m4_m2251// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i32> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2252// CHECK-RV64-NEXT:  entry:2253// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.mask.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], <vscale x 8 x i32> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2254// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> [[TMP0]]2255//2256vuint32m4_t test_vrgather_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t index, size_t vl) {2257  return __riscv_vrgather_vv_u32m4_m(mask, op1, index, vl);2258}2259 2260// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vx_u32m4_m2261// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2262// CHECK-RV64-NEXT:  entry:2263// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.mask.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2264// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> [[TMP0]]2265//2266vuint32m4_t test_vrgather_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t index, size_t vl) {2267  return __riscv_vrgather_vx_u32m4_m(mask, op1, index, vl);2268}2269 2270// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vv_u32m8_m2271// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i32> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2272// CHECK-RV64-NEXT:  entry:2273// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.mask.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], <vscale x 16 x i32> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)2274// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> [[TMP0]]2275//2276vuint32m8_t test_vrgather_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t index, size_t vl) {2277  return __riscv_vrgather_vv_u32m8_m(mask, op1, index, vl);2278}2279 2280// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vx_u32m8_m2281// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2282// CHECK-RV64-NEXT:  entry:2283// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.mask.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)2284// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> [[TMP0]]2285//2286vuint32m8_t test_vrgather_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t index, size_t vl) {2287  return __riscv_vrgather_vx_u32m8_m(mask, op1, index, vl);2288}2289 2290// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vv_u64m1_m2291// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i64> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2292// CHECK-RV64-NEXT:  entry:2293// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], <vscale x 1 x i64> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)2294// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> [[TMP0]]2295//2296vuint64m1_t test_vrgather_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t index, size_t vl) {2297  return __riscv_vrgather_vv_u64m1_m(mask, op1, index, vl);2298}2299 2300// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vx_u64m1_m2301// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2302// CHECK-RV64-NEXT:  entry:2303// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)2304// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> [[TMP0]]2305//2306vuint64m1_t test_vrgather_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t index, size_t vl) {2307  return __riscv_vrgather_vx_u64m1_m(mask, op1, index, vl);2308}2309 2310// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vv_u64m2_m2311// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2312// CHECK-RV64-NEXT:  entry:2313// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], <vscale x 2 x i64> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)2314// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> [[TMP0]]2315//2316vuint64m2_t test_vrgather_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t index, size_t vl) {2317  return __riscv_vrgather_vv_u64m2_m(mask, op1, index, vl);2318}2319 2320// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vx_u64m2_m2321// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2322// CHECK-RV64-NEXT:  entry:2323// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)2324// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> [[TMP0]]2325//2326vuint64m2_t test_vrgather_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t index, size_t vl) {2327  return __riscv_vrgather_vx_u64m2_m(mask, op1, index, vl);2328}2329 2330// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vv_u64m4_m2331// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i64> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2332// CHECK-RV64-NEXT:  entry:2333// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], <vscale x 4 x i64> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)2334// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> [[TMP0]]2335//2336vuint64m4_t test_vrgather_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t index, size_t vl) {2337  return __riscv_vrgather_vv_u64m4_m(mask, op1, index, vl);2338}2339 2340// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vx_u64m4_m2341// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2342// CHECK-RV64-NEXT:  entry:2343// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)2344// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> [[TMP0]]2345//2346vuint64m4_t test_vrgather_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t index, size_t vl) {2347  return __riscv_vrgather_vx_u64m4_m(mask, op1, index, vl);2348}2349 2350// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vv_u64m8_m2351// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i64> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2352// CHECK-RV64-NEXT:  entry:2353// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.mask.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], <vscale x 8 x i64> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2354// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> [[TMP0]]2355//2356vuint64m8_t test_vrgather_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t index, size_t vl) {2357  return __riscv_vrgather_vv_u64m8_m(mask, op1, index, vl);2358}2359 2360// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vx_u64m8_m2361// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2362// CHECK-RV64-NEXT:  entry:2363// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.mask.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2364// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> [[TMP0]]2365//2366vuint64m8_t test_vrgather_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, size_t index, size_t vl) {2367  return __riscv_vrgather_vx_u64m8_m(mask, op1, index, vl);2368}2369 2370// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vrgather_vv_bf16mf42371// CHECK-RV64-SAME: (<vscale x 1 x bfloat> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2372// CHECK-RV64-NEXT:  entry:2373// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vv.nxv1bf16.i64(<vscale x 1 x bfloat> poison, <vscale x 1 x bfloat> [[OP1]], <vscale x 1 x i16> [[INDEX]], i64 [[VL]])2374// CHECK-RV64-NEXT:    ret <vscale x 1 x bfloat> [[TMP0]]2375//2376vbfloat16mf4_t test_vrgather_vv_bf16mf4(vbfloat16mf4_t op1, vuint16mf4_t index, size_t vl) {2377  return __riscv_vrgather_vv_bf16mf4(op1, index, vl);2378}2379 2380// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vrgather_vx_bf16mf42381// CHECK-RV64-SAME: (<vscale x 1 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2382// CHECK-RV64-NEXT:  entry:2383// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vx.nxv1bf16.i64(<vscale x 1 x bfloat> poison, <vscale x 1 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])2384// CHECK-RV64-NEXT:    ret <vscale x 1 x bfloat> [[TMP0]]2385//2386vbfloat16mf4_t test_vrgather_vx_bf16mf4(vbfloat16mf4_t op1, size_t index, size_t vl) {2387  return __riscv_vrgather_vx_bf16mf4(op1, index, vl);2388}2389 2390// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vrgather_vv_bf16mf22391// CHECK-RV64-SAME: (<vscale x 2 x bfloat> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2392// CHECK-RV64-NEXT:  entry:2393// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vv.nxv2bf16.i64(<vscale x 2 x bfloat> poison, <vscale x 2 x bfloat> [[OP1]], <vscale x 2 x i16> [[INDEX]], i64 [[VL]])2394// CHECK-RV64-NEXT:    ret <vscale x 2 x bfloat> [[TMP0]]2395//2396vbfloat16mf2_t test_vrgather_vv_bf16mf2(vbfloat16mf2_t op1, vuint16mf2_t index, size_t vl) {2397  return __riscv_vrgather_vv_bf16mf2(op1, index, vl);2398}2399 2400// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vrgather_vx_bf16mf22401// CHECK-RV64-SAME: (<vscale x 2 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2402// CHECK-RV64-NEXT:  entry:2403// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vx.nxv2bf16.i64(<vscale x 2 x bfloat> poison, <vscale x 2 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])2404// CHECK-RV64-NEXT:    ret <vscale x 2 x bfloat> [[TMP0]]2405//2406vbfloat16mf2_t test_vrgather_vx_bf16mf2(vbfloat16mf2_t op1, size_t index, size_t vl) {2407  return __riscv_vrgather_vx_bf16mf2(op1, index, vl);2408}2409 2410// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vrgather_vv_bf16m12411// CHECK-RV64-SAME: (<vscale x 4 x bfloat> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2412// CHECK-RV64-NEXT:  entry:2413// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vv.nxv4bf16.i64(<vscale x 4 x bfloat> poison, <vscale x 4 x bfloat> [[OP1]], <vscale x 4 x i16> [[INDEX]], i64 [[VL]])2414// CHECK-RV64-NEXT:    ret <vscale x 4 x bfloat> [[TMP0]]2415//2416vbfloat16m1_t test_vrgather_vv_bf16m1(vbfloat16m1_t op1, vuint16m1_t index, size_t vl) {2417  return __riscv_vrgather_vv_bf16m1(op1, index, vl);2418}2419 2420// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vrgather_vx_bf16m12421// CHECK-RV64-SAME: (<vscale x 4 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2422// CHECK-RV64-NEXT:  entry:2423// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vx.nxv4bf16.i64(<vscale x 4 x bfloat> poison, <vscale x 4 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])2424// CHECK-RV64-NEXT:    ret <vscale x 4 x bfloat> [[TMP0]]2425//2426vbfloat16m1_t test_vrgather_vx_bf16m1(vbfloat16m1_t op1, size_t index, size_t vl) {2427  return __riscv_vrgather_vx_bf16m1(op1, index, vl);2428}2429 2430// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vrgather_vv_bf16m22431// CHECK-RV64-SAME: (<vscale x 8 x bfloat> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2432// CHECK-RV64-NEXT:  entry:2433// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vv.nxv8bf16.i64(<vscale x 8 x bfloat> poison, <vscale x 8 x bfloat> [[OP1]], <vscale x 8 x i16> [[INDEX]], i64 [[VL]])2434// CHECK-RV64-NEXT:    ret <vscale x 8 x bfloat> [[TMP0]]2435//2436vbfloat16m2_t test_vrgather_vv_bf16m2(vbfloat16m2_t op1, vuint16m2_t index, size_t vl) {2437  return __riscv_vrgather_vv_bf16m2(op1, index, vl);2438}2439 2440// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vrgather_vx_bf16m22441// CHECK-RV64-SAME: (<vscale x 8 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2442// CHECK-RV64-NEXT:  entry:2443// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vx.nxv8bf16.i64(<vscale x 8 x bfloat> poison, <vscale x 8 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])2444// CHECK-RV64-NEXT:    ret <vscale x 8 x bfloat> [[TMP0]]2445//2446vbfloat16m2_t test_vrgather_vx_bf16m2(vbfloat16m2_t op1, size_t index, size_t vl) {2447  return __riscv_vrgather_vx_bf16m2(op1, index, vl);2448}2449 2450// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vrgather_vv_bf16m42451// CHECK-RV64-SAME: (<vscale x 16 x bfloat> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2452// CHECK-RV64-NEXT:  entry:2453// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vv.nxv16bf16.i64(<vscale x 16 x bfloat> poison, <vscale x 16 x bfloat> [[OP1]], <vscale x 16 x i16> [[INDEX]], i64 [[VL]])2454// CHECK-RV64-NEXT:    ret <vscale x 16 x bfloat> [[TMP0]]2455//2456vbfloat16m4_t test_vrgather_vv_bf16m4(vbfloat16m4_t op1, vuint16m4_t index, size_t vl) {2457  return __riscv_vrgather_vv_bf16m4(op1, index, vl);2458}2459 2460// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vrgather_vx_bf16m42461// CHECK-RV64-SAME: (<vscale x 16 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2462// CHECK-RV64-NEXT:  entry:2463// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vx.nxv16bf16.i64(<vscale x 16 x bfloat> poison, <vscale x 16 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])2464// CHECK-RV64-NEXT:    ret <vscale x 16 x bfloat> [[TMP0]]2465//2466vbfloat16m4_t test_vrgather_vx_bf16m4(vbfloat16m4_t op1, size_t index, size_t vl) {2467  return __riscv_vrgather_vx_bf16m4(op1, index, vl);2468}2469 2470// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vrgather_vv_bf16m82471// CHECK-RV64-SAME: (<vscale x 32 x bfloat> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2472// CHECK-RV64-NEXT:  entry:2473// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vv.nxv32bf16.i64(<vscale x 32 x bfloat> poison, <vscale x 32 x bfloat> [[OP1]], <vscale x 32 x i16> [[INDEX]], i64 [[VL]])2474// CHECK-RV64-NEXT:    ret <vscale x 32 x bfloat> [[TMP0]]2475//2476vbfloat16m8_t test_vrgather_vv_bf16m8(vbfloat16m8_t op1, vuint16m8_t index, size_t vl) {2477  return __riscv_vrgather_vv_bf16m8(op1, index, vl);2478}2479 2480// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vrgather_vx_bf16m82481// CHECK-RV64-SAME: (<vscale x 32 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2482// CHECK-RV64-NEXT:  entry:2483// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vx.nxv32bf16.i64(<vscale x 32 x bfloat> poison, <vscale x 32 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])2484// CHECK-RV64-NEXT:    ret <vscale x 32 x bfloat> [[TMP0]]2485//2486vbfloat16m8_t test_vrgather_vx_bf16m8(vbfloat16m8_t op1, size_t index, size_t vl) {2487  return __riscv_vrgather_vx_bf16m8(op1, index, vl);2488}2489 2490// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vrgather_vv_bf16mf4_m2491// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x bfloat> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2492// CHECK-RV64-NEXT:  entry:2493// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv1bf16.i64(<vscale x 1 x bfloat> poison, <vscale x 1 x bfloat> [[OP1]], <vscale x 1 x i16> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)2494// CHECK-RV64-NEXT:    ret <vscale x 1 x bfloat> [[TMP0]]2495//2496vbfloat16mf4_t test_vrgather_vv_bf16mf4_m(vbool64_t mask, vbfloat16mf4_t op1, vuint16mf4_t index, size_t vl) {2497  return __riscv_vrgather_vv_bf16mf4_m(mask, op1, index, vl);2498}2499 2500// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vrgather_vx_bf16mf4_m2501// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2502// CHECK-RV64-NEXT:  entry:2503// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv1bf16.i64(<vscale x 1 x bfloat> poison, <vscale x 1 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)2504// CHECK-RV64-NEXT:    ret <vscale x 1 x bfloat> [[TMP0]]2505//2506vbfloat16mf4_t test_vrgather_vx_bf16mf4_m(vbool64_t mask, vbfloat16mf4_t op1, size_t index, size_t vl) {2507  return __riscv_vrgather_vx_bf16mf4_m(mask, op1, index, vl);2508}2509 2510// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vrgather_vv_bf16mf2_m2511// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x bfloat> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2512// CHECK-RV64-NEXT:  entry:2513// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv2bf16.i64(<vscale x 2 x bfloat> poison, <vscale x 2 x bfloat> [[OP1]], <vscale x 2 x i16> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)2514// CHECK-RV64-NEXT:    ret <vscale x 2 x bfloat> [[TMP0]]2515//2516vbfloat16mf2_t test_vrgather_vv_bf16mf2_m(vbool32_t mask, vbfloat16mf2_t op1, vuint16mf2_t index, size_t vl) {2517  return __riscv_vrgather_vv_bf16mf2_m(mask, op1, index, vl);2518}2519 2520// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vrgather_vx_bf16mf2_m2521// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2522// CHECK-RV64-NEXT:  entry:2523// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv2bf16.i64(<vscale x 2 x bfloat> poison, <vscale x 2 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)2524// CHECK-RV64-NEXT:    ret <vscale x 2 x bfloat> [[TMP0]]2525//2526vbfloat16mf2_t test_vrgather_vx_bf16mf2_m(vbool32_t mask, vbfloat16mf2_t op1, size_t index, size_t vl) {2527  return __riscv_vrgather_vx_bf16mf2_m(mask, op1, index, vl);2528}2529 2530// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vrgather_vv_bf16m1_m2531// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x bfloat> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2532// CHECK-RV64-NEXT:  entry:2533// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv4bf16.i64(<vscale x 4 x bfloat> poison, <vscale x 4 x bfloat> [[OP1]], <vscale x 4 x i16> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)2534// CHECK-RV64-NEXT:    ret <vscale x 4 x bfloat> [[TMP0]]2535//2536vbfloat16m1_t test_vrgather_vv_bf16m1_m(vbool16_t mask, vbfloat16m1_t op1, vuint16m1_t index, size_t vl) {2537  return __riscv_vrgather_vv_bf16m1_m(mask, op1, index, vl);2538}2539 2540// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vrgather_vx_bf16m1_m2541// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2542// CHECK-RV64-NEXT:  entry:2543// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv4bf16.i64(<vscale x 4 x bfloat> poison, <vscale x 4 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)2544// CHECK-RV64-NEXT:    ret <vscale x 4 x bfloat> [[TMP0]]2545//2546vbfloat16m1_t test_vrgather_vx_bf16m1_m(vbool16_t mask, vbfloat16m1_t op1, size_t index, size_t vl) {2547  return __riscv_vrgather_vx_bf16m1_m(mask, op1, index, vl);2548}2549 2550// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vrgather_vv_bf16m2_m2551// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x bfloat> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2552// CHECK-RV64-NEXT:  entry:2553// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv8bf16.i64(<vscale x 8 x bfloat> poison, <vscale x 8 x bfloat> [[OP1]], <vscale x 8 x i16> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2554// CHECK-RV64-NEXT:    ret <vscale x 8 x bfloat> [[TMP0]]2555//2556vbfloat16m2_t test_vrgather_vv_bf16m2_m(vbool8_t mask, vbfloat16m2_t op1, vuint16m2_t index, size_t vl) {2557  return __riscv_vrgather_vv_bf16m2_m(mask, op1, index, vl);2558}2559 2560// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vrgather_vx_bf16m2_m2561// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2562// CHECK-RV64-NEXT:  entry:2563// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv8bf16.i64(<vscale x 8 x bfloat> poison, <vscale x 8 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)2564// CHECK-RV64-NEXT:    ret <vscale x 8 x bfloat> [[TMP0]]2565//2566vbfloat16m2_t test_vrgather_vx_bf16m2_m(vbool8_t mask, vbfloat16m2_t op1, size_t index, size_t vl) {2567  return __riscv_vrgather_vx_bf16m2_m(mask, op1, index, vl);2568}2569 2570// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vrgather_vv_bf16m4_m2571// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x bfloat> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2572// CHECK-RV64-NEXT:  entry:2573// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv16bf16.i64(<vscale x 16 x bfloat> poison, <vscale x 16 x bfloat> [[OP1]], <vscale x 16 x i16> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)2574// CHECK-RV64-NEXT:    ret <vscale x 16 x bfloat> [[TMP0]]2575//2576vbfloat16m4_t test_vrgather_vv_bf16m4_m(vbool4_t mask, vbfloat16m4_t op1, vuint16m4_t index, size_t vl) {2577  return __riscv_vrgather_vv_bf16m4_m(mask, op1, index, vl);2578}2579 2580// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vrgather_vx_bf16m4_m2581// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2582// CHECK-RV64-NEXT:  entry:2583// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv16bf16.i64(<vscale x 16 x bfloat> poison, <vscale x 16 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)2584// CHECK-RV64-NEXT:    ret <vscale x 16 x bfloat> [[TMP0]]2585//2586vbfloat16m4_t test_vrgather_vx_bf16m4_m(vbool4_t mask, vbfloat16m4_t op1, size_t index, size_t vl) {2587  return __riscv_vrgather_vx_bf16m4_m(mask, op1, index, vl);2588}2589 2590// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vrgather_vv_bf16m8_m2591// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x bfloat> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2592// CHECK-RV64-NEXT:  entry:2593// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv32bf16.i64(<vscale x 32 x bfloat> poison, <vscale x 32 x bfloat> [[OP1]], <vscale x 32 x i16> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)2594// CHECK-RV64-NEXT:    ret <vscale x 32 x bfloat> [[TMP0]]2595//2596vbfloat16m8_t test_vrgather_vv_bf16m8_m(vbool2_t mask, vbfloat16m8_t op1, vuint16m8_t index, size_t vl) {2597  return __riscv_vrgather_vv_bf16m8_m(mask, op1, index, vl);2598}2599 2600// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vrgather_vx_bf16m8_m2601// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {2602// CHECK-RV64-NEXT:  entry:2603// CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv32bf16.i64(<vscale x 32 x bfloat> poison, <vscale x 32 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)2604// CHECK-RV64-NEXT:    ret <vscale x 32 x bfloat> [[TMP0]]2605//2606vbfloat16m8_t test_vrgather_vx_bf16m8_m(vbool2_t mask, vbfloat16m8_t op1, size_t index, size_t vl) {2607  return __riscv_vrgather_vx_bf16m8_m(mask, op1, index, vl);2608}2609 2610