289 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \4// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \5// RUN: FileCheck --check-prefix=CHECK-RV64 %s6 7#include <riscv_vector.h>8 9// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8mf810// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {11// CHECK-RV64-NEXT: entry:12// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv1i8.p0.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])13// CHECK-RV64-NEXT: ret void14//15void test_vse8_v_i8mf8(int8_t *base, vint8mf8_t value, size_t vl) {16 return __riscv_vse8_v_i8mf8(base, value, vl);17}18 19// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8mf420// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {21// CHECK-RV64-NEXT: entry:22// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv2i8.p0.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])23// CHECK-RV64-NEXT: ret void24//25void test_vse8_v_i8mf4(int8_t *base, vint8mf4_t value, size_t vl) {26 return __riscv_vse8_v_i8mf4(base, value, vl);27}28 29// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8mf230// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {31// CHECK-RV64-NEXT: entry:32// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv4i8.p0.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])33// CHECK-RV64-NEXT: ret void34//35void test_vse8_v_i8mf2(int8_t *base, vint8mf2_t value, size_t vl) {36 return __riscv_vse8_v_i8mf2(base, value, vl);37}38 39// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8m140// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {41// CHECK-RV64-NEXT: entry:42// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv8i8.p0.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])43// CHECK-RV64-NEXT: ret void44//45void test_vse8_v_i8m1(int8_t *base, vint8m1_t value, size_t vl) {46 return __riscv_vse8_v_i8m1(base, value, vl);47}48 49// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8m250// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {51// CHECK-RV64-NEXT: entry:52// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv16i8.p0.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])53// CHECK-RV64-NEXT: ret void54//55void test_vse8_v_i8m2(int8_t *base, vint8m2_t value, size_t vl) {56 return __riscv_vse8_v_i8m2(base, value, vl);57}58 59// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8m460// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {61// CHECK-RV64-NEXT: entry:62// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv32i8.p0.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])63// CHECK-RV64-NEXT: ret void64//65void test_vse8_v_i8m4(int8_t *base, vint8m4_t value, size_t vl) {66 return __riscv_vse8_v_i8m4(base, value, vl);67}68 69// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8m870// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {71// CHECK-RV64-NEXT: entry:72// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv64i8.p0.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])73// CHECK-RV64-NEXT: ret void74//75void test_vse8_v_i8m8(int8_t *base, vint8m8_t value, size_t vl) {76 return __riscv_vse8_v_i8m8(base, value, vl);77}78 79// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8mf880// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {81// CHECK-RV64-NEXT: entry:82// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv1i8.p0.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])83// CHECK-RV64-NEXT: ret void84//85void test_vse8_v_u8mf8(uint8_t *base, vuint8mf8_t value, size_t vl) {86 return __riscv_vse8_v_u8mf8(base, value, vl);87}88 89// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8mf490// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {91// CHECK-RV64-NEXT: entry:92// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv2i8.p0.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])93// CHECK-RV64-NEXT: ret void94//95void test_vse8_v_u8mf4(uint8_t *base, vuint8mf4_t value, size_t vl) {96 return __riscv_vse8_v_u8mf4(base, value, vl);97}98 99// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8mf2100// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {101// CHECK-RV64-NEXT: entry:102// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv4i8.p0.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])103// CHECK-RV64-NEXT: ret void104//105void test_vse8_v_u8mf2(uint8_t *base, vuint8mf2_t value, size_t vl) {106 return __riscv_vse8_v_u8mf2(base, value, vl);107}108 109// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8m1110// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {111// CHECK-RV64-NEXT: entry:112// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv8i8.p0.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])113// CHECK-RV64-NEXT: ret void114//115void test_vse8_v_u8m1(uint8_t *base, vuint8m1_t value, size_t vl) {116 return __riscv_vse8_v_u8m1(base, value, vl);117}118 119// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8m2120// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {121// CHECK-RV64-NEXT: entry:122// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv16i8.p0.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])123// CHECK-RV64-NEXT: ret void124//125void test_vse8_v_u8m2(uint8_t *base, vuint8m2_t value, size_t vl) {126 return __riscv_vse8_v_u8m2(base, value, vl);127}128 129// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8m4130// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {131// CHECK-RV64-NEXT: entry:132// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv32i8.p0.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])133// CHECK-RV64-NEXT: ret void134//135void test_vse8_v_u8m4(uint8_t *base, vuint8m4_t value, size_t vl) {136 return __riscv_vse8_v_u8m4(base, value, vl);137}138 139// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8m8140// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {141// CHECK-RV64-NEXT: entry:142// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv64i8.p0.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], i64 [[VL]])143// CHECK-RV64-NEXT: ret void144//145void test_vse8_v_u8m8(uint8_t *base, vuint8m8_t value, size_t vl) {146 return __riscv_vse8_v_u8m8(base, value, vl);147}148 149// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8mf8_m150// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {151// CHECK-RV64-NEXT: entry:152// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv1i8.p0.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])153// CHECK-RV64-NEXT: ret void154//155void test_vse8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t value, size_t vl) {156 return __riscv_vse8_v_i8mf8_m(mask, base, value, vl);157}158 159// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8mf4_m160// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {161// CHECK-RV64-NEXT: entry:162// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv2i8.p0.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])163// CHECK-RV64-NEXT: ret void164//165void test_vse8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t value, size_t vl) {166 return __riscv_vse8_v_i8mf4_m(mask, base, value, vl);167}168 169// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8mf2_m170// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {171// CHECK-RV64-NEXT: entry:172// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv4i8.p0.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])173// CHECK-RV64-NEXT: ret void174//175void test_vse8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t value, size_t vl) {176 return __riscv_vse8_v_i8mf2_m(mask, base, value, vl);177}178 179// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8m1_m180// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {181// CHECK-RV64-NEXT: entry:182// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv8i8.p0.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])183// CHECK-RV64-NEXT: ret void184//185void test_vse8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t value, size_t vl) {186 return __riscv_vse8_v_i8m1_m(mask, base, value, vl);187}188 189// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8m2_m190// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {191// CHECK-RV64-NEXT: entry:192// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv16i8.p0.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])193// CHECK-RV64-NEXT: ret void194//195void test_vse8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t value, size_t vl) {196 return __riscv_vse8_v_i8m2_m(mask, base, value, vl);197}198 199// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8m4_m200// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {201// CHECK-RV64-NEXT: entry:202// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv32i8.p0.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])203// CHECK-RV64-NEXT: ret void204//205void test_vse8_v_i8m4_m(vbool2_t mask, int8_t *base, vint8m4_t value, size_t vl) {206 return __riscv_vse8_v_i8m4_m(mask, base, value, vl);207}208 209// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_i8m8_m210// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {211// CHECK-RV64-NEXT: entry:212// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv64i8.p0.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], <vscale x 64 x i1> [[MASK]], i64 [[VL]])213// CHECK-RV64-NEXT: ret void214//215void test_vse8_v_i8m8_m(vbool1_t mask, int8_t *base, vint8m8_t value, size_t vl) {216 return __riscv_vse8_v_i8m8_m(mask, base, value, vl);217}218 219// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8mf8_m220// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {221// CHECK-RV64-NEXT: entry:222// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv1i8.p0.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])223// CHECK-RV64-NEXT: ret void224//225void test_vse8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t value, size_t vl) {226 return __riscv_vse8_v_u8mf8_m(mask, base, value, vl);227}228 229// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8mf4_m230// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {231// CHECK-RV64-NEXT: entry:232// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv2i8.p0.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])233// CHECK-RV64-NEXT: ret void234//235void test_vse8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t value, size_t vl) {236 return __riscv_vse8_v_u8mf4_m(mask, base, value, vl);237}238 239// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8mf2_m240// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {241// CHECK-RV64-NEXT: entry:242// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv4i8.p0.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])243// CHECK-RV64-NEXT: ret void244//245void test_vse8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t value, size_t vl) {246 return __riscv_vse8_v_u8mf2_m(mask, base, value, vl);247}248 249// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8m1_m250// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {251// CHECK-RV64-NEXT: entry:252// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv8i8.p0.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])253// CHECK-RV64-NEXT: ret void254//255void test_vse8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t value, size_t vl) {256 return __riscv_vse8_v_u8m1_m(mask, base, value, vl);257}258 259// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8m2_m260// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {261// CHECK-RV64-NEXT: entry:262// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv16i8.p0.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])263// CHECK-RV64-NEXT: ret void264//265void test_vse8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t value, size_t vl) {266 return __riscv_vse8_v_u8m2_m(mask, base, value, vl);267}268 269// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8m4_m270// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {271// CHECK-RV64-NEXT: entry:272// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv32i8.p0.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])273// CHECK-RV64-NEXT: ret void274//275void test_vse8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t value, size_t vl) {276 return __riscv_vse8_v_u8m4_m(mask, base, value, vl);277}278 279// CHECK-RV64-LABEL: define dso_local void @test_vse8_v_u8m8_m280// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {281// CHECK-RV64-NEXT: entry:282// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv64i8.p0.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], <vscale x 64 x i1> [[MASK]], i64 [[VL]])283// CHECK-RV64-NEXT: ret void284//285void test_vse8_v_u8m8_m(vbool1_t mask, uint8_t *base, vuint8m8_t value, size_t vl) {286 return __riscv_vse8_v_u8m8_m(mask, base, value, vl);287}288 289