1190 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \4// RUN: -target-feature +zvfhmin -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16mf411// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1f16.p0.nxv1i8.i64(<vscale x 1 x half> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])14// CHECK-RV64-NEXT: ret void15//16void test_vsoxei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t value, size_t vl) {17 return __riscv_vsoxei8_v_f16mf4(base, bindex, value, vl);18}19 20// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16mf221// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {22// CHECK-RV64-NEXT: entry:23// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2f16.p0.nxv2i8.i64(<vscale x 2 x half> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])24// CHECK-RV64-NEXT: ret void25//26void test_vsoxei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t value, size_t vl) {27 return __riscv_vsoxei8_v_f16mf2(base, bindex, value, vl);28}29 30// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16m131// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {32// CHECK-RV64-NEXT: entry:33// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4f16.p0.nxv4i8.i64(<vscale x 4 x half> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])34// CHECK-RV64-NEXT: ret void35//36void test_vsoxei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t value, size_t vl) {37 return __riscv_vsoxei8_v_f16m1(base, bindex, value, vl);38}39 40// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16m241// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {42// CHECK-RV64-NEXT: entry:43// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8f16.p0.nxv8i8.i64(<vscale x 8 x half> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])44// CHECK-RV64-NEXT: ret void45//46void test_vsoxei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t value, size_t vl) {47 return __riscv_vsoxei8_v_f16m2(base, bindex, value, vl);48}49 50// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16m451// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {52// CHECK-RV64-NEXT: entry:53// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv16f16.p0.nxv16i8.i64(<vscale x 16 x half> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], i64 [[VL]])54// CHECK-RV64-NEXT: ret void55//56void test_vsoxei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t value, size_t vl) {57 return __riscv_vsoxei8_v_f16m4(base, bindex, value, vl);58}59 60// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16m861// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {62// CHECK-RV64-NEXT: entry:63// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv32f16.p0.nxv32i8.i64(<vscale x 32 x half> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], i64 [[VL]])64// CHECK-RV64-NEXT: ret void65//66void test_vsoxei8_v_f16m8(_Float16 *base, vuint8m4_t bindex, vfloat16m8_t value, size_t vl) {67 return __riscv_vsoxei8_v_f16m8(base, bindex, value, vl);68}69 70// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32mf271// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {72// CHECK-RV64-NEXT: entry:73// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1f32.p0.nxv1i8.i64(<vscale x 1 x float> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])74// CHECK-RV64-NEXT: ret void75//76void test_vsoxei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t value, size_t vl) {77 return __riscv_vsoxei8_v_f32mf2(base, bindex, value, vl);78}79 80// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32m181// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {82// CHECK-RV64-NEXT: entry:83// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2f32.p0.nxv2i8.i64(<vscale x 2 x float> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])84// CHECK-RV64-NEXT: ret void85//86void test_vsoxei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t value, size_t vl) {87 return __riscv_vsoxei8_v_f32m1(base, bindex, value, vl);88}89 90// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32m291// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {92// CHECK-RV64-NEXT: entry:93// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4f32.p0.nxv4i8.i64(<vscale x 4 x float> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])94// CHECK-RV64-NEXT: ret void95//96void test_vsoxei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t value, size_t vl) {97 return __riscv_vsoxei8_v_f32m2(base, bindex, value, vl);98}99 100// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32m4101// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {102// CHECK-RV64-NEXT: entry:103// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8f32.p0.nxv8i8.i64(<vscale x 8 x float> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])104// CHECK-RV64-NEXT: ret void105//106void test_vsoxei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t value, size_t vl) {107 return __riscv_vsoxei8_v_f32m4(base, bindex, value, vl);108}109 110// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32m8111// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {112// CHECK-RV64-NEXT: entry:113// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv16f32.p0.nxv16i8.i64(<vscale x 16 x float> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], i64 [[VL]])114// CHECK-RV64-NEXT: ret void115//116void test_vsoxei8_v_f32m8(float *base, vuint8m2_t bindex, vfloat32m8_t value, size_t vl) {117 return __riscv_vsoxei8_v_f32m8(base, bindex, value, vl);118}119 120// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f64m1121// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x double> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {122// CHECK-RV64-NEXT: entry:123// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1f64.p0.nxv1i8.i64(<vscale x 1 x double> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])124// CHECK-RV64-NEXT: ret void125//126void test_vsoxei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t value, size_t vl) {127 return __riscv_vsoxei8_v_f64m1(base, bindex, value, vl);128}129 130// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f64m2131// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x double> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {132// CHECK-RV64-NEXT: entry:133// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2f64.p0.nxv2i8.i64(<vscale x 2 x double> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])134// CHECK-RV64-NEXT: ret void135//136void test_vsoxei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t value, size_t vl) {137 return __riscv_vsoxei8_v_f64m2(base, bindex, value, vl);138}139 140// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f64m4141// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x double> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {142// CHECK-RV64-NEXT: entry:143// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4f64.p0.nxv4i8.i64(<vscale x 4 x double> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])144// CHECK-RV64-NEXT: ret void145//146void test_vsoxei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t value, size_t vl) {147 return __riscv_vsoxei8_v_f64m4(base, bindex, value, vl);148}149 150// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f64m8151// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x double> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {152// CHECK-RV64-NEXT: entry:153// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8f64.p0.nxv8i8.i64(<vscale x 8 x double> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])154// CHECK-RV64-NEXT: ret void155//156void test_vsoxei8_v_f64m8(double *base, vuint8m1_t bindex, vfloat64m8_t value, size_t vl) {157 return __riscv_vsoxei8_v_f64m8(base, bindex, value, vl);158}159 160// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8mf8161// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {162// CHECK-RV64-NEXT: entry:163// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1i8.p0.nxv1i8.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])164// CHECK-RV64-NEXT: ret void165//166void test_vsoxei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t value, size_t vl) {167 return __riscv_vsoxei8_v_i8mf8(base, bindex, value, vl);168}169 170// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8mf4171// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {172// CHECK-RV64-NEXT: entry:173// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2i8.p0.nxv2i8.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])174// CHECK-RV64-NEXT: ret void175//176void test_vsoxei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t value, size_t vl) {177 return __riscv_vsoxei8_v_i8mf4(base, bindex, value, vl);178}179 180// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8mf2181// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {182// CHECK-RV64-NEXT: entry:183// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4i8.p0.nxv4i8.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])184// CHECK-RV64-NEXT: ret void185//186void test_vsoxei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t value, size_t vl) {187 return __riscv_vsoxei8_v_i8mf2(base, bindex, value, vl);188}189 190// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8m1191// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {192// CHECK-RV64-NEXT: entry:193// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8i8.p0.nxv8i8.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])194// CHECK-RV64-NEXT: ret void195//196void test_vsoxei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t value, size_t vl) {197 return __riscv_vsoxei8_v_i8m1(base, bindex, value, vl);198}199 200// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8m2201// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {202// CHECK-RV64-NEXT: entry:203// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv16i8.p0.nxv16i8.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], i64 [[VL]])204// CHECK-RV64-NEXT: ret void205//206void test_vsoxei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t value, size_t vl) {207 return __riscv_vsoxei8_v_i8m2(base, bindex, value, vl);208}209 210// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8m4211// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {212// CHECK-RV64-NEXT: entry:213// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv32i8.p0.nxv32i8.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], i64 [[VL]])214// CHECK-RV64-NEXT: ret void215//216void test_vsoxei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t value, size_t vl) {217 return __riscv_vsoxei8_v_i8m4(base, bindex, value, vl);218}219 220// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8m8221// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 64 x i8> [[BINDEX:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {222// CHECK-RV64-NEXT: entry:223// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv64i8.p0.nxv64i8.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], <vscale x 64 x i8> [[BINDEX]], i64 [[VL]])224// CHECK-RV64-NEXT: ret void225//226void test_vsoxei8_v_i8m8(int8_t *base, vuint8m8_t bindex, vint8m8_t value, size_t vl) {227 return __riscv_vsoxei8_v_i8m8(base, bindex, value, vl);228}229 230// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16mf4231// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {232// CHECK-RV64-NEXT: entry:233// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1i16.p0.nxv1i8.i64(<vscale x 1 x i16> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])234// CHECK-RV64-NEXT: ret void235//236void test_vsoxei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t value, size_t vl) {237 return __riscv_vsoxei8_v_i16mf4(base, bindex, value, vl);238}239 240// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16mf2241// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {242// CHECK-RV64-NEXT: entry:243// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2i16.p0.nxv2i8.i64(<vscale x 2 x i16> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])244// CHECK-RV64-NEXT: ret void245//246void test_vsoxei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t value, size_t vl) {247 return __riscv_vsoxei8_v_i16mf2(base, bindex, value, vl);248}249 250// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16m1251// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {252// CHECK-RV64-NEXT: entry:253// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4i16.p0.nxv4i8.i64(<vscale x 4 x i16> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])254// CHECK-RV64-NEXT: ret void255//256void test_vsoxei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t value, size_t vl) {257 return __riscv_vsoxei8_v_i16m1(base, bindex, value, vl);258}259 260// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16m2261// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {262// CHECK-RV64-NEXT: entry:263// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8i16.p0.nxv8i8.i64(<vscale x 8 x i16> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])264// CHECK-RV64-NEXT: ret void265//266void test_vsoxei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t value, size_t vl) {267 return __riscv_vsoxei8_v_i16m2(base, bindex, value, vl);268}269 270// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16m4271// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {272// CHECK-RV64-NEXT: entry:273// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv16i16.p0.nxv16i8.i64(<vscale x 16 x i16> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], i64 [[VL]])274// CHECK-RV64-NEXT: ret void275//276void test_vsoxei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t value, size_t vl) {277 return __riscv_vsoxei8_v_i16m4(base, bindex, value, vl);278}279 280// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16m8281// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {282// CHECK-RV64-NEXT: entry:283// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv32i16.p0.nxv32i8.i64(<vscale x 32 x i16> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], i64 [[VL]])284// CHECK-RV64-NEXT: ret void285//286void test_vsoxei8_v_i16m8(int16_t *base, vuint8m4_t bindex, vint16m8_t value, size_t vl) {287 return __riscv_vsoxei8_v_i16m8(base, bindex, value, vl);288}289 290// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32mf2291// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {292// CHECK-RV64-NEXT: entry:293// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1i32.p0.nxv1i8.i64(<vscale x 1 x i32> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])294// CHECK-RV64-NEXT: ret void295//296void test_vsoxei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {297 return __riscv_vsoxei8_v_i32mf2(base, bindex, value, vl);298}299 300// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32m1301// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {302// CHECK-RV64-NEXT: entry:303// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2i32.p0.nxv2i8.i64(<vscale x 2 x i32> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])304// CHECK-RV64-NEXT: ret void305//306void test_vsoxei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {307 return __riscv_vsoxei8_v_i32m1(base, bindex, value, vl);308}309 310// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32m2311// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {312// CHECK-RV64-NEXT: entry:313// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4i32.p0.nxv4i8.i64(<vscale x 4 x i32> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])314// CHECK-RV64-NEXT: ret void315//316void test_vsoxei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {317 return __riscv_vsoxei8_v_i32m2(base, bindex, value, vl);318}319 320// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32m4321// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {322// CHECK-RV64-NEXT: entry:323// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8i32.p0.nxv8i8.i64(<vscale x 8 x i32> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])324// CHECK-RV64-NEXT: ret void325//326void test_vsoxei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {327 return __riscv_vsoxei8_v_i32m4(base, bindex, value, vl);328}329 330// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32m8331// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {332// CHECK-RV64-NEXT: entry:333// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv16i32.p0.nxv16i8.i64(<vscale x 16 x i32> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], i64 [[VL]])334// CHECK-RV64-NEXT: ret void335//336void test_vsoxei8_v_i32m8(int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {337 return __riscv_vsoxei8_v_i32m8(base, bindex, value, vl);338}339 340// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i64m1341// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {342// CHECK-RV64-NEXT: entry:343// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1i64.p0.nxv1i8.i64(<vscale x 1 x i64> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])344// CHECK-RV64-NEXT: ret void345//346void test_vsoxei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {347 return __riscv_vsoxei8_v_i64m1(base, bindex, value, vl);348}349 350// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i64m2351// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {352// CHECK-RV64-NEXT: entry:353// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2i64.p0.nxv2i8.i64(<vscale x 2 x i64> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])354// CHECK-RV64-NEXT: ret void355//356void test_vsoxei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {357 return __riscv_vsoxei8_v_i64m2(base, bindex, value, vl);358}359 360// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i64m4361// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {362// CHECK-RV64-NEXT: entry:363// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4i64.p0.nxv4i8.i64(<vscale x 4 x i64> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])364// CHECK-RV64-NEXT: ret void365//366void test_vsoxei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {367 return __riscv_vsoxei8_v_i64m4(base, bindex, value, vl);368}369 370// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i64m8371// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {372// CHECK-RV64-NEXT: entry:373// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8i64.p0.nxv8i8.i64(<vscale x 8 x i64> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])374// CHECK-RV64-NEXT: ret void375//376void test_vsoxei8_v_i64m8(int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {377 return __riscv_vsoxei8_v_i64m8(base, bindex, value, vl);378}379 380// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8mf8381// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {382// CHECK-RV64-NEXT: entry:383// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1i8.p0.nxv1i8.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])384// CHECK-RV64-NEXT: ret void385//386void test_vsoxei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t value, size_t vl) {387 return __riscv_vsoxei8_v_u8mf8(base, bindex, value, vl);388}389 390// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8mf4391// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {392// CHECK-RV64-NEXT: entry:393// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2i8.p0.nxv2i8.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])394// CHECK-RV64-NEXT: ret void395//396void test_vsoxei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t value, size_t vl) {397 return __riscv_vsoxei8_v_u8mf4(base, bindex, value, vl);398}399 400// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8mf2401// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {402// CHECK-RV64-NEXT: entry:403// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4i8.p0.nxv4i8.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])404// CHECK-RV64-NEXT: ret void405//406void test_vsoxei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t value, size_t vl) {407 return __riscv_vsoxei8_v_u8mf2(base, bindex, value, vl);408}409 410// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8m1411// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {412// CHECK-RV64-NEXT: entry:413// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8i8.p0.nxv8i8.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])414// CHECK-RV64-NEXT: ret void415//416void test_vsoxei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t value, size_t vl) {417 return __riscv_vsoxei8_v_u8m1(base, bindex, value, vl);418}419 420// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8m2421// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {422// CHECK-RV64-NEXT: entry:423// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv16i8.p0.nxv16i8.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], i64 [[VL]])424// CHECK-RV64-NEXT: ret void425//426void test_vsoxei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t value, size_t vl) {427 return __riscv_vsoxei8_v_u8m2(base, bindex, value, vl);428}429 430// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8m4431// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {432// CHECK-RV64-NEXT: entry:433// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv32i8.p0.nxv32i8.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], i64 [[VL]])434// CHECK-RV64-NEXT: ret void435//436void test_vsoxei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t value, size_t vl) {437 return __riscv_vsoxei8_v_u8m4(base, bindex, value, vl);438}439 440// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8m8441// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 64 x i8> [[BINDEX:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {442// CHECK-RV64-NEXT: entry:443// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv64i8.p0.nxv64i8.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], <vscale x 64 x i8> [[BINDEX]], i64 [[VL]])444// CHECK-RV64-NEXT: ret void445//446void test_vsoxei8_v_u8m8(uint8_t *base, vuint8m8_t bindex, vuint8m8_t value, size_t vl) {447 return __riscv_vsoxei8_v_u8m8(base, bindex, value, vl);448}449 450// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16mf4451// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {452// CHECK-RV64-NEXT: entry:453// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1i16.p0.nxv1i8.i64(<vscale x 1 x i16> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])454// CHECK-RV64-NEXT: ret void455//456void test_vsoxei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t value, size_t vl) {457 return __riscv_vsoxei8_v_u16mf4(base, bindex, value, vl);458}459 460// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16mf2461// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {462// CHECK-RV64-NEXT: entry:463// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2i16.p0.nxv2i8.i64(<vscale x 2 x i16> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])464// CHECK-RV64-NEXT: ret void465//466void test_vsoxei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t value, size_t vl) {467 return __riscv_vsoxei8_v_u16mf2(base, bindex, value, vl);468}469 470// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16m1471// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {472// CHECK-RV64-NEXT: entry:473// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4i16.p0.nxv4i8.i64(<vscale x 4 x i16> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])474// CHECK-RV64-NEXT: ret void475//476void test_vsoxei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t value, size_t vl) {477 return __riscv_vsoxei8_v_u16m1(base, bindex, value, vl);478}479 480// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16m2481// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {482// CHECK-RV64-NEXT: entry:483// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8i16.p0.nxv8i8.i64(<vscale x 8 x i16> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])484// CHECK-RV64-NEXT: ret void485//486void test_vsoxei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t value, size_t vl) {487 return __riscv_vsoxei8_v_u16m2(base, bindex, value, vl);488}489 490// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16m4491// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {492// CHECK-RV64-NEXT: entry:493// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv16i16.p0.nxv16i8.i64(<vscale x 16 x i16> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], i64 [[VL]])494// CHECK-RV64-NEXT: ret void495//496void test_vsoxei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t value, size_t vl) {497 return __riscv_vsoxei8_v_u16m4(base, bindex, value, vl);498}499 500// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16m8501// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {502// CHECK-RV64-NEXT: entry:503// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv32i16.p0.nxv32i8.i64(<vscale x 32 x i16> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], i64 [[VL]])504// CHECK-RV64-NEXT: ret void505//506void test_vsoxei8_v_u16m8(uint16_t *base, vuint8m4_t bindex, vuint16m8_t value, size_t vl) {507 return __riscv_vsoxei8_v_u16m8(base, bindex, value, vl);508}509 510// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32mf2511// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {512// CHECK-RV64-NEXT: entry:513// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1i32.p0.nxv1i8.i64(<vscale x 1 x i32> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])514// CHECK-RV64-NEXT: ret void515//516void test_vsoxei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {517 return __riscv_vsoxei8_v_u32mf2(base, bindex, value, vl);518}519 520// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32m1521// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {522// CHECK-RV64-NEXT: entry:523// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2i32.p0.nxv2i8.i64(<vscale x 2 x i32> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])524// CHECK-RV64-NEXT: ret void525//526void test_vsoxei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {527 return __riscv_vsoxei8_v_u32m1(base, bindex, value, vl);528}529 530// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32m2531// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {532// CHECK-RV64-NEXT: entry:533// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4i32.p0.nxv4i8.i64(<vscale x 4 x i32> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])534// CHECK-RV64-NEXT: ret void535//536void test_vsoxei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {537 return __riscv_vsoxei8_v_u32m2(base, bindex, value, vl);538}539 540// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32m4541// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {542// CHECK-RV64-NEXT: entry:543// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8i32.p0.nxv8i8.i64(<vscale x 8 x i32> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])544// CHECK-RV64-NEXT: ret void545//546void test_vsoxei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {547 return __riscv_vsoxei8_v_u32m4(base, bindex, value, vl);548}549 550// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32m8551// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {552// CHECK-RV64-NEXT: entry:553// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv16i32.p0.nxv16i8.i64(<vscale x 16 x i32> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], i64 [[VL]])554// CHECK-RV64-NEXT: ret void555//556void test_vsoxei8_v_u32m8(uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {557 return __riscv_vsoxei8_v_u32m8(base, bindex, value, vl);558}559 560// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u64m1561// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {562// CHECK-RV64-NEXT: entry:563// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv1i64.p0.nxv1i8.i64(<vscale x 1 x i64> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], i64 [[VL]])564// CHECK-RV64-NEXT: ret void565//566void test_vsoxei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {567 return __riscv_vsoxei8_v_u64m1(base, bindex, value, vl);568}569 570// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u64m2571// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {572// CHECK-RV64-NEXT: entry:573// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv2i64.p0.nxv2i8.i64(<vscale x 2 x i64> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], i64 [[VL]])574// CHECK-RV64-NEXT: ret void575//576void test_vsoxei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {577 return __riscv_vsoxei8_v_u64m2(base, bindex, value, vl);578}579 580// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u64m4581// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {582// CHECK-RV64-NEXT: entry:583// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv4i64.p0.nxv4i8.i64(<vscale x 4 x i64> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], i64 [[VL]])584// CHECK-RV64-NEXT: ret void585//586void test_vsoxei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {587 return __riscv_vsoxei8_v_u64m4(base, bindex, value, vl);588}589 590// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u64m8591// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {592// CHECK-RV64-NEXT: entry:593// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.nxv8i64.p0.nxv8i8.i64(<vscale x 8 x i64> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], i64 [[VL]])594// CHECK-RV64-NEXT: ret void595//596void test_vsoxei8_v_u64m8(uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {597 return __riscv_vsoxei8_v_u64m8(base, bindex, value, vl);598}599 600// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16mf4_m601// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {602// CHECK-RV64-NEXT: entry:603// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1f16.p0.nxv1i8.i64(<vscale x 1 x half> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])604// CHECK-RV64-NEXT: ret void605//606void test_vsoxei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t value, size_t vl) {607 return __riscv_vsoxei8_v_f16mf4_m(mask, base, bindex, value, vl);608}609 610// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16mf2_m611// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {612// CHECK-RV64-NEXT: entry:613// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2f16.p0.nxv2i8.i64(<vscale x 2 x half> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])614// CHECK-RV64-NEXT: ret void615//616void test_vsoxei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t value, size_t vl) {617 return __riscv_vsoxei8_v_f16mf2_m(mask, base, bindex, value, vl);618}619 620// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16m1_m621// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {622// CHECK-RV64-NEXT: entry:623// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4f16.p0.nxv4i8.i64(<vscale x 4 x half> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])624// CHECK-RV64-NEXT: ret void625//626void test_vsoxei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t value, size_t vl) {627 return __riscv_vsoxei8_v_f16m1_m(mask, base, bindex, value, vl);628}629 630// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16m2_m631// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {632// CHECK-RV64-NEXT: entry:633// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8f16.p0.nxv8i8.i64(<vscale x 8 x half> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])634// CHECK-RV64-NEXT: ret void635//636void test_vsoxei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t value, size_t vl) {637 return __riscv_vsoxei8_v_f16m2_m(mask, base, bindex, value, vl);638}639 640// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16m4_m641// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {642// CHECK-RV64-NEXT: entry:643// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv16f16.p0.nxv16i8.i64(<vscale x 16 x half> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])644// CHECK-RV64-NEXT: ret void645//646void test_vsoxei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex, vfloat16m4_t value, size_t vl) {647 return __riscv_vsoxei8_v_f16m4_m(mask, base, bindex, value, vl);648}649 650// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f16m8_m651// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x half> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {652// CHECK-RV64-NEXT: entry:653// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv32f16.p0.nxv32i8.i64(<vscale x 32 x half> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])654// CHECK-RV64-NEXT: ret void655//656void test_vsoxei8_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint8m4_t bindex, vfloat16m8_t value, size_t vl) {657 return __riscv_vsoxei8_v_f16m8_m(mask, base, bindex, value, vl);658}659 660// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32mf2_m661// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {662// CHECK-RV64-NEXT: entry:663// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1f32.p0.nxv1i8.i64(<vscale x 1 x float> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])664// CHECK-RV64-NEXT: ret void665//666void test_vsoxei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t value, size_t vl) {667 return __riscv_vsoxei8_v_f32mf2_m(mask, base, bindex, value, vl);668}669 670// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32m1_m671// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {672// CHECK-RV64-NEXT: entry:673// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2f32.p0.nxv2i8.i64(<vscale x 2 x float> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])674// CHECK-RV64-NEXT: ret void675//676void test_vsoxei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t value, size_t vl) {677 return __riscv_vsoxei8_v_f32m1_m(mask, base, bindex, value, vl);678}679 680// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32m2_m681// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {682// CHECK-RV64-NEXT: entry:683// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4f32.p0.nxv4i8.i64(<vscale x 4 x float> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])684// CHECK-RV64-NEXT: ret void685//686void test_vsoxei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t value, size_t vl) {687 return __riscv_vsoxei8_v_f32m2_m(mask, base, bindex, value, vl);688}689 690// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32m4_m691// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {692// CHECK-RV64-NEXT: entry:693// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8f32.p0.nxv8i8.i64(<vscale x 8 x float> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])694// CHECK-RV64-NEXT: ret void695//696void test_vsoxei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, vfloat32m4_t value, size_t vl) {697 return __riscv_vsoxei8_v_f32m4_m(mask, base, bindex, value, vl);698}699 700// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f32m8_m701// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x float> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {702// CHECK-RV64-NEXT: entry:703// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv16f32.p0.nxv16i8.i64(<vscale x 16 x float> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])704// CHECK-RV64-NEXT: ret void705//706void test_vsoxei8_v_f32m8_m(vbool4_t mask, float *base, vuint8m2_t bindex, vfloat32m8_t value, size_t vl) {707 return __riscv_vsoxei8_v_f32m8_m(mask, base, bindex, value, vl);708}709 710// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f64m1_m711// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x double> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {712// CHECK-RV64-NEXT: entry:713// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1f64.p0.nxv1i8.i64(<vscale x 1 x double> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])714// CHECK-RV64-NEXT: ret void715//716void test_vsoxei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t value, size_t vl) {717 return __riscv_vsoxei8_v_f64m1_m(mask, base, bindex, value, vl);718}719 720// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f64m2_m721// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x double> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {722// CHECK-RV64-NEXT: entry:723// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2f64.p0.nxv2i8.i64(<vscale x 2 x double> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])724// CHECK-RV64-NEXT: ret void725//726void test_vsoxei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t value, size_t vl) {727 return __riscv_vsoxei8_v_f64m2_m(mask, base, bindex, value, vl);728}729 730// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f64m4_m731// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x double> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {732// CHECK-RV64-NEXT: entry:733// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4f64.p0.nxv4i8.i64(<vscale x 4 x double> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])734// CHECK-RV64-NEXT: ret void735//736void test_vsoxei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex, vfloat64m4_t value, size_t vl) {737 return __riscv_vsoxei8_v_f64m4_m(mask, base, bindex, value, vl);738}739 740// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_f64m8_m741// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x double> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {742// CHECK-RV64-NEXT: entry:743// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8f64.p0.nxv8i8.i64(<vscale x 8 x double> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])744// CHECK-RV64-NEXT: ret void745//746void test_vsoxei8_v_f64m8_m(vbool8_t mask, double *base, vuint8m1_t bindex, vfloat64m8_t value, size_t vl) {747 return __riscv_vsoxei8_v_f64m8_m(mask, base, bindex, value, vl);748}749 750// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8mf8_m751// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {752// CHECK-RV64-NEXT: entry:753// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1i8.p0.nxv1i8.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])754// CHECK-RV64-NEXT: ret void755//756void test_vsoxei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t value, size_t vl) {757 return __riscv_vsoxei8_v_i8mf8_m(mask, base, bindex, value, vl);758}759 760// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8mf4_m761// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {762// CHECK-RV64-NEXT: entry:763// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2i8.p0.nxv2i8.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])764// CHECK-RV64-NEXT: ret void765//766void test_vsoxei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t value, size_t vl) {767 return __riscv_vsoxei8_v_i8mf4_m(mask, base, bindex, value, vl);768}769 770// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8mf2_m771// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {772// CHECK-RV64-NEXT: entry:773// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4i8.p0.nxv4i8.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])774// CHECK-RV64-NEXT: ret void775//776void test_vsoxei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t value, size_t vl) {777 return __riscv_vsoxei8_v_i8mf2_m(mask, base, bindex, value, vl);778}779 780// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8m1_m781// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {782// CHECK-RV64-NEXT: entry:783// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8i8.p0.nxv8i8.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])784// CHECK-RV64-NEXT: ret void785//786void test_vsoxei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t value, size_t vl) {787 return __riscv_vsoxei8_v_i8m1_m(mask, base, bindex, value, vl);788}789 790// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8m2_m791// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {792// CHECK-RV64-NEXT: entry:793// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv16i8.p0.nxv16i8.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])794// CHECK-RV64-NEXT: ret void795//796void test_vsoxei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t value, size_t vl) {797 return __riscv_vsoxei8_v_i8m2_m(mask, base, bindex, value, vl);798}799 800// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8m4_m801// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {802// CHECK-RV64-NEXT: entry:803// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv32i8.p0.nxv32i8.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])804// CHECK-RV64-NEXT: ret void805//806void test_vsoxei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, vint8m4_t value, size_t vl) {807 return __riscv_vsoxei8_v_i8m4_m(mask, base, bindex, value, vl);808}809 810// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i8m8_m811// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 64 x i8> [[BINDEX:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {812// CHECK-RV64-NEXT: entry:813// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv64i8.p0.nxv64i8.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], <vscale x 64 x i8> [[BINDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]])814// CHECK-RV64-NEXT: ret void815//816void test_vsoxei8_v_i8m8_m(vbool1_t mask, int8_t *base, vuint8m8_t bindex, vint8m8_t value, size_t vl) {817 return __riscv_vsoxei8_v_i8m8_m(mask, base, bindex, value, vl);818}819 820// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16mf4_m821// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {822// CHECK-RV64-NEXT: entry:823// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1i16.p0.nxv1i8.i64(<vscale x 1 x i16> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])824// CHECK-RV64-NEXT: ret void825//826void test_vsoxei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t value, size_t vl) {827 return __riscv_vsoxei8_v_i16mf4_m(mask, base, bindex, value, vl);828}829 830// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16mf2_m831// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {832// CHECK-RV64-NEXT: entry:833// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2i16.p0.nxv2i8.i64(<vscale x 2 x i16> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])834// CHECK-RV64-NEXT: ret void835//836void test_vsoxei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t value, size_t vl) {837 return __riscv_vsoxei8_v_i16mf2_m(mask, base, bindex, value, vl);838}839 840// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16m1_m841// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {842// CHECK-RV64-NEXT: entry:843// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4i16.p0.nxv4i8.i64(<vscale x 4 x i16> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])844// CHECK-RV64-NEXT: ret void845//846void test_vsoxei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t value, size_t vl) {847 return __riscv_vsoxei8_v_i16m1_m(mask, base, bindex, value, vl);848}849 850// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16m2_m851// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {852// CHECK-RV64-NEXT: entry:853// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8i16.p0.nxv8i8.i64(<vscale x 8 x i16> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])854// CHECK-RV64-NEXT: ret void855//856void test_vsoxei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t value, size_t vl) {857 return __riscv_vsoxei8_v_i16m2_m(mask, base, bindex, value, vl);858}859 860// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16m4_m861// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {862// CHECK-RV64-NEXT: entry:863// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv16i16.p0.nxv16i8.i64(<vscale x 16 x i16> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])864// CHECK-RV64-NEXT: ret void865//866void test_vsoxei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, vint16m4_t value, size_t vl) {867 return __riscv_vsoxei8_v_i16m4_m(mask, base, bindex, value, vl);868}869 870// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i16m8_m871// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {872// CHECK-RV64-NEXT: entry:873// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv32i16.p0.nxv32i8.i64(<vscale x 32 x i16> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])874// CHECK-RV64-NEXT: ret void875//876void test_vsoxei8_v_i16m8_m(vbool2_t mask, int16_t *base, vuint8m4_t bindex, vint16m8_t value, size_t vl) {877 return __riscv_vsoxei8_v_i16m8_m(mask, base, bindex, value, vl);878}879 880// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32mf2_m881// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {882// CHECK-RV64-NEXT: entry:883// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1i32.p0.nxv1i8.i64(<vscale x 1 x i32> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])884// CHECK-RV64-NEXT: ret void885//886void test_vsoxei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {887 return __riscv_vsoxei8_v_i32mf2_m(mask, base, bindex, value, vl);888}889 890// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32m1_m891// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {892// CHECK-RV64-NEXT: entry:893// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2i32.p0.nxv2i8.i64(<vscale x 2 x i32> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])894// CHECK-RV64-NEXT: ret void895//896void test_vsoxei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {897 return __riscv_vsoxei8_v_i32m1_m(mask, base, bindex, value, vl);898}899 900// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32m2_m901// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {902// CHECK-RV64-NEXT: entry:903// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4i32.p0.nxv4i8.i64(<vscale x 4 x i32> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])904// CHECK-RV64-NEXT: ret void905//906void test_vsoxei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {907 return __riscv_vsoxei8_v_i32m2_m(mask, base, bindex, value, vl);908}909 910// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32m4_m911// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {912// CHECK-RV64-NEXT: entry:913// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8i32.p0.nxv8i8.i64(<vscale x 8 x i32> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])914// CHECK-RV64-NEXT: ret void915//916void test_vsoxei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {917 return __riscv_vsoxei8_v_i32m4_m(mask, base, bindex, value, vl);918}919 920// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i32m8_m921// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {922// CHECK-RV64-NEXT: entry:923// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv16i32.p0.nxv16i8.i64(<vscale x 16 x i32> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])924// CHECK-RV64-NEXT: ret void925//926void test_vsoxei8_v_i32m8_m(vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {927 return __riscv_vsoxei8_v_i32m8_m(mask, base, bindex, value, vl);928}929 930// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i64m1_m931// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {932// CHECK-RV64-NEXT: entry:933// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1i64.p0.nxv1i8.i64(<vscale x 1 x i64> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])934// CHECK-RV64-NEXT: ret void935//936void test_vsoxei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {937 return __riscv_vsoxei8_v_i64m1_m(mask, base, bindex, value, vl);938}939 940// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i64m2_m941// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {942// CHECK-RV64-NEXT: entry:943// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2i64.p0.nxv2i8.i64(<vscale x 2 x i64> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])944// CHECK-RV64-NEXT: ret void945//946void test_vsoxei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {947 return __riscv_vsoxei8_v_i64m2_m(mask, base, bindex, value, vl);948}949 950// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i64m4_m951// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {952// CHECK-RV64-NEXT: entry:953// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4i64.p0.nxv4i8.i64(<vscale x 4 x i64> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])954// CHECK-RV64-NEXT: ret void955//956void test_vsoxei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {957 return __riscv_vsoxei8_v_i64m4_m(mask, base, bindex, value, vl);958}959 960// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_i64m8_m961// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {962// CHECK-RV64-NEXT: entry:963// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8i64.p0.nxv8i8.i64(<vscale x 8 x i64> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])964// CHECK-RV64-NEXT: ret void965//966void test_vsoxei8_v_i64m8_m(vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {967 return __riscv_vsoxei8_v_i64m8_m(mask, base, bindex, value, vl);968}969 970// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8mf8_m971// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {972// CHECK-RV64-NEXT: entry:973// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1i8.p0.nxv1i8.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])974// CHECK-RV64-NEXT: ret void975//976void test_vsoxei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t value, size_t vl) {977 return __riscv_vsoxei8_v_u8mf8_m(mask, base, bindex, value, vl);978}979 980// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8mf4_m981// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {982// CHECK-RV64-NEXT: entry:983// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2i8.p0.nxv2i8.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])984// CHECK-RV64-NEXT: ret void985//986void test_vsoxei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t value, size_t vl) {987 return __riscv_vsoxei8_v_u8mf4_m(mask, base, bindex, value, vl);988}989 990// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8mf2_m991// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {992// CHECK-RV64-NEXT: entry:993// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4i8.p0.nxv4i8.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])994// CHECK-RV64-NEXT: ret void995//996void test_vsoxei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t value, size_t vl) {997 return __riscv_vsoxei8_v_u8mf2_m(mask, base, bindex, value, vl);998}999 1000// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8m1_m1001// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1002// CHECK-RV64-NEXT: entry:1003// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8i8.p0.nxv8i8.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])1004// CHECK-RV64-NEXT: ret void1005//1006void test_vsoxei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t value, size_t vl) {1007 return __riscv_vsoxei8_v_u8m1_m(mask, base, bindex, value, vl);1008}1009 1010// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8m2_m1011// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1012// CHECK-RV64-NEXT: entry:1013// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv16i8.p0.nxv16i8.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])1014// CHECK-RV64-NEXT: ret void1015//1016void test_vsoxei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t value, size_t vl) {1017 return __riscv_vsoxei8_v_u8m2_m(mask, base, bindex, value, vl);1018}1019 1020// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8m4_m1021// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1022// CHECK-RV64-NEXT: entry:1023// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv32i8.p0.nxv32i8.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])1024// CHECK-RV64-NEXT: ret void1025//1026void test_vsoxei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, vuint8m4_t value, size_t vl) {1027 return __riscv_vsoxei8_v_u8m4_m(mask, base, bindex, value, vl);1028}1029 1030// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u8m8_m1031// CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 64 x i8> [[BINDEX:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1032// CHECK-RV64-NEXT: entry:1033// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv64i8.p0.nxv64i8.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], <vscale x 64 x i8> [[BINDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]])1034// CHECK-RV64-NEXT: ret void1035//1036void test_vsoxei8_v_u8m8_m(vbool1_t mask, uint8_t *base, vuint8m8_t bindex, vuint8m8_t value, size_t vl) {1037 return __riscv_vsoxei8_v_u8m8_m(mask, base, bindex, value, vl);1038}1039 1040// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16mf4_m1041// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1042// CHECK-RV64-NEXT: entry:1043// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1i16.p0.nxv1i8.i64(<vscale x 1 x i16> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])1044// CHECK-RV64-NEXT: ret void1045//1046void test_vsoxei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t value, size_t vl) {1047 return __riscv_vsoxei8_v_u16mf4_m(mask, base, bindex, value, vl);1048}1049 1050// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16mf2_m1051// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1052// CHECK-RV64-NEXT: entry:1053// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2i16.p0.nxv2i8.i64(<vscale x 2 x i16> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])1054// CHECK-RV64-NEXT: ret void1055//1056void test_vsoxei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t value, size_t vl) {1057 return __riscv_vsoxei8_v_u16mf2_m(mask, base, bindex, value, vl);1058}1059 1060// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16m1_m1061// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1062// CHECK-RV64-NEXT: entry:1063// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4i16.p0.nxv4i8.i64(<vscale x 4 x i16> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])1064// CHECK-RV64-NEXT: ret void1065//1066void test_vsoxei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t value, size_t vl) {1067 return __riscv_vsoxei8_v_u16m1_m(mask, base, bindex, value, vl);1068}1069 1070// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16m2_m1071// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1072// CHECK-RV64-NEXT: entry:1073// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8i16.p0.nxv8i8.i64(<vscale x 8 x i16> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])1074// CHECK-RV64-NEXT: ret void1075//1076void test_vsoxei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t value, size_t vl) {1077 return __riscv_vsoxei8_v_u16m2_m(mask, base, bindex, value, vl);1078}1079 1080// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16m4_m1081// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1082// CHECK-RV64-NEXT: entry:1083// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv16i16.p0.nxv16i8.i64(<vscale x 16 x i16> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])1084// CHECK-RV64-NEXT: ret void1085//1086void test_vsoxei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex, vuint16m4_t value, size_t vl) {1087 return __riscv_vsoxei8_v_u16m4_m(mask, base, bindex, value, vl);1088}1089 1090// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u16m8_m1091// CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 32 x i8> [[BINDEX:%.*]], <vscale x 32 x i16> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1092// CHECK-RV64-NEXT: entry:1093// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv32i16.p0.nxv32i8.i64(<vscale x 32 x i16> [[VALUE]], ptr [[BASE]], <vscale x 32 x i8> [[BINDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])1094// CHECK-RV64-NEXT: ret void1095//1096void test_vsoxei8_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint8m4_t bindex, vuint16m8_t value, size_t vl) {1097 return __riscv_vsoxei8_v_u16m8_m(mask, base, bindex, value, vl);1098}1099 1100// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32mf2_m1101// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1102// CHECK-RV64-NEXT: entry:1103// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1i32.p0.nxv1i8.i64(<vscale x 1 x i32> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])1104// CHECK-RV64-NEXT: ret void1105//1106void test_vsoxei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {1107 return __riscv_vsoxei8_v_u32mf2_m(mask, base, bindex, value, vl);1108}1109 1110// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32m1_m1111// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1112// CHECK-RV64-NEXT: entry:1113// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2i32.p0.nxv2i8.i64(<vscale x 2 x i32> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])1114// CHECK-RV64-NEXT: ret void1115//1116void test_vsoxei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {1117 return __riscv_vsoxei8_v_u32m1_m(mask, base, bindex, value, vl);1118}1119 1120// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32m2_m1121// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1122// CHECK-RV64-NEXT: entry:1123// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4i32.p0.nxv4i8.i64(<vscale x 4 x i32> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])1124// CHECK-RV64-NEXT: ret void1125//1126void test_vsoxei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {1127 return __riscv_vsoxei8_v_u32m2_m(mask, base, bindex, value, vl);1128}1129 1130// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32m4_m1131// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1132// CHECK-RV64-NEXT: entry:1133// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8i32.p0.nxv8i8.i64(<vscale x 8 x i32> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])1134// CHECK-RV64-NEXT: ret void1135//1136void test_vsoxei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {1137 return __riscv_vsoxei8_v_u32m4_m(mask, base, bindex, value, vl);1138}1139 1140// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u32m8_m1141// CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 16 x i8> [[BINDEX:%.*]], <vscale x 16 x i32> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1142// CHECK-RV64-NEXT: entry:1143// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv16i32.p0.nxv16i8.i64(<vscale x 16 x i32> [[VALUE]], ptr [[BASE]], <vscale x 16 x i8> [[BINDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])1144// CHECK-RV64-NEXT: ret void1145//1146void test_vsoxei8_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {1147 return __riscv_vsoxei8_v_u32m8_m(mask, base, bindex, value, vl);1148}1149 1150// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u64m1_m1151// CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 1 x i8> [[BINDEX:%.*]], <vscale x 1 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1152// CHECK-RV64-NEXT: entry:1153// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv1i64.p0.nxv1i8.i64(<vscale x 1 x i64> [[VALUE]], ptr [[BASE]], <vscale x 1 x i8> [[BINDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])1154// CHECK-RV64-NEXT: ret void1155//1156void test_vsoxei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {1157 return __riscv_vsoxei8_v_u64m1_m(mask, base, bindex, value, vl);1158}1159 1160// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u64m2_m1161// CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 2 x i8> [[BINDEX:%.*]], <vscale x 2 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1162// CHECK-RV64-NEXT: entry:1163// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv2i64.p0.nxv2i8.i64(<vscale x 2 x i64> [[VALUE]], ptr [[BASE]], <vscale x 2 x i8> [[BINDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])1164// CHECK-RV64-NEXT: ret void1165//1166void test_vsoxei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {1167 return __riscv_vsoxei8_v_u64m2_m(mask, base, bindex, value, vl);1168}1169 1170// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u64m4_m1171// CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 4 x i8> [[BINDEX:%.*]], <vscale x 4 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1172// CHECK-RV64-NEXT: entry:1173// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv4i64.p0.nxv4i8.i64(<vscale x 4 x i64> [[VALUE]], ptr [[BASE]], <vscale x 4 x i8> [[BINDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])1174// CHECK-RV64-NEXT: ret void1175//1176void test_vsoxei8_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {1177 return __riscv_vsoxei8_v_u64m4_m(mask, base, bindex, value, vl);1178}1179 1180// CHECK-RV64-LABEL: define dso_local void @test_vsoxei8_v_u64m8_m1181// CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], <vscale x 8 x i8> [[BINDEX:%.*]], <vscale x 8 x i64> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {1182// CHECK-RV64-NEXT: entry:1183// CHECK-RV64-NEXT: call void @llvm.riscv.vsoxei.mask.nxv8i64.p0.nxv8i8.i64(<vscale x 8 x i64> [[VALUE]], ptr [[BASE]], <vscale x 8 x i8> [[BINDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])1184// CHECK-RV64-NEXT: ret void1185//1186void test_vsoxei8_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {1187 return __riscv_vsoxei8_v_u64m8_m(mask, base, bindex, value, vl);1188}1189 1190