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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 32// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \4// RUN:   -target-feature +zvfhmin -disable-O0-optnone  \5// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN:   FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vundefined_f16mf4(11// CHECK-RV64-SAME: ) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT:  entry:13// CHECK-RV64-NEXT:    ret <vscale x 1 x half> poison14//15vfloat16mf4_t test_vundefined_f16mf4() { return __riscv_vundefined_f16mf4(); }16 17// CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vundefined_f16mf2(18// CHECK-RV64-SAME: ) #[[ATTR0]] {19// CHECK-RV64-NEXT:  entry:20// CHECK-RV64-NEXT:    ret <vscale x 2 x half> poison21//22vfloat16mf2_t test_vundefined_f16mf2() { return __riscv_vundefined_f16mf2(); }23 24// CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vundefined_f16m1(25// CHECK-RV64-SAME: ) #[[ATTR0]] {26// CHECK-RV64-NEXT:  entry:27// CHECK-RV64-NEXT:    ret <vscale x 4 x half> poison28//29vfloat16m1_t test_vundefined_f16m1() { return __riscv_vundefined_f16m1(); }30 31// CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vundefined_f16m2(32// CHECK-RV64-SAME: ) #[[ATTR0]] {33// CHECK-RV64-NEXT:  entry:34// CHECK-RV64-NEXT:    ret <vscale x 8 x half> poison35//36vfloat16m2_t test_vundefined_f16m2() { return __riscv_vundefined_f16m2(); }37 38// CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vundefined_f16m4(39// CHECK-RV64-SAME: ) #[[ATTR0]] {40// CHECK-RV64-NEXT:  entry:41// CHECK-RV64-NEXT:    ret <vscale x 16 x half> poison42//43vfloat16m4_t test_vundefined_f16m4() { return __riscv_vundefined_f16m4(); }44 45// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vundefined_f16m8(46// CHECK-RV64-SAME: ) #[[ATTR0]] {47// CHECK-RV64-NEXT:  entry:48// CHECK-RV64-NEXT:    ret <vscale x 32 x half> poison49//50vfloat16m8_t test_vundefined_f16m8() { return __riscv_vundefined_f16m8(); }51 52// CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vundefined_f32mf2(53// CHECK-RV64-SAME: ) #[[ATTR0]] {54// CHECK-RV64-NEXT:  entry:55// CHECK-RV64-NEXT:    ret <vscale x 1 x float> poison56//57vfloat32mf2_t test_vundefined_f32mf2() { return __riscv_vundefined_f32mf2(); }58 59// CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vundefined_f32m1(60// CHECK-RV64-SAME: ) #[[ATTR0]] {61// CHECK-RV64-NEXT:  entry:62// CHECK-RV64-NEXT:    ret <vscale x 2 x float> poison63//64vfloat32m1_t test_vundefined_f32m1() { return __riscv_vundefined_f32m1(); }65 66// CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vundefined_f32m2(67// CHECK-RV64-SAME: ) #[[ATTR0]] {68// CHECK-RV64-NEXT:  entry:69// CHECK-RV64-NEXT:    ret <vscale x 4 x float> poison70//71vfloat32m2_t test_vundefined_f32m2() { return __riscv_vundefined_f32m2(); }72 73// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vundefined_f32m4(74// CHECK-RV64-SAME: ) #[[ATTR0]] {75// CHECK-RV64-NEXT:  entry:76// CHECK-RV64-NEXT:    ret <vscale x 8 x float> poison77//78vfloat32m4_t test_vundefined_f32m4() { return __riscv_vundefined_f32m4(); }79 80// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vundefined_f32m8(81// CHECK-RV64-SAME: ) #[[ATTR0]] {82// CHECK-RV64-NEXT:  entry:83// CHECK-RV64-NEXT:    ret <vscale x 16 x float> poison84//85vfloat32m8_t test_vundefined_f32m8() { return __riscv_vundefined_f32m8(); }86 87// CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vundefined_f64m1(88// CHECK-RV64-SAME: ) #[[ATTR0]] {89// CHECK-RV64-NEXT:  entry:90// CHECK-RV64-NEXT:    ret <vscale x 1 x double> poison91//92vfloat64m1_t test_vundefined_f64m1() { return __riscv_vundefined_f64m1(); }93 94// CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vundefined_f64m2(95// CHECK-RV64-SAME: ) #[[ATTR0]] {96// CHECK-RV64-NEXT:  entry:97// CHECK-RV64-NEXT:    ret <vscale x 2 x double> poison98//99vfloat64m2_t test_vundefined_f64m2() { return __riscv_vundefined_f64m2(); }100 101// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vundefined_f64m4(102// CHECK-RV64-SAME: ) #[[ATTR0]] {103// CHECK-RV64-NEXT:  entry:104// CHECK-RV64-NEXT:    ret <vscale x 4 x double> poison105//106vfloat64m4_t test_vundefined_f64m4() { return __riscv_vundefined_f64m4(); }107 108// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vundefined_f64m8(109// CHECK-RV64-SAME: ) #[[ATTR0]] {110// CHECK-RV64-NEXT:  entry:111// CHECK-RV64-NEXT:    ret <vscale x 8 x double> poison112//113vfloat64m8_t test_vundefined_f64m8() { return __riscv_vundefined_f64m8(); }114 115// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vundefined_i8mf8(116// CHECK-RV64-SAME: ) #[[ATTR0]] {117// CHECK-RV64-NEXT:  entry:118// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> poison119//120vint8mf8_t test_vundefined_i8mf8() { return __riscv_vundefined_i8mf8(); }121 122// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vundefined_i8mf4(123// CHECK-RV64-SAME: ) #[[ATTR0]] {124// CHECK-RV64-NEXT:  entry:125// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> poison126//127vint8mf4_t test_vundefined_i8mf4() { return __riscv_vundefined_i8mf4(); }128 129// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vundefined_i8mf2(130// CHECK-RV64-SAME: ) #[[ATTR0]] {131// CHECK-RV64-NEXT:  entry:132// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> poison133//134vint8mf2_t test_vundefined_i8mf2() { return __riscv_vundefined_i8mf2(); }135 136// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vundefined_i8m1(137// CHECK-RV64-SAME: ) #[[ATTR0]] {138// CHECK-RV64-NEXT:  entry:139// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> poison140//141vint8m1_t test_vundefined_i8m1() { return __riscv_vundefined_i8m1(); }142 143// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vundefined_i8m2(144// CHECK-RV64-SAME: ) #[[ATTR0]] {145// CHECK-RV64-NEXT:  entry:146// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> poison147//148vint8m2_t test_vundefined_i8m2() { return __riscv_vundefined_i8m2(); }149 150// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vundefined_i8m4(151// CHECK-RV64-SAME: ) #[[ATTR0]] {152// CHECK-RV64-NEXT:  entry:153// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> poison154//155vint8m4_t test_vundefined_i8m4() { return __riscv_vundefined_i8m4(); }156 157// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vundefined_i8m8(158// CHECK-RV64-SAME: ) #[[ATTR0]] {159// CHECK-RV64-NEXT:  entry:160// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> poison161//162vint8m8_t test_vundefined_i8m8() { return __riscv_vundefined_i8m8(); }163 164// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vundefined_i16mf4(165// CHECK-RV64-SAME: ) #[[ATTR0]] {166// CHECK-RV64-NEXT:  entry:167// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> poison168//169vint16mf4_t test_vundefined_i16mf4() { return __riscv_vundefined_i16mf4(); }170 171// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vundefined_i16mf2(172// CHECK-RV64-SAME: ) #[[ATTR0]] {173// CHECK-RV64-NEXT:  entry:174// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> poison175//176vint16mf2_t test_vundefined_i16mf2() { return __riscv_vundefined_i16mf2(); }177 178// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vundefined_i16m1(179// CHECK-RV64-SAME: ) #[[ATTR0]] {180// CHECK-RV64-NEXT:  entry:181// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> poison182//183vint16m1_t test_vundefined_i16m1() { return __riscv_vundefined_i16m1(); }184 185// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vundefined_i16m2(186// CHECK-RV64-SAME: ) #[[ATTR0]] {187// CHECK-RV64-NEXT:  entry:188// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> poison189//190vint16m2_t test_vundefined_i16m2() { return __riscv_vundefined_i16m2(); }191 192// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vundefined_i16m4(193// CHECK-RV64-SAME: ) #[[ATTR0]] {194// CHECK-RV64-NEXT:  entry:195// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> poison196//197vint16m4_t test_vundefined_i16m4() { return __riscv_vundefined_i16m4(); }198 199// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vundefined_i16m8(200// CHECK-RV64-SAME: ) #[[ATTR0]] {201// CHECK-RV64-NEXT:  entry:202// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> poison203//204vint16m8_t test_vundefined_i16m8() { return __riscv_vundefined_i16m8(); }205 206// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vundefined_i32mf2(207// CHECK-RV64-SAME: ) #[[ATTR0]] {208// CHECK-RV64-NEXT:  entry:209// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> poison210//211vint32mf2_t test_vundefined_i32mf2() { return __riscv_vundefined_i32mf2(); }212 213// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vundefined_i32m1(214// CHECK-RV64-SAME: ) #[[ATTR0]] {215// CHECK-RV64-NEXT:  entry:216// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> poison217//218vint32m1_t test_vundefined_i32m1() { return __riscv_vundefined_i32m1(); }219 220// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vundefined_i32m2(221// CHECK-RV64-SAME: ) #[[ATTR0]] {222// CHECK-RV64-NEXT:  entry:223// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> poison224//225vint32m2_t test_vundefined_i32m2() { return __riscv_vundefined_i32m2(); }226 227// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vundefined_i32m4(228// CHECK-RV64-SAME: ) #[[ATTR0]] {229// CHECK-RV64-NEXT:  entry:230// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> poison231//232vint32m4_t test_vundefined_i32m4() { return __riscv_vundefined_i32m4(); }233 234// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vundefined_i32m8(235// CHECK-RV64-SAME: ) #[[ATTR0]] {236// CHECK-RV64-NEXT:  entry:237// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> poison238//239vint32m8_t test_vundefined_i32m8() { return __riscv_vundefined_i32m8(); }240 241// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vundefined_i64m1(242// CHECK-RV64-SAME: ) #[[ATTR0]] {243// CHECK-RV64-NEXT:  entry:244// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> poison245//246vint64m1_t test_vundefined_i64m1() { return __riscv_vundefined_i64m1(); }247 248// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vundefined_i64m2(249// CHECK-RV64-SAME: ) #[[ATTR0]] {250// CHECK-RV64-NEXT:  entry:251// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> poison252//253vint64m2_t test_vundefined_i64m2() { return __riscv_vundefined_i64m2(); }254 255// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vundefined_i64m4(256// CHECK-RV64-SAME: ) #[[ATTR0]] {257// CHECK-RV64-NEXT:  entry:258// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> poison259//260vint64m4_t test_vundefined_i64m4() { return __riscv_vundefined_i64m4(); }261 262// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vundefined_i64m8(263// CHECK-RV64-SAME: ) #[[ATTR0]] {264// CHECK-RV64-NEXT:  entry:265// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> poison266//267vint64m8_t test_vundefined_i64m8() { return __riscv_vundefined_i64m8(); }268 269// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vundefined_u8mf8(270// CHECK-RV64-SAME: ) #[[ATTR0]] {271// CHECK-RV64-NEXT:  entry:272// CHECK-RV64-NEXT:    ret <vscale x 1 x i8> poison273//274vuint8mf8_t test_vundefined_u8mf8() { return __riscv_vundefined_u8mf8(); }275 276// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vundefined_u8mf4(277// CHECK-RV64-SAME: ) #[[ATTR0]] {278// CHECK-RV64-NEXT:  entry:279// CHECK-RV64-NEXT:    ret <vscale x 2 x i8> poison280//281vuint8mf4_t test_vundefined_u8mf4() { return __riscv_vundefined_u8mf4(); }282 283// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vundefined_u8mf2(284// CHECK-RV64-SAME: ) #[[ATTR0]] {285// CHECK-RV64-NEXT:  entry:286// CHECK-RV64-NEXT:    ret <vscale x 4 x i8> poison287//288vuint8mf2_t test_vundefined_u8mf2() { return __riscv_vundefined_u8mf2(); }289 290// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vundefined_u8m1(291// CHECK-RV64-SAME: ) #[[ATTR0]] {292// CHECK-RV64-NEXT:  entry:293// CHECK-RV64-NEXT:    ret <vscale x 8 x i8> poison294//295vuint8m1_t test_vundefined_u8m1() { return __riscv_vundefined_u8m1(); }296 297// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vundefined_u8m2(298// CHECK-RV64-SAME: ) #[[ATTR0]] {299// CHECK-RV64-NEXT:  entry:300// CHECK-RV64-NEXT:    ret <vscale x 16 x i8> poison301//302vuint8m2_t test_vundefined_u8m2() { return __riscv_vundefined_u8m2(); }303 304// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vundefined_u8m4(305// CHECK-RV64-SAME: ) #[[ATTR0]] {306// CHECK-RV64-NEXT:  entry:307// CHECK-RV64-NEXT:    ret <vscale x 32 x i8> poison308//309vuint8m4_t test_vundefined_u8m4() { return __riscv_vundefined_u8m4(); }310 311// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vundefined_u8m8(312// CHECK-RV64-SAME: ) #[[ATTR0]] {313// CHECK-RV64-NEXT:  entry:314// CHECK-RV64-NEXT:    ret <vscale x 64 x i8> poison315//316vuint8m8_t test_vundefined_u8m8() { return __riscv_vundefined_u8m8(); }317 318// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vundefined_u16mf4(319// CHECK-RV64-SAME: ) #[[ATTR0]] {320// CHECK-RV64-NEXT:  entry:321// CHECK-RV64-NEXT:    ret <vscale x 1 x i16> poison322//323vuint16mf4_t test_vundefined_u16mf4() { return __riscv_vundefined_u16mf4(); }324 325// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vundefined_u16mf2(326// CHECK-RV64-SAME: ) #[[ATTR0]] {327// CHECK-RV64-NEXT:  entry:328// CHECK-RV64-NEXT:    ret <vscale x 2 x i16> poison329//330vuint16mf2_t test_vundefined_u16mf2() { return __riscv_vundefined_u16mf2(); }331 332// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vundefined_u16m1(333// CHECK-RV64-SAME: ) #[[ATTR0]] {334// CHECK-RV64-NEXT:  entry:335// CHECK-RV64-NEXT:    ret <vscale x 4 x i16> poison336//337vuint16m1_t test_vundefined_u16m1() { return __riscv_vundefined_u16m1(); }338 339// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vundefined_u16m2(340// CHECK-RV64-SAME: ) #[[ATTR0]] {341// CHECK-RV64-NEXT:  entry:342// CHECK-RV64-NEXT:    ret <vscale x 8 x i16> poison343//344vuint16m2_t test_vundefined_u16m2() { return __riscv_vundefined_u16m2(); }345 346// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vundefined_u16m4(347// CHECK-RV64-SAME: ) #[[ATTR0]] {348// CHECK-RV64-NEXT:  entry:349// CHECK-RV64-NEXT:    ret <vscale x 16 x i16> poison350//351vuint16m4_t test_vundefined_u16m4() { return __riscv_vundefined_u16m4(); }352 353// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vundefined_u16m8(354// CHECK-RV64-SAME: ) #[[ATTR0]] {355// CHECK-RV64-NEXT:  entry:356// CHECK-RV64-NEXT:    ret <vscale x 32 x i16> poison357//358vuint16m8_t test_vundefined_u16m8() { return __riscv_vundefined_u16m8(); }359 360// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vundefined_u32mf2(361// CHECK-RV64-SAME: ) #[[ATTR0]] {362// CHECK-RV64-NEXT:  entry:363// CHECK-RV64-NEXT:    ret <vscale x 1 x i32> poison364//365vuint32mf2_t test_vundefined_u32mf2() { return __riscv_vundefined_u32mf2(); }366 367// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vundefined_u32m1(368// CHECK-RV64-SAME: ) #[[ATTR0]] {369// CHECK-RV64-NEXT:  entry:370// CHECK-RV64-NEXT:    ret <vscale x 2 x i32> poison371//372vuint32m1_t test_vundefined_u32m1() { return __riscv_vundefined_u32m1(); }373 374// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vundefined_u32m2(375// CHECK-RV64-SAME: ) #[[ATTR0]] {376// CHECK-RV64-NEXT:  entry:377// CHECK-RV64-NEXT:    ret <vscale x 4 x i32> poison378//379vuint32m2_t test_vundefined_u32m2() { return __riscv_vundefined_u32m2(); }380 381// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vundefined_u32m4(382// CHECK-RV64-SAME: ) #[[ATTR0]] {383// CHECK-RV64-NEXT:  entry:384// CHECK-RV64-NEXT:    ret <vscale x 8 x i32> poison385//386vuint32m4_t test_vundefined_u32m4() { return __riscv_vundefined_u32m4(); }387 388// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vundefined_u32m8(389// CHECK-RV64-SAME: ) #[[ATTR0]] {390// CHECK-RV64-NEXT:  entry:391// CHECK-RV64-NEXT:    ret <vscale x 16 x i32> poison392//393vuint32m8_t test_vundefined_u32m8() { return __riscv_vundefined_u32m8(); }394 395// CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vundefined_u64m1(396// CHECK-RV64-SAME: ) #[[ATTR0]] {397// CHECK-RV64-NEXT:  entry:398// CHECK-RV64-NEXT:    ret <vscale x 1 x i64> poison399//400vuint64m1_t test_vundefined_u64m1() { return __riscv_vundefined_u64m1(); }401 402// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vundefined_u64m2(403// CHECK-RV64-SAME: ) #[[ATTR0]] {404// CHECK-RV64-NEXT:  entry:405// CHECK-RV64-NEXT:    ret <vscale x 2 x i64> poison406//407vuint64m2_t test_vundefined_u64m2() { return __riscv_vundefined_u64m2(); }408 409// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vundefined_u64m4(410// CHECK-RV64-SAME: ) #[[ATTR0]] {411// CHECK-RV64-NEXT:  entry:412// CHECK-RV64-NEXT:    ret <vscale x 4 x i64> poison413//414vuint64m4_t test_vundefined_u64m4() { return __riscv_vundefined_u64m4(); }415 416// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vundefined_u64m8(417// CHECK-RV64-SAME: ) #[[ATTR0]] {418// CHECK-RV64-NEXT:  entry:419// CHECK-RV64-NEXT:    ret <vscale x 8 x i64> poison420//421vuint64m8_t test_vundefined_u64m8() { return __riscv_vundefined_u64m8(); }422 423// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vundefined_f16mf4x2(424// CHECK-RV64-SAME: ) #[[ATTR0]] {425// CHECK-RV64-NEXT:  entry:426// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison427//428vfloat16mf4x2_t test_vundefined_f16mf4x2() {429  return __riscv_vundefined_f16mf4x2();430}431 432// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vundefined_f16mf4x3(433// CHECK-RV64-SAME: ) #[[ATTR0]] {434// CHECK-RV64-NEXT:  entry:435// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison436//437vfloat16mf4x3_t test_vundefined_f16mf4x3() {438  return __riscv_vundefined_f16mf4x3();439}440 441// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vundefined_f16mf4x4(442// CHECK-RV64-SAME: ) #[[ATTR0]] {443// CHECK-RV64-NEXT:  entry:444// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison445//446vfloat16mf4x4_t test_vundefined_f16mf4x4() {447  return __riscv_vundefined_f16mf4x4();448}449 450// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vundefined_f16mf4x5(451// CHECK-RV64-SAME: ) #[[ATTR0]] {452// CHECK-RV64-NEXT:  entry:453// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison454//455vfloat16mf4x5_t test_vundefined_f16mf4x5() {456  return __riscv_vundefined_f16mf4x5();457}458 459// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vundefined_f16mf4x6(460// CHECK-RV64-SAME: ) #[[ATTR0]] {461// CHECK-RV64-NEXT:  entry:462// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison463//464vfloat16mf4x6_t test_vundefined_f16mf4x6() {465  return __riscv_vundefined_f16mf4x6();466}467 468// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vundefined_f16mf4x7(469// CHECK-RV64-SAME: ) #[[ATTR0]] {470// CHECK-RV64-NEXT:  entry:471// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison472//473vfloat16mf4x7_t test_vundefined_f16mf4x7() {474  return __riscv_vundefined_f16mf4x7();475}476 477// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vundefined_f16mf4x8(478// CHECK-RV64-SAME: ) #[[ATTR0]] {479// CHECK-RV64-NEXT:  entry:480// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison481//482vfloat16mf4x8_t test_vundefined_f16mf4x8() {483  return __riscv_vundefined_f16mf4x8();484}485 486// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vundefined_f16mf2x2(487// CHECK-RV64-SAME: ) #[[ATTR0]] {488// CHECK-RV64-NEXT:  entry:489// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison490//491vfloat16mf2x2_t test_vundefined_f16mf2x2() {492  return __riscv_vundefined_f16mf2x2();493}494 495// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vundefined_f16mf2x3(496// CHECK-RV64-SAME: ) #[[ATTR0]] {497// CHECK-RV64-NEXT:  entry:498// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison499//500vfloat16mf2x3_t test_vundefined_f16mf2x3() {501  return __riscv_vundefined_f16mf2x3();502}503 504// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vundefined_f16mf2x4(505// CHECK-RV64-SAME: ) #[[ATTR0]] {506// CHECK-RV64-NEXT:  entry:507// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison508//509vfloat16mf2x4_t test_vundefined_f16mf2x4() {510  return __riscv_vundefined_f16mf2x4();511}512 513// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vundefined_f16mf2x5(514// CHECK-RV64-SAME: ) #[[ATTR0]] {515// CHECK-RV64-NEXT:  entry:516// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison517//518vfloat16mf2x5_t test_vundefined_f16mf2x5() {519  return __riscv_vundefined_f16mf2x5();520}521 522// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vundefined_f16mf2x6(523// CHECK-RV64-SAME: ) #[[ATTR0]] {524// CHECK-RV64-NEXT:  entry:525// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison526//527vfloat16mf2x6_t test_vundefined_f16mf2x6() {528  return __riscv_vundefined_f16mf2x6();529}530 531// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vundefined_f16mf2x7(532// CHECK-RV64-SAME: ) #[[ATTR0]] {533// CHECK-RV64-NEXT:  entry:534// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison535//536vfloat16mf2x7_t test_vundefined_f16mf2x7() {537  return __riscv_vundefined_f16mf2x7();538}539 540// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vundefined_f16mf2x8(541// CHECK-RV64-SAME: ) #[[ATTR0]] {542// CHECK-RV64-NEXT:  entry:543// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison544//545vfloat16mf2x8_t test_vundefined_f16mf2x8() {546  return __riscv_vundefined_f16mf2x8();547}548 549// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_f16m1x2(550// CHECK-RV64-SAME: ) #[[ATTR0]] {551// CHECK-RV64-NEXT:  entry:552// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison553//554vfloat16m1x2_t test_vundefined_f16m1x2() {555  return __riscv_vundefined_f16m1x2();556}557 558// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_f16m1x3(559// CHECK-RV64-SAME: ) #[[ATTR0]] {560// CHECK-RV64-NEXT:  entry:561// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison562//563vfloat16m1x3_t test_vundefined_f16m1x3() {564  return __riscv_vundefined_f16m1x3();565}566 567// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_f16m1x4(568// CHECK-RV64-SAME: ) #[[ATTR0]] {569// CHECK-RV64-NEXT:  entry:570// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison571//572vfloat16m1x4_t test_vundefined_f16m1x4() {573  return __riscv_vundefined_f16m1x4();574}575 576// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_f16m1x5(577// CHECK-RV64-SAME: ) #[[ATTR0]] {578// CHECK-RV64-NEXT:  entry:579// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison580//581vfloat16m1x5_t test_vundefined_f16m1x5() {582  return __riscv_vundefined_f16m1x5();583}584 585// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_f16m1x6(586// CHECK-RV64-SAME: ) #[[ATTR0]] {587// CHECK-RV64-NEXT:  entry:588// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison589//590vfloat16m1x6_t test_vundefined_f16m1x6() {591  return __riscv_vundefined_f16m1x6();592}593 594// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_f16m1x7(595// CHECK-RV64-SAME: ) #[[ATTR0]] {596// CHECK-RV64-NEXT:  entry:597// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison598//599vfloat16m1x7_t test_vundefined_f16m1x7() {600  return __riscv_vundefined_f16m1x7();601}602 603// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_f16m1x8(604// CHECK-RV64-SAME: ) #[[ATTR0]] {605// CHECK-RV64-NEXT:  entry:606// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison607//608vfloat16m1x8_t test_vundefined_f16m1x8() {609  return __riscv_vundefined_f16m1x8();610}611 612// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_f16m2x2(613// CHECK-RV64-SAME: ) #[[ATTR0]] {614// CHECK-RV64-NEXT:  entry:615// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison616//617vfloat16m2x2_t test_vundefined_f16m2x2() {618  return __riscv_vundefined_f16m2x2();619}620 621// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_f16m2x3(622// CHECK-RV64-SAME: ) #[[ATTR0]] {623// CHECK-RV64-NEXT:  entry:624// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison625//626vfloat16m2x3_t test_vundefined_f16m2x3() {627  return __riscv_vundefined_f16m2x3();628}629 630// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_f16m2x4(631// CHECK-RV64-SAME: ) #[[ATTR0]] {632// CHECK-RV64-NEXT:  entry:633// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison634//635vfloat16m2x4_t test_vundefined_f16m2x4() {636  return __riscv_vundefined_f16m2x4();637}638 639// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_f16m4x2(640// CHECK-RV64-SAME: ) #[[ATTR0]] {641// CHECK-RV64-NEXT:  entry:642// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison643//644vfloat16m4x2_t test_vundefined_f16m4x2() {645  return __riscv_vundefined_f16m4x2();646}647 648// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vundefined_f32mf2x2(649// CHECK-RV64-SAME: ) #[[ATTR0]] {650// CHECK-RV64-NEXT:  entry:651// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison652//653vfloat32mf2x2_t test_vundefined_f32mf2x2() {654  return __riscv_vundefined_f32mf2x2();655}656 657// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vundefined_f32mf2x3(658// CHECK-RV64-SAME: ) #[[ATTR0]] {659// CHECK-RV64-NEXT:  entry:660// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison661//662vfloat32mf2x3_t test_vundefined_f32mf2x3() {663  return __riscv_vundefined_f32mf2x3();664}665 666// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vundefined_f32mf2x4(667// CHECK-RV64-SAME: ) #[[ATTR0]] {668// CHECK-RV64-NEXT:  entry:669// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison670//671vfloat32mf2x4_t test_vundefined_f32mf2x4() {672  return __riscv_vundefined_f32mf2x4();673}674 675// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vundefined_f32mf2x5(676// CHECK-RV64-SAME: ) #[[ATTR0]] {677// CHECK-RV64-NEXT:  entry:678// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison679//680vfloat32mf2x5_t test_vundefined_f32mf2x5() {681  return __riscv_vundefined_f32mf2x5();682}683 684// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vundefined_f32mf2x6(685// CHECK-RV64-SAME: ) #[[ATTR0]] {686// CHECK-RV64-NEXT:  entry:687// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison688//689vfloat32mf2x6_t test_vundefined_f32mf2x6() {690  return __riscv_vundefined_f32mf2x6();691}692 693// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vundefined_f32mf2x7(694// CHECK-RV64-SAME: ) #[[ATTR0]] {695// CHECK-RV64-NEXT:  entry:696// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison697//698vfloat32mf2x7_t test_vundefined_f32mf2x7() {699  return __riscv_vundefined_f32mf2x7();700}701 702// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vundefined_f32mf2x8(703// CHECK-RV64-SAME: ) #[[ATTR0]] {704// CHECK-RV64-NEXT:  entry:705// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison706//707vfloat32mf2x8_t test_vundefined_f32mf2x8() {708  return __riscv_vundefined_f32mf2x8();709}710 711// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_f32m1x2(712// CHECK-RV64-SAME: ) #[[ATTR0]] {713// CHECK-RV64-NEXT:  entry:714// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison715//716vfloat32m1x2_t test_vundefined_f32m1x2() {717  return __riscv_vundefined_f32m1x2();718}719 720// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_f32m1x3(721// CHECK-RV64-SAME: ) #[[ATTR0]] {722// CHECK-RV64-NEXT:  entry:723// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison724//725vfloat32m1x3_t test_vundefined_f32m1x3() {726  return __riscv_vundefined_f32m1x3();727}728 729// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_f32m1x4(730// CHECK-RV64-SAME: ) #[[ATTR0]] {731// CHECK-RV64-NEXT:  entry:732// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison733//734vfloat32m1x4_t test_vundefined_f32m1x4() {735  return __riscv_vundefined_f32m1x4();736}737 738// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_f32m1x5(739// CHECK-RV64-SAME: ) #[[ATTR0]] {740// CHECK-RV64-NEXT:  entry:741// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison742//743vfloat32m1x5_t test_vundefined_f32m1x5() {744  return __riscv_vundefined_f32m1x5();745}746 747// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_f32m1x6(748// CHECK-RV64-SAME: ) #[[ATTR0]] {749// CHECK-RV64-NEXT:  entry:750// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison751//752vfloat32m1x6_t test_vundefined_f32m1x6() {753  return __riscv_vundefined_f32m1x6();754}755 756// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_f32m1x7(757// CHECK-RV64-SAME: ) #[[ATTR0]] {758// CHECK-RV64-NEXT:  entry:759// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison760//761vfloat32m1x7_t test_vundefined_f32m1x7() {762  return __riscv_vundefined_f32m1x7();763}764 765// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_f32m1x8(766// CHECK-RV64-SAME: ) #[[ATTR0]] {767// CHECK-RV64-NEXT:  entry:768// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison769//770vfloat32m1x8_t test_vundefined_f32m1x8() {771  return __riscv_vundefined_f32m1x8();772}773 774// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_f32m2x2(775// CHECK-RV64-SAME: ) #[[ATTR0]] {776// CHECK-RV64-NEXT:  entry:777// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison778//779vfloat32m2x2_t test_vundefined_f32m2x2() {780  return __riscv_vundefined_f32m2x2();781}782 783// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_f32m2x3(784// CHECK-RV64-SAME: ) #[[ATTR0]] {785// CHECK-RV64-NEXT:  entry:786// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison787//788vfloat32m2x3_t test_vundefined_f32m2x3() {789  return __riscv_vundefined_f32m2x3();790}791 792// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_f32m2x4(793// CHECK-RV64-SAME: ) #[[ATTR0]] {794// CHECK-RV64-NEXT:  entry:795// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison796//797vfloat32m2x4_t test_vundefined_f32m2x4() {798  return __riscv_vundefined_f32m2x4();799}800 801// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_f32m4x2(802// CHECK-RV64-SAME: ) #[[ATTR0]] {803// CHECK-RV64-NEXT:  entry:804// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison805//806vfloat32m4x2_t test_vundefined_f32m4x2() {807  return __riscv_vundefined_f32m4x2();808}809 810// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_f64m1x2(811// CHECK-RV64-SAME: ) #[[ATTR0]] {812// CHECK-RV64-NEXT:  entry:813// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison814//815vfloat64m1x2_t test_vundefined_f64m1x2() {816  return __riscv_vundefined_f64m1x2();817}818 819// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_f64m1x3(820// CHECK-RV64-SAME: ) #[[ATTR0]] {821// CHECK-RV64-NEXT:  entry:822// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison823//824vfloat64m1x3_t test_vundefined_f64m1x3() {825  return __riscv_vundefined_f64m1x3();826}827 828// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_f64m1x4(829// CHECK-RV64-SAME: ) #[[ATTR0]] {830// CHECK-RV64-NEXT:  entry:831// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison832//833vfloat64m1x4_t test_vundefined_f64m1x4() {834  return __riscv_vundefined_f64m1x4();835}836 837// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_f64m1x5(838// CHECK-RV64-SAME: ) #[[ATTR0]] {839// CHECK-RV64-NEXT:  entry:840// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison841//842vfloat64m1x5_t test_vundefined_f64m1x5() {843  return __riscv_vundefined_f64m1x5();844}845 846// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_f64m1x6(847// CHECK-RV64-SAME: ) #[[ATTR0]] {848// CHECK-RV64-NEXT:  entry:849// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison850//851vfloat64m1x6_t test_vundefined_f64m1x6() {852  return __riscv_vundefined_f64m1x6();853}854 855// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_f64m1x7(856// CHECK-RV64-SAME: ) #[[ATTR0]] {857// CHECK-RV64-NEXT:  entry:858// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison859//860vfloat64m1x7_t test_vundefined_f64m1x7() {861  return __riscv_vundefined_f64m1x7();862}863 864// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_f64m1x8(865// CHECK-RV64-SAME: ) #[[ATTR0]] {866// CHECK-RV64-NEXT:  entry:867// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison868//869vfloat64m1x8_t test_vundefined_f64m1x8() {870  return __riscv_vundefined_f64m1x8();871}872 873// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_f64m2x2(874// CHECK-RV64-SAME: ) #[[ATTR0]] {875// CHECK-RV64-NEXT:  entry:876// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison877//878vfloat64m2x2_t test_vundefined_f64m2x2() {879  return __riscv_vundefined_f64m2x2();880}881 882// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_f64m2x3(883// CHECK-RV64-SAME: ) #[[ATTR0]] {884// CHECK-RV64-NEXT:  entry:885// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison886//887vfloat64m2x3_t test_vundefined_f64m2x3() {888  return __riscv_vundefined_f64m2x3();889}890 891// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_f64m2x4(892// CHECK-RV64-SAME: ) #[[ATTR0]] {893// CHECK-RV64-NEXT:  entry:894// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison895//896vfloat64m2x4_t test_vundefined_f64m2x4() {897  return __riscv_vundefined_f64m2x4();898}899 900// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_f64m4x2(901// CHECK-RV64-SAME: ) #[[ATTR0]] {902// CHECK-RV64-NEXT:  entry:903// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison904//905vfloat64m4x2_t test_vundefined_f64m4x2() {906  return __riscv_vundefined_f64m4x2();907}908 909// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @test_vundefined_i8mf8x2(910// CHECK-RV64-SAME: ) #[[ATTR0]] {911// CHECK-RV64-NEXT:  entry:912// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison913//914vint8mf8x2_t test_vundefined_i8mf8x2() { return __riscv_vundefined_i8mf8x2(); }915 916// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @test_vundefined_i8mf8x3(917// CHECK-RV64-SAME: ) #[[ATTR0]] {918// CHECK-RV64-NEXT:  entry:919// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison920//921vint8mf8x3_t test_vundefined_i8mf8x3() { return __riscv_vundefined_i8mf8x3(); }922 923// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @test_vundefined_i8mf8x4(924// CHECK-RV64-SAME: ) #[[ATTR0]] {925// CHECK-RV64-NEXT:  entry:926// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison927//928vint8mf8x4_t test_vundefined_i8mf8x4() { return __riscv_vundefined_i8mf8x4(); }929 930// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @test_vundefined_i8mf8x5(931// CHECK-RV64-SAME: ) #[[ATTR0]] {932// CHECK-RV64-NEXT:  entry:933// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison934//935vint8mf8x5_t test_vundefined_i8mf8x5() { return __riscv_vundefined_i8mf8x5(); }936 937// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @test_vundefined_i8mf8x6(938// CHECK-RV64-SAME: ) #[[ATTR0]] {939// CHECK-RV64-NEXT:  entry:940// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison941//942vint8mf8x6_t test_vundefined_i8mf8x6() { return __riscv_vundefined_i8mf8x6(); }943 944// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @test_vundefined_i8mf8x7(945// CHECK-RV64-SAME: ) #[[ATTR0]] {946// CHECK-RV64-NEXT:  entry:947// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison948//949vint8mf8x7_t test_vundefined_i8mf8x7() { return __riscv_vundefined_i8mf8x7(); }950 951// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @test_vundefined_i8mf8x8(952// CHECK-RV64-SAME: ) #[[ATTR0]] {953// CHECK-RV64-NEXT:  entry:954// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison955//956vint8mf8x8_t test_vundefined_i8mf8x8() { return __riscv_vundefined_i8mf8x8(); }957 958// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vundefined_i8mf4x2(959// CHECK-RV64-SAME: ) #[[ATTR0]] {960// CHECK-RV64-NEXT:  entry:961// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison962//963vint8mf4x2_t test_vundefined_i8mf4x2() { return __riscv_vundefined_i8mf4x2(); }964 965// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vundefined_i8mf4x3(966// CHECK-RV64-SAME: ) #[[ATTR0]] {967// CHECK-RV64-NEXT:  entry:968// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison969//970vint8mf4x3_t test_vundefined_i8mf4x3() { return __riscv_vundefined_i8mf4x3(); }971 972// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vundefined_i8mf4x4(973// CHECK-RV64-SAME: ) #[[ATTR0]] {974// CHECK-RV64-NEXT:  entry:975// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison976//977vint8mf4x4_t test_vundefined_i8mf4x4() { return __riscv_vundefined_i8mf4x4(); }978 979// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vundefined_i8mf4x5(980// CHECK-RV64-SAME: ) #[[ATTR0]] {981// CHECK-RV64-NEXT:  entry:982// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison983//984vint8mf4x5_t test_vundefined_i8mf4x5() { return __riscv_vundefined_i8mf4x5(); }985 986// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vundefined_i8mf4x6(987// CHECK-RV64-SAME: ) #[[ATTR0]] {988// CHECK-RV64-NEXT:  entry:989// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison990//991vint8mf4x6_t test_vundefined_i8mf4x6() { return __riscv_vundefined_i8mf4x6(); }992 993// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vundefined_i8mf4x7(994// CHECK-RV64-SAME: ) #[[ATTR0]] {995// CHECK-RV64-NEXT:  entry:996// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison997//998vint8mf4x7_t test_vundefined_i8mf4x7() { return __riscv_vundefined_i8mf4x7(); }999 1000// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vundefined_i8mf4x8(1001// CHECK-RV64-SAME: ) #[[ATTR0]] {1002// CHECK-RV64-NEXT:  entry:1003// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison1004//1005vint8mf4x8_t test_vundefined_i8mf4x8() { return __riscv_vundefined_i8mf4x8(); }1006 1007// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vundefined_i8mf2x2(1008// CHECK-RV64-SAME: ) #[[ATTR0]] {1009// CHECK-RV64-NEXT:  entry:1010// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison1011//1012vint8mf2x2_t test_vundefined_i8mf2x2() { return __riscv_vundefined_i8mf2x2(); }1013 1014// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vundefined_i8mf2x3(1015// CHECK-RV64-SAME: ) #[[ATTR0]] {1016// CHECK-RV64-NEXT:  entry:1017// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison1018//1019vint8mf2x3_t test_vundefined_i8mf2x3() { return __riscv_vundefined_i8mf2x3(); }1020 1021// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vundefined_i8mf2x4(1022// CHECK-RV64-SAME: ) #[[ATTR0]] {1023// CHECK-RV64-NEXT:  entry:1024// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison1025//1026vint8mf2x4_t test_vundefined_i8mf2x4() { return __riscv_vundefined_i8mf2x4(); }1027 1028// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vundefined_i8mf2x5(1029// CHECK-RV64-SAME: ) #[[ATTR0]] {1030// CHECK-RV64-NEXT:  entry:1031// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison1032//1033vint8mf2x5_t test_vundefined_i8mf2x5() { return __riscv_vundefined_i8mf2x5(); }1034 1035// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vundefined_i8mf2x6(1036// CHECK-RV64-SAME: ) #[[ATTR0]] {1037// CHECK-RV64-NEXT:  entry:1038// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison1039//1040vint8mf2x6_t test_vundefined_i8mf2x6() { return __riscv_vundefined_i8mf2x6(); }1041 1042// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vundefined_i8mf2x7(1043// CHECK-RV64-SAME: ) #[[ATTR0]] {1044// CHECK-RV64-NEXT:  entry:1045// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison1046//1047vint8mf2x7_t test_vundefined_i8mf2x7() { return __riscv_vundefined_i8mf2x7(); }1048 1049// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vundefined_i8mf2x8(1050// CHECK-RV64-SAME: ) #[[ATTR0]] {1051// CHECK-RV64-NEXT:  entry:1052// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison1053//1054vint8mf2x8_t test_vundefined_i8mf2x8() { return __riscv_vundefined_i8mf2x8(); }1055 1056// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_i8m1x2(1057// CHECK-RV64-SAME: ) #[[ATTR0]] {1058// CHECK-RV64-NEXT:  entry:1059// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison1060//1061vint8m1x2_t test_vundefined_i8m1x2() { return __riscv_vundefined_i8m1x2(); }1062 1063// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_i8m1x3(1064// CHECK-RV64-SAME: ) #[[ATTR0]] {1065// CHECK-RV64-NEXT:  entry:1066// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison1067//1068vint8m1x3_t test_vundefined_i8m1x3() { return __riscv_vundefined_i8m1x3(); }1069 1070// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_i8m1x4(1071// CHECK-RV64-SAME: ) #[[ATTR0]] {1072// CHECK-RV64-NEXT:  entry:1073// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison1074//1075vint8m1x4_t test_vundefined_i8m1x4() { return __riscv_vundefined_i8m1x4(); }1076 1077// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_i8m1x5(1078// CHECK-RV64-SAME: ) #[[ATTR0]] {1079// CHECK-RV64-NEXT:  entry:1080// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison1081//1082vint8m1x5_t test_vundefined_i8m1x5() { return __riscv_vundefined_i8m1x5(); }1083 1084// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_i8m1x6(1085// CHECK-RV64-SAME: ) #[[ATTR0]] {1086// CHECK-RV64-NEXT:  entry:1087// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison1088//1089vint8m1x6_t test_vundefined_i8m1x6() { return __riscv_vundefined_i8m1x6(); }1090 1091// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_i8m1x7(1092// CHECK-RV64-SAME: ) #[[ATTR0]] {1093// CHECK-RV64-NEXT:  entry:1094// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison1095//1096vint8m1x7_t test_vundefined_i8m1x7() { return __riscv_vundefined_i8m1x7(); }1097 1098// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_i8m1x8(1099// CHECK-RV64-SAME: ) #[[ATTR0]] {1100// CHECK-RV64-NEXT:  entry:1101// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison1102//1103vint8m1x8_t test_vundefined_i8m1x8() { return __riscv_vundefined_i8m1x8(); }1104 1105// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_i8m2x2(1106// CHECK-RV64-SAME: ) #[[ATTR0]] {1107// CHECK-RV64-NEXT:  entry:1108// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison1109//1110vint8m2x2_t test_vundefined_i8m2x2() { return __riscv_vundefined_i8m2x2(); }1111 1112// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_i8m2x3(1113// CHECK-RV64-SAME: ) #[[ATTR0]] {1114// CHECK-RV64-NEXT:  entry:1115// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison1116//1117vint8m2x3_t test_vundefined_i8m2x3() { return __riscv_vundefined_i8m2x3(); }1118 1119// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_i8m2x4(1120// CHECK-RV64-SAME: ) #[[ATTR0]] {1121// CHECK-RV64-NEXT:  entry:1122// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison1123//1124vint8m2x4_t test_vundefined_i8m2x4() { return __riscv_vundefined_i8m2x4(); }1125 1126// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_i8m4x2(1127// CHECK-RV64-SAME: ) #[[ATTR0]] {1128// CHECK-RV64-NEXT:  entry:1129// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison1130//1131vint8m4x2_t test_vundefined_i8m4x2() { return __riscv_vundefined_i8m4x2(); }1132 1133// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vundefined_i16mf4x2(1134// CHECK-RV64-SAME: ) #[[ATTR0]] {1135// CHECK-RV64-NEXT:  entry:1136// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison1137//1138vint16mf4x2_t test_vundefined_i16mf4x2() {1139  return __riscv_vundefined_i16mf4x2();1140}1141 1142// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vundefined_i16mf4x3(1143// CHECK-RV64-SAME: ) #[[ATTR0]] {1144// CHECK-RV64-NEXT:  entry:1145// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison1146//1147vint16mf4x3_t test_vundefined_i16mf4x3() {1148  return __riscv_vundefined_i16mf4x3();1149}1150 1151// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vundefined_i16mf4x4(1152// CHECK-RV64-SAME: ) #[[ATTR0]] {1153// CHECK-RV64-NEXT:  entry:1154// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison1155//1156vint16mf4x4_t test_vundefined_i16mf4x4() {1157  return __riscv_vundefined_i16mf4x4();1158}1159 1160// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vundefined_i16mf4x5(1161// CHECK-RV64-SAME: ) #[[ATTR0]] {1162// CHECK-RV64-NEXT:  entry:1163// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison1164//1165vint16mf4x5_t test_vundefined_i16mf4x5() {1166  return __riscv_vundefined_i16mf4x5();1167}1168 1169// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vundefined_i16mf4x6(1170// CHECK-RV64-SAME: ) #[[ATTR0]] {1171// CHECK-RV64-NEXT:  entry:1172// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison1173//1174vint16mf4x6_t test_vundefined_i16mf4x6() {1175  return __riscv_vundefined_i16mf4x6();1176}1177 1178// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vundefined_i16mf4x7(1179// CHECK-RV64-SAME: ) #[[ATTR0]] {1180// CHECK-RV64-NEXT:  entry:1181// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison1182//1183vint16mf4x7_t test_vundefined_i16mf4x7() {1184  return __riscv_vundefined_i16mf4x7();1185}1186 1187// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vundefined_i16mf4x8(1188// CHECK-RV64-SAME: ) #[[ATTR0]] {1189// CHECK-RV64-NEXT:  entry:1190// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison1191//1192vint16mf4x8_t test_vundefined_i16mf4x8() {1193  return __riscv_vundefined_i16mf4x8();1194}1195 1196// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vundefined_i16mf2x2(1197// CHECK-RV64-SAME: ) #[[ATTR0]] {1198// CHECK-RV64-NEXT:  entry:1199// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison1200//1201vint16mf2x2_t test_vundefined_i16mf2x2() {1202  return __riscv_vundefined_i16mf2x2();1203}1204 1205// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vundefined_i16mf2x3(1206// CHECK-RV64-SAME: ) #[[ATTR0]] {1207// CHECK-RV64-NEXT:  entry:1208// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison1209//1210vint16mf2x3_t test_vundefined_i16mf2x3() {1211  return __riscv_vundefined_i16mf2x3();1212}1213 1214// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vundefined_i16mf2x4(1215// CHECK-RV64-SAME: ) #[[ATTR0]] {1216// CHECK-RV64-NEXT:  entry:1217// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison1218//1219vint16mf2x4_t test_vundefined_i16mf2x4() {1220  return __riscv_vundefined_i16mf2x4();1221}1222 1223// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vundefined_i16mf2x5(1224// CHECK-RV64-SAME: ) #[[ATTR0]] {1225// CHECK-RV64-NEXT:  entry:1226// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison1227//1228vint16mf2x5_t test_vundefined_i16mf2x5() {1229  return __riscv_vundefined_i16mf2x5();1230}1231 1232// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vundefined_i16mf2x6(1233// CHECK-RV64-SAME: ) #[[ATTR0]] {1234// CHECK-RV64-NEXT:  entry:1235// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison1236//1237vint16mf2x6_t test_vundefined_i16mf2x6() {1238  return __riscv_vundefined_i16mf2x6();1239}1240 1241// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vundefined_i16mf2x7(1242// CHECK-RV64-SAME: ) #[[ATTR0]] {1243// CHECK-RV64-NEXT:  entry:1244// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison1245//1246vint16mf2x7_t test_vundefined_i16mf2x7() {1247  return __riscv_vundefined_i16mf2x7();1248}1249 1250// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vundefined_i16mf2x8(1251// CHECK-RV64-SAME: ) #[[ATTR0]] {1252// CHECK-RV64-NEXT:  entry:1253// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison1254//1255vint16mf2x8_t test_vundefined_i16mf2x8() {1256  return __riscv_vundefined_i16mf2x8();1257}1258 1259// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_i16m1x2(1260// CHECK-RV64-SAME: ) #[[ATTR0]] {1261// CHECK-RV64-NEXT:  entry:1262// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison1263//1264vint16m1x2_t test_vundefined_i16m1x2() { return __riscv_vundefined_i16m1x2(); }1265 1266// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_i16m1x3(1267// CHECK-RV64-SAME: ) #[[ATTR0]] {1268// CHECK-RV64-NEXT:  entry:1269// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison1270//1271vint16m1x3_t test_vundefined_i16m1x3() { return __riscv_vundefined_i16m1x3(); }1272 1273// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_i16m1x4(1274// CHECK-RV64-SAME: ) #[[ATTR0]] {1275// CHECK-RV64-NEXT:  entry:1276// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison1277//1278vint16m1x4_t test_vundefined_i16m1x4() { return __riscv_vundefined_i16m1x4(); }1279 1280// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_i16m1x5(1281// CHECK-RV64-SAME: ) #[[ATTR0]] {1282// CHECK-RV64-NEXT:  entry:1283// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison1284//1285vint16m1x5_t test_vundefined_i16m1x5() { return __riscv_vundefined_i16m1x5(); }1286 1287// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_i16m1x6(1288// CHECK-RV64-SAME: ) #[[ATTR0]] {1289// CHECK-RV64-NEXT:  entry:1290// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison1291//1292vint16m1x6_t test_vundefined_i16m1x6() { return __riscv_vundefined_i16m1x6(); }1293 1294// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_i16m1x7(1295// CHECK-RV64-SAME: ) #[[ATTR0]] {1296// CHECK-RV64-NEXT:  entry:1297// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison1298//1299vint16m1x7_t test_vundefined_i16m1x7() { return __riscv_vundefined_i16m1x7(); }1300 1301// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_i16m1x8(1302// CHECK-RV64-SAME: ) #[[ATTR0]] {1303// CHECK-RV64-NEXT:  entry:1304// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison1305//1306vint16m1x8_t test_vundefined_i16m1x8() { return __riscv_vundefined_i16m1x8(); }1307 1308// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_i16m2x2(1309// CHECK-RV64-SAME: ) #[[ATTR0]] {1310// CHECK-RV64-NEXT:  entry:1311// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison1312//1313vint16m2x2_t test_vundefined_i16m2x2() { return __riscv_vundefined_i16m2x2(); }1314 1315// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_i16m2x3(1316// CHECK-RV64-SAME: ) #[[ATTR0]] {1317// CHECK-RV64-NEXT:  entry:1318// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison1319//1320vint16m2x3_t test_vundefined_i16m2x3() { return __riscv_vundefined_i16m2x3(); }1321 1322// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_i16m2x4(1323// CHECK-RV64-SAME: ) #[[ATTR0]] {1324// CHECK-RV64-NEXT:  entry:1325// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison1326//1327vint16m2x4_t test_vundefined_i16m2x4() { return __riscv_vundefined_i16m2x4(); }1328 1329// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_i16m4x2(1330// CHECK-RV64-SAME: ) #[[ATTR0]] {1331// CHECK-RV64-NEXT:  entry:1332// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison1333//1334vint16m4x2_t test_vundefined_i16m4x2() { return __riscv_vundefined_i16m4x2(); }1335 1336// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vundefined_i32mf2x2(1337// CHECK-RV64-SAME: ) #[[ATTR0]] {1338// CHECK-RV64-NEXT:  entry:1339// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison1340//1341vint32mf2x2_t test_vundefined_i32mf2x2() {1342  return __riscv_vundefined_i32mf2x2();1343}1344 1345// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vundefined_i32mf2x3(1346// CHECK-RV64-SAME: ) #[[ATTR0]] {1347// CHECK-RV64-NEXT:  entry:1348// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison1349//1350vint32mf2x3_t test_vundefined_i32mf2x3() {1351  return __riscv_vundefined_i32mf2x3();1352}1353 1354// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vundefined_i32mf2x4(1355// CHECK-RV64-SAME: ) #[[ATTR0]] {1356// CHECK-RV64-NEXT:  entry:1357// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison1358//1359vint32mf2x4_t test_vundefined_i32mf2x4() {1360  return __riscv_vundefined_i32mf2x4();1361}1362 1363// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vundefined_i32mf2x5(1364// CHECK-RV64-SAME: ) #[[ATTR0]] {1365// CHECK-RV64-NEXT:  entry:1366// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison1367//1368vint32mf2x5_t test_vundefined_i32mf2x5() {1369  return __riscv_vundefined_i32mf2x5();1370}1371 1372// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vundefined_i32mf2x6(1373// CHECK-RV64-SAME: ) #[[ATTR0]] {1374// CHECK-RV64-NEXT:  entry:1375// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison1376//1377vint32mf2x6_t test_vundefined_i32mf2x6() {1378  return __riscv_vundefined_i32mf2x6();1379}1380 1381// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vundefined_i32mf2x7(1382// CHECK-RV64-SAME: ) #[[ATTR0]] {1383// CHECK-RV64-NEXT:  entry:1384// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison1385//1386vint32mf2x7_t test_vundefined_i32mf2x7() {1387  return __riscv_vundefined_i32mf2x7();1388}1389 1390// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vundefined_i32mf2x8(1391// CHECK-RV64-SAME: ) #[[ATTR0]] {1392// CHECK-RV64-NEXT:  entry:1393// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison1394//1395vint32mf2x8_t test_vundefined_i32mf2x8() {1396  return __riscv_vundefined_i32mf2x8();1397}1398 1399// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_i32m1x2(1400// CHECK-RV64-SAME: ) #[[ATTR0]] {1401// CHECK-RV64-NEXT:  entry:1402// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison1403//1404vint32m1x2_t test_vundefined_i32m1x2() { return __riscv_vundefined_i32m1x2(); }1405 1406// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_i32m1x3(1407// CHECK-RV64-SAME: ) #[[ATTR0]] {1408// CHECK-RV64-NEXT:  entry:1409// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison1410//1411vint32m1x3_t test_vundefined_i32m1x3() { return __riscv_vundefined_i32m1x3(); }1412 1413// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_i32m1x4(1414// CHECK-RV64-SAME: ) #[[ATTR0]] {1415// CHECK-RV64-NEXT:  entry:1416// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison1417//1418vint32m1x4_t test_vundefined_i32m1x4() { return __riscv_vundefined_i32m1x4(); }1419 1420// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_i32m1x5(1421// CHECK-RV64-SAME: ) #[[ATTR0]] {1422// CHECK-RV64-NEXT:  entry:1423// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison1424//1425vint32m1x5_t test_vundefined_i32m1x5() { return __riscv_vundefined_i32m1x5(); }1426 1427// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_i32m1x6(1428// CHECK-RV64-SAME: ) #[[ATTR0]] {1429// CHECK-RV64-NEXT:  entry:1430// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison1431//1432vint32m1x6_t test_vundefined_i32m1x6() { return __riscv_vundefined_i32m1x6(); }1433 1434// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_i32m1x7(1435// CHECK-RV64-SAME: ) #[[ATTR0]] {1436// CHECK-RV64-NEXT:  entry:1437// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison1438//1439vint32m1x7_t test_vundefined_i32m1x7() { return __riscv_vundefined_i32m1x7(); }1440 1441// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_i32m1x8(1442// CHECK-RV64-SAME: ) #[[ATTR0]] {1443// CHECK-RV64-NEXT:  entry:1444// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison1445//1446vint32m1x8_t test_vundefined_i32m1x8() { return __riscv_vundefined_i32m1x8(); }1447 1448// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_i32m2x2(1449// CHECK-RV64-SAME: ) #[[ATTR0]] {1450// CHECK-RV64-NEXT:  entry:1451// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison1452//1453vint32m2x2_t test_vundefined_i32m2x2() { return __riscv_vundefined_i32m2x2(); }1454 1455// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_i32m2x3(1456// CHECK-RV64-SAME: ) #[[ATTR0]] {1457// CHECK-RV64-NEXT:  entry:1458// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison1459//1460vint32m2x3_t test_vundefined_i32m2x3() { return __riscv_vundefined_i32m2x3(); }1461 1462// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_i32m2x4(1463// CHECK-RV64-SAME: ) #[[ATTR0]] {1464// CHECK-RV64-NEXT:  entry:1465// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison1466//1467vint32m2x4_t test_vundefined_i32m2x4() { return __riscv_vundefined_i32m2x4(); }1468 1469// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_i32m4x2(1470// CHECK-RV64-SAME: ) #[[ATTR0]] {1471// CHECK-RV64-NEXT:  entry:1472// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison1473//1474vint32m4x2_t test_vundefined_i32m4x2() { return __riscv_vundefined_i32m4x2(); }1475 1476// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_i64m1x2(1477// CHECK-RV64-SAME: ) #[[ATTR0]] {1478// CHECK-RV64-NEXT:  entry:1479// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison1480//1481vint64m1x2_t test_vundefined_i64m1x2() { return __riscv_vundefined_i64m1x2(); }1482 1483// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_i64m1x3(1484// CHECK-RV64-SAME: ) #[[ATTR0]] {1485// CHECK-RV64-NEXT:  entry:1486// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison1487//1488vint64m1x3_t test_vundefined_i64m1x3() { return __riscv_vundefined_i64m1x3(); }1489 1490// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_i64m1x4(1491// CHECK-RV64-SAME: ) #[[ATTR0]] {1492// CHECK-RV64-NEXT:  entry:1493// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison1494//1495vint64m1x4_t test_vundefined_i64m1x4() { return __riscv_vundefined_i64m1x4(); }1496 1497// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_i64m1x5(1498// CHECK-RV64-SAME: ) #[[ATTR0]] {1499// CHECK-RV64-NEXT:  entry:1500// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison1501//1502vint64m1x5_t test_vundefined_i64m1x5() { return __riscv_vundefined_i64m1x5(); }1503 1504// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_i64m1x6(1505// CHECK-RV64-SAME: ) #[[ATTR0]] {1506// CHECK-RV64-NEXT:  entry:1507// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison1508//1509vint64m1x6_t test_vundefined_i64m1x6() { return __riscv_vundefined_i64m1x6(); }1510 1511// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_i64m1x7(1512// CHECK-RV64-SAME: ) #[[ATTR0]] {1513// CHECK-RV64-NEXT:  entry:1514// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison1515//1516vint64m1x7_t test_vundefined_i64m1x7() { return __riscv_vundefined_i64m1x7(); }1517 1518// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_i64m1x8(1519// CHECK-RV64-SAME: ) #[[ATTR0]] {1520// CHECK-RV64-NEXT:  entry:1521// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison1522//1523vint64m1x8_t test_vundefined_i64m1x8() { return __riscv_vundefined_i64m1x8(); }1524 1525// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_i64m2x2(1526// CHECK-RV64-SAME: ) #[[ATTR0]] {1527// CHECK-RV64-NEXT:  entry:1528// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison1529//1530vint64m2x2_t test_vundefined_i64m2x2() { return __riscv_vundefined_i64m2x2(); }1531 1532// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_i64m2x3(1533// CHECK-RV64-SAME: ) #[[ATTR0]] {1534// CHECK-RV64-NEXT:  entry:1535// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison1536//1537vint64m2x3_t test_vundefined_i64m2x3() { return __riscv_vundefined_i64m2x3(); }1538 1539// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_i64m2x4(1540// CHECK-RV64-SAME: ) #[[ATTR0]] {1541// CHECK-RV64-NEXT:  entry:1542// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison1543//1544vint64m2x4_t test_vundefined_i64m2x4() { return __riscv_vundefined_i64m2x4(); }1545 1546// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_i64m4x2(1547// CHECK-RV64-SAME: ) #[[ATTR0]] {1548// CHECK-RV64-NEXT:  entry:1549// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison1550//1551vint64m4x2_t test_vundefined_i64m4x2() { return __riscv_vundefined_i64m4x2(); }1552 1553// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @test_vundefined_u8mf8x2(1554// CHECK-RV64-SAME: ) #[[ATTR0]] {1555// CHECK-RV64-NEXT:  entry:1556// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 2) poison1557//1558vuint8mf8x2_t test_vundefined_u8mf8x2() { return __riscv_vundefined_u8mf8x2(); }1559 1560// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @test_vundefined_u8mf8x3(1561// CHECK-RV64-SAME: ) #[[ATTR0]] {1562// CHECK-RV64-NEXT:  entry:1563// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 3) poison1564//1565vuint8mf8x3_t test_vundefined_u8mf8x3() { return __riscv_vundefined_u8mf8x3(); }1566 1567// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @test_vundefined_u8mf8x4(1568// CHECK-RV64-SAME: ) #[[ATTR0]] {1569// CHECK-RV64-NEXT:  entry:1570// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 4) poison1571//1572vuint8mf8x4_t test_vundefined_u8mf8x4() { return __riscv_vundefined_u8mf8x4(); }1573 1574// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @test_vundefined_u8mf8x5(1575// CHECK-RV64-SAME: ) #[[ATTR0]] {1576// CHECK-RV64-NEXT:  entry:1577// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 5) poison1578//1579vuint8mf8x5_t test_vundefined_u8mf8x5() { return __riscv_vundefined_u8mf8x5(); }1580 1581// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @test_vundefined_u8mf8x6(1582// CHECK-RV64-SAME: ) #[[ATTR0]] {1583// CHECK-RV64-NEXT:  entry:1584// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 6) poison1585//1586vuint8mf8x6_t test_vundefined_u8mf8x6() { return __riscv_vundefined_u8mf8x6(); }1587 1588// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @test_vundefined_u8mf8x7(1589// CHECK-RV64-SAME: ) #[[ATTR0]] {1590// CHECK-RV64-NEXT:  entry:1591// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 7) poison1592//1593vuint8mf8x7_t test_vundefined_u8mf8x7() { return __riscv_vundefined_u8mf8x7(); }1594 1595// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @test_vundefined_u8mf8x8(1596// CHECK-RV64-SAME: ) #[[ATTR0]] {1597// CHECK-RV64-NEXT:  entry:1598// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 1 x i8>, 8) poison1599//1600vuint8mf8x8_t test_vundefined_u8mf8x8() { return __riscv_vundefined_u8mf8x8(); }1601 1602// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vundefined_u8mf4x2(1603// CHECK-RV64-SAME: ) #[[ATTR0]] {1604// CHECK-RV64-NEXT:  entry:1605// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison1606//1607vuint8mf4x2_t test_vundefined_u8mf4x2() { return __riscv_vundefined_u8mf4x2(); }1608 1609// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vundefined_u8mf4x3(1610// CHECK-RV64-SAME: ) #[[ATTR0]] {1611// CHECK-RV64-NEXT:  entry:1612// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison1613//1614vuint8mf4x3_t test_vundefined_u8mf4x3() { return __riscv_vundefined_u8mf4x3(); }1615 1616// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vundefined_u8mf4x4(1617// CHECK-RV64-SAME: ) #[[ATTR0]] {1618// CHECK-RV64-NEXT:  entry:1619// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison1620//1621vuint8mf4x4_t test_vundefined_u8mf4x4() { return __riscv_vundefined_u8mf4x4(); }1622 1623// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vundefined_u8mf4x5(1624// CHECK-RV64-SAME: ) #[[ATTR0]] {1625// CHECK-RV64-NEXT:  entry:1626// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison1627//1628vuint8mf4x5_t test_vundefined_u8mf4x5() { return __riscv_vundefined_u8mf4x5(); }1629 1630// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vundefined_u8mf4x6(1631// CHECK-RV64-SAME: ) #[[ATTR0]] {1632// CHECK-RV64-NEXT:  entry:1633// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison1634//1635vuint8mf4x6_t test_vundefined_u8mf4x6() { return __riscv_vundefined_u8mf4x6(); }1636 1637// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vundefined_u8mf4x7(1638// CHECK-RV64-SAME: ) #[[ATTR0]] {1639// CHECK-RV64-NEXT:  entry:1640// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison1641//1642vuint8mf4x7_t test_vundefined_u8mf4x7() { return __riscv_vundefined_u8mf4x7(); }1643 1644// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vundefined_u8mf4x8(1645// CHECK-RV64-SAME: ) #[[ATTR0]] {1646// CHECK-RV64-NEXT:  entry:1647// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison1648//1649vuint8mf4x8_t test_vundefined_u8mf4x8() { return __riscv_vundefined_u8mf4x8(); }1650 1651// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vundefined_u8mf2x2(1652// CHECK-RV64-SAME: ) #[[ATTR0]] {1653// CHECK-RV64-NEXT:  entry:1654// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison1655//1656vuint8mf2x2_t test_vundefined_u8mf2x2() { return __riscv_vundefined_u8mf2x2(); }1657 1658// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vundefined_u8mf2x3(1659// CHECK-RV64-SAME: ) #[[ATTR0]] {1660// CHECK-RV64-NEXT:  entry:1661// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison1662//1663vuint8mf2x3_t test_vundefined_u8mf2x3() { return __riscv_vundefined_u8mf2x3(); }1664 1665// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vundefined_u8mf2x4(1666// CHECK-RV64-SAME: ) #[[ATTR0]] {1667// CHECK-RV64-NEXT:  entry:1668// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison1669//1670vuint8mf2x4_t test_vundefined_u8mf2x4() { return __riscv_vundefined_u8mf2x4(); }1671 1672// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vundefined_u8mf2x5(1673// CHECK-RV64-SAME: ) #[[ATTR0]] {1674// CHECK-RV64-NEXT:  entry:1675// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison1676//1677vuint8mf2x5_t test_vundefined_u8mf2x5() { return __riscv_vundefined_u8mf2x5(); }1678 1679// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vundefined_u8mf2x6(1680// CHECK-RV64-SAME: ) #[[ATTR0]] {1681// CHECK-RV64-NEXT:  entry:1682// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison1683//1684vuint8mf2x6_t test_vundefined_u8mf2x6() { return __riscv_vundefined_u8mf2x6(); }1685 1686// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vundefined_u8mf2x7(1687// CHECK-RV64-SAME: ) #[[ATTR0]] {1688// CHECK-RV64-NEXT:  entry:1689// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison1690//1691vuint8mf2x7_t test_vundefined_u8mf2x7() { return __riscv_vundefined_u8mf2x7(); }1692 1693// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vundefined_u8mf2x8(1694// CHECK-RV64-SAME: ) #[[ATTR0]] {1695// CHECK-RV64-NEXT:  entry:1696// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison1697//1698vuint8mf2x8_t test_vundefined_u8mf2x8() { return __riscv_vundefined_u8mf2x8(); }1699 1700// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_u8m1x2(1701// CHECK-RV64-SAME: ) #[[ATTR0]] {1702// CHECK-RV64-NEXT:  entry:1703// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison1704//1705vuint8m1x2_t test_vundefined_u8m1x2() { return __riscv_vundefined_u8m1x2(); }1706 1707// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_u8m1x3(1708// CHECK-RV64-SAME: ) #[[ATTR0]] {1709// CHECK-RV64-NEXT:  entry:1710// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison1711//1712vuint8m1x3_t test_vundefined_u8m1x3() { return __riscv_vundefined_u8m1x3(); }1713 1714// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_u8m1x4(1715// CHECK-RV64-SAME: ) #[[ATTR0]] {1716// CHECK-RV64-NEXT:  entry:1717// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison1718//1719vuint8m1x4_t test_vundefined_u8m1x4() { return __riscv_vundefined_u8m1x4(); }1720 1721// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_u8m1x5(1722// CHECK-RV64-SAME: ) #[[ATTR0]] {1723// CHECK-RV64-NEXT:  entry:1724// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison1725//1726vuint8m1x5_t test_vundefined_u8m1x5() { return __riscv_vundefined_u8m1x5(); }1727 1728// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_u8m1x6(1729// CHECK-RV64-SAME: ) #[[ATTR0]] {1730// CHECK-RV64-NEXT:  entry:1731// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison1732//1733vuint8m1x6_t test_vundefined_u8m1x6() { return __riscv_vundefined_u8m1x6(); }1734 1735// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_u8m1x7(1736// CHECK-RV64-SAME: ) #[[ATTR0]] {1737// CHECK-RV64-NEXT:  entry:1738// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison1739//1740vuint8m1x7_t test_vundefined_u8m1x7() { return __riscv_vundefined_u8m1x7(); }1741 1742// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_u8m1x8(1743// CHECK-RV64-SAME: ) #[[ATTR0]] {1744// CHECK-RV64-NEXT:  entry:1745// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison1746//1747vuint8m1x8_t test_vundefined_u8m1x8() { return __riscv_vundefined_u8m1x8(); }1748 1749// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_u8m2x2(1750// CHECK-RV64-SAME: ) #[[ATTR0]] {1751// CHECK-RV64-NEXT:  entry:1752// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison1753//1754vuint8m2x2_t test_vundefined_u8m2x2() { return __riscv_vundefined_u8m2x2(); }1755 1756// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_u8m2x3(1757// CHECK-RV64-SAME: ) #[[ATTR0]] {1758// CHECK-RV64-NEXT:  entry:1759// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison1760//1761vuint8m2x3_t test_vundefined_u8m2x3() { return __riscv_vundefined_u8m2x3(); }1762 1763// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_u8m2x4(1764// CHECK-RV64-SAME: ) #[[ATTR0]] {1765// CHECK-RV64-NEXT:  entry:1766// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison1767//1768vuint8m2x4_t test_vundefined_u8m2x4() { return __riscv_vundefined_u8m2x4(); }1769 1770// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_u8m4x2(1771// CHECK-RV64-SAME: ) #[[ATTR0]] {1772// CHECK-RV64-NEXT:  entry:1773// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison1774//1775vuint8m4x2_t test_vundefined_u8m4x2() { return __riscv_vundefined_u8m4x2(); }1776 1777// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vundefined_u16mf4x2(1778// CHECK-RV64-SAME: ) #[[ATTR0]] {1779// CHECK-RV64-NEXT:  entry:1780// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) poison1781//1782vuint16mf4x2_t test_vundefined_u16mf4x2() {1783  return __riscv_vundefined_u16mf4x2();1784}1785 1786// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vundefined_u16mf4x3(1787// CHECK-RV64-SAME: ) #[[ATTR0]] {1788// CHECK-RV64-NEXT:  entry:1789// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) poison1790//1791vuint16mf4x3_t test_vundefined_u16mf4x3() {1792  return __riscv_vundefined_u16mf4x3();1793}1794 1795// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vundefined_u16mf4x4(1796// CHECK-RV64-SAME: ) #[[ATTR0]] {1797// CHECK-RV64-NEXT:  entry:1798// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) poison1799//1800vuint16mf4x4_t test_vundefined_u16mf4x4() {1801  return __riscv_vundefined_u16mf4x4();1802}1803 1804// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vundefined_u16mf4x5(1805// CHECK-RV64-SAME: ) #[[ATTR0]] {1806// CHECK-RV64-NEXT:  entry:1807// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison1808//1809vuint16mf4x5_t test_vundefined_u16mf4x5() {1810  return __riscv_vundefined_u16mf4x5();1811}1812 1813// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vundefined_u16mf4x6(1814// CHECK-RV64-SAME: ) #[[ATTR0]] {1815// CHECK-RV64-NEXT:  entry:1816// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) poison1817//1818vuint16mf4x6_t test_vundefined_u16mf4x6() {1819  return __riscv_vundefined_u16mf4x6();1820}1821 1822// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vundefined_u16mf4x7(1823// CHECK-RV64-SAME: ) #[[ATTR0]] {1824// CHECK-RV64-NEXT:  entry:1825// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) poison1826//1827vuint16mf4x7_t test_vundefined_u16mf4x7() {1828  return __riscv_vundefined_u16mf4x7();1829}1830 1831// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vundefined_u16mf4x8(1832// CHECK-RV64-SAME: ) #[[ATTR0]] {1833// CHECK-RV64-NEXT:  entry:1834// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) poison1835//1836vuint16mf4x8_t test_vundefined_u16mf4x8() {1837  return __riscv_vundefined_u16mf4x8();1838}1839 1840// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vundefined_u16mf2x2(1841// CHECK-RV64-SAME: ) #[[ATTR0]] {1842// CHECK-RV64-NEXT:  entry:1843// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison1844//1845vuint16mf2x2_t test_vundefined_u16mf2x2() {1846  return __riscv_vundefined_u16mf2x2();1847}1848 1849// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vundefined_u16mf2x3(1850// CHECK-RV64-SAME: ) #[[ATTR0]] {1851// CHECK-RV64-NEXT:  entry:1852// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison1853//1854vuint16mf2x3_t test_vundefined_u16mf2x3() {1855  return __riscv_vundefined_u16mf2x3();1856}1857 1858// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vundefined_u16mf2x4(1859// CHECK-RV64-SAME: ) #[[ATTR0]] {1860// CHECK-RV64-NEXT:  entry:1861// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison1862//1863vuint16mf2x4_t test_vundefined_u16mf2x4() {1864  return __riscv_vundefined_u16mf2x4();1865}1866 1867// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vundefined_u16mf2x5(1868// CHECK-RV64-SAME: ) #[[ATTR0]] {1869// CHECK-RV64-NEXT:  entry:1870// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison1871//1872vuint16mf2x5_t test_vundefined_u16mf2x5() {1873  return __riscv_vundefined_u16mf2x5();1874}1875 1876// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vundefined_u16mf2x6(1877// CHECK-RV64-SAME: ) #[[ATTR0]] {1878// CHECK-RV64-NEXT:  entry:1879// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison1880//1881vuint16mf2x6_t test_vundefined_u16mf2x6() {1882  return __riscv_vundefined_u16mf2x6();1883}1884 1885// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vundefined_u16mf2x7(1886// CHECK-RV64-SAME: ) #[[ATTR0]] {1887// CHECK-RV64-NEXT:  entry:1888// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison1889//1890vuint16mf2x7_t test_vundefined_u16mf2x7() {1891  return __riscv_vundefined_u16mf2x7();1892}1893 1894// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vundefined_u16mf2x8(1895// CHECK-RV64-SAME: ) #[[ATTR0]] {1896// CHECK-RV64-NEXT:  entry:1897// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison1898//1899vuint16mf2x8_t test_vundefined_u16mf2x8() {1900  return __riscv_vundefined_u16mf2x8();1901}1902 1903// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_u16m1x2(1904// CHECK-RV64-SAME: ) #[[ATTR0]] {1905// CHECK-RV64-NEXT:  entry:1906// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison1907//1908vuint16m1x2_t test_vundefined_u16m1x2() { return __riscv_vundefined_u16m1x2(); }1909 1910// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_u16m1x3(1911// CHECK-RV64-SAME: ) #[[ATTR0]] {1912// CHECK-RV64-NEXT:  entry:1913// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison1914//1915vuint16m1x3_t test_vundefined_u16m1x3() { return __riscv_vundefined_u16m1x3(); }1916 1917// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_u16m1x4(1918// CHECK-RV64-SAME: ) #[[ATTR0]] {1919// CHECK-RV64-NEXT:  entry:1920// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison1921//1922vuint16m1x4_t test_vundefined_u16m1x4() { return __riscv_vundefined_u16m1x4(); }1923 1924// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_u16m1x5(1925// CHECK-RV64-SAME: ) #[[ATTR0]] {1926// CHECK-RV64-NEXT:  entry:1927// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison1928//1929vuint16m1x5_t test_vundefined_u16m1x5() { return __riscv_vundefined_u16m1x5(); }1930 1931// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_u16m1x6(1932// CHECK-RV64-SAME: ) #[[ATTR0]] {1933// CHECK-RV64-NEXT:  entry:1934// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison1935//1936vuint16m1x6_t test_vundefined_u16m1x6() { return __riscv_vundefined_u16m1x6(); }1937 1938// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_u16m1x7(1939// CHECK-RV64-SAME: ) #[[ATTR0]] {1940// CHECK-RV64-NEXT:  entry:1941// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison1942//1943vuint16m1x7_t test_vundefined_u16m1x7() { return __riscv_vundefined_u16m1x7(); }1944 1945// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_u16m1x8(1946// CHECK-RV64-SAME: ) #[[ATTR0]] {1947// CHECK-RV64-NEXT:  entry:1948// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison1949//1950vuint16m1x8_t test_vundefined_u16m1x8() { return __riscv_vundefined_u16m1x8(); }1951 1952// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_u16m2x2(1953// CHECK-RV64-SAME: ) #[[ATTR0]] {1954// CHECK-RV64-NEXT:  entry:1955// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison1956//1957vuint16m2x2_t test_vundefined_u16m2x2() { return __riscv_vundefined_u16m2x2(); }1958 1959// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_u16m2x3(1960// CHECK-RV64-SAME: ) #[[ATTR0]] {1961// CHECK-RV64-NEXT:  entry:1962// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison1963//1964vuint16m2x3_t test_vundefined_u16m2x3() { return __riscv_vundefined_u16m2x3(); }1965 1966// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_u16m2x4(1967// CHECK-RV64-SAME: ) #[[ATTR0]] {1968// CHECK-RV64-NEXT:  entry:1969// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison1970//1971vuint16m2x4_t test_vundefined_u16m2x4() { return __riscv_vundefined_u16m2x4(); }1972 1973// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_u16m4x2(1974// CHECK-RV64-SAME: ) #[[ATTR0]] {1975// CHECK-RV64-NEXT:  entry:1976// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison1977//1978vuint16m4x2_t test_vundefined_u16m4x2() { return __riscv_vundefined_u16m4x2(); }1979 1980// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vundefined_u32mf2x2(1981// CHECK-RV64-SAME: ) #[[ATTR0]] {1982// CHECK-RV64-NEXT:  entry:1983// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison1984//1985vuint32mf2x2_t test_vundefined_u32mf2x2() {1986  return __riscv_vundefined_u32mf2x2();1987}1988 1989// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vundefined_u32mf2x3(1990// CHECK-RV64-SAME: ) #[[ATTR0]] {1991// CHECK-RV64-NEXT:  entry:1992// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) poison1993//1994vuint32mf2x3_t test_vundefined_u32mf2x3() {1995  return __riscv_vundefined_u32mf2x3();1996}1997 1998// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vundefined_u32mf2x4(1999// CHECK-RV64-SAME: ) #[[ATTR0]] {2000// CHECK-RV64-NEXT:  entry:2001// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) poison2002//2003vuint32mf2x4_t test_vundefined_u32mf2x4() {2004  return __riscv_vundefined_u32mf2x4();2005}2006 2007// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vundefined_u32mf2x5(2008// CHECK-RV64-SAME: ) #[[ATTR0]] {2009// CHECK-RV64-NEXT:  entry:2010// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison2011//2012vuint32mf2x5_t test_vundefined_u32mf2x5() {2013  return __riscv_vundefined_u32mf2x5();2014}2015 2016// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vundefined_u32mf2x6(2017// CHECK-RV64-SAME: ) #[[ATTR0]] {2018// CHECK-RV64-NEXT:  entry:2019// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) poison2020//2021vuint32mf2x6_t test_vundefined_u32mf2x6() {2022  return __riscv_vundefined_u32mf2x6();2023}2024 2025// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vundefined_u32mf2x7(2026// CHECK-RV64-SAME: ) #[[ATTR0]] {2027// CHECK-RV64-NEXT:  entry:2028// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) poison2029//2030vuint32mf2x7_t test_vundefined_u32mf2x7() {2031  return __riscv_vundefined_u32mf2x7();2032}2033 2034// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vundefined_u32mf2x8(2035// CHECK-RV64-SAME: ) #[[ATTR0]] {2036// CHECK-RV64-NEXT:  entry:2037// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) poison2038//2039vuint32mf2x8_t test_vundefined_u32mf2x8() {2040  return __riscv_vundefined_u32mf2x8();2041}2042 2043// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_u32m1x2(2044// CHECK-RV64-SAME: ) #[[ATTR0]] {2045// CHECK-RV64-NEXT:  entry:2046// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison2047//2048vuint32m1x2_t test_vundefined_u32m1x2() { return __riscv_vundefined_u32m1x2(); }2049 2050// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_u32m1x3(2051// CHECK-RV64-SAME: ) #[[ATTR0]] {2052// CHECK-RV64-NEXT:  entry:2053// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison2054//2055vuint32m1x3_t test_vundefined_u32m1x3() { return __riscv_vundefined_u32m1x3(); }2056 2057// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_u32m1x4(2058// CHECK-RV64-SAME: ) #[[ATTR0]] {2059// CHECK-RV64-NEXT:  entry:2060// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison2061//2062vuint32m1x4_t test_vundefined_u32m1x4() { return __riscv_vundefined_u32m1x4(); }2063 2064// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_u32m1x5(2065// CHECK-RV64-SAME: ) #[[ATTR0]] {2066// CHECK-RV64-NEXT:  entry:2067// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison2068//2069vuint32m1x5_t test_vundefined_u32m1x5() { return __riscv_vundefined_u32m1x5(); }2070 2071// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_u32m1x6(2072// CHECK-RV64-SAME: ) #[[ATTR0]] {2073// CHECK-RV64-NEXT:  entry:2074// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison2075//2076vuint32m1x6_t test_vundefined_u32m1x6() { return __riscv_vundefined_u32m1x6(); }2077 2078// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_u32m1x7(2079// CHECK-RV64-SAME: ) #[[ATTR0]] {2080// CHECK-RV64-NEXT:  entry:2081// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison2082//2083vuint32m1x7_t test_vundefined_u32m1x7() { return __riscv_vundefined_u32m1x7(); }2084 2085// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_u32m1x8(2086// CHECK-RV64-SAME: ) #[[ATTR0]] {2087// CHECK-RV64-NEXT:  entry:2088// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison2089//2090vuint32m1x8_t test_vundefined_u32m1x8() { return __riscv_vundefined_u32m1x8(); }2091 2092// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_u32m2x2(2093// CHECK-RV64-SAME: ) #[[ATTR0]] {2094// CHECK-RV64-NEXT:  entry:2095// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison2096//2097vuint32m2x2_t test_vundefined_u32m2x2() { return __riscv_vundefined_u32m2x2(); }2098 2099// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_u32m2x3(2100// CHECK-RV64-SAME: ) #[[ATTR0]] {2101// CHECK-RV64-NEXT:  entry:2102// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison2103//2104vuint32m2x3_t test_vundefined_u32m2x3() { return __riscv_vundefined_u32m2x3(); }2105 2106// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_u32m2x4(2107// CHECK-RV64-SAME: ) #[[ATTR0]] {2108// CHECK-RV64-NEXT:  entry:2109// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison2110//2111vuint32m2x4_t test_vundefined_u32m2x4() { return __riscv_vundefined_u32m2x4(); }2112 2113// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_u32m4x2(2114// CHECK-RV64-SAME: ) #[[ATTR0]] {2115// CHECK-RV64-NEXT:  entry:2116// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison2117//2118vuint32m4x2_t test_vundefined_u32m4x2() { return __riscv_vundefined_u32m4x2(); }2119 2120// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vundefined_u64m1x2(2121// CHECK-RV64-SAME: ) #[[ATTR0]] {2122// CHECK-RV64-NEXT:  entry:2123// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison2124//2125vuint64m1x2_t test_vundefined_u64m1x2() { return __riscv_vundefined_u64m1x2(); }2126 2127// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vundefined_u64m1x3(2128// CHECK-RV64-SAME: ) #[[ATTR0]] {2129// CHECK-RV64-NEXT:  entry:2130// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison2131//2132vuint64m1x3_t test_vundefined_u64m1x3() { return __riscv_vundefined_u64m1x3(); }2133 2134// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vundefined_u64m1x4(2135// CHECK-RV64-SAME: ) #[[ATTR0]] {2136// CHECK-RV64-NEXT:  entry:2137// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) poison2138//2139vuint64m1x4_t test_vundefined_u64m1x4() { return __riscv_vundefined_u64m1x4(); }2140 2141// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vundefined_u64m1x5(2142// CHECK-RV64-SAME: ) #[[ATTR0]] {2143// CHECK-RV64-NEXT:  entry:2144// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison2145//2146vuint64m1x5_t test_vundefined_u64m1x5() { return __riscv_vundefined_u64m1x5(); }2147 2148// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vundefined_u64m1x6(2149// CHECK-RV64-SAME: ) #[[ATTR0]] {2150// CHECK-RV64-NEXT:  entry:2151// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison2152//2153vuint64m1x6_t test_vundefined_u64m1x6() { return __riscv_vundefined_u64m1x6(); }2154 2155// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vundefined_u64m1x7(2156// CHECK-RV64-SAME: ) #[[ATTR0]] {2157// CHECK-RV64-NEXT:  entry:2158// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison2159//2160vuint64m1x7_t test_vundefined_u64m1x7() { return __riscv_vundefined_u64m1x7(); }2161 2162// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vundefined_u64m1x8(2163// CHECK-RV64-SAME: ) #[[ATTR0]] {2164// CHECK-RV64-NEXT:  entry:2165// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) poison2166//2167vuint64m1x8_t test_vundefined_u64m1x8() { return __riscv_vundefined_u64m1x8(); }2168 2169// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vundefined_u64m2x2(2170// CHECK-RV64-SAME: ) #[[ATTR0]] {2171// CHECK-RV64-NEXT:  entry:2172// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison2173//2174vuint64m2x2_t test_vundefined_u64m2x2() { return __riscv_vundefined_u64m2x2(); }2175 2176// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vundefined_u64m2x3(2177// CHECK-RV64-SAME: ) #[[ATTR0]] {2178// CHECK-RV64-NEXT:  entry:2179// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison2180//2181vuint64m2x3_t test_vundefined_u64m2x3() { return __riscv_vundefined_u64m2x3(); }2182 2183// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vundefined_u64m2x4(2184// CHECK-RV64-SAME: ) #[[ATTR0]] {2185// CHECK-RV64-NEXT:  entry:2186// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison2187//2188vuint64m2x4_t test_vundefined_u64m2x4() { return __riscv_vundefined_u64m2x4(); }2189 2190// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vundefined_u64m4x2(2191// CHECK-RV64-SAME: ) #[[ATTR0]] {2192// CHECK-RV64-NEXT:  entry:2193// CHECK-RV64-NEXT:    ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison2194//2195vuint64m4x2_t test_vundefined_u64m4x2() { return __riscv_vundefined_u64m4x2(); }2196