2930 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 22// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \4// RUN: -target-feature +zvfhmin -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vset_v_f16m1_f16m211// CHECK-RV64-SAME: (<vscale x 8 x half> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.vector.insert.nxv8f16.nxv4f16(<vscale x 8 x half> [[DEST]], <vscale x 4 x half> [[VAL]], i64 0)14// CHECK-RV64-NEXT: ret <vscale x 8 x half> [[TMP0]]15//16vfloat16m2_t test_vset_v_f16m1_f16m2(vfloat16m2_t dest, size_t index, vfloat16m1_t val) {17 return __riscv_vset(dest, 0, val);18}19 20// CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vset_v_f16m1_f16m421// CHECK-RV64-SAME: (<vscale x 16 x half> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {22// CHECK-RV64-NEXT: entry:23// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.vector.insert.nxv16f16.nxv4f16(<vscale x 16 x half> [[DEST]], <vscale x 4 x half> [[VAL]], i64 0)24// CHECK-RV64-NEXT: ret <vscale x 16 x half> [[TMP0]]25//26vfloat16m4_t test_vset_v_f16m1_f16m4(vfloat16m4_t dest, size_t index, vfloat16m1_t val) {27 return __riscv_vset(dest, 0, val);28}29 30// CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vset_v_f16m2_f16m431// CHECK-RV64-SAME: (<vscale x 16 x half> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x half> [[VAL:%.*]]) #[[ATTR0]] {32// CHECK-RV64-NEXT: entry:33// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.vector.insert.nxv16f16.nxv8f16(<vscale x 16 x half> [[DEST]], <vscale x 8 x half> [[VAL]], i64 0)34// CHECK-RV64-NEXT: ret <vscale x 16 x half> [[TMP0]]35//36vfloat16m4_t test_vset_v_f16m2_f16m4(vfloat16m4_t dest, size_t index, vfloat16m2_t val) {37 return __riscv_vset(dest, 0, val);38}39 40// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vset_v_f16m1_f16m841// CHECK-RV64-SAME: (<vscale x 32 x half> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {42// CHECK-RV64-NEXT: entry:43// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.vector.insert.nxv32f16.nxv4f16(<vscale x 32 x half> [[DEST]], <vscale x 4 x half> [[VAL]], i64 0)44// CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP0]]45//46vfloat16m8_t test_vset_v_f16m1_f16m8(vfloat16m8_t dest, size_t index, vfloat16m1_t val) {47 return __riscv_vset(dest, 0, val);48}49 50// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vset_v_f16m2_f16m851// CHECK-RV64-SAME: (<vscale x 32 x half> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x half> [[VAL:%.*]]) #[[ATTR0]] {52// CHECK-RV64-NEXT: entry:53// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.vector.insert.nxv32f16.nxv8f16(<vscale x 32 x half> [[DEST]], <vscale x 8 x half> [[VAL]], i64 0)54// CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP0]]55//56vfloat16m8_t test_vset_v_f16m2_f16m8(vfloat16m8_t dest, size_t index, vfloat16m2_t val) {57 return __riscv_vset(dest, 0, val);58}59 60// CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vset_v_f16m4_f16m861// CHECK-RV64-SAME: (<vscale x 32 x half> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x half> [[VAL:%.*]]) #[[ATTR0]] {62// CHECK-RV64-NEXT: entry:63// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.vector.insert.nxv32f16.nxv16f16(<vscale x 32 x half> [[DEST]], <vscale x 16 x half> [[VAL]], i64 0)64// CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP0]]65//66vfloat16m8_t test_vset_v_f16m4_f16m8(vfloat16m8_t dest, size_t index, vfloat16m4_t val) {67 return __riscv_vset(dest, 0, val);68}69 70// CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vset_v_f32m1_f32m271// CHECK-RV64-SAME: (<vscale x 4 x float> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {72// CHECK-RV64-NEXT: entry:73// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.vector.insert.nxv4f32.nxv2f32(<vscale x 4 x float> [[DEST]], <vscale x 2 x float> [[VAL]], i64 0)74// CHECK-RV64-NEXT: ret <vscale x 4 x float> [[TMP0]]75//76vfloat32m2_t test_vset_v_f32m1_f32m2(vfloat32m2_t dest, size_t index, vfloat32m1_t val) {77 return __riscv_vset(dest, 0, val);78}79 80// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vset_v_f32m1_f32m481// CHECK-RV64-SAME: (<vscale x 8 x float> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {82// CHECK-RV64-NEXT: entry:83// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv2f32(<vscale x 8 x float> [[DEST]], <vscale x 2 x float> [[VAL]], i64 0)84// CHECK-RV64-NEXT: ret <vscale x 8 x float> [[TMP0]]85//86vfloat32m4_t test_vset_v_f32m1_f32m4(vfloat32m4_t dest, size_t index, vfloat32m1_t val) {87 return __riscv_vset(dest, 0, val);88}89 90// CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vset_v_f32m2_f32m491// CHECK-RV64-SAME: (<vscale x 8 x float> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x float> [[VAL:%.*]]) #[[ATTR0]] {92// CHECK-RV64-NEXT: entry:93// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> [[DEST]], <vscale x 4 x float> [[VAL]], i64 0)94// CHECK-RV64-NEXT: ret <vscale x 8 x float> [[TMP0]]95//96vfloat32m4_t test_vset_v_f32m2_f32m4(vfloat32m4_t dest, size_t index, vfloat32m2_t val) {97 return __riscv_vset(dest, 0, val);98}99 100// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vset_v_f32m1_f32m8101// CHECK-RV64-SAME: (<vscale x 16 x float> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {102// CHECK-RV64-NEXT: entry:103// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.vector.insert.nxv16f32.nxv2f32(<vscale x 16 x float> [[DEST]], <vscale x 2 x float> [[VAL]], i64 0)104// CHECK-RV64-NEXT: ret <vscale x 16 x float> [[TMP0]]105//106vfloat32m8_t test_vset_v_f32m1_f32m8(vfloat32m8_t dest, size_t index, vfloat32m1_t val) {107 return __riscv_vset(dest, 0, val);108}109 110// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vset_v_f32m2_f32m8111// CHECK-RV64-SAME: (<vscale x 16 x float> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x float> [[VAL:%.*]]) #[[ATTR0]] {112// CHECK-RV64-NEXT: entry:113// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.vector.insert.nxv16f32.nxv4f32(<vscale x 16 x float> [[DEST]], <vscale x 4 x float> [[VAL]], i64 0)114// CHECK-RV64-NEXT: ret <vscale x 16 x float> [[TMP0]]115//116vfloat32m8_t test_vset_v_f32m2_f32m8(vfloat32m8_t dest, size_t index, vfloat32m2_t val) {117 return __riscv_vset(dest, 0, val);118}119 120// CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vset_v_f32m4_f32m8121// CHECK-RV64-SAME: (<vscale x 16 x float> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x float> [[VAL:%.*]]) #[[ATTR0]] {122// CHECK-RV64-NEXT: entry:123// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.vector.insert.nxv16f32.nxv8f32(<vscale x 16 x float> [[DEST]], <vscale x 8 x float> [[VAL]], i64 0)124// CHECK-RV64-NEXT: ret <vscale x 16 x float> [[TMP0]]125//126vfloat32m8_t test_vset_v_f32m4_f32m8(vfloat32m8_t dest, size_t index, vfloat32m4_t val) {127 return __riscv_vset(dest, 0, val);128}129 130// CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vset_v_f64m1_f64m2131// CHECK-RV64-SAME: (<vscale x 2 x double> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {132// CHECK-RV64-NEXT: entry:133// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.vector.insert.nxv2f64.nxv1f64(<vscale x 2 x double> [[DEST]], <vscale x 1 x double> [[VAL]], i64 0)134// CHECK-RV64-NEXT: ret <vscale x 2 x double> [[TMP0]]135//136vfloat64m2_t test_vset_v_f64m1_f64m2(vfloat64m2_t dest, size_t index, vfloat64m1_t val) {137 return __riscv_vset(dest, 0, val);138}139 140// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vset_v_f64m1_f64m4141// CHECK-RV64-SAME: (<vscale x 4 x double> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {142// CHECK-RV64-NEXT: entry:143// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.vector.insert.nxv4f64.nxv1f64(<vscale x 4 x double> [[DEST]], <vscale x 1 x double> [[VAL]], i64 0)144// CHECK-RV64-NEXT: ret <vscale x 4 x double> [[TMP0]]145//146vfloat64m4_t test_vset_v_f64m1_f64m4(vfloat64m4_t dest, size_t index, vfloat64m1_t val) {147 return __riscv_vset(dest, 0, val);148}149 150// CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vset_v_f64m2_f64m4151// CHECK-RV64-SAME: (<vscale x 4 x double> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x double> [[VAL:%.*]]) #[[ATTR0]] {152// CHECK-RV64-NEXT: entry:153// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.vector.insert.nxv4f64.nxv2f64(<vscale x 4 x double> [[DEST]], <vscale x 2 x double> [[VAL]], i64 0)154// CHECK-RV64-NEXT: ret <vscale x 4 x double> [[TMP0]]155//156vfloat64m4_t test_vset_v_f64m2_f64m4(vfloat64m4_t dest, size_t index, vfloat64m2_t val) {157 return __riscv_vset(dest, 0, val);158}159 160// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vset_v_f64m1_f64m8161// CHECK-RV64-SAME: (<vscale x 8 x double> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {162// CHECK-RV64-NEXT: entry:163// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.vector.insert.nxv8f64.nxv1f64(<vscale x 8 x double> [[DEST]], <vscale x 1 x double> [[VAL]], i64 0)164// CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]165//166vfloat64m8_t test_vset_v_f64m1_f64m8(vfloat64m8_t dest, size_t index, vfloat64m1_t val) {167 return __riscv_vset(dest, 0, val);168}169 170// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vset_v_f64m2_f64m8171// CHECK-RV64-SAME: (<vscale x 8 x double> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x double> [[VAL:%.*]]) #[[ATTR0]] {172// CHECK-RV64-NEXT: entry:173// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.vector.insert.nxv8f64.nxv2f64(<vscale x 8 x double> [[DEST]], <vscale x 2 x double> [[VAL]], i64 0)174// CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]175//176vfloat64m8_t test_vset_v_f64m2_f64m8(vfloat64m8_t dest, size_t index, vfloat64m2_t val) {177 return __riscv_vset(dest, 0, val);178}179 180// CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vset_v_f64m4_f64m8181// CHECK-RV64-SAME: (<vscale x 8 x double> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x double> [[VAL:%.*]]) #[[ATTR0]] {182// CHECK-RV64-NEXT: entry:183// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.vector.insert.nxv8f64.nxv4f64(<vscale x 8 x double> [[DEST]], <vscale x 4 x double> [[VAL]], i64 0)184// CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]185//186vfloat64m8_t test_vset_v_f64m4_f64m8(vfloat64m8_t dest, size_t index, vfloat64m4_t val) {187 return __riscv_vset(dest, 0, val);188}189 190// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vset_v_i8m1_i8m2191// CHECK-RV64-SAME: (<vscale x 16 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {192// CHECK-RV64-NEXT: entry:193// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.vector.insert.nxv16i8.nxv8i8(<vscale x 16 x i8> [[DEST]], <vscale x 8 x i8> [[VAL]], i64 0)194// CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]195//196vint8m2_t test_vset_v_i8m1_i8m2(vint8m2_t dest, size_t index, vint8m1_t val) {197 return __riscv_vset(dest, 0, val);198}199 200// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vset_v_i8m1_i8m4201// CHECK-RV64-SAME: (<vscale x 32 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {202// CHECK-RV64-NEXT: entry:203// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv8i8(<vscale x 32 x i8> [[DEST]], <vscale x 8 x i8> [[VAL]], i64 0)204// CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]205//206vint8m4_t test_vset_v_i8m1_i8m4(vint8m4_t dest, size_t index, vint8m1_t val) {207 return __riscv_vset(dest, 0, val);208}209 210// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vset_v_i8m2_i8m4211// CHECK-RV64-SAME: (<vscale x 32 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {212// CHECK-RV64-NEXT: entry:213// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> [[DEST]], <vscale x 16 x i8> [[VAL]], i64 0)214// CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]215//216vint8m4_t test_vset_v_i8m2_i8m4(vint8m4_t dest, size_t index, vint8m2_t val) {217 return __riscv_vset(dest, 0, val);218}219 220// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vset_v_i8m1_i8m8221// CHECK-RV64-SAME: (<vscale x 64 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {222// CHECK-RV64-NEXT: entry:223// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv8i8(<vscale x 64 x i8> [[DEST]], <vscale x 8 x i8> [[VAL]], i64 0)224// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]225//226vint8m8_t test_vset_v_i8m1_i8m8(vint8m8_t dest, size_t index, vint8m1_t val) {227 return __riscv_vset(dest, 0, val);228}229 230// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vset_v_i8m2_i8m8231// CHECK-RV64-SAME: (<vscale x 64 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {232// CHECK-RV64-NEXT: entry:233// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv16i8(<vscale x 64 x i8> [[DEST]], <vscale x 16 x i8> [[VAL]], i64 0)234// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]235//236vint8m8_t test_vset_v_i8m2_i8m8(vint8m8_t dest, size_t index, vint8m2_t val) {237 return __riscv_vset(dest, 0, val);238}239 240// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vset_v_i8m4_i8m8241// CHECK-RV64-SAME: (<vscale x 64 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 32 x i8> [[VAL:%.*]]) #[[ATTR0]] {242// CHECK-RV64-NEXT: entry:243// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv32i8(<vscale x 64 x i8> [[DEST]], <vscale x 32 x i8> [[VAL]], i64 0)244// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]245//246vint8m8_t test_vset_v_i8m4_i8m8(vint8m8_t dest, size_t index, vint8m4_t val) {247 return __riscv_vset(dest, 0, val);248}249 250// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vset_v_i16m1_i16m2251// CHECK-RV64-SAME: (<vscale x 8 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {252// CHECK-RV64-NEXT: entry:253// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.vector.insert.nxv8i16.nxv4i16(<vscale x 8 x i16> [[DEST]], <vscale x 4 x i16> [[VAL]], i64 0)254// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]255//256vint16m2_t test_vset_v_i16m1_i16m2(vint16m2_t dest, size_t index, vint16m1_t val) {257 return __riscv_vset(dest, 0, val);258}259 260// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vset_v_i16m1_i16m4261// CHECK-RV64-SAME: (<vscale x 16 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {262// CHECK-RV64-NEXT: entry:263// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv4i16(<vscale x 16 x i16> [[DEST]], <vscale x 4 x i16> [[VAL]], i64 0)264// CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]265//266vint16m4_t test_vset_v_i16m1_i16m4(vint16m4_t dest, size_t index, vint16m1_t val) {267 return __riscv_vset(dest, 0, val);268}269 270// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vset_v_i16m2_i16m4271// CHECK-RV64-SAME: (<vscale x 16 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {272// CHECK-RV64-NEXT: entry:273// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> [[DEST]], <vscale x 8 x i16> [[VAL]], i64 0)274// CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]275//276vint16m4_t test_vset_v_i16m2_i16m4(vint16m4_t dest, size_t index, vint16m2_t val) {277 return __riscv_vset(dest, 0, val);278}279 280// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vset_v_i16m1_i16m8281// CHECK-RV64-SAME: (<vscale x 32 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {282// CHECK-RV64-NEXT: entry:283// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.vector.insert.nxv32i16.nxv4i16(<vscale x 32 x i16> [[DEST]], <vscale x 4 x i16> [[VAL]], i64 0)284// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]285//286vint16m8_t test_vset_v_i16m1_i16m8(vint16m8_t dest, size_t index, vint16m1_t val) {287 return __riscv_vset(dest, 0, val);288}289 290// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vset_v_i16m2_i16m8291// CHECK-RV64-SAME: (<vscale x 32 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {292// CHECK-RV64-NEXT: entry:293// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.vector.insert.nxv32i16.nxv8i16(<vscale x 32 x i16> [[DEST]], <vscale x 8 x i16> [[VAL]], i64 0)294// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]295//296vint16m8_t test_vset_v_i16m2_i16m8(vint16m8_t dest, size_t index, vint16m2_t val) {297 return __riscv_vset(dest, 0, val);298}299 300// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vset_v_i16m4_i16m8301// CHECK-RV64-SAME: (<vscale x 32 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i16> [[VAL:%.*]]) #[[ATTR0]] {302// CHECK-RV64-NEXT: entry:303// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.vector.insert.nxv32i16.nxv16i16(<vscale x 32 x i16> [[DEST]], <vscale x 16 x i16> [[VAL]], i64 0)304// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]305//306vint16m8_t test_vset_v_i16m4_i16m8(vint16m8_t dest, size_t index, vint16m4_t val) {307 return __riscv_vset(dest, 0, val);308}309 310// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vset_v_i32m1_i32m2311// CHECK-RV64-SAME: (<vscale x 4 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {312// CHECK-RV64-NEXT: entry:313// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.nxv2i32(<vscale x 4 x i32> [[DEST]], <vscale x 2 x i32> [[VAL]], i64 0)314// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]315//316vint32m2_t test_vset_v_i32m1_i32m2(vint32m2_t dest, size_t index, vint32m1_t val) {317 return __riscv_vset(dest, 0, val);318}319 320// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vset_v_i32m1_i32m4321// CHECK-RV64-SAME: (<vscale x 8 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {322// CHECK-RV64-NEXT: entry:323// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv2i32(<vscale x 8 x i32> [[DEST]], <vscale x 2 x i32> [[VAL]], i64 0)324// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]325//326vint32m4_t test_vset_v_i32m1_i32m4(vint32m4_t dest, size_t index, vint32m1_t val) {327 return __riscv_vset(dest, 0, val);328}329 330// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vset_v_i32m2_i32m4331// CHECK-RV64-SAME: (<vscale x 8 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {332// CHECK-RV64-NEXT: entry:333// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> [[DEST]], <vscale x 4 x i32> [[VAL]], i64 0)334// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]335//336vint32m4_t test_vset_v_i32m2_i32m4(vint32m4_t dest, size_t index, vint32m2_t val) {337 return __riscv_vset(dest, 0, val);338}339 340// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vset_v_i32m1_i32m8341// CHECK-RV64-SAME: (<vscale x 16 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {342// CHECK-RV64-NEXT: entry:343// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.vector.insert.nxv16i32.nxv2i32(<vscale x 16 x i32> [[DEST]], <vscale x 2 x i32> [[VAL]], i64 0)344// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]345//346vint32m8_t test_vset_v_i32m1_i32m8(vint32m8_t dest, size_t index, vint32m1_t val) {347 return __riscv_vset(dest, 0, val);348}349 350// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vset_v_i32m2_i32m8351// CHECK-RV64-SAME: (<vscale x 16 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {352// CHECK-RV64-NEXT: entry:353// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.vector.insert.nxv16i32.nxv4i32(<vscale x 16 x i32> [[DEST]], <vscale x 4 x i32> [[VAL]], i64 0)354// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]355//356vint32m8_t test_vset_v_i32m2_i32m8(vint32m8_t dest, size_t index, vint32m2_t val) {357 return __riscv_vset(dest, 0, val);358}359 360// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vset_v_i32m4_i32m8361// CHECK-RV64-SAME: (<vscale x 16 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i32> [[VAL:%.*]]) #[[ATTR0]] {362// CHECK-RV64-NEXT: entry:363// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.vector.insert.nxv16i32.nxv8i32(<vscale x 16 x i32> [[DEST]], <vscale x 8 x i32> [[VAL]], i64 0)364// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]365//366vint32m8_t test_vset_v_i32m4_i32m8(vint32m8_t dest, size_t index, vint32m4_t val) {367 return __riscv_vset(dest, 0, val);368}369 370// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vset_v_i64m1_i64m2371// CHECK-RV64-SAME: (<vscale x 2 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {372// CHECK-RV64-NEXT: entry:373// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.nxv1i64(<vscale x 2 x i64> [[DEST]], <vscale x 1 x i64> [[VAL]], i64 0)374// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]375//376vint64m2_t test_vset_v_i64m1_i64m2(vint64m2_t dest, size_t index, vint64m1_t val) {377 return __riscv_vset(dest, 0, val);378}379 380// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vset_v_i64m1_i64m4381// CHECK-RV64-SAME: (<vscale x 4 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {382// CHECK-RV64-NEXT: entry:383// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv1i64(<vscale x 4 x i64> [[DEST]], <vscale x 1 x i64> [[VAL]], i64 0)384// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]385//386vint64m4_t test_vset_v_i64m1_i64m4(vint64m4_t dest, size_t index, vint64m1_t val) {387 return __riscv_vset(dest, 0, val);388}389 390// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vset_v_i64m2_i64m4391// CHECK-RV64-SAME: (<vscale x 4 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {392// CHECK-RV64-NEXT: entry:393// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> [[DEST]], <vscale x 2 x i64> [[VAL]], i64 0)394// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]395//396vint64m4_t test_vset_v_i64m2_i64m4(vint64m4_t dest, size_t index, vint64m2_t val) {397 return __riscv_vset(dest, 0, val);398}399 400// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vset_v_i64m1_i64m8401// CHECK-RV64-SAME: (<vscale x 8 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {402// CHECK-RV64-NEXT: entry:403// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.vector.insert.nxv8i64.nxv1i64(<vscale x 8 x i64> [[DEST]], <vscale x 1 x i64> [[VAL]], i64 0)404// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]405//406vint64m8_t test_vset_v_i64m1_i64m8(vint64m8_t dest, size_t index, vint64m1_t val) {407 return __riscv_vset(dest, 0, val);408}409 410// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vset_v_i64m2_i64m8411// CHECK-RV64-SAME: (<vscale x 8 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {412// CHECK-RV64-NEXT: entry:413// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.vector.insert.nxv8i64.nxv2i64(<vscale x 8 x i64> [[DEST]], <vscale x 2 x i64> [[VAL]], i64 0)414// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]415//416vint64m8_t test_vset_v_i64m2_i64m8(vint64m8_t dest, size_t index, vint64m2_t val) {417 return __riscv_vset(dest, 0, val);418}419 420// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vset_v_i64m4_i64m8421// CHECK-RV64-SAME: (<vscale x 8 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i64> [[VAL:%.*]]) #[[ATTR0]] {422// CHECK-RV64-NEXT: entry:423// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.vector.insert.nxv8i64.nxv4i64(<vscale x 8 x i64> [[DEST]], <vscale x 4 x i64> [[VAL]], i64 0)424// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]425//426vint64m8_t test_vset_v_i64m4_i64m8(vint64m8_t dest, size_t index, vint64m4_t val) {427 return __riscv_vset(dest, 0, val);428}429 430// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vset_v_u8m1_u8m2431// CHECK-RV64-SAME: (<vscale x 16 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {432// CHECK-RV64-NEXT: entry:433// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.vector.insert.nxv16i8.nxv8i8(<vscale x 16 x i8> [[DEST]], <vscale x 8 x i8> [[VAL]], i64 0)434// CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]435//436vuint8m2_t test_vset_v_u8m1_u8m2(vuint8m2_t dest, size_t index, vuint8m1_t val) {437 return __riscv_vset(dest, 0, val);438}439 440// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vset_v_u8m1_u8m4441// CHECK-RV64-SAME: (<vscale x 32 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {442// CHECK-RV64-NEXT: entry:443// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv8i8(<vscale x 32 x i8> [[DEST]], <vscale x 8 x i8> [[VAL]], i64 0)444// CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]445//446vuint8m4_t test_vset_v_u8m1_u8m4(vuint8m4_t dest, size_t index, vuint8m1_t val) {447 return __riscv_vset(dest, 0, val);448}449 450// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vset_v_u8m2_u8m4451// CHECK-RV64-SAME: (<vscale x 32 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {452// CHECK-RV64-NEXT: entry:453// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8> [[DEST]], <vscale x 16 x i8> [[VAL]], i64 0)454// CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]455//456vuint8m4_t test_vset_v_u8m2_u8m4(vuint8m4_t dest, size_t index, vuint8m2_t val) {457 return __riscv_vset(dest, 0, val);458}459 460// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vset_v_u8m1_u8m8461// CHECK-RV64-SAME: (<vscale x 64 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {462// CHECK-RV64-NEXT: entry:463// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv8i8(<vscale x 64 x i8> [[DEST]], <vscale x 8 x i8> [[VAL]], i64 0)464// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]465//466vuint8m8_t test_vset_v_u8m1_u8m8(vuint8m8_t dest, size_t index, vuint8m1_t val) {467 return __riscv_vset(dest, 0, val);468}469 470// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vset_v_u8m2_u8m8471// CHECK-RV64-SAME: (<vscale x 64 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {472// CHECK-RV64-NEXT: entry:473// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv16i8(<vscale x 64 x i8> [[DEST]], <vscale x 16 x i8> [[VAL]], i64 0)474// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]475//476vuint8m8_t test_vset_v_u8m2_u8m8(vuint8m8_t dest, size_t index, vuint8m2_t val) {477 return __riscv_vset(dest, 0, val);478}479 480// CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vset_v_u8m4_u8m8481// CHECK-RV64-SAME: (<vscale x 64 x i8> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 32 x i8> [[VAL:%.*]]) #[[ATTR0]] {482// CHECK-RV64-NEXT: entry:483// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv32i8(<vscale x 64 x i8> [[DEST]], <vscale x 32 x i8> [[VAL]], i64 0)484// CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]485//486vuint8m8_t test_vset_v_u8m4_u8m8(vuint8m8_t dest, size_t index, vuint8m4_t val) {487 return __riscv_vset(dest, 0, val);488}489 490// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vset_v_u16m1_u16m2491// CHECK-RV64-SAME: (<vscale x 8 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {492// CHECK-RV64-NEXT: entry:493// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.vector.insert.nxv8i16.nxv4i16(<vscale x 8 x i16> [[DEST]], <vscale x 4 x i16> [[VAL]], i64 0)494// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]495//496vuint16m2_t test_vset_v_u16m1_u16m2(vuint16m2_t dest, size_t index, vuint16m1_t val) {497 return __riscv_vset(dest, 0, val);498}499 500// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vset_v_u16m1_u16m4501// CHECK-RV64-SAME: (<vscale x 16 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {502// CHECK-RV64-NEXT: entry:503// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv4i16(<vscale x 16 x i16> [[DEST]], <vscale x 4 x i16> [[VAL]], i64 0)504// CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]505//506vuint16m4_t test_vset_v_u16m1_u16m4(vuint16m4_t dest, size_t index, vuint16m1_t val) {507 return __riscv_vset(dest, 0, val);508}509 510// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vset_v_u16m2_u16m4511// CHECK-RV64-SAME: (<vscale x 16 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {512// CHECK-RV64-NEXT: entry:513// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.vector.insert.nxv16i16.nxv8i16(<vscale x 16 x i16> [[DEST]], <vscale x 8 x i16> [[VAL]], i64 0)514// CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]515//516vuint16m4_t test_vset_v_u16m2_u16m4(vuint16m4_t dest, size_t index, vuint16m2_t val) {517 return __riscv_vset(dest, 0, val);518}519 520// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vset_v_u16m1_u16m8521// CHECK-RV64-SAME: (<vscale x 32 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {522// CHECK-RV64-NEXT: entry:523// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.vector.insert.nxv32i16.nxv4i16(<vscale x 32 x i16> [[DEST]], <vscale x 4 x i16> [[VAL]], i64 0)524// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]525//526vuint16m8_t test_vset_v_u16m1_u16m8(vuint16m8_t dest, size_t index, vuint16m1_t val) {527 return __riscv_vset(dest, 0, val);528}529 530// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vset_v_u16m2_u16m8531// CHECK-RV64-SAME: (<vscale x 32 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {532// CHECK-RV64-NEXT: entry:533// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.vector.insert.nxv32i16.nxv8i16(<vscale x 32 x i16> [[DEST]], <vscale x 8 x i16> [[VAL]], i64 0)534// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]535//536vuint16m8_t test_vset_v_u16m2_u16m8(vuint16m8_t dest, size_t index, vuint16m2_t val) {537 return __riscv_vset(dest, 0, val);538}539 540// CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vset_v_u16m4_u16m8541// CHECK-RV64-SAME: (<vscale x 32 x i16> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i16> [[VAL:%.*]]) #[[ATTR0]] {542// CHECK-RV64-NEXT: entry:543// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.vector.insert.nxv32i16.nxv16i16(<vscale x 32 x i16> [[DEST]], <vscale x 16 x i16> [[VAL]], i64 0)544// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]545//546vuint16m8_t test_vset_v_u16m4_u16m8(vuint16m8_t dest, size_t index, vuint16m4_t val) {547 return __riscv_vset(dest, 0, val);548}549 550// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vset_v_u32m1_u32m2551// CHECK-RV64-SAME: (<vscale x 4 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {552// CHECK-RV64-NEXT: entry:553// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.vector.insert.nxv4i32.nxv2i32(<vscale x 4 x i32> [[DEST]], <vscale x 2 x i32> [[VAL]], i64 0)554// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]555//556vuint32m2_t test_vset_v_u32m1_u32m2(vuint32m2_t dest, size_t index, vuint32m1_t val) {557 return __riscv_vset(dest, 0, val);558}559 560// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vset_v_u32m1_u32m4561// CHECK-RV64-SAME: (<vscale x 8 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {562// CHECK-RV64-NEXT: entry:563// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv2i32(<vscale x 8 x i32> [[DEST]], <vscale x 2 x i32> [[VAL]], i64 0)564// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]565//566vuint32m4_t test_vset_v_u32m1_u32m4(vuint32m4_t dest, size_t index, vuint32m1_t val) {567 return __riscv_vset(dest, 0, val);568}569 570// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vset_v_u32m2_u32m4571// CHECK-RV64-SAME: (<vscale x 8 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {572// CHECK-RV64-NEXT: entry:573// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.vector.insert.nxv8i32.nxv4i32(<vscale x 8 x i32> [[DEST]], <vscale x 4 x i32> [[VAL]], i64 0)574// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]575//576vuint32m4_t test_vset_v_u32m2_u32m4(vuint32m4_t dest, size_t index, vuint32m2_t val) {577 return __riscv_vset(dest, 0, val);578}579 580// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vset_v_u32m1_u32m8581// CHECK-RV64-SAME: (<vscale x 16 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {582// CHECK-RV64-NEXT: entry:583// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.vector.insert.nxv16i32.nxv2i32(<vscale x 16 x i32> [[DEST]], <vscale x 2 x i32> [[VAL]], i64 0)584// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]585//586vuint32m8_t test_vset_v_u32m1_u32m8(vuint32m8_t dest, size_t index, vuint32m1_t val) {587 return __riscv_vset(dest, 0, val);588}589 590// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vset_v_u32m2_u32m8591// CHECK-RV64-SAME: (<vscale x 16 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {592// CHECK-RV64-NEXT: entry:593// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.vector.insert.nxv16i32.nxv4i32(<vscale x 16 x i32> [[DEST]], <vscale x 4 x i32> [[VAL]], i64 0)594// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]595//596vuint32m8_t test_vset_v_u32m2_u32m8(vuint32m8_t dest, size_t index, vuint32m2_t val) {597 return __riscv_vset(dest, 0, val);598}599 600// CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vset_v_u32m4_u32m8601// CHECK-RV64-SAME: (<vscale x 16 x i32> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i32> [[VAL:%.*]]) #[[ATTR0]] {602// CHECK-RV64-NEXT: entry:603// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.vector.insert.nxv16i32.nxv8i32(<vscale x 16 x i32> [[DEST]], <vscale x 8 x i32> [[VAL]], i64 0)604// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]605//606vuint32m8_t test_vset_v_u32m4_u32m8(vuint32m8_t dest, size_t index, vuint32m4_t val) {607 return __riscv_vset(dest, 0, val);608}609 610// CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vset_v_u64m1_u64m2611// CHECK-RV64-SAME: (<vscale x 2 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {612// CHECK-RV64-NEXT: entry:613// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.nxv1i64(<vscale x 2 x i64> [[DEST]], <vscale x 1 x i64> [[VAL]], i64 0)614// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]615//616vuint64m2_t test_vset_v_u64m1_u64m2(vuint64m2_t dest, size_t index, vuint64m1_t val) {617 return __riscv_vset(dest, 0, val);618}619 620// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vset_v_u64m1_u64m4621// CHECK-RV64-SAME: (<vscale x 4 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {622// CHECK-RV64-NEXT: entry:623// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv1i64(<vscale x 4 x i64> [[DEST]], <vscale x 1 x i64> [[VAL]], i64 0)624// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]625//626vuint64m4_t test_vset_v_u64m1_u64m4(vuint64m4_t dest, size_t index, vuint64m1_t val) {627 return __riscv_vset(dest, 0, val);628}629 630// CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vset_v_u64m2_u64m4631// CHECK-RV64-SAME: (<vscale x 4 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {632// CHECK-RV64-NEXT: entry:633// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.vector.insert.nxv4i64.nxv2i64(<vscale x 4 x i64> [[DEST]], <vscale x 2 x i64> [[VAL]], i64 0)634// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]635//636vuint64m4_t test_vset_v_u64m2_u64m4(vuint64m4_t dest, size_t index, vuint64m2_t val) {637 return __riscv_vset(dest, 0, val);638}639 640// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vset_v_u64m1_u64m8641// CHECK-RV64-SAME: (<vscale x 8 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {642// CHECK-RV64-NEXT: entry:643// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.vector.insert.nxv8i64.nxv1i64(<vscale x 8 x i64> [[DEST]], <vscale x 1 x i64> [[VAL]], i64 0)644// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]645//646vuint64m8_t test_vset_v_u64m1_u64m8(vuint64m8_t dest, size_t index, vuint64m1_t val) {647 return __riscv_vset(dest, 0, val);648}649 650// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vset_v_u64m2_u64m8651// CHECK-RV64-SAME: (<vscale x 8 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {652// CHECK-RV64-NEXT: entry:653// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.vector.insert.nxv8i64.nxv2i64(<vscale x 8 x i64> [[DEST]], <vscale x 2 x i64> [[VAL]], i64 0)654// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]655//656vuint64m8_t test_vset_v_u64m2_u64m8(vuint64m8_t dest, size_t index, vuint64m2_t val) {657 return __riscv_vset(dest, 0, val);658}659 660// CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vset_v_u64m4_u64m8661// CHECK-RV64-SAME: (<vscale x 8 x i64> [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i64> [[VAL:%.*]]) #[[ATTR0]] {662// CHECK-RV64-NEXT: entry:663// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.vector.insert.nxv8i64.nxv4i64(<vscale x 8 x i64> [[DEST]], <vscale x 4 x i64> [[VAL]], i64 0)664// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]665//666vuint64m8_t test_vset_v_u64m4_u64m8(vuint64m8_t dest, size_t index, vuint64m4_t val) {667 return __riscv_vset(dest, 0, val);668}669 670// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vset_v_f16mf4_f16mf4x2671// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x half> [[VAL:%.*]]) #[[ATTR0]] {672// CHECK-RV64-NEXT: entry:673// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_2t.nxv1f16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST]], <vscale x 1 x half> [[VAL]], i32 0)674// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[TMP0]]675//676vfloat16mf4x2_t test_vset_v_f16mf4_f16mf4x2(vfloat16mf4x2_t dest, size_t index, vfloat16mf4_t val) {677 return __riscv_vset(dest, 0, val);678}679 680// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vset_v_f16mf4_f16mf4x3681// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x half> [[VAL:%.*]]) #[[ATTR0]] {682// CHECK-RV64-NEXT: entry:683// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_3t.nxv1f16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST]], <vscale x 1 x half> [[VAL]], i32 0)684// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[TMP0]]685//686vfloat16mf4x3_t test_vset_v_f16mf4_f16mf4x3(vfloat16mf4x3_t dest, size_t index, vfloat16mf4_t val) {687 return __riscv_vset(dest, 0, val);688}689 690// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vset_v_f16mf4_f16mf4x4691// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x half> [[VAL:%.*]]) #[[ATTR0]] {692// CHECK-RV64-NEXT: entry:693// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_4t.nxv1f16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST]], <vscale x 1 x half> [[VAL]], i32 0)694// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]695//696vfloat16mf4x4_t test_vset_v_f16mf4_f16mf4x4(vfloat16mf4x4_t dest, size_t index, vfloat16mf4_t val) {697 return __riscv_vset(dest, 0, val);698}699 700// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vset_v_f16mf4_f16mf4x5701// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x half> [[VAL:%.*]]) #[[ATTR0]] {702// CHECK-RV64-NEXT: entry:703// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_5t.nxv1f16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST]], <vscale x 1 x half> [[VAL]], i32 0)704// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[TMP0]]705//706vfloat16mf4x5_t test_vset_v_f16mf4_f16mf4x5(vfloat16mf4x5_t dest, size_t index, vfloat16mf4_t val) {707 return __riscv_vset(dest, 0, val);708}709 710// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vset_v_f16mf4_f16mf4x6711// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x half> [[VAL:%.*]]) #[[ATTR0]] {712// CHECK-RV64-NEXT: entry:713// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_6t.nxv1f16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST]], <vscale x 1 x half> [[VAL]], i32 0)714// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[TMP0]]715//716vfloat16mf4x6_t test_vset_v_f16mf4_f16mf4x6(vfloat16mf4x6_t dest, size_t index, vfloat16mf4_t val) {717 return __riscv_vset(dest, 0, val);718}719 720// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vset_v_f16mf4_f16mf4x7721// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x half> [[VAL:%.*]]) #[[ATTR0]] {722// CHECK-RV64-NEXT: entry:723// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_7t.nxv1f16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST]], <vscale x 1 x half> [[VAL]], i32 0)724// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]725//726vfloat16mf4x7_t test_vset_v_f16mf4_f16mf4x7(vfloat16mf4x7_t dest, size_t index, vfloat16mf4_t val) {727 return __riscv_vset(dest, 0, val);728}729 730// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vset_v_f16mf4_f16mf4x8731// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x half> [[VAL:%.*]]) #[[ATTR0]] {732// CHECK-RV64-NEXT: entry:733// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_8t.nxv1f16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST]], <vscale x 1 x half> [[VAL]], i32 0)734// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[TMP0]]735//736vfloat16mf4x8_t test_vset_v_f16mf4_f16mf4x8(vfloat16mf4x8_t dest, size_t index, vfloat16mf4_t val) {737 return __riscv_vset(dest, 0, val);738}739 740// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vset_v_f16mf2_f16mf2x2741// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x half> [[VAL:%.*]]) #[[ATTR0]] {742// CHECK-RV64-NEXT: entry:743// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_2t.nxv2f16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST]], <vscale x 2 x half> [[VAL]], i32 0)744// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[TMP0]]745//746vfloat16mf2x2_t test_vset_v_f16mf2_f16mf2x2(vfloat16mf2x2_t dest, size_t index, vfloat16mf2_t val) {747 return __riscv_vset(dest, 0, val);748}749 750// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vset_v_f16mf2_f16mf2x3751// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x half> [[VAL:%.*]]) #[[ATTR0]] {752// CHECK-RV64-NEXT: entry:753// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_3t.nxv2f16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST]], <vscale x 2 x half> [[VAL]], i32 0)754// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[TMP0]]755//756vfloat16mf2x3_t test_vset_v_f16mf2_f16mf2x3(vfloat16mf2x3_t dest, size_t index, vfloat16mf2_t val) {757 return __riscv_vset(dest, 0, val);758}759 760// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vset_v_f16mf2_f16mf2x4761// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x half> [[VAL:%.*]]) #[[ATTR0]] {762// CHECK-RV64-NEXT: entry:763// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_4t.nxv2f16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST]], <vscale x 2 x half> [[VAL]], i32 0)764// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]765//766vfloat16mf2x4_t test_vset_v_f16mf2_f16mf2x4(vfloat16mf2x4_t dest, size_t index, vfloat16mf2_t val) {767 return __riscv_vset(dest, 0, val);768}769 770// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vset_v_f16mf2_f16mf2x5771// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x half> [[VAL:%.*]]) #[[ATTR0]] {772// CHECK-RV64-NEXT: entry:773// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_5t.nxv2f16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST]], <vscale x 2 x half> [[VAL]], i32 0)774// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP0]]775//776vfloat16mf2x5_t test_vset_v_f16mf2_f16mf2x5(vfloat16mf2x5_t dest, size_t index, vfloat16mf2_t val) {777 return __riscv_vset(dest, 0, val);778}779 780// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vset_v_f16mf2_f16mf2x6781// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x half> [[VAL:%.*]]) #[[ATTR0]] {782// CHECK-RV64-NEXT: entry:783// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_6t.nxv2f16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST]], <vscale x 2 x half> [[VAL]], i32 0)784// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[TMP0]]785//786vfloat16mf2x6_t test_vset_v_f16mf2_f16mf2x6(vfloat16mf2x6_t dest, size_t index, vfloat16mf2_t val) {787 return __riscv_vset(dest, 0, val);788}789 790// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vset_v_f16mf2_f16mf2x7791// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x half> [[VAL:%.*]]) #[[ATTR0]] {792// CHECK-RV64-NEXT: entry:793// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_7t.nxv2f16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST]], <vscale x 2 x half> [[VAL]], i32 0)794// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]795//796vfloat16mf2x7_t test_vset_v_f16mf2_f16mf2x7(vfloat16mf2x7_t dest, size_t index, vfloat16mf2_t val) {797 return __riscv_vset(dest, 0, val);798}799 800// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vset_v_f16mf2_f16mf2x8801// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x half> [[VAL:%.*]]) #[[ATTR0]] {802// CHECK-RV64-NEXT: entry:803// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_8t.nxv2f16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST]], <vscale x 2 x half> [[VAL]], i32 0)804// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[TMP0]]805//806vfloat16mf2x8_t test_vset_v_f16mf2_f16mf2x8(vfloat16mf2x8_t dest, size_t index, vfloat16mf2_t val) {807 return __riscv_vset(dest, 0, val);808}809 810// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_f16m1_f16m1x2811// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {812// CHECK-RV64-NEXT: entry:813// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv4f16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 4 x half> [[VAL]], i32 0)814// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]815//816vfloat16m1x2_t test_vset_v_f16m1_f16m1x2(vfloat16m1x2_t dest, size_t index, vfloat16m1_t val) {817 return __riscv_vset(dest, 0, val);818}819 820// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_f16m1_f16m1x3821// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {822// CHECK-RV64-NEXT: entry:823// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv4f16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 4 x half> [[VAL]], i32 0)824// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]825//826vfloat16m1x3_t test_vset_v_f16m1_f16m1x3(vfloat16m1x3_t dest, size_t index, vfloat16m1_t val) {827 return __riscv_vset(dest, 0, val);828}829 830// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_f16m1_f16m1x4831// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {832// CHECK-RV64-NEXT: entry:833// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv4f16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 4 x half> [[VAL]], i32 0)834// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]835//836vfloat16m1x4_t test_vset_v_f16m1_f16m1x4(vfloat16m1x4_t dest, size_t index, vfloat16m1_t val) {837 return __riscv_vset(dest, 0, val);838}839 840// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_f16m1_f16m1x5841// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {842// CHECK-RV64-NEXT: entry:843// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv4f16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 4 x half> [[VAL]], i32 0)844// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]845//846vfloat16m1x5_t test_vset_v_f16m1_f16m1x5(vfloat16m1x5_t dest, size_t index, vfloat16m1_t val) {847 return __riscv_vset(dest, 0, val);848}849 850// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_f16m1_f16m1x6851// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {852// CHECK-RV64-NEXT: entry:853// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv4f16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 4 x half> [[VAL]], i32 0)854// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]855//856vfloat16m1x6_t test_vset_v_f16m1_f16m1x6(vfloat16m1x6_t dest, size_t index, vfloat16m1_t val) {857 return __riscv_vset(dest, 0, val);858}859 860// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_f16m1_f16m1x7861// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {862// CHECK-RV64-NEXT: entry:863// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv4f16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 4 x half> [[VAL]], i32 0)864// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]865//866vfloat16m1x7_t test_vset_v_f16m1_f16m1x7(vfloat16m1x7_t dest, size_t index, vfloat16m1_t val) {867 return __riscv_vset(dest, 0, val);868}869 870// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_f16m1_f16m1x8871// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x half> [[VAL:%.*]]) #[[ATTR0]] {872// CHECK-RV64-NEXT: entry:873// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv4f16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 4 x half> [[VAL]], i32 0)874// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]875//876vfloat16m1x8_t test_vset_v_f16m1_f16m1x8(vfloat16m1x8_t dest, size_t index, vfloat16m1_t val) {877 return __riscv_vset(dest, 0, val);878}879 880// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_f16m2_f16m2x2881// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x half> [[VAL:%.*]]) #[[ATTR0]] {882// CHECK-RV64-NEXT: entry:883// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv8f16(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 8 x half> [[VAL]], i32 0)884// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]885//886vfloat16m2x2_t test_vset_v_f16m2_f16m2x2(vfloat16m2x2_t dest, size_t index, vfloat16m2_t val) {887 return __riscv_vset(dest, 0, val);888}889 890// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_f16m2_f16m2x3891// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x half> [[VAL:%.*]]) #[[ATTR0]] {892// CHECK-RV64-NEXT: entry:893// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv8f16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 8 x half> [[VAL]], i32 0)894// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]895//896vfloat16m2x3_t test_vset_v_f16m2_f16m2x3(vfloat16m2x3_t dest, size_t index, vfloat16m2_t val) {897 return __riscv_vset(dest, 0, val);898}899 900// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_f16m2_f16m2x4901// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x half> [[VAL:%.*]]) #[[ATTR0]] {902// CHECK-RV64-NEXT: entry:903// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv8f16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 8 x half> [[VAL]], i32 0)904// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]905//906vfloat16m2x4_t test_vset_v_f16m2_f16m2x4(vfloat16m2x4_t dest, size_t index, vfloat16m2_t val) {907 return __riscv_vset(dest, 0, val);908}909 910// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_f16m4_f16m4x2911// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x half> [[VAL:%.*]]) #[[ATTR0]] {912// CHECK-RV64-NEXT: entry:913// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv16f16(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 16 x half> [[VAL]], i32 0)914// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]915//916vfloat16m4x2_t test_vset_v_f16m4_f16m4x2(vfloat16m4x2_t dest, size_t index, vfloat16m4_t val) {917 return __riscv_vset(dest, 0, val);918}919 920// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vset_v_f32mf2_f32mf2x2921// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x float> [[VAL:%.*]]) #[[ATTR0]] {922// CHECK-RV64-NEXT: entry:923// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_2t.nxv1f32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST]], <vscale x 1 x float> [[VAL]], i32 0)924// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[TMP0]]925//926vfloat32mf2x2_t test_vset_v_f32mf2_f32mf2x2(vfloat32mf2x2_t dest, size_t index, vfloat32mf2_t val) {927 return __riscv_vset(dest, 0, val);928}929 930// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vset_v_f32mf2_f32mf2x3931// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x float> [[VAL:%.*]]) #[[ATTR0]] {932// CHECK-RV64-NEXT: entry:933// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_3t.nxv1f32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST]], <vscale x 1 x float> [[VAL]], i32 0)934// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[TMP0]]935//936vfloat32mf2x3_t test_vset_v_f32mf2_f32mf2x3(vfloat32mf2x3_t dest, size_t index, vfloat32mf2_t val) {937 return __riscv_vset(dest, 0, val);938}939 940// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vset_v_f32mf2_f32mf2x4941// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x float> [[VAL:%.*]]) #[[ATTR0]] {942// CHECK-RV64-NEXT: entry:943// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_4t.nxv1f32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST]], <vscale x 1 x float> [[VAL]], i32 0)944// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]945//946vfloat32mf2x4_t test_vset_v_f32mf2_f32mf2x4(vfloat32mf2x4_t dest, size_t index, vfloat32mf2_t val) {947 return __riscv_vset(dest, 0, val);948}949 950// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vset_v_f32mf2_f32mf2x5951// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x float> [[VAL:%.*]]) #[[ATTR0]] {952// CHECK-RV64-NEXT: entry:953// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_5t.nxv1f32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST]], <vscale x 1 x float> [[VAL]], i32 0)954// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP0]]955//956vfloat32mf2x5_t test_vset_v_f32mf2_f32mf2x5(vfloat32mf2x5_t dest, size_t index, vfloat32mf2_t val) {957 return __riscv_vset(dest, 0, val);958}959 960// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vset_v_f32mf2_f32mf2x6961// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x float> [[VAL:%.*]]) #[[ATTR0]] {962// CHECK-RV64-NEXT: entry:963// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_6t.nxv1f32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST]], <vscale x 1 x float> [[VAL]], i32 0)964// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[TMP0]]965//966vfloat32mf2x6_t test_vset_v_f32mf2_f32mf2x6(vfloat32mf2x6_t dest, size_t index, vfloat32mf2_t val) {967 return __riscv_vset(dest, 0, val);968}969 970// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vset_v_f32mf2_f32mf2x7971// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x float> [[VAL:%.*]]) #[[ATTR0]] {972// CHECK-RV64-NEXT: entry:973// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_7t.nxv1f32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST]], <vscale x 1 x float> [[VAL]], i32 0)974// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]975//976vfloat32mf2x7_t test_vset_v_f32mf2_f32mf2x7(vfloat32mf2x7_t dest, size_t index, vfloat32mf2_t val) {977 return __riscv_vset(dest, 0, val);978}979 980// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vset_v_f32mf2_f32mf2x8981// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x float> [[VAL:%.*]]) #[[ATTR0]] {982// CHECK-RV64-NEXT: entry:983// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_8t.nxv1f32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST]], <vscale x 1 x float> [[VAL]], i32 0)984// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[TMP0]]985//986vfloat32mf2x8_t test_vset_v_f32mf2_f32mf2x8(vfloat32mf2x8_t dest, size_t index, vfloat32mf2_t val) {987 return __riscv_vset(dest, 0, val);988}989 990// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_f32m1_f32m1x2991// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {992// CHECK-RV64-NEXT: entry:993// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv2f32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 2 x float> [[VAL]], i32 0)994// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]995//996vfloat32m1x2_t test_vset_v_f32m1_f32m1x2(vfloat32m1x2_t dest, size_t index, vfloat32m1_t val) {997 return __riscv_vset(dest, 0, val);998}999 1000// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_f32m1_f32m1x31001// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {1002// CHECK-RV64-NEXT: entry:1003// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv2f32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 2 x float> [[VAL]], i32 0)1004// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]1005//1006vfloat32m1x3_t test_vset_v_f32m1_f32m1x3(vfloat32m1x3_t dest, size_t index, vfloat32m1_t val) {1007 return __riscv_vset(dest, 0, val);1008}1009 1010// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_f32m1_f32m1x41011// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {1012// CHECK-RV64-NEXT: entry:1013// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv2f32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 2 x float> [[VAL]], i32 0)1014// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]1015//1016vfloat32m1x4_t test_vset_v_f32m1_f32m1x4(vfloat32m1x4_t dest, size_t index, vfloat32m1_t val) {1017 return __riscv_vset(dest, 0, val);1018}1019 1020// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_f32m1_f32m1x51021// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {1022// CHECK-RV64-NEXT: entry:1023// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv2f32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 2 x float> [[VAL]], i32 0)1024// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]1025//1026vfloat32m1x5_t test_vset_v_f32m1_f32m1x5(vfloat32m1x5_t dest, size_t index, vfloat32m1_t val) {1027 return __riscv_vset(dest, 0, val);1028}1029 1030// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_f32m1_f32m1x61031// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {1032// CHECK-RV64-NEXT: entry:1033// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv2f32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 2 x float> [[VAL]], i32 0)1034// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]1035//1036vfloat32m1x6_t test_vset_v_f32m1_f32m1x6(vfloat32m1x6_t dest, size_t index, vfloat32m1_t val) {1037 return __riscv_vset(dest, 0, val);1038}1039 1040// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_f32m1_f32m1x71041// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {1042// CHECK-RV64-NEXT: entry:1043// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv2f32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 2 x float> [[VAL]], i32 0)1044// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]1045//1046vfloat32m1x7_t test_vset_v_f32m1_f32m1x7(vfloat32m1x7_t dest, size_t index, vfloat32m1_t val) {1047 return __riscv_vset(dest, 0, val);1048}1049 1050// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_f32m1_f32m1x81051// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x float> [[VAL:%.*]]) #[[ATTR0]] {1052// CHECK-RV64-NEXT: entry:1053// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv2f32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 2 x float> [[VAL]], i32 0)1054// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]1055//1056vfloat32m1x8_t test_vset_v_f32m1_f32m1x8(vfloat32m1x8_t dest, size_t index, vfloat32m1_t val) {1057 return __riscv_vset(dest, 0, val);1058}1059 1060// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_f32m2_f32m2x21061// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x float> [[VAL:%.*]]) #[[ATTR0]] {1062// CHECK-RV64-NEXT: entry:1063// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv4f32(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 4 x float> [[VAL]], i32 0)1064// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]1065//1066vfloat32m2x2_t test_vset_v_f32m2_f32m2x2(vfloat32m2x2_t dest, size_t index, vfloat32m2_t val) {1067 return __riscv_vset(dest, 0, val);1068}1069 1070// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_f32m2_f32m2x31071// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x float> [[VAL:%.*]]) #[[ATTR0]] {1072// CHECK-RV64-NEXT: entry:1073// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv4f32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 4 x float> [[VAL]], i32 0)1074// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]1075//1076vfloat32m2x3_t test_vset_v_f32m2_f32m2x3(vfloat32m2x3_t dest, size_t index, vfloat32m2_t val) {1077 return __riscv_vset(dest, 0, val);1078}1079 1080// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_f32m2_f32m2x41081// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x float> [[VAL:%.*]]) #[[ATTR0]] {1082// CHECK-RV64-NEXT: entry:1083// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv4f32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 4 x float> [[VAL]], i32 0)1084// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]1085//1086vfloat32m2x4_t test_vset_v_f32m2_f32m2x4(vfloat32m2x4_t dest, size_t index, vfloat32m2_t val) {1087 return __riscv_vset(dest, 0, val);1088}1089 1090// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_f32m4_f32m4x21091// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x float> [[VAL:%.*]]) #[[ATTR0]] {1092// CHECK-RV64-NEXT: entry:1093// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv8f32(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 8 x float> [[VAL]], i32 0)1094// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]1095//1096vfloat32m4x2_t test_vset_v_f32m4_f32m4x2(vfloat32m4x2_t dest, size_t index, vfloat32m4_t val) {1097 return __riscv_vset(dest, 0, val);1098}1099 1100// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_f64m1_f64m1x21101// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {1102// CHECK-RV64-NEXT: entry:1103// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv1f64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 1 x double> [[VAL]], i32 0)1104// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]1105//1106vfloat64m1x2_t test_vset_v_f64m1_f64m1x2(vfloat64m1x2_t dest, size_t index, vfloat64m1_t val) {1107 return __riscv_vset(dest, 0, val);1108}1109 1110// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_f64m1_f64m1x31111// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {1112// CHECK-RV64-NEXT: entry:1113// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv1f64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 1 x double> [[VAL]], i32 0)1114// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]1115//1116vfloat64m1x3_t test_vset_v_f64m1_f64m1x3(vfloat64m1x3_t dest, size_t index, vfloat64m1_t val) {1117 return __riscv_vset(dest, 0, val);1118}1119 1120// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_f64m1_f64m1x41121// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {1122// CHECK-RV64-NEXT: entry:1123// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv1f64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 1 x double> [[VAL]], i32 0)1124// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]1125//1126vfloat64m1x4_t test_vset_v_f64m1_f64m1x4(vfloat64m1x4_t dest, size_t index, vfloat64m1_t val) {1127 return __riscv_vset(dest, 0, val);1128}1129 1130// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_f64m1_f64m1x51131// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {1132// CHECK-RV64-NEXT: entry:1133// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv1f64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 1 x double> [[VAL]], i32 0)1134// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]1135//1136vfloat64m1x5_t test_vset_v_f64m1_f64m1x5(vfloat64m1x5_t dest, size_t index, vfloat64m1_t val) {1137 return __riscv_vset(dest, 0, val);1138}1139 1140// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_f64m1_f64m1x61141// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {1142// CHECK-RV64-NEXT: entry:1143// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv1f64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 1 x double> [[VAL]], i32 0)1144// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]1145//1146vfloat64m1x6_t test_vset_v_f64m1_f64m1x6(vfloat64m1x6_t dest, size_t index, vfloat64m1_t val) {1147 return __riscv_vset(dest, 0, val);1148}1149 1150// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_f64m1_f64m1x71151// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {1152// CHECK-RV64-NEXT: entry:1153// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv1f64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 1 x double> [[VAL]], i32 0)1154// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]1155//1156vfloat64m1x7_t test_vset_v_f64m1_f64m1x7(vfloat64m1x7_t dest, size_t index, vfloat64m1_t val) {1157 return __riscv_vset(dest, 0, val);1158}1159 1160// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_f64m1_f64m1x81161// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x double> [[VAL:%.*]]) #[[ATTR0]] {1162// CHECK-RV64-NEXT: entry:1163// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv1f64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 1 x double> [[VAL]], i32 0)1164// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]1165//1166vfloat64m1x8_t test_vset_v_f64m1_f64m1x8(vfloat64m1x8_t dest, size_t index, vfloat64m1_t val) {1167 return __riscv_vset(dest, 0, val);1168}1169 1170// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_f64m2_f64m2x21171// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x double> [[VAL:%.*]]) #[[ATTR0]] {1172// CHECK-RV64-NEXT: entry:1173// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv2f64(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 2 x double> [[VAL]], i32 0)1174// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]1175//1176vfloat64m2x2_t test_vset_v_f64m2_f64m2x2(vfloat64m2x2_t dest, size_t index, vfloat64m2_t val) {1177 return __riscv_vset(dest, 0, val);1178}1179 1180// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_f64m2_f64m2x31181// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x double> [[VAL:%.*]]) #[[ATTR0]] {1182// CHECK-RV64-NEXT: entry:1183// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv2f64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 2 x double> [[VAL]], i32 0)1184// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]1185//1186vfloat64m2x3_t test_vset_v_f64m2_f64m2x3(vfloat64m2x3_t dest, size_t index, vfloat64m2_t val) {1187 return __riscv_vset(dest, 0, val);1188}1189 1190// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_f64m2_f64m2x41191// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x double> [[VAL:%.*]]) #[[ATTR0]] {1192// CHECK-RV64-NEXT: entry:1193// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv2f64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 2 x double> [[VAL]], i32 0)1194// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]1195//1196vfloat64m2x4_t test_vset_v_f64m2_f64m2x4(vfloat64m2x4_t dest, size_t index, vfloat64m2_t val) {1197 return __riscv_vset(dest, 0, val);1198}1199 1200// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_f64m4_f64m4x21201// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x double> [[VAL:%.*]]) #[[ATTR0]] {1202// CHECK-RV64-NEXT: entry:1203// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv4f64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 4 x double> [[VAL]], i32 0)1204// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]1205//1206vfloat64m4x2_t test_vset_v_f64m4_f64m4x2(vfloat64m4x2_t dest, size_t index, vfloat64m4_t val) {1207 return __riscv_vset(dest, 0, val);1208}1209 1210// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @test_vset_v_i8mf8_i8mf8x21211// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {1212// CHECK-RV64-NEXT: entry:1213// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)1214// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 2) [[TMP0]]1215//1216vint8mf8x2_t test_vset_v_i8mf8_i8mf8x2(vint8mf8x2_t dest, size_t index, vint8mf8_t val) {1217 return __riscv_vset(dest, 0, val);1218}1219 1220// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @test_vset_v_i8mf8_i8mf8x31221// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {1222// CHECK-RV64-NEXT: entry:1223// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)1224// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 3) [[TMP0]]1225//1226vint8mf8x3_t test_vset_v_i8mf8_i8mf8x3(vint8mf8x3_t dest, size_t index, vint8mf8_t val) {1227 return __riscv_vset(dest, 0, val);1228}1229 1230// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @test_vset_v_i8mf8_i8mf8x41231// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {1232// CHECK-RV64-NEXT: entry:1233// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)1234// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 4) [[TMP0]]1235//1236vint8mf8x4_t test_vset_v_i8mf8_i8mf8x4(vint8mf8x4_t dest, size_t index, vint8mf8_t val) {1237 return __riscv_vset(dest, 0, val);1238}1239 1240// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @test_vset_v_i8mf8_i8mf8x51241// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {1242// CHECK-RV64-NEXT: entry:1243// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)1244// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 5) [[TMP0]]1245//1246vint8mf8x5_t test_vset_v_i8mf8_i8mf8x5(vint8mf8x5_t dest, size_t index, vint8mf8_t val) {1247 return __riscv_vset(dest, 0, val);1248}1249 1250// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @test_vset_v_i8mf8_i8mf8x61251// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {1252// CHECK-RV64-NEXT: entry:1253// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)1254// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 6) [[TMP0]]1255//1256vint8mf8x6_t test_vset_v_i8mf8_i8mf8x6(vint8mf8x6_t dest, size_t index, vint8mf8_t val) {1257 return __riscv_vset(dest, 0, val);1258}1259 1260// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @test_vset_v_i8mf8_i8mf8x71261// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {1262// CHECK-RV64-NEXT: entry:1263// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)1264// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 7) [[TMP0]]1265//1266vint8mf8x7_t test_vset_v_i8mf8_i8mf8x7(vint8mf8x7_t dest, size_t index, vint8mf8_t val) {1267 return __riscv_vset(dest, 0, val);1268}1269 1270// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @test_vset_v_i8mf8_i8mf8x81271// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {1272// CHECK-RV64-NEXT: entry:1273// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)1274// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 8) [[TMP0]]1275//1276vint8mf8x8_t test_vset_v_i8mf8_i8mf8x8(vint8mf8x8_t dest, size_t index, vint8mf8_t val) {1277 return __riscv_vset(dest, 0, val);1278}1279 1280// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vset_v_i8mf4_i8mf4x21281// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {1282// CHECK-RV64-NEXT: entry:1283// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)1284// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[TMP0]]1285//1286vint8mf4x2_t test_vset_v_i8mf4_i8mf4x2(vint8mf4x2_t dest, size_t index, vint8mf4_t val) {1287 return __riscv_vset(dest, 0, val);1288}1289 1290// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vset_v_i8mf4_i8mf4x31291// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {1292// CHECK-RV64-NEXT: entry:1293// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)1294// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[TMP0]]1295//1296vint8mf4x3_t test_vset_v_i8mf4_i8mf4x3(vint8mf4x3_t dest, size_t index, vint8mf4_t val) {1297 return __riscv_vset(dest, 0, val);1298}1299 1300// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vset_v_i8mf4_i8mf4x41301// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {1302// CHECK-RV64-NEXT: entry:1303// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)1304// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]1305//1306vint8mf4x4_t test_vset_v_i8mf4_i8mf4x4(vint8mf4x4_t dest, size_t index, vint8mf4_t val) {1307 return __riscv_vset(dest, 0, val);1308}1309 1310// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vset_v_i8mf4_i8mf4x51311// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {1312// CHECK-RV64-NEXT: entry:1313// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)1314// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[TMP0]]1315//1316vint8mf4x5_t test_vset_v_i8mf4_i8mf4x5(vint8mf4x5_t dest, size_t index, vint8mf4_t val) {1317 return __riscv_vset(dest, 0, val);1318}1319 1320// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vset_v_i8mf4_i8mf4x61321// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {1322// CHECK-RV64-NEXT: entry:1323// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)1324// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[TMP0]]1325//1326vint8mf4x6_t test_vset_v_i8mf4_i8mf4x6(vint8mf4x6_t dest, size_t index, vint8mf4_t val) {1327 return __riscv_vset(dest, 0, val);1328}1329 1330// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vset_v_i8mf4_i8mf4x71331// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {1332// CHECK-RV64-NEXT: entry:1333// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)1334// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]1335//1336vint8mf4x7_t test_vset_v_i8mf4_i8mf4x7(vint8mf4x7_t dest, size_t index, vint8mf4_t val) {1337 return __riscv_vset(dest, 0, val);1338}1339 1340// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vset_v_i8mf4_i8mf4x81341// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {1342// CHECK-RV64-NEXT: entry:1343// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)1344// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[TMP0]]1345//1346vint8mf4x8_t test_vset_v_i8mf4_i8mf4x8(vint8mf4x8_t dest, size_t index, vint8mf4_t val) {1347 return __riscv_vset(dest, 0, val);1348}1349 1350// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vset_v_i8mf2_i8mf2x21351// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {1352// CHECK-RV64-NEXT: entry:1353// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)1354// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[TMP0]]1355//1356vint8mf2x2_t test_vset_v_i8mf2_i8mf2x2(vint8mf2x2_t dest, size_t index, vint8mf2_t val) {1357 return __riscv_vset(dest, 0, val);1358}1359 1360// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vset_v_i8mf2_i8mf2x31361// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {1362// CHECK-RV64-NEXT: entry:1363// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)1364// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[TMP0]]1365//1366vint8mf2x3_t test_vset_v_i8mf2_i8mf2x3(vint8mf2x3_t dest, size_t index, vint8mf2_t val) {1367 return __riscv_vset(dest, 0, val);1368}1369 1370// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vset_v_i8mf2_i8mf2x41371// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {1372// CHECK-RV64-NEXT: entry:1373// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)1374// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]1375//1376vint8mf2x4_t test_vset_v_i8mf2_i8mf2x4(vint8mf2x4_t dest, size_t index, vint8mf2_t val) {1377 return __riscv_vset(dest, 0, val);1378}1379 1380// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vset_v_i8mf2_i8mf2x51381// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {1382// CHECK-RV64-NEXT: entry:1383// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)1384// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP0]]1385//1386vint8mf2x5_t test_vset_v_i8mf2_i8mf2x5(vint8mf2x5_t dest, size_t index, vint8mf2_t val) {1387 return __riscv_vset(dest, 0, val);1388}1389 1390// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vset_v_i8mf2_i8mf2x61391// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {1392// CHECK-RV64-NEXT: entry:1393// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)1394// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[TMP0]]1395//1396vint8mf2x6_t test_vset_v_i8mf2_i8mf2x6(vint8mf2x6_t dest, size_t index, vint8mf2_t val) {1397 return __riscv_vset(dest, 0, val);1398}1399 1400// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vset_v_i8mf2_i8mf2x71401// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {1402// CHECK-RV64-NEXT: entry:1403// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)1404// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]1405//1406vint8mf2x7_t test_vset_v_i8mf2_i8mf2x7(vint8mf2x7_t dest, size_t index, vint8mf2_t val) {1407 return __riscv_vset(dest, 0, val);1408}1409 1410// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vset_v_i8mf2_i8mf2x81411// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {1412// CHECK-RV64-NEXT: entry:1413// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)1414// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[TMP0]]1415//1416vint8mf2x8_t test_vset_v_i8mf2_i8mf2x8(vint8mf2x8_t dest, size_t index, vint8mf2_t val) {1417 return __riscv_vset(dest, 0, val);1418}1419 1420// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_i8m1_i8m1x21421// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {1422// CHECK-RV64-NEXT: entry:1423// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)1424// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]1425//1426vint8m1x2_t test_vset_v_i8m1_i8m1x2(vint8m1x2_t dest, size_t index, vint8m1_t val) {1427 return __riscv_vset(dest, 0, val);1428}1429 1430// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_i8m1_i8m1x31431// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {1432// CHECK-RV64-NEXT: entry:1433// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)1434// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]1435//1436vint8m1x3_t test_vset_v_i8m1_i8m1x3(vint8m1x3_t dest, size_t index, vint8m1_t val) {1437 return __riscv_vset(dest, 0, val);1438}1439 1440// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_i8m1_i8m1x41441// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {1442// CHECK-RV64-NEXT: entry:1443// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)1444// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]1445//1446vint8m1x4_t test_vset_v_i8m1_i8m1x4(vint8m1x4_t dest, size_t index, vint8m1_t val) {1447 return __riscv_vset(dest, 0, val);1448}1449 1450// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_i8m1_i8m1x51451// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {1452// CHECK-RV64-NEXT: entry:1453// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)1454// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]1455//1456vint8m1x5_t test_vset_v_i8m1_i8m1x5(vint8m1x5_t dest, size_t index, vint8m1_t val) {1457 return __riscv_vset(dest, 0, val);1458}1459 1460// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_i8m1_i8m1x61461// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {1462// CHECK-RV64-NEXT: entry:1463// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)1464// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]1465//1466vint8m1x6_t test_vset_v_i8m1_i8m1x6(vint8m1x6_t dest, size_t index, vint8m1_t val) {1467 return __riscv_vset(dest, 0, val);1468}1469 1470// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_i8m1_i8m1x71471// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {1472// CHECK-RV64-NEXT: entry:1473// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)1474// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]1475//1476vint8m1x7_t test_vset_v_i8m1_i8m1x7(vint8m1x7_t dest, size_t index, vint8m1_t val) {1477 return __riscv_vset(dest, 0, val);1478}1479 1480// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_i8m1_i8m1x81481// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {1482// CHECK-RV64-NEXT: entry:1483// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)1484// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]1485//1486vint8m1x8_t test_vset_v_i8m1_i8m1x8(vint8m1x8_t dest, size_t index, vint8m1_t val) {1487 return __riscv_vset(dest, 0, val);1488}1489 1490// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_i8m2_i8m2x21491// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {1492// CHECK-RV64-NEXT: entry:1493// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 16 x i8> [[VAL]], i32 0)1494// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]1495//1496vint8m2x2_t test_vset_v_i8m2_i8m2x2(vint8m2x2_t dest, size_t index, vint8m2_t val) {1497 return __riscv_vset(dest, 0, val);1498}1499 1500// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_i8m2_i8m2x31501// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {1502// CHECK-RV64-NEXT: entry:1503// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 16 x i8> [[VAL]], i32 0)1504// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]1505//1506vint8m2x3_t test_vset_v_i8m2_i8m2x3(vint8m2x3_t dest, size_t index, vint8m2_t val) {1507 return __riscv_vset(dest, 0, val);1508}1509 1510// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_i8m2_i8m2x41511// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {1512// CHECK-RV64-NEXT: entry:1513// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 16 x i8> [[VAL]], i32 0)1514// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]1515//1516vint8m2x4_t test_vset_v_i8m2_i8m2x4(vint8m2x4_t dest, size_t index, vint8m2_t val) {1517 return __riscv_vset(dest, 0, val);1518}1519 1520// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_i8m4_i8m4x21521// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 32 x i8> [[VAL:%.*]]) #[[ATTR0]] {1522// CHECK-RV64-NEXT: entry:1523// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv32i8(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 32 x i8> [[VAL]], i32 0)1524// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]1525//1526vint8m4x2_t test_vset_v_i8m4_i8m4x2(vint8m4x2_t dest, size_t index, vint8m4_t val) {1527 return __riscv_vset(dest, 0, val);1528}1529 1530// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vset_v_i16mf4_i16mf4x21531// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {1532// CHECK-RV64-NEXT: entry:1533// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)1534// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[TMP0]]1535//1536vint16mf4x2_t test_vset_v_i16mf4_i16mf4x2(vint16mf4x2_t dest, size_t index, vint16mf4_t val) {1537 return __riscv_vset(dest, 0, val);1538}1539 1540// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vset_v_i16mf4_i16mf4x31541// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {1542// CHECK-RV64-NEXT: entry:1543// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)1544// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[TMP0]]1545//1546vint16mf4x3_t test_vset_v_i16mf4_i16mf4x3(vint16mf4x3_t dest, size_t index, vint16mf4_t val) {1547 return __riscv_vset(dest, 0, val);1548}1549 1550// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vset_v_i16mf4_i16mf4x41551// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {1552// CHECK-RV64-NEXT: entry:1553// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)1554// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]1555//1556vint16mf4x4_t test_vset_v_i16mf4_i16mf4x4(vint16mf4x4_t dest, size_t index, vint16mf4_t val) {1557 return __riscv_vset(dest, 0, val);1558}1559 1560// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vset_v_i16mf4_i16mf4x51561// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {1562// CHECK-RV64-NEXT: entry:1563// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)1564// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[TMP0]]1565//1566vint16mf4x5_t test_vset_v_i16mf4_i16mf4x5(vint16mf4x5_t dest, size_t index, vint16mf4_t val) {1567 return __riscv_vset(dest, 0, val);1568}1569 1570// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vset_v_i16mf4_i16mf4x61571// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {1572// CHECK-RV64-NEXT: entry:1573// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)1574// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[TMP0]]1575//1576vint16mf4x6_t test_vset_v_i16mf4_i16mf4x6(vint16mf4x6_t dest, size_t index, vint16mf4_t val) {1577 return __riscv_vset(dest, 0, val);1578}1579 1580// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vset_v_i16mf4_i16mf4x71581// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {1582// CHECK-RV64-NEXT: entry:1583// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)1584// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]1585//1586vint16mf4x7_t test_vset_v_i16mf4_i16mf4x7(vint16mf4x7_t dest, size_t index, vint16mf4_t val) {1587 return __riscv_vset(dest, 0, val);1588}1589 1590// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vset_v_i16mf4_i16mf4x81591// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {1592// CHECK-RV64-NEXT: entry:1593// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)1594// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[TMP0]]1595//1596vint16mf4x8_t test_vset_v_i16mf4_i16mf4x8(vint16mf4x8_t dest, size_t index, vint16mf4_t val) {1597 return __riscv_vset(dest, 0, val);1598}1599 1600// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vset_v_i16mf2_i16mf2x21601// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {1602// CHECK-RV64-NEXT: entry:1603// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)1604// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[TMP0]]1605//1606vint16mf2x2_t test_vset_v_i16mf2_i16mf2x2(vint16mf2x2_t dest, size_t index, vint16mf2_t val) {1607 return __riscv_vset(dest, 0, val);1608}1609 1610// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vset_v_i16mf2_i16mf2x31611// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {1612// CHECK-RV64-NEXT: entry:1613// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)1614// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[TMP0]]1615//1616vint16mf2x3_t test_vset_v_i16mf2_i16mf2x3(vint16mf2x3_t dest, size_t index, vint16mf2_t val) {1617 return __riscv_vset(dest, 0, val);1618}1619 1620// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vset_v_i16mf2_i16mf2x41621// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {1622// CHECK-RV64-NEXT: entry:1623// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)1624// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]1625//1626vint16mf2x4_t test_vset_v_i16mf2_i16mf2x4(vint16mf2x4_t dest, size_t index, vint16mf2_t val) {1627 return __riscv_vset(dest, 0, val);1628}1629 1630// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vset_v_i16mf2_i16mf2x51631// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {1632// CHECK-RV64-NEXT: entry:1633// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)1634// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP0]]1635//1636vint16mf2x5_t test_vset_v_i16mf2_i16mf2x5(vint16mf2x5_t dest, size_t index, vint16mf2_t val) {1637 return __riscv_vset(dest, 0, val);1638}1639 1640// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vset_v_i16mf2_i16mf2x61641// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {1642// CHECK-RV64-NEXT: entry:1643// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)1644// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[TMP0]]1645//1646vint16mf2x6_t test_vset_v_i16mf2_i16mf2x6(vint16mf2x6_t dest, size_t index, vint16mf2_t val) {1647 return __riscv_vset(dest, 0, val);1648}1649 1650// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vset_v_i16mf2_i16mf2x71651// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {1652// CHECK-RV64-NEXT: entry:1653// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)1654// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]1655//1656vint16mf2x7_t test_vset_v_i16mf2_i16mf2x7(vint16mf2x7_t dest, size_t index, vint16mf2_t val) {1657 return __riscv_vset(dest, 0, val);1658}1659 1660// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vset_v_i16mf2_i16mf2x81661// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {1662// CHECK-RV64-NEXT: entry:1663// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)1664// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[TMP0]]1665//1666vint16mf2x8_t test_vset_v_i16mf2_i16mf2x8(vint16mf2x8_t dest, size_t index, vint16mf2_t val) {1667 return __riscv_vset(dest, 0, val);1668}1669 1670// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_i16m1_i16m1x21671// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {1672// CHECK-RV64-NEXT: entry:1673// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)1674// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]1675//1676vint16m1x2_t test_vset_v_i16m1_i16m1x2(vint16m1x2_t dest, size_t index, vint16m1_t val) {1677 return __riscv_vset(dest, 0, val);1678}1679 1680// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_i16m1_i16m1x31681// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {1682// CHECK-RV64-NEXT: entry:1683// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)1684// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]1685//1686vint16m1x3_t test_vset_v_i16m1_i16m1x3(vint16m1x3_t dest, size_t index, vint16m1_t val) {1687 return __riscv_vset(dest, 0, val);1688}1689 1690// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_i16m1_i16m1x41691// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {1692// CHECK-RV64-NEXT: entry:1693// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)1694// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]1695//1696vint16m1x4_t test_vset_v_i16m1_i16m1x4(vint16m1x4_t dest, size_t index, vint16m1_t val) {1697 return __riscv_vset(dest, 0, val);1698}1699 1700// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_i16m1_i16m1x51701// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {1702// CHECK-RV64-NEXT: entry:1703// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)1704// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]1705//1706vint16m1x5_t test_vset_v_i16m1_i16m1x5(vint16m1x5_t dest, size_t index, vint16m1_t val) {1707 return __riscv_vset(dest, 0, val);1708}1709 1710// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_i16m1_i16m1x61711// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {1712// CHECK-RV64-NEXT: entry:1713// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)1714// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]1715//1716vint16m1x6_t test_vset_v_i16m1_i16m1x6(vint16m1x6_t dest, size_t index, vint16m1_t val) {1717 return __riscv_vset(dest, 0, val);1718}1719 1720// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_i16m1_i16m1x71721// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {1722// CHECK-RV64-NEXT: entry:1723// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)1724// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]1725//1726vint16m1x7_t test_vset_v_i16m1_i16m1x7(vint16m1x7_t dest, size_t index, vint16m1_t val) {1727 return __riscv_vset(dest, 0, val);1728}1729 1730// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_i16m1_i16m1x81731// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {1732// CHECK-RV64-NEXT: entry:1733// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)1734// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]1735//1736vint16m1x8_t test_vset_v_i16m1_i16m1x8(vint16m1x8_t dest, size_t index, vint16m1_t val) {1737 return __riscv_vset(dest, 0, val);1738}1739 1740// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_i16m2_i16m2x21741// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {1742// CHECK-RV64-NEXT: entry:1743// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 8 x i16> [[VAL]], i32 0)1744// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]1745//1746vint16m2x2_t test_vset_v_i16m2_i16m2x2(vint16m2x2_t dest, size_t index, vint16m2_t val) {1747 return __riscv_vset(dest, 0, val);1748}1749 1750// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_i16m2_i16m2x31751// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {1752// CHECK-RV64-NEXT: entry:1753// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 8 x i16> [[VAL]], i32 0)1754// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]1755//1756vint16m2x3_t test_vset_v_i16m2_i16m2x3(vint16m2x3_t dest, size_t index, vint16m2_t val) {1757 return __riscv_vset(dest, 0, val);1758}1759 1760// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_i16m2_i16m2x41761// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {1762// CHECK-RV64-NEXT: entry:1763// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 8 x i16> [[VAL]], i32 0)1764// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]1765//1766vint16m2x4_t test_vset_v_i16m2_i16m2x4(vint16m2x4_t dest, size_t index, vint16m2_t val) {1767 return __riscv_vset(dest, 0, val);1768}1769 1770// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_i16m4_i16m4x21771// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i16> [[VAL:%.*]]) #[[ATTR0]] {1772// CHECK-RV64-NEXT: entry:1773// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv16i16(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 16 x i16> [[VAL]], i32 0)1774// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]1775//1776vint16m4x2_t test_vset_v_i16m4_i16m4x2(vint16m4x2_t dest, size_t index, vint16m4_t val) {1777 return __riscv_vset(dest, 0, val);1778}1779 1780// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vset_v_i32mf2_i32mf2x21781// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {1782// CHECK-RV64-NEXT: entry:1783// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)1784// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[TMP0]]1785//1786vint32mf2x2_t test_vset_v_i32mf2_i32mf2x2(vint32mf2x2_t dest, size_t index, vint32mf2_t val) {1787 return __riscv_vset(dest, 0, val);1788}1789 1790// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vset_v_i32mf2_i32mf2x31791// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {1792// CHECK-RV64-NEXT: entry:1793// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)1794// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[TMP0]]1795//1796vint32mf2x3_t test_vset_v_i32mf2_i32mf2x3(vint32mf2x3_t dest, size_t index, vint32mf2_t val) {1797 return __riscv_vset(dest, 0, val);1798}1799 1800// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vset_v_i32mf2_i32mf2x41801// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {1802// CHECK-RV64-NEXT: entry:1803// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)1804// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]1805//1806vint32mf2x4_t test_vset_v_i32mf2_i32mf2x4(vint32mf2x4_t dest, size_t index, vint32mf2_t val) {1807 return __riscv_vset(dest, 0, val);1808}1809 1810// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vset_v_i32mf2_i32mf2x51811// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {1812// CHECK-RV64-NEXT: entry:1813// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)1814// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP0]]1815//1816vint32mf2x5_t test_vset_v_i32mf2_i32mf2x5(vint32mf2x5_t dest, size_t index, vint32mf2_t val) {1817 return __riscv_vset(dest, 0, val);1818}1819 1820// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vset_v_i32mf2_i32mf2x61821// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {1822// CHECK-RV64-NEXT: entry:1823// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)1824// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[TMP0]]1825//1826vint32mf2x6_t test_vset_v_i32mf2_i32mf2x6(vint32mf2x6_t dest, size_t index, vint32mf2_t val) {1827 return __riscv_vset(dest, 0, val);1828}1829 1830// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vset_v_i32mf2_i32mf2x71831// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {1832// CHECK-RV64-NEXT: entry:1833// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)1834// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]1835//1836vint32mf2x7_t test_vset_v_i32mf2_i32mf2x7(vint32mf2x7_t dest, size_t index, vint32mf2_t val) {1837 return __riscv_vset(dest, 0, val);1838}1839 1840// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vset_v_i32mf2_i32mf2x81841// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {1842// CHECK-RV64-NEXT: entry:1843// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)1844// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[TMP0]]1845//1846vint32mf2x8_t test_vset_v_i32mf2_i32mf2x8(vint32mf2x8_t dest, size_t index, vint32mf2_t val) {1847 return __riscv_vset(dest, 0, val);1848}1849 1850// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_i32m1_i32m1x21851// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {1852// CHECK-RV64-NEXT: entry:1853// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)1854// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]1855//1856vint32m1x2_t test_vset_v_i32m1_i32m1x2(vint32m1x2_t dest, size_t index, vint32m1_t val) {1857 return __riscv_vset(dest, 0, val);1858}1859 1860// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_i32m1_i32m1x31861// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {1862// CHECK-RV64-NEXT: entry:1863// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)1864// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]1865//1866vint32m1x3_t test_vset_v_i32m1_i32m1x3(vint32m1x3_t dest, size_t index, vint32m1_t val) {1867 return __riscv_vset(dest, 0, val);1868}1869 1870// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_i32m1_i32m1x41871// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {1872// CHECK-RV64-NEXT: entry:1873// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)1874// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]1875//1876vint32m1x4_t test_vset_v_i32m1_i32m1x4(vint32m1x4_t dest, size_t index, vint32m1_t val) {1877 return __riscv_vset(dest, 0, val);1878}1879 1880// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_i32m1_i32m1x51881// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {1882// CHECK-RV64-NEXT: entry:1883// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)1884// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]1885//1886vint32m1x5_t test_vset_v_i32m1_i32m1x5(vint32m1x5_t dest, size_t index, vint32m1_t val) {1887 return __riscv_vset(dest, 0, val);1888}1889 1890// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_i32m1_i32m1x61891// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {1892// CHECK-RV64-NEXT: entry:1893// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)1894// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]1895//1896vint32m1x6_t test_vset_v_i32m1_i32m1x6(vint32m1x6_t dest, size_t index, vint32m1_t val) {1897 return __riscv_vset(dest, 0, val);1898}1899 1900// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_i32m1_i32m1x71901// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {1902// CHECK-RV64-NEXT: entry:1903// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)1904// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]1905//1906vint32m1x7_t test_vset_v_i32m1_i32m1x7(vint32m1x7_t dest, size_t index, vint32m1_t val) {1907 return __riscv_vset(dest, 0, val);1908}1909 1910// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_i32m1_i32m1x81911// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {1912// CHECK-RV64-NEXT: entry:1913// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)1914// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]1915//1916vint32m1x8_t test_vset_v_i32m1_i32m1x8(vint32m1x8_t dest, size_t index, vint32m1_t val) {1917 return __riscv_vset(dest, 0, val);1918}1919 1920// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_i32m2_i32m2x21921// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {1922// CHECK-RV64-NEXT: entry:1923// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 4 x i32> [[VAL]], i32 0)1924// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]1925//1926vint32m2x2_t test_vset_v_i32m2_i32m2x2(vint32m2x2_t dest, size_t index, vint32m2_t val) {1927 return __riscv_vset(dest, 0, val);1928}1929 1930// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_i32m2_i32m2x31931// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {1932// CHECK-RV64-NEXT: entry:1933// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 4 x i32> [[VAL]], i32 0)1934// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]1935//1936vint32m2x3_t test_vset_v_i32m2_i32m2x3(vint32m2x3_t dest, size_t index, vint32m2_t val) {1937 return __riscv_vset(dest, 0, val);1938}1939 1940// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_i32m2_i32m2x41941// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {1942// CHECK-RV64-NEXT: entry:1943// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 4 x i32> [[VAL]], i32 0)1944// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]1945//1946vint32m2x4_t test_vset_v_i32m2_i32m2x4(vint32m2x4_t dest, size_t index, vint32m2_t val) {1947 return __riscv_vset(dest, 0, val);1948}1949 1950// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_i32m4_i32m4x21951// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i32> [[VAL:%.*]]) #[[ATTR0]] {1952// CHECK-RV64-NEXT: entry:1953// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv8i32(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 8 x i32> [[VAL]], i32 0)1954// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]1955//1956vint32m4x2_t test_vset_v_i32m4_i32m4x2(vint32m4x2_t dest, size_t index, vint32m4_t val) {1957 return __riscv_vset(dest, 0, val);1958}1959 1960// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_i64m1_i64m1x21961// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {1962// CHECK-RV64-NEXT: entry:1963// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)1964// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]1965//1966vint64m1x2_t test_vset_v_i64m1_i64m1x2(vint64m1x2_t dest, size_t index, vint64m1_t val) {1967 return __riscv_vset(dest, 0, val);1968}1969 1970// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_i64m1_i64m1x31971// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {1972// CHECK-RV64-NEXT: entry:1973// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)1974// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]1975//1976vint64m1x3_t test_vset_v_i64m1_i64m1x3(vint64m1x3_t dest, size_t index, vint64m1_t val) {1977 return __riscv_vset(dest, 0, val);1978}1979 1980// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_i64m1_i64m1x41981// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {1982// CHECK-RV64-NEXT: entry:1983// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)1984// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]1985//1986vint64m1x4_t test_vset_v_i64m1_i64m1x4(vint64m1x4_t dest, size_t index, vint64m1_t val) {1987 return __riscv_vset(dest, 0, val);1988}1989 1990// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_i64m1_i64m1x51991// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {1992// CHECK-RV64-NEXT: entry:1993// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)1994// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]1995//1996vint64m1x5_t test_vset_v_i64m1_i64m1x5(vint64m1x5_t dest, size_t index, vint64m1_t val) {1997 return __riscv_vset(dest, 0, val);1998}1999 2000// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_i64m1_i64m1x62001// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2002// CHECK-RV64-NEXT: entry:2003// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2004// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]2005//2006vint64m1x6_t test_vset_v_i64m1_i64m1x6(vint64m1x6_t dest, size_t index, vint64m1_t val) {2007 return __riscv_vset(dest, 0, val);2008}2009 2010// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_i64m1_i64m1x72011// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2012// CHECK-RV64-NEXT: entry:2013// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2014// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]2015//2016vint64m1x7_t test_vset_v_i64m1_i64m1x7(vint64m1x7_t dest, size_t index, vint64m1_t val) {2017 return __riscv_vset(dest, 0, val);2018}2019 2020// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_i64m1_i64m1x82021// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2022// CHECK-RV64-NEXT: entry:2023// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2024// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]2025//2026vint64m1x8_t test_vset_v_i64m1_i64m1x8(vint64m1x8_t dest, size_t index, vint64m1_t val) {2027 return __riscv_vset(dest, 0, val);2028}2029 2030// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_i64m2_i64m2x22031// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {2032// CHECK-RV64-NEXT: entry:2033// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 2 x i64> [[VAL]], i32 0)2034// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]2035//2036vint64m2x2_t test_vset_v_i64m2_i64m2x2(vint64m2x2_t dest, size_t index, vint64m2_t val) {2037 return __riscv_vset(dest, 0, val);2038}2039 2040// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_i64m2_i64m2x32041// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {2042// CHECK-RV64-NEXT: entry:2043// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 2 x i64> [[VAL]], i32 0)2044// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]2045//2046vint64m2x3_t test_vset_v_i64m2_i64m2x3(vint64m2x3_t dest, size_t index, vint64m2_t val) {2047 return __riscv_vset(dest, 0, val);2048}2049 2050// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_i64m2_i64m2x42051// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {2052// CHECK-RV64-NEXT: entry:2053// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 2 x i64> [[VAL]], i32 0)2054// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]2055//2056vint64m2x4_t test_vset_v_i64m2_i64m2x4(vint64m2x4_t dest, size_t index, vint64m2_t val) {2057 return __riscv_vset(dest, 0, val);2058}2059 2060// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_i64m4_i64m4x22061// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i64> [[VAL:%.*]]) #[[ATTR0]] {2062// CHECK-RV64-NEXT: entry:2063// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv4i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 4 x i64> [[VAL]], i32 0)2064// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]2065//2066vint64m4x2_t test_vset_v_i64m4_i64m4x2(vint64m4x2_t dest, size_t index, vint64m4_t val) {2067 return __riscv_vset(dest, 0, val);2068}2069 2070// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @test_vset_v_u8mf8_u8mf8x22071// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {2072// CHECK-RV64-NEXT: entry:2073// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_2t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)2074// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 2) [[TMP0]]2075//2076vuint8mf8x2_t test_vset_v_u8mf8_u8mf8x2(vuint8mf8x2_t dest, size_t index, vuint8mf8_t val) {2077 return __riscv_vset(dest, 0, val);2078}2079 2080// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @test_vset_v_u8mf8_u8mf8x32081// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {2082// CHECK-RV64-NEXT: entry:2083// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_3t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)2084// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 3) [[TMP0]]2085//2086vuint8mf8x3_t test_vset_v_u8mf8_u8mf8x3(vuint8mf8x3_t dest, size_t index, vuint8mf8_t val) {2087 return __riscv_vset(dest, 0, val);2088}2089 2090// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @test_vset_v_u8mf8_u8mf8x42091// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {2092// CHECK-RV64-NEXT: entry:2093// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_4t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)2094// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 4) [[TMP0]]2095//2096vuint8mf8x4_t test_vset_v_u8mf8_u8mf8x4(vuint8mf8x4_t dest, size_t index, vuint8mf8_t val) {2097 return __riscv_vset(dest, 0, val);2098}2099 2100// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @test_vset_v_u8mf8_u8mf8x52101// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {2102// CHECK-RV64-NEXT: entry:2103// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_5t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)2104// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 5) [[TMP0]]2105//2106vuint8mf8x5_t test_vset_v_u8mf8_u8mf8x5(vuint8mf8x5_t dest, size_t index, vuint8mf8_t val) {2107 return __riscv_vset(dest, 0, val);2108}2109 2110// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @test_vset_v_u8mf8_u8mf8x62111// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {2112// CHECK-RV64-NEXT: entry:2113// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_6t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)2114// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 6) [[TMP0]]2115//2116vuint8mf8x6_t test_vset_v_u8mf8_u8mf8x6(vuint8mf8x6_t dest, size_t index, vuint8mf8_t val) {2117 return __riscv_vset(dest, 0, val);2118}2119 2120// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @test_vset_v_u8mf8_u8mf8x72121// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {2122// CHECK-RV64-NEXT: entry:2123// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_7t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)2124// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 7) [[TMP0]]2125//2126vuint8mf8x7_t test_vset_v_u8mf8_u8mf8x7(vuint8mf8x7_t dest, size_t index, vuint8mf8_t val) {2127 return __riscv_vset(dest, 0, val);2128}2129 2130// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @test_vset_v_u8mf8_u8mf8x82131// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 1 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i8> [[VAL:%.*]]) #[[ATTR0]] {2132// CHECK-RV64-NEXT: entry:2133// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv1i8_8t.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) [[DEST]], <vscale x 1 x i8> [[VAL]], i32 0)2134// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 1 x i8>, 8) [[TMP0]]2135//2136vuint8mf8x8_t test_vset_v_u8mf8_u8mf8x8(vuint8mf8x8_t dest, size_t index, vuint8mf8_t val) {2137 return __riscv_vset(dest, 0, val);2138}2139 2140// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vset_v_u8mf4_u8mf4x22141// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {2142// CHECK-RV64-NEXT: entry:2143// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_2t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)2144// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[TMP0]]2145//2146vuint8mf4x2_t test_vset_v_u8mf4_u8mf4x2(vuint8mf4x2_t dest, size_t index, vuint8mf4_t val) {2147 return __riscv_vset(dest, 0, val);2148}2149 2150// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vset_v_u8mf4_u8mf4x32151// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {2152// CHECK-RV64-NEXT: entry:2153// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_3t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)2154// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[TMP0]]2155//2156vuint8mf4x3_t test_vset_v_u8mf4_u8mf4x3(vuint8mf4x3_t dest, size_t index, vuint8mf4_t val) {2157 return __riscv_vset(dest, 0, val);2158}2159 2160// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vset_v_u8mf4_u8mf4x42161// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {2162// CHECK-RV64-NEXT: entry:2163// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_4t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)2164// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]2165//2166vuint8mf4x4_t test_vset_v_u8mf4_u8mf4x4(vuint8mf4x4_t dest, size_t index, vuint8mf4_t val) {2167 return __riscv_vset(dest, 0, val);2168}2169 2170// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vset_v_u8mf4_u8mf4x52171// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {2172// CHECK-RV64-NEXT: entry:2173// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_5t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)2174// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[TMP0]]2175//2176vuint8mf4x5_t test_vset_v_u8mf4_u8mf4x5(vuint8mf4x5_t dest, size_t index, vuint8mf4_t val) {2177 return __riscv_vset(dest, 0, val);2178}2179 2180// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vset_v_u8mf4_u8mf4x62181// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {2182// CHECK-RV64-NEXT: entry:2183// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_6t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)2184// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[TMP0]]2185//2186vuint8mf4x6_t test_vset_v_u8mf4_u8mf4x6(vuint8mf4x6_t dest, size_t index, vuint8mf4_t val) {2187 return __riscv_vset(dest, 0, val);2188}2189 2190// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vset_v_u8mf4_u8mf4x72191// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {2192// CHECK-RV64-NEXT: entry:2193// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_7t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)2194// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]2195//2196vuint8mf4x7_t test_vset_v_u8mf4_u8mf4x7(vuint8mf4x7_t dest, size_t index, vuint8mf4_t val) {2197 return __riscv_vset(dest, 0, val);2198}2199 2200// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vset_v_u8mf4_u8mf4x82201// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i8> [[VAL:%.*]]) #[[ATTR0]] {2202// CHECK-RV64-NEXT: entry:2203// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_8t.nxv2i8(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST]], <vscale x 2 x i8> [[VAL]], i32 0)2204// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[TMP0]]2205//2206vuint8mf4x8_t test_vset_v_u8mf4_u8mf4x8(vuint8mf4x8_t dest, size_t index, vuint8mf4_t val) {2207 return __riscv_vset(dest, 0, val);2208}2209 2210// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vset_v_u8mf2_u8mf2x22211// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {2212// CHECK-RV64-NEXT: entry:2213// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_2t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)2214// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[TMP0]]2215//2216vuint8mf2x2_t test_vset_v_u8mf2_u8mf2x2(vuint8mf2x2_t dest, size_t index, vuint8mf2_t val) {2217 return __riscv_vset(dest, 0, val);2218}2219 2220// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vset_v_u8mf2_u8mf2x32221// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {2222// CHECK-RV64-NEXT: entry:2223// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_3t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)2224// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[TMP0]]2225//2226vuint8mf2x3_t test_vset_v_u8mf2_u8mf2x3(vuint8mf2x3_t dest, size_t index, vuint8mf2_t val) {2227 return __riscv_vset(dest, 0, val);2228}2229 2230// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vset_v_u8mf2_u8mf2x42231// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {2232// CHECK-RV64-NEXT: entry:2233// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_4t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)2234// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]2235//2236vuint8mf2x4_t test_vset_v_u8mf2_u8mf2x4(vuint8mf2x4_t dest, size_t index, vuint8mf2_t val) {2237 return __riscv_vset(dest, 0, val);2238}2239 2240// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vset_v_u8mf2_u8mf2x52241// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {2242// CHECK-RV64-NEXT: entry:2243// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_5t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)2244// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP0]]2245//2246vuint8mf2x5_t test_vset_v_u8mf2_u8mf2x5(vuint8mf2x5_t dest, size_t index, vuint8mf2_t val) {2247 return __riscv_vset(dest, 0, val);2248}2249 2250// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vset_v_u8mf2_u8mf2x62251// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {2252// CHECK-RV64-NEXT: entry:2253// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_6t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)2254// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[TMP0]]2255//2256vuint8mf2x6_t test_vset_v_u8mf2_u8mf2x6(vuint8mf2x6_t dest, size_t index, vuint8mf2_t val) {2257 return __riscv_vset(dest, 0, val);2258}2259 2260// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vset_v_u8mf2_u8mf2x72261// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {2262// CHECK-RV64-NEXT: entry:2263// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_7t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)2264// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]2265//2266vuint8mf2x7_t test_vset_v_u8mf2_u8mf2x7(vuint8mf2x7_t dest, size_t index, vuint8mf2_t val) {2267 return __riscv_vset(dest, 0, val);2268}2269 2270// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vset_v_u8mf2_u8mf2x82271// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i8> [[VAL:%.*]]) #[[ATTR0]] {2272// CHECK-RV64-NEXT: entry:2273// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_8t.nxv4i8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST]], <vscale x 4 x i8> [[VAL]], i32 0)2274// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[TMP0]]2275//2276vuint8mf2x8_t test_vset_v_u8mf2_u8mf2x8(vuint8mf2x8_t dest, size_t index, vuint8mf2_t val) {2277 return __riscv_vset(dest, 0, val);2278}2279 2280// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_u8m1_u8m1x22281// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {2282// CHECK-RV64-NEXT: entry:2283// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)2284// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]2285//2286vuint8m1x2_t test_vset_v_u8m1_u8m1x2(vuint8m1x2_t dest, size_t index, vuint8m1_t val) {2287 return __riscv_vset(dest, 0, val);2288}2289 2290// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_u8m1_u8m1x32291// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {2292// CHECK-RV64-NEXT: entry:2293// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)2294// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]2295//2296vuint8m1x3_t test_vset_v_u8m1_u8m1x3(vuint8m1x3_t dest, size_t index, vuint8m1_t val) {2297 return __riscv_vset(dest, 0, val);2298}2299 2300// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_u8m1_u8m1x42301// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {2302// CHECK-RV64-NEXT: entry:2303// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)2304// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]2305//2306vuint8m1x4_t test_vset_v_u8m1_u8m1x4(vuint8m1x4_t dest, size_t index, vuint8m1_t val) {2307 return __riscv_vset(dest, 0, val);2308}2309 2310// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_u8m1_u8m1x52311// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {2312// CHECK-RV64-NEXT: entry:2313// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)2314// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]2315//2316vuint8m1x5_t test_vset_v_u8m1_u8m1x5(vuint8m1x5_t dest, size_t index, vuint8m1_t val) {2317 return __riscv_vset(dest, 0, val);2318}2319 2320// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_u8m1_u8m1x62321// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {2322// CHECK-RV64-NEXT: entry:2323// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)2324// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]2325//2326vuint8m1x6_t test_vset_v_u8m1_u8m1x6(vuint8m1x6_t dest, size_t index, vuint8m1_t val) {2327 return __riscv_vset(dest, 0, val);2328}2329 2330// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_u8m1_u8m1x72331// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {2332// CHECK-RV64-NEXT: entry:2333// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)2334// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]2335//2336vuint8m1x7_t test_vset_v_u8m1_u8m1x7(vuint8m1x7_t dest, size_t index, vuint8m1_t val) {2337 return __riscv_vset(dest, 0, val);2338}2339 2340// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_u8m1_u8m1x82341// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i8> [[VAL:%.*]]) #[[ATTR0]] {2342// CHECK-RV64-NEXT: entry:2343// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv8i8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 8 x i8> [[VAL]], i32 0)2344// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]2345//2346vuint8m1x8_t test_vset_v_u8m1_u8m1x8(vuint8m1x8_t dest, size_t index, vuint8m1_t val) {2347 return __riscv_vset(dest, 0, val);2348}2349 2350// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_u8m2_u8m2x22351// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {2352// CHECK-RV64-NEXT: entry:2353// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 16 x i8> [[VAL]], i32 0)2354// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]2355//2356vuint8m2x2_t test_vset_v_u8m2_u8m2x2(vuint8m2x2_t dest, size_t index, vuint8m2_t val) {2357 return __riscv_vset(dest, 0, val);2358}2359 2360// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_u8m2_u8m2x32361// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {2362// CHECK-RV64-NEXT: entry:2363// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 16 x i8> [[VAL]], i32 0)2364// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]2365//2366vuint8m2x3_t test_vset_v_u8m2_u8m2x3(vuint8m2x3_t dest, size_t index, vuint8m2_t val) {2367 return __riscv_vset(dest, 0, val);2368}2369 2370// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_u8m2_u8m2x42371// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i8> [[VAL:%.*]]) #[[ATTR0]] {2372// CHECK-RV64-NEXT: entry:2373// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv16i8(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 16 x i8> [[VAL]], i32 0)2374// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]2375//2376vuint8m2x4_t test_vset_v_u8m2_u8m2x4(vuint8m2x4_t dest, size_t index, vuint8m2_t val) {2377 return __riscv_vset(dest, 0, val);2378}2379 2380// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_u8m4_u8m4x22381// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 32 x i8> [[VAL:%.*]]) #[[ATTR0]] {2382// CHECK-RV64-NEXT: entry:2383// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv32i8(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 32 x i8> [[VAL]], i32 0)2384// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]2385//2386vuint8m4x2_t test_vset_v_u8m4_u8m4x2(vuint8m4x2_t dest, size_t index, vuint8m4_t val) {2387 return __riscv_vset(dest, 0, val);2388}2389 2390// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @test_vset_v_u16mf4_u16mf4x22391// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {2392// CHECK-RV64-NEXT: entry:2393// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)2394// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[TMP0]]2395//2396vuint16mf4x2_t test_vset_v_u16mf4_u16mf4x2(vuint16mf4x2_t dest, size_t index, vuint16mf4_t val) {2397 return __riscv_vset(dest, 0, val);2398}2399 2400// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @test_vset_v_u16mf4_u16mf4x32401// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {2402// CHECK-RV64-NEXT: entry:2403// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)2404// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 3) [[TMP0]]2405//2406vuint16mf4x3_t test_vset_v_u16mf4_u16mf4x3(vuint16mf4x3_t dest, size_t index, vuint16mf4_t val) {2407 return __riscv_vset(dest, 0, val);2408}2409 2410// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vset_v_u16mf4_u16mf4x42411// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {2412// CHECK-RV64-NEXT: entry:2413// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)2414// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]2415//2416vuint16mf4x4_t test_vset_v_u16mf4_u16mf4x4(vuint16mf4x4_t dest, size_t index, vuint16mf4_t val) {2417 return __riscv_vset(dest, 0, val);2418}2419 2420// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vset_v_u16mf4_u16mf4x52421// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {2422// CHECK-RV64-NEXT: entry:2423// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)2424// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[TMP0]]2425//2426vuint16mf4x5_t test_vset_v_u16mf4_u16mf4x5(vuint16mf4x5_t dest, size_t index, vuint16mf4_t val) {2427 return __riscv_vset(dest, 0, val);2428}2429 2430// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @test_vset_v_u16mf4_u16mf4x62431// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {2432// CHECK-RV64-NEXT: entry:2433// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)2434// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 6) [[TMP0]]2435//2436vuint16mf4x6_t test_vset_v_u16mf4_u16mf4x6(vuint16mf4x6_t dest, size_t index, vuint16mf4_t val) {2437 return __riscv_vset(dest, 0, val);2438}2439 2440// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vset_v_u16mf4_u16mf4x72441// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {2442// CHECK-RV64-NEXT: entry:2443// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)2444// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]2445//2446vuint16mf4x7_t test_vset_v_u16mf4_u16mf4x7(vuint16mf4x7_t dest, size_t index, vuint16mf4_t val) {2447 return __riscv_vset(dest, 0, val);2448}2449 2450// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @test_vset_v_u16mf4_u16mf4x82451// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i16> [[VAL:%.*]]) #[[ATTR0]] {2452// CHECK-RV64-NEXT: entry:2453// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv2i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[DEST]], <vscale x 1 x i16> [[VAL]], i32 0)2454// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 8) [[TMP0]]2455//2456vuint16mf4x8_t test_vset_v_u16mf4_u16mf4x8(vuint16mf4x8_t dest, size_t index, vuint16mf4_t val) {2457 return __riscv_vset(dest, 0, val);2458}2459 2460// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vset_v_u16mf2_u16mf2x22461// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {2462// CHECK-RV64-NEXT: entry:2463// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_2t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)2464// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[TMP0]]2465//2466vuint16mf2x2_t test_vset_v_u16mf2_u16mf2x2(vuint16mf2x2_t dest, size_t index, vuint16mf2_t val) {2467 return __riscv_vset(dest, 0, val);2468}2469 2470// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vset_v_u16mf2_u16mf2x32471// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {2472// CHECK-RV64-NEXT: entry:2473// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_3t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)2474// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[TMP0]]2475//2476vuint16mf2x3_t test_vset_v_u16mf2_u16mf2x3(vuint16mf2x3_t dest, size_t index, vuint16mf2_t val) {2477 return __riscv_vset(dest, 0, val);2478}2479 2480// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vset_v_u16mf2_u16mf2x42481// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {2482// CHECK-RV64-NEXT: entry:2483// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_4t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)2484// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]2485//2486vuint16mf2x4_t test_vset_v_u16mf2_u16mf2x4(vuint16mf2x4_t dest, size_t index, vuint16mf2_t val) {2487 return __riscv_vset(dest, 0, val);2488}2489 2490// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vset_v_u16mf2_u16mf2x52491// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {2492// CHECK-RV64-NEXT: entry:2493// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_5t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)2494// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP0]]2495//2496vuint16mf2x5_t test_vset_v_u16mf2_u16mf2x5(vuint16mf2x5_t dest, size_t index, vuint16mf2_t val) {2497 return __riscv_vset(dest, 0, val);2498}2499 2500// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vset_v_u16mf2_u16mf2x62501// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {2502// CHECK-RV64-NEXT: entry:2503// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_6t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)2504// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[TMP0]]2505//2506vuint16mf2x6_t test_vset_v_u16mf2_u16mf2x6(vuint16mf2x6_t dest, size_t index, vuint16mf2_t val) {2507 return __riscv_vset(dest, 0, val);2508}2509 2510// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vset_v_u16mf2_u16mf2x72511// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {2512// CHECK-RV64-NEXT: entry:2513// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_7t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)2514// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]2515//2516vuint16mf2x7_t test_vset_v_u16mf2_u16mf2x7(vuint16mf2x7_t dest, size_t index, vuint16mf2_t val) {2517 return __riscv_vset(dest, 0, val);2518}2519 2520// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vset_v_u16mf2_u16mf2x82521// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i16> [[VAL:%.*]]) #[[ATTR0]] {2522// CHECK-RV64-NEXT: entry:2523// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_8t.nxv2i16(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST]], <vscale x 2 x i16> [[VAL]], i32 0)2524// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[TMP0]]2525//2526vuint16mf2x8_t test_vset_v_u16mf2_u16mf2x8(vuint16mf2x8_t dest, size_t index, vuint16mf2_t val) {2527 return __riscv_vset(dest, 0, val);2528}2529 2530// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_u16m1_u16m1x22531// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {2532// CHECK-RV64-NEXT: entry:2533// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)2534// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]2535//2536vuint16m1x2_t test_vset_v_u16m1_u16m1x2(vuint16m1x2_t dest, size_t index, vuint16m1_t val) {2537 return __riscv_vset(dest, 0, val);2538}2539 2540// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_u16m1_u16m1x32541// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {2542// CHECK-RV64-NEXT: entry:2543// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)2544// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]2545//2546vuint16m1x3_t test_vset_v_u16m1_u16m1x3(vuint16m1x3_t dest, size_t index, vuint16m1_t val) {2547 return __riscv_vset(dest, 0, val);2548}2549 2550// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_u16m1_u16m1x42551// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {2552// CHECK-RV64-NEXT: entry:2553// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)2554// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]2555//2556vuint16m1x4_t test_vset_v_u16m1_u16m1x4(vuint16m1x4_t dest, size_t index, vuint16m1_t val) {2557 return __riscv_vset(dest, 0, val);2558}2559 2560// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_u16m1_u16m1x52561// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {2562// CHECK-RV64-NEXT: entry:2563// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)2564// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]2565//2566vuint16m1x5_t test_vset_v_u16m1_u16m1x5(vuint16m1x5_t dest, size_t index, vuint16m1_t val) {2567 return __riscv_vset(dest, 0, val);2568}2569 2570// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_u16m1_u16m1x62571// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {2572// CHECK-RV64-NEXT: entry:2573// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)2574// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]2575//2576vuint16m1x6_t test_vset_v_u16m1_u16m1x6(vuint16m1x6_t dest, size_t index, vuint16m1_t val) {2577 return __riscv_vset(dest, 0, val);2578}2579 2580// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_u16m1_u16m1x72581// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {2582// CHECK-RV64-NEXT: entry:2583// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)2584// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]2585//2586vuint16m1x7_t test_vset_v_u16m1_u16m1x7(vuint16m1x7_t dest, size_t index, vuint16m1_t val) {2587 return __riscv_vset(dest, 0, val);2588}2589 2590// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_u16m1_u16m1x82591// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i16> [[VAL:%.*]]) #[[ATTR0]] {2592// CHECK-RV64-NEXT: entry:2593// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 4 x i16> [[VAL]], i32 0)2594// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]2595//2596vuint16m1x8_t test_vset_v_u16m1_u16m1x8(vuint16m1x8_t dest, size_t index, vuint16m1_t val) {2597 return __riscv_vset(dest, 0, val);2598}2599 2600// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_u16m2_u16m2x22601// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {2602// CHECK-RV64-NEXT: entry:2603// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 8 x i16> [[VAL]], i32 0)2604// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]2605//2606vuint16m2x2_t test_vset_v_u16m2_u16m2x2(vuint16m2x2_t dest, size_t index, vuint16m2_t val) {2607 return __riscv_vset(dest, 0, val);2608}2609 2610// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_u16m2_u16m2x32611// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {2612// CHECK-RV64-NEXT: entry:2613// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 8 x i16> [[VAL]], i32 0)2614// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]2615//2616vuint16m2x3_t test_vset_v_u16m2_u16m2x3(vuint16m2x3_t dest, size_t index, vuint16m2_t val) {2617 return __riscv_vset(dest, 0, val);2618}2619 2620// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_u16m2_u16m2x42621// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i16> [[VAL:%.*]]) #[[ATTR0]] {2622// CHECK-RV64-NEXT: entry:2623// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv8i16(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 8 x i16> [[VAL]], i32 0)2624// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]2625//2626vuint16m2x4_t test_vset_v_u16m2_u16m2x4(vuint16m2x4_t dest, size_t index, vuint16m2_t val) {2627 return __riscv_vset(dest, 0, val);2628}2629 2630// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_u16m4_u16m4x22631// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 16 x i16> [[VAL:%.*]]) #[[ATTR0]] {2632// CHECK-RV64-NEXT: entry:2633// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv16i16(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 16 x i16> [[VAL]], i32 0)2634// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]2635//2636vuint16m4x2_t test_vset_v_u16m4_u16m4x2(vuint16m4x2_t dest, size_t index, vuint16m4_t val) {2637 return __riscv_vset(dest, 0, val);2638}2639 2640// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @test_vset_v_u32mf2_u32mf2x22641// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {2642// CHECK-RV64-NEXT: entry:2643// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_2t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)2644// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[TMP0]]2645//2646vuint32mf2x2_t test_vset_v_u32mf2_u32mf2x2(vuint32mf2x2_t dest, size_t index, vuint32mf2_t val) {2647 return __riscv_vset(dest, 0, val);2648}2649 2650// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @test_vset_v_u32mf2_u32mf2x32651// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {2652// CHECK-RV64-NEXT: entry:2653// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_3t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)2654// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 3) [[TMP0]]2655//2656vuint32mf2x3_t test_vset_v_u32mf2_u32mf2x3(vuint32mf2x3_t dest, size_t index, vuint32mf2_t val) {2657 return __riscv_vset(dest, 0, val);2658}2659 2660// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vset_v_u32mf2_u32mf2x42661// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {2662// CHECK-RV64-NEXT: entry:2663// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_4t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)2664// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]2665//2666vuint32mf2x4_t test_vset_v_u32mf2_u32mf2x4(vuint32mf2x4_t dest, size_t index, vuint32mf2_t val) {2667 return __riscv_vset(dest, 0, val);2668}2669 2670// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vset_v_u32mf2_u32mf2x52671// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {2672// CHECK-RV64-NEXT: entry:2673// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_5t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)2674// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP0]]2675//2676vuint32mf2x5_t test_vset_v_u32mf2_u32mf2x5(vuint32mf2x5_t dest, size_t index, vuint32mf2_t val) {2677 return __riscv_vset(dest, 0, val);2678}2679 2680// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @test_vset_v_u32mf2_u32mf2x62681// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {2682// CHECK-RV64-NEXT: entry:2683// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_6t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)2684// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 6) [[TMP0]]2685//2686vuint32mf2x6_t test_vset_v_u32mf2_u32mf2x6(vuint32mf2x6_t dest, size_t index, vuint32mf2_t val) {2687 return __riscv_vset(dest, 0, val);2688}2689 2690// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vset_v_u32mf2_u32mf2x72691// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {2692// CHECK-RV64-NEXT: entry:2693// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_7t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)2694// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]2695//2696vuint32mf2x7_t test_vset_v_u32mf2_u32mf2x7(vuint32mf2x7_t dest, size_t index, vuint32mf2_t val) {2697 return __riscv_vset(dest, 0, val);2698}2699 2700// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @test_vset_v_u32mf2_u32mf2x82701// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i32> [[VAL:%.*]]) #[[ATTR0]] {2702// CHECK-RV64-NEXT: entry:2703// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv4i8_8t.nxv1i32(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[DEST]], <vscale x 1 x i32> [[VAL]], i32 0)2704// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 8) [[TMP0]]2705//2706vuint32mf2x8_t test_vset_v_u32mf2_u32mf2x8(vuint32mf2x8_t dest, size_t index, vuint32mf2_t val) {2707 return __riscv_vset(dest, 0, val);2708}2709 2710// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_u32m1_u32m1x22711// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {2712// CHECK-RV64-NEXT: entry:2713// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)2714// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]2715//2716vuint32m1x2_t test_vset_v_u32m1_u32m1x2(vuint32m1x2_t dest, size_t index, vuint32m1_t val) {2717 return __riscv_vset(dest, 0, val);2718}2719 2720// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_u32m1_u32m1x32721// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {2722// CHECK-RV64-NEXT: entry:2723// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)2724// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]2725//2726vuint32m1x3_t test_vset_v_u32m1_u32m1x3(vuint32m1x3_t dest, size_t index, vuint32m1_t val) {2727 return __riscv_vset(dest, 0, val);2728}2729 2730// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_u32m1_u32m1x42731// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {2732// CHECK-RV64-NEXT: entry:2733// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)2734// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]2735//2736vuint32m1x4_t test_vset_v_u32m1_u32m1x4(vuint32m1x4_t dest, size_t index, vuint32m1_t val) {2737 return __riscv_vset(dest, 0, val);2738}2739 2740// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_u32m1_u32m1x52741// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {2742// CHECK-RV64-NEXT: entry:2743// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)2744// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]2745//2746vuint32m1x5_t test_vset_v_u32m1_u32m1x5(vuint32m1x5_t dest, size_t index, vuint32m1_t val) {2747 return __riscv_vset(dest, 0, val);2748}2749 2750// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_u32m1_u32m1x62751// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {2752// CHECK-RV64-NEXT: entry:2753// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)2754// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]2755//2756vuint32m1x6_t test_vset_v_u32m1_u32m1x6(vuint32m1x6_t dest, size_t index, vuint32m1_t val) {2757 return __riscv_vset(dest, 0, val);2758}2759 2760// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_u32m1_u32m1x72761// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {2762// CHECK-RV64-NEXT: entry:2763// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)2764// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]2765//2766vuint32m1x7_t test_vset_v_u32m1_u32m1x7(vuint32m1x7_t dest, size_t index, vuint32m1_t val) {2767 return __riscv_vset(dest, 0, val);2768}2769 2770// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_u32m1_u32m1x82771// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i32> [[VAL:%.*]]) #[[ATTR0]] {2772// CHECK-RV64-NEXT: entry:2773// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv2i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 2 x i32> [[VAL]], i32 0)2774// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]2775//2776vuint32m1x8_t test_vset_v_u32m1_u32m1x8(vuint32m1x8_t dest, size_t index, vuint32m1_t val) {2777 return __riscv_vset(dest, 0, val);2778}2779 2780// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_u32m2_u32m2x22781// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {2782// CHECK-RV64-NEXT: entry:2783// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 4 x i32> [[VAL]], i32 0)2784// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]2785//2786vuint32m2x2_t test_vset_v_u32m2_u32m2x2(vuint32m2x2_t dest, size_t index, vuint32m2_t val) {2787 return __riscv_vset(dest, 0, val);2788}2789 2790// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_u32m2_u32m2x32791// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {2792// CHECK-RV64-NEXT: entry:2793// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 4 x i32> [[VAL]], i32 0)2794// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]2795//2796vuint32m2x3_t test_vset_v_u32m2_u32m2x3(vuint32m2x3_t dest, size_t index, vuint32m2_t val) {2797 return __riscv_vset(dest, 0, val);2798}2799 2800// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_u32m2_u32m2x42801// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i32> [[VAL:%.*]]) #[[ATTR0]] {2802// CHECK-RV64-NEXT: entry:2803// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 4 x i32> [[VAL]], i32 0)2804// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]2805//2806vuint32m2x4_t test_vset_v_u32m2_u32m2x4(vuint32m2x4_t dest, size_t index, vuint32m2_t val) {2807 return __riscv_vset(dest, 0, val);2808}2809 2810// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_u32m4_u32m4x22811// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 8 x i32> [[VAL:%.*]]) #[[ATTR0]] {2812// CHECK-RV64-NEXT: entry:2813// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv8i32(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 8 x i32> [[VAL]], i32 0)2814// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]2815//2816vuint32m4x2_t test_vset_v_u32m4_u32m4x2(vuint32m4x2_t dest, size_t index, vuint32m4_t val) {2817 return __riscv_vset(dest, 0, val);2818}2819 2820// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @test_vset_v_u64m1_u64m1x22821// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2822// CHECK-RV64-NEXT: entry:2823// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_2t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2824// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[TMP0]]2825//2826vuint64m1x2_t test_vset_v_u64m1_u64m1x2(vuint64m1x2_t dest, size_t index, vuint64m1_t val) {2827 return __riscv_vset(dest, 0, val);2828}2829 2830// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @test_vset_v_u64m1_u64m1x32831// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2832// CHECK-RV64-NEXT: entry:2833// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_3t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2834// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP0]]2835//2836vuint64m1x3_t test_vset_v_u64m1_u64m1x3(vuint64m1x3_t dest, size_t index, vuint64m1_t val) {2837 return __riscv_vset(dest, 0, val);2838}2839 2840// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vset_v_u64m1_u64m1x42841// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2842// CHECK-RV64-NEXT: entry:2843// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_4t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2844// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]2845//2846vuint64m1x4_t test_vset_v_u64m1_u64m1x4(vuint64m1x4_t dest, size_t index, vuint64m1_t val) {2847 return __riscv_vset(dest, 0, val);2848}2849 2850// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vset_v_u64m1_u64m1x52851// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2852// CHECK-RV64-NEXT: entry:2853// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_5t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2854// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP0]]2855//2856vuint64m1x5_t test_vset_v_u64m1_u64m1x5(vuint64m1x5_t dest, size_t index, vuint64m1_t val) {2857 return __riscv_vset(dest, 0, val);2858}2859 2860// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @test_vset_v_u64m1_u64m1x62861// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2862// CHECK-RV64-NEXT: entry:2863// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_6t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2864// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP0]]2865//2866vuint64m1x6_t test_vset_v_u64m1_u64m1x6(vuint64m1x6_t dest, size_t index, vuint64m1_t val) {2867 return __riscv_vset(dest, 0, val);2868}2869 2870// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vset_v_u64m1_u64m1x72871// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2872// CHECK-RV64-NEXT: entry:2873// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2874// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]2875//2876vuint64m1x7_t test_vset_v_u64m1_u64m1x7(vuint64m1x7_t dest, size_t index, vuint64m1_t val) {2877 return __riscv_vset(dest, 0, val);2878}2879 2880// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @test_vset_v_u64m1_u64m1x82881// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 1 x i64> [[VAL:%.*]]) #[[ATTR0]] {2882// CHECK-RV64-NEXT: entry:2883// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 8) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_8t.nxv1i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[DEST]], <vscale x 1 x i64> [[VAL]], i32 0)2884// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 8) [[TMP0]]2885//2886vuint64m1x8_t test_vset_v_u64m1_u64m1x8(vuint64m1x8_t dest, size_t index, vuint64m1_t val) {2887 return __riscv_vset(dest, 0, val);2888}2889 2890// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @test_vset_v_u64m2_u64m2x22891// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {2892// CHECK-RV64-NEXT: entry:2893// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[DEST]], <vscale x 2 x i64> [[VAL]], i32 0)2894// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[TMP0]]2895//2896vuint64m2x2_t test_vset_v_u64m2_u64m2x2(vuint64m2x2_t dest, size_t index, vuint64m2_t val) {2897 return __riscv_vset(dest, 0, val);2898}2899 2900// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @test_vset_v_u64m2_u64m2x32901// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {2902// CHECK-RV64-NEXT: entry:2903// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_3t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[DEST]], <vscale x 2 x i64> [[VAL]], i32 0)2904// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 3) [[TMP0]]2905//2906vuint64m2x3_t test_vset_v_u64m2_u64m2x3(vuint64m2x3_t dest, size_t index, vuint64m2_t val) {2907 return __riscv_vset(dest, 0, val);2908}2909 2910// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vset_v_u64m2_u64m2x42911// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 2 x i64> [[VAL:%.*]]) #[[ATTR0]] {2912// CHECK-RV64-NEXT: entry:2913// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_4t.nxv2i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[DEST]], <vscale x 2 x i64> [[VAL]], i32 0)2914// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]2915//2916vuint64m2x4_t test_vset_v_u64m2_u64m2x4(vuint64m2x4_t dest, size_t index, vuint64m2_t val) {2917 return __riscv_vset(dest, 0, val);2918}2919 2920// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @test_vset_v_u64m4_u64m4x22921// CHECK-RV64-SAME: (target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST:%.*]], i64 noundef [[INDEX:%.*]], <vscale x 4 x i64> [[VAL:%.*]]) #[[ATTR0]] {2922// CHECK-RV64-NEXT: entry:2923// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv32i8_2t.nxv4i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[DEST]], <vscale x 4 x i64> [[VAL]], i32 0)2924// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP0]]2925//2926vuint64m4x2_t test_vset_v_u64m4_u64m4x2(vuint64m4x2_t dest, size_t index, vuint64m4_t val) {2927 return __riscv_vset(dest, 0, val);2928}2929 2930