114 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 42// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \4// RUN: -target-feature +zvfbfmin -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16mf4x2(11// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv2i8_2t.p0.i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[VS3]], ptr [[RS1]], i64 [[VL]], i64 4)14// CHECK-RV64-NEXT: ret void15//16void test_vsseg2e16_v_bf16mf4x2(__bf16 *rs1, vbfloat16mf4x2_t vs3, size_t vl) {17 return __riscv_vsseg2e16_v_bf16mf4x2(rs1, vs3, vl);18}19 20// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16mf2x2(21// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {22// CHECK-RV64-NEXT: entry:23// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv4i8_2t.p0.i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[VS3]], ptr [[RS1]], i64 [[VL]], i64 4)24// CHECK-RV64-NEXT: ret void25//26void test_vsseg2e16_v_bf16mf2x2(__bf16 *rs1, vbfloat16mf2x2_t vs3, size_t vl) {27 return __riscv_vsseg2e16_v_bf16mf2x2(rs1, vs3, vl);28}29 30// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16m1x2(31// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {32// CHECK-RV64-NEXT: entry:33// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv8i8_2t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[VS3]], ptr [[RS1]], i64 [[VL]], i64 4)34// CHECK-RV64-NEXT: ret void35//36void test_vsseg2e16_v_bf16m1x2(__bf16 *rs1, vbfloat16m1x2_t vs3, size_t vl) {37 return __riscv_vsseg2e16_v_bf16m1x2(rs1, vs3, vl);38}39 40// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16m2x2(41// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {42// CHECK-RV64-NEXT: entry:43// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv16i8_2t.p0.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[VS3]], ptr [[RS1]], i64 [[VL]], i64 4)44// CHECK-RV64-NEXT: ret void45//46void test_vsseg2e16_v_bf16m2x2(__bf16 *rs1, vbfloat16m2x2_t vs3, size_t vl) {47 return __riscv_vsseg2e16_v_bf16m2x2(rs1, vs3, vl);48}49 50// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16m4x2(51// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {52// CHECK-RV64-NEXT: entry:53// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.triscv.vector.tuple_nxv32i8_2t.p0.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[VS3]], ptr [[RS1]], i64 [[VL]], i64 4)54// CHECK-RV64-NEXT: ret void55//56void test_vsseg2e16_v_bf16m4x2(__bf16 *rs1, vbfloat16m4x2_t vs3, size_t vl) {57 return __riscv_vsseg2e16_v_bf16m4x2(rs1, vs3, vl);58}59 60// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16mf4x2_m(61// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {62// CHECK-RV64-NEXT: entry:63// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv2i8_2t.p0.nxv1i1.i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 2) [[VS3]], ptr [[RS1]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 4)64// CHECK-RV64-NEXT: ret void65//66void test_vsseg2e16_v_bf16mf4x2_m(vbool64_t vm, __bf16 *rs1,67 vbfloat16mf4x2_t vs3, size_t vl) {68 return __riscv_vsseg2e16_v_bf16mf4x2_m(vm, rs1, vs3, vl);69}70 71// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16mf2x2_m(72// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {73// CHECK-RV64-NEXT: entry:74// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv4i8_2t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) [[VS3]], ptr [[RS1]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 4)75// CHECK-RV64-NEXT: ret void76//77void test_vsseg2e16_v_bf16mf2x2_m(vbool32_t vm, __bf16 *rs1,78 vbfloat16mf2x2_t vs3, size_t vl) {79 return __riscv_vsseg2e16_v_bf16mf2x2_m(vm, rs1, vs3, vl);80}81 82// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16m1x2_m(83// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {84// CHECK-RV64-NEXT: entry:85// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv8i8_2t.p0.nxv4i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) [[VS3]], ptr [[RS1]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 4)86// CHECK-RV64-NEXT: ret void87//88void test_vsseg2e16_v_bf16m1x2_m(vbool16_t vm, __bf16 *rs1, vbfloat16m1x2_t vs3,89 size_t vl) {90 return __riscv_vsseg2e16_v_bf16m1x2_m(vm, rs1, vs3, vl);91}92 93// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16m2x2_m(94// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {95// CHECK-RV64-NEXT: entry:96// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv16i8_2t.p0.nxv8i1.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) [[VS3]], ptr [[RS1]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 4)97// CHECK-RV64-NEXT: ret void98//99void test_vsseg2e16_v_bf16m2x2_m(vbool8_t vm, __bf16 *rs1, vbfloat16m2x2_t vs3,100 size_t vl) {101 return __riscv_vsseg2e16_v_bf16m2x2_m(vm, rs1, vs3, vl);102}103 104// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e16_v_bf16m4x2_m(105// CHECK-RV64-SAME: <vscale x 16 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {106// CHECK-RV64-NEXT: entry:107// CHECK-RV64-NEXT: call void @llvm.riscv.vsseg2.mask.triscv.vector.tuple_nxv32i8_2t.p0.nxv16i1.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[VS3]], ptr [[RS1]], <vscale x 16 x i1> [[VM]], i64 [[VL]], i64 4)108// CHECK-RV64-NEXT: ret void109//110void test_vsseg2e16_v_bf16m4x2_m(vbool4_t vm, __bf16 *rs1, vbfloat16m4x2_t vs3,111 size_t vl) {112 return __riscv_vsseg2e16_v_bf16m4x2_m(vm, rs1, vs3, vl);113}114