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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 42// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \4// RUN: -target-feature +zvfbfmin -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16mf4(11// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], <vscale x 1 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv1bf16.p0.i64(<vscale x 1 x bfloat> [[VS3]], ptr [[RS1]], i64 [[VL]])14// CHECK-RV64-NEXT: ret void15//16void test_vse16_v_bf16mf4(__bf16 *rs1, vbfloat16mf4_t vs3, size_t vl) {17 return __riscv_vse16(rs1, vs3, vl);18}19 20// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16mf2(21// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], <vscale x 2 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {22// CHECK-RV64-NEXT: entry:23// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv2bf16.p0.i64(<vscale x 2 x bfloat> [[VS3]], ptr [[RS1]], i64 [[VL]])24// CHECK-RV64-NEXT: ret void25//26void test_vse16_v_bf16mf2(__bf16 *rs1, vbfloat16mf2_t vs3, size_t vl) {27 return __riscv_vse16(rs1, vs3, vl);28}29 30// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16m1(31// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], <vscale x 4 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {32// CHECK-RV64-NEXT: entry:33// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv4bf16.p0.i64(<vscale x 4 x bfloat> [[VS3]], ptr [[RS1]], i64 [[VL]])34// CHECK-RV64-NEXT: ret void35//36void test_vse16_v_bf16m1(__bf16 *rs1, vbfloat16m1_t vs3, size_t vl) {37 return __riscv_vse16(rs1, vs3, vl);38}39 40// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16m2(41// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], <vscale x 8 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {42// CHECK-RV64-NEXT: entry:43// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv8bf16.p0.i64(<vscale x 8 x bfloat> [[VS3]], ptr [[RS1]], i64 [[VL]])44// CHECK-RV64-NEXT: ret void45//46void test_vse16_v_bf16m2(__bf16 *rs1, vbfloat16m2_t vs3, size_t vl) {47 return __riscv_vse16(rs1, vs3, vl);48}49 50// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16m4(51// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], <vscale x 16 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {52// CHECK-RV64-NEXT: entry:53// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv16bf16.p0.i64(<vscale x 16 x bfloat> [[VS3]], ptr [[RS1]], i64 [[VL]])54// CHECK-RV64-NEXT: ret void55//56void test_vse16_v_bf16m4(__bf16 *rs1, vbfloat16m4_t vs3, size_t vl) {57 return __riscv_vse16(rs1, vs3, vl);58}59 60// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16m8(61// CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], <vscale x 32 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {62// CHECK-RV64-NEXT: entry:63// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv32bf16.p0.i64(<vscale x 32 x bfloat> [[VS3]], ptr [[RS1]], i64 [[VL]])64// CHECK-RV64-NEXT: ret void65//66void test_vse16_v_bf16m8(__bf16 *rs1, vbfloat16m8_t vs3, size_t vl) {67 return __riscv_vse16(rs1, vs3, vl);68}69 70// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16mf4_m(71// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], <vscale x 1 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {72// CHECK-RV64-NEXT: entry:73// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv1bf16.p0.i64(<vscale x 1 x bfloat> [[VS3]], ptr [[RS1]], <vscale x 1 x i1> [[VM]], i64 [[VL]])74// CHECK-RV64-NEXT: ret void75//76void test_vse16_v_bf16mf4_m(vbool64_t vm, __bf16 *rs1, vbfloat16mf4_t vs3,77 size_t vl) {78 return __riscv_vse16(vm, rs1, vs3, vl);79}80 81// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16mf2_m(82// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], <vscale x 2 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {83// CHECK-RV64-NEXT: entry:84// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv2bf16.p0.i64(<vscale x 2 x bfloat> [[VS3]], ptr [[RS1]], <vscale x 2 x i1> [[VM]], i64 [[VL]])85// CHECK-RV64-NEXT: ret void86//87void test_vse16_v_bf16mf2_m(vbool32_t vm, __bf16 *rs1, vbfloat16mf2_t vs3,88 size_t vl) {89 return __riscv_vse16(vm, rs1, vs3, vl);90}91 92// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16m1_m(93// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], <vscale x 4 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {94// CHECK-RV64-NEXT: entry:95// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv4bf16.p0.i64(<vscale x 4 x bfloat> [[VS3]], ptr [[RS1]], <vscale x 4 x i1> [[VM]], i64 [[VL]])96// CHECK-RV64-NEXT: ret void97//98void test_vse16_v_bf16m1_m(vbool16_t vm, __bf16 *rs1, vbfloat16m1_t vs3,99 size_t vl) {100 return __riscv_vse16(vm, rs1, vs3, vl);101}102 103// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16m2_m(104// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], <vscale x 8 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {105// CHECK-RV64-NEXT: entry:106// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv8bf16.p0.i64(<vscale x 8 x bfloat> [[VS3]], ptr [[RS1]], <vscale x 8 x i1> [[VM]], i64 [[VL]])107// CHECK-RV64-NEXT: ret void108//109void test_vse16_v_bf16m2_m(vbool8_t vm, __bf16 *rs1, vbfloat16m2_t vs3,110 size_t vl) {111 return __riscv_vse16(vm, rs1, vs3, vl);112}113 114// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16m4_m(115// CHECK-RV64-SAME: <vscale x 16 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], <vscale x 16 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {116// CHECK-RV64-NEXT: entry:117// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv16bf16.p0.i64(<vscale x 16 x bfloat> [[VS3]], ptr [[RS1]], <vscale x 16 x i1> [[VM]], i64 [[VL]])118// CHECK-RV64-NEXT: ret void119//120void test_vse16_v_bf16m4_m(vbool4_t vm, __bf16 *rs1, vbfloat16m4_t vs3,121 size_t vl) {122 return __riscv_vse16(vm, rs1, vs3, vl);123}124 125// CHECK-RV64-LABEL: define dso_local void @test_vse16_v_bf16m8_m(126// CHECK-RV64-SAME: <vscale x 32 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], <vscale x 32 x bfloat> [[VS3:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {127// CHECK-RV64-NEXT: entry:128// CHECK-RV64-NEXT: call void @llvm.riscv.vse.mask.nxv32bf16.p0.i64(<vscale x 32 x bfloat> [[VS3]], ptr [[RS1]], <vscale x 32 x i1> [[VM]], i64 [[VL]])129// CHECK-RV64-NEXT: ret void130//131void test_vse16_v_bf16m8_m(vbool2_t vm, __bf16 *rs1, vbfloat16m8_t vs3,132 size_t vl) {133 return __riscv_vse16(vm, rs1, vs3, vl);134}135