147 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 52// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \4// RUN: -target-feature +zvfbfmin -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vslideup_vx_bf16mf4(11// CHECK-RV64-SAME: <vscale x 1 x bfloat> [[VD:%.*]], <vscale x 1 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: [[ENTRY:.*:]]13// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vslideup.nxv1bf16.i64(<vscale x 1 x bfloat> [[VD]], <vscale x 1 x bfloat> [[VS2]], i64 [[RS1]], i64 [[VL]], i64 3)14// CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]15//16vbfloat16mf4_t test_vslideup_vx_bf16mf4(vbfloat16mf4_t vd, vbfloat16mf4_t vs2,17 size_t rs1, size_t vl) {18 return __riscv_vslideup(vd, vs2, rs1, vl);19}20 21// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vslideup_vx_bf16mf2(22// CHECK-RV64-SAME: <vscale x 2 x bfloat> [[VD:%.*]], <vscale x 2 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {23// CHECK-RV64-NEXT: [[ENTRY:.*:]]24// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vslideup.nxv2bf16.i64(<vscale x 2 x bfloat> [[VD]], <vscale x 2 x bfloat> [[VS2]], i64 [[RS1]], i64 [[VL]], i64 3)25// CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]26//27vbfloat16mf2_t test_vslideup_vx_bf16mf2(vbfloat16mf2_t vd, vbfloat16mf2_t vs2,28 size_t rs1, size_t vl) {29 return __riscv_vslideup(vd, vs2, rs1, vl);30}31 32// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vslideup_vx_bf16m1(33// CHECK-RV64-SAME: <vscale x 4 x bfloat> [[VD:%.*]], <vscale x 4 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {34// CHECK-RV64-NEXT: [[ENTRY:.*:]]35// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vslideup.nxv4bf16.i64(<vscale x 4 x bfloat> [[VD]], <vscale x 4 x bfloat> [[VS2]], i64 [[RS1]], i64 [[VL]], i64 3)36// CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]37//38vbfloat16m1_t test_vslideup_vx_bf16m1(vbfloat16m1_t vd, vbfloat16m1_t vs2,39 size_t rs1, size_t vl) {40 return __riscv_vslideup(vd, vs2, rs1, vl);41}42 43// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vslideup_vx_bf16m2(44// CHECK-RV64-SAME: <vscale x 8 x bfloat> [[VD:%.*]], <vscale x 8 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {45// CHECK-RV64-NEXT: [[ENTRY:.*:]]46// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vslideup.nxv8bf16.i64(<vscale x 8 x bfloat> [[VD]], <vscale x 8 x bfloat> [[VS2]], i64 [[RS1]], i64 [[VL]], i64 3)47// CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]48//49vbfloat16m2_t test_vslideup_vx_bf16m2(vbfloat16m2_t vd, vbfloat16m2_t vs2,50 size_t rs1, size_t vl) {51 return __riscv_vslideup(vd, vs2, rs1, vl);52}53 54// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vslideup_vx_bf16m4(55// CHECK-RV64-SAME: <vscale x 16 x bfloat> [[VD:%.*]], <vscale x 16 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {56// CHECK-RV64-NEXT: [[ENTRY:.*:]]57// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vslideup.nxv16bf16.i64(<vscale x 16 x bfloat> [[VD]], <vscale x 16 x bfloat> [[VS2]], i64 [[RS1]], i64 [[VL]], i64 3)58// CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]59//60vbfloat16m4_t test_vslideup_vx_bf16m4(vbfloat16m4_t vd, vbfloat16m4_t vs2,61 size_t rs1, size_t vl) {62 return __riscv_vslideup(vd, vs2, rs1, vl);63}64 65// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vslideup_vx_bf16m8(66// CHECK-RV64-SAME: <vscale x 32 x bfloat> [[VD:%.*]], <vscale x 32 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {67// CHECK-RV64-NEXT: [[ENTRY:.*:]]68// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vslideup.nxv32bf16.i64(<vscale x 32 x bfloat> [[VD]], <vscale x 32 x bfloat> [[VS2]], i64 [[RS1]], i64 [[VL]], i64 3)69// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]70//71vbfloat16m8_t test_vslideup_vx_bf16m8(vbfloat16m8_t vd, vbfloat16m8_t vs2,72 size_t rs1, size_t vl) {73 return __riscv_vslideup(vd, vs2, rs1, vl);74}75 76// CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vslideup_vx_bf16mf4_m(77// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], <vscale x 1 x bfloat> [[VD:%.*]], <vscale x 1 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {78// CHECK-RV64-NEXT: [[ENTRY:.*:]]79// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vslideup.mask.nxv1bf16.i64(<vscale x 1 x bfloat> [[VD]], <vscale x 1 x bfloat> [[VS2]], i64 [[RS1]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 3)80// CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]81//82vbfloat16mf4_t test_vslideup_vx_bf16mf4_m(vbool64_t vm, vbfloat16mf4_t vd,83 vbfloat16mf4_t vs2, size_t rs1,84 size_t vl) {85 return __riscv_vslideup(vm, vd, vs2, rs1, vl);86}87 88// CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vslideup_vx_bf16mf2_m(89// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], <vscale x 2 x bfloat> [[VD:%.*]], <vscale x 2 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {90// CHECK-RV64-NEXT: [[ENTRY:.*:]]91// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vslideup.mask.nxv2bf16.i64(<vscale x 2 x bfloat> [[VD]], <vscale x 2 x bfloat> [[VS2]], i64 [[RS1]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 3)92// CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]93//94vbfloat16mf2_t test_vslideup_vx_bf16mf2_m(vbool32_t vm, vbfloat16mf2_t vd,95 vbfloat16mf2_t vs2, size_t rs1,96 size_t vl) {97 return __riscv_vslideup(vm, vd, vs2, rs1, vl);98}99 100// CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vslideup_vx_bf16m1_m(101// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], <vscale x 4 x bfloat> [[VD:%.*]], <vscale x 4 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {102// CHECK-RV64-NEXT: [[ENTRY:.*:]]103// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vslideup.mask.nxv4bf16.i64(<vscale x 4 x bfloat> [[VD]], <vscale x 4 x bfloat> [[VS2]], i64 [[RS1]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 3)104// CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]105//106vbfloat16m1_t test_vslideup_vx_bf16m1_m(vbool16_t vm, vbfloat16m1_t vd,107 vbfloat16m1_t vs2, size_t rs1,108 size_t vl) {109 return __riscv_vslideup(vm, vd, vs2, rs1, vl);110}111 112// CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vslideup_vx_bf16m2_m(113// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], <vscale x 8 x bfloat> [[VD:%.*]], <vscale x 8 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {114// CHECK-RV64-NEXT: [[ENTRY:.*:]]115// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vslideup.mask.nxv8bf16.i64(<vscale x 8 x bfloat> [[VD]], <vscale x 8 x bfloat> [[VS2]], i64 [[RS1]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 3)116// CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]117//118vbfloat16m2_t test_vslideup_vx_bf16m2_m(vbool8_t vm, vbfloat16m2_t vd,119 vbfloat16m2_t vs2, size_t rs1,120 size_t vl) {121 return __riscv_vslideup(vm, vd, vs2, rs1, vl);122}123 124// CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vslideup_vx_bf16m4_m(125// CHECK-RV64-SAME: <vscale x 16 x i1> [[VM:%.*]], <vscale x 16 x bfloat> [[VD:%.*]], <vscale x 16 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {126// CHECK-RV64-NEXT: [[ENTRY:.*:]]127// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vslideup.mask.nxv16bf16.i64(<vscale x 16 x bfloat> [[VD]], <vscale x 16 x bfloat> [[VS2]], i64 [[RS1]], <vscale x 16 x i1> [[VM]], i64 [[VL]], i64 3)128// CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]129//130vbfloat16m4_t test_vslideup_vx_bf16m4_m(vbool4_t vm, vbfloat16m4_t vd,131 vbfloat16m4_t vs2, size_t rs1,132 size_t vl) {133 return __riscv_vslideup(vm, vd, vs2, rs1, vl);134}135 136// CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vslideup_vx_bf16m8_m(137// CHECK-RV64-SAME: <vscale x 32 x i1> [[VM:%.*]], <vscale x 32 x bfloat> [[VD:%.*]], <vscale x 32 x bfloat> [[VS2:%.*]], i64 noundef [[RS1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {138// CHECK-RV64-NEXT: [[ENTRY:.*:]]139// CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vslideup.mask.nxv32bf16.i64(<vscale x 32 x bfloat> [[VD]], <vscale x 32 x bfloat> [[VS2]], i64 [[RS1]], <vscale x 32 x i1> [[VM]], i64 [[VL]], i64 3)140// CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]141//142vbfloat16m8_t test_vslideup_vx_bf16m8_m(vbool2_t vm, vbfloat16m8_t vd,143 vbfloat16m8_t vs2, size_t rs1,144 size_t vl) {145 return __riscv_vslideup(vm, vd, vs2, rs1, vl);146}147