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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 42// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \4// RUN: -target-feature +zvfbfmin -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vloxseg4ei8_v_bf16mf4x4_tu(11// CHECK-RV64-SAME: target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 1 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv2i8_4t.p0.nxv1i8.i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 1 x i8> [[RS2]], i64 [[VL]], i64 4)14// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]15//16vbfloat16mf4x4_t test_vloxseg4ei8_v_bf16mf4x4_tu(vbfloat16mf4x4_t vd,17 const __bf16 *rs1,18 vuint8mf8_t rs2, size_t vl) {19 return __riscv_vloxseg4ei8_tu(vd, rs1, rs2, vl);20}21 22// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vloxseg4ei8_v_bf16mf2x4_tu(23// CHECK-RV64-SAME: target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 2 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {24// CHECK-RV64-NEXT: entry:25// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv4i8_4t.p0.nxv2i8.i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 2 x i8> [[RS2]], i64 [[VL]], i64 4)26// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]27//28vbfloat16mf2x4_t test_vloxseg4ei8_v_bf16mf2x4_tu(vbfloat16mf2x4_t vd,29 const __bf16 *rs1,30 vuint8mf4_t rs2, size_t vl) {31 return __riscv_vloxseg4ei8_tu(vd, rs1, rs2, vl);32}33 34// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vloxseg4ei8_v_bf16m1x4_tu(35// CHECK-RV64-SAME: target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 4 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {36// CHECK-RV64-NEXT: entry:37// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv8i8_4t.p0.nxv4i8.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 4 x i8> [[RS2]], i64 [[VL]], i64 4)38// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]39//40vbfloat16m1x4_t test_vloxseg4ei8_v_bf16m1x4_tu(vbfloat16m1x4_t vd,41 const __bf16 *rs1,42 vuint8mf2_t rs2, size_t vl) {43 return __riscv_vloxseg4ei8_tu(vd, rs1, rs2, vl);44}45 46// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vloxseg4ei8_v_bf16m2x4_tu(47// CHECK-RV64-SAME: target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 8 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {48// CHECK-RV64-NEXT: entry:49// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.triscv.vector.tuple_nxv16i8_4t.p0.nxv8i8.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 8 x i8> [[RS2]], i64 [[VL]], i64 4)50// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]51//52vbfloat16m2x4_t test_vloxseg4ei8_v_bf16m2x4_tu(vbfloat16m2x4_t vd,53 const __bf16 *rs1,54 vuint8m1_t rs2, size_t vl) {55 return __riscv_vloxseg4ei8_tu(vd, rs1, rs2, vl);56}57 58// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vloxseg4ei8_v_bf16mf4x4_tum(59// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 1 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {60// CHECK-RV64-NEXT: entry:61// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.p0.nxv1i8.nxv1i1.i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 1 x i8> [[RS2]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 2, i64 4)62// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]63//64vbfloat16mf4x4_t test_vloxseg4ei8_v_bf16mf4x4_tum(vbool64_t vm,65 vbfloat16mf4x4_t vd,66 const __bf16 *rs1,67 vuint8mf8_t rs2, size_t vl) {68 return __riscv_vloxseg4ei8_tum(vm, vd, rs1, rs2, vl);69}70 71// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vloxseg4ei8_v_bf16mf2x4_tum(72// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 2 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {73// CHECK-RV64-NEXT: entry:74// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.p0.nxv2i8.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 2 x i8> [[RS2]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 2, i64 4)75// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]76//77vbfloat16mf2x4_t test_vloxseg4ei8_v_bf16mf2x4_tum(vbool32_t vm,78 vbfloat16mf2x4_t vd,79 const __bf16 *rs1,80 vuint8mf4_t rs2, size_t vl) {81 return __riscv_vloxseg4ei8_tum(vm, vd, rs1, rs2, vl);82}83 84// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vloxseg4ei8_v_bf16m1x4_tum(85// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 4 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {86// CHECK-RV64-NEXT: entry:87// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.p0.nxv4i8.nxv4i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 4 x i8> [[RS2]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 2, i64 4)88// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]89//90vbfloat16m1x4_t test_vloxseg4ei8_v_bf16m1x4_tum(vbool16_t vm,91 vbfloat16m1x4_t vd,92 const __bf16 *rs1,93 vuint8mf2_t rs2, size_t vl) {94 return __riscv_vloxseg4ei8_tum(vm, vd, rs1, rs2, vl);95}96 97// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vloxseg4ei8_v_bf16m2x4_tum(98// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 8 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {99// CHECK-RV64-NEXT: entry:100// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.p0.nxv8i8.nxv8i1.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 8 x i8> [[RS2]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 2, i64 4)101// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]102//103vbfloat16m2x4_t test_vloxseg4ei8_v_bf16m2x4_tum(vbool8_t vm, vbfloat16m2x4_t vd,104 const __bf16 *rs1,105 vuint8m1_t rs2, size_t vl) {106 return __riscv_vloxseg4ei8_tum(vm, vd, rs1, rs2, vl);107}108 109// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vloxseg4ei8_v_bf16mf4x4_tumu(110// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 1 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {111// CHECK-RV64-NEXT: entry:112// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.p0.nxv1i8.nxv1i1.i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 1 x i8> [[RS2]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 0, i64 4)113// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]114//115vbfloat16mf4x4_t test_vloxseg4ei8_v_bf16mf4x4_tumu(vbool64_t vm,116 vbfloat16mf4x4_t vd,117 const __bf16 *rs1,118 vuint8mf8_t rs2, size_t vl) {119 return __riscv_vloxseg4ei8_tumu(vm, vd, rs1, rs2, vl);120}121 122// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vloxseg4ei8_v_bf16mf2x4_tumu(123// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 2 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {124// CHECK-RV64-NEXT: entry:125// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.p0.nxv2i8.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 2 x i8> [[RS2]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 0, i64 4)126// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]127//128vbfloat16mf2x4_t test_vloxseg4ei8_v_bf16mf2x4_tumu(vbool32_t vm,129 vbfloat16mf2x4_t vd,130 const __bf16 *rs1,131 vuint8mf4_t rs2, size_t vl) {132 return __riscv_vloxseg4ei8_tumu(vm, vd, rs1, rs2, vl);133}134 135// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vloxseg4ei8_v_bf16m1x4_tumu(136// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 4 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {137// CHECK-RV64-NEXT: entry:138// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.p0.nxv4i8.nxv4i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 4 x i8> [[RS2]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 0, i64 4)139// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]140//141vbfloat16m1x4_t test_vloxseg4ei8_v_bf16m1x4_tumu(vbool16_t vm,142 vbfloat16m1x4_t vd,143 const __bf16 *rs1,144 vuint8mf2_t rs2, size_t vl) {145 return __riscv_vloxseg4ei8_tumu(vm, vd, rs1, rs2, vl);146}147 148// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vloxseg4ei8_v_bf16m2x4_tumu(149// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 8 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {150// CHECK-RV64-NEXT: entry:151// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.p0.nxv8i8.nxv8i1.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 8 x i8> [[RS2]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 0, i64 4)152// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]153//154vbfloat16m2x4_t test_vloxseg4ei8_v_bf16m2x4_tumu(vbool8_t vm,155 vbfloat16m2x4_t vd,156 const __bf16 *rs1,157 vuint8m1_t rs2, size_t vl) {158 return __riscv_vloxseg4ei8_tumu(vm, vd, rs1, rs2, vl);159}160 161// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @test_vloxseg4ei8_v_bf16mf4x4_mu(162// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 1 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {163// CHECK-RV64-NEXT: entry:164// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv2i8_4t.p0.nxv1i8.nxv1i1.i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 1 x i8> [[RS2]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 1, i64 4)165// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 4) [[TMP0]]166//167vbfloat16mf4x4_t test_vloxseg4ei8_v_bf16mf4x4_mu(vbool64_t vm,168 vbfloat16mf4x4_t vd,169 const __bf16 *rs1,170 vuint8mf8_t rs2, size_t vl) {171 return __riscv_vloxseg4ei8_mu(vm, vd, rs1, rs2, vl);172}173 174// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @test_vloxseg4ei8_v_bf16mf2x4_mu(175// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 2 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {176// CHECK-RV64-NEXT: entry:177// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv4i8_4t.p0.nxv2i8.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 2 x i8> [[RS2]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 1, i64 4)178// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 4) [[TMP0]]179//180vbfloat16mf2x4_t test_vloxseg4ei8_v_bf16mf2x4_mu(vbool32_t vm,181 vbfloat16mf2x4_t vd,182 const __bf16 *rs1,183 vuint8mf4_t rs2, size_t vl) {184 return __riscv_vloxseg4ei8_mu(vm, vd, rs1, rs2, vl);185}186 187// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @test_vloxseg4ei8_v_bf16m1x4_mu(188// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 4 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {189// CHECK-RV64-NEXT: entry:190// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv8i8_4t.p0.nxv4i8.nxv4i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 4 x i8> [[RS2]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 1, i64 4)191// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 4) [[TMP0]]192//193vbfloat16m1x4_t test_vloxseg4ei8_v_bf16m1x4_mu(vbool16_t vm, vbfloat16m1x4_t vd,194 const __bf16 *rs1,195 vuint8mf2_t rs2, size_t vl) {196 return __riscv_vloxseg4ei8_mu(vm, vd, rs1, rs2, vl);197}198 199// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @test_vloxseg4ei8_v_bf16m2x4_mu(200// CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[VD:%.*]], ptr noundef [[RS1:%.*]], <vscale x 8 x i8> [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {201// CHECK-RV64-NEXT: entry:202// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vloxseg4.mask.triscv.vector.tuple_nxv16i8_4t.p0.nxv8i8.nxv8i1.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[VD]], ptr [[RS1]], <vscale x 8 x i8> [[RS2]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 1, i64 4)203// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP0]]204//205vbfloat16m2x4_t test_vloxseg4ei8_v_bf16m2x4_mu(vbool8_t vm, vbfloat16m2x4_t vd,206 const __bf16 *rs1,207 vuint8m1_t rs2, size_t vl) {208 return __riscv_vloxseg4ei8_mu(vm, vd, rs1, rs2, vl);209}210