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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 42// REQUIRES: riscv-registered-target3// RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x \4// RUN: -target-feature +zvfbfmin -disable-O0-optnone \5// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \6// RUN: FileCheck --check-prefix=CHECK-RV64 %s7 8#include <riscv_vector.h>9 10// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vlsseg7e16_v_bf16mf4x7_tu(11// CHECK-RV64-SAME: target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {12// CHECK-RV64-NEXT: entry:13// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vlsseg7.triscv.vector.tuple_nxv2i8_7t.p0.i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], i64 [[VL]], i64 4)14// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]15//16vbfloat16mf4x7_t test_vlsseg7e16_v_bf16mf4x7_tu(vbfloat16mf4x7_t vd,17 const __bf16 *rs1,18 ptrdiff_t rs2, size_t vl) {19 return __riscv_vlsseg7e16_tu(vd, rs1, rs2, vl);20}21 22// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vlsseg7e16_v_bf16mf2x7_tu(23// CHECK-RV64-SAME: target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {24// CHECK-RV64-NEXT: entry:25// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vlsseg7.triscv.vector.tuple_nxv4i8_7t.p0.i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], i64 [[VL]], i64 4)26// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]27//28vbfloat16mf2x7_t test_vlsseg7e16_v_bf16mf2x7_tu(vbfloat16mf2x7_t vd,29 const __bf16 *rs1,30 ptrdiff_t rs2, size_t vl) {31 return __riscv_vlsseg7e16_tu(vd, rs1, rs2, vl);32}33 34// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vlsseg7e16_v_bf16m1x7_tu(35// CHECK-RV64-SAME: target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {36// CHECK-RV64-NEXT: entry:37// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlsseg7.triscv.vector.tuple_nxv8i8_7t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], i64 [[VL]], i64 4)38// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]39//40vbfloat16m1x7_t test_vlsseg7e16_v_bf16m1x7_tu(vbfloat16m1x7_t vd,41 const __bf16 *rs1, ptrdiff_t rs2,42 size_t vl) {43 return __riscv_vlsseg7e16_tu(vd, rs1, rs2, vl);44}45 46// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vlsseg7e16_v_bf16mf4x7_tum(47// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {48// CHECK-RV64-NEXT: entry:49// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv2i8_7t.p0.i64.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 2, i64 4)50// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]51//52vbfloat16mf4x7_t test_vlsseg7e16_v_bf16mf4x7_tum(vbool64_t vm,53 vbfloat16mf4x7_t vd,54 const __bf16 *rs1,55 ptrdiff_t rs2, size_t vl) {56 return __riscv_vlsseg7e16_tum(vm, vd, rs1, rs2, vl);57}58 59// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vlsseg7e16_v_bf16mf2x7_tum(60// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {61// CHECK-RV64-NEXT: entry:62// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv4i8_7t.p0.i64.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 2, i64 4)63// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]64//65vbfloat16mf2x7_t test_vlsseg7e16_v_bf16mf2x7_tum(vbool32_t vm,66 vbfloat16mf2x7_t vd,67 const __bf16 *rs1,68 ptrdiff_t rs2, size_t vl) {69 return __riscv_vlsseg7e16_tum(vm, vd, rs1, rs2, vl);70}71 72// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vlsseg7e16_v_bf16m1x7_tum(73// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {74// CHECK-RV64-NEXT: entry:75// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv8i8_7t.p0.i64.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 2, i64 4)76// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]77//78vbfloat16m1x7_t test_vlsseg7e16_v_bf16m1x7_tum(vbool16_t vm, vbfloat16m1x7_t vd,79 const __bf16 *rs1, ptrdiff_t rs2,80 size_t vl) {81 return __riscv_vlsseg7e16_tum(vm, vd, rs1, rs2, vl);82}83 84// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vlsseg7e16_v_bf16mf4x7_tumu(85// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {86// CHECK-RV64-NEXT: entry:87// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv2i8_7t.p0.i64.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 0, i64 4)88// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]89//90vbfloat16mf4x7_t test_vlsseg7e16_v_bf16mf4x7_tumu(vbool64_t vm,91 vbfloat16mf4x7_t vd,92 const __bf16 *rs1,93 ptrdiff_t rs2, size_t vl) {94 return __riscv_vlsseg7e16_tumu(vm, vd, rs1, rs2, vl);95}96 97// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vlsseg7e16_v_bf16mf2x7_tumu(98// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {99// CHECK-RV64-NEXT: entry:100// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv4i8_7t.p0.i64.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 0, i64 4)101// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]102//103vbfloat16mf2x7_t test_vlsseg7e16_v_bf16mf2x7_tumu(vbool32_t vm,104 vbfloat16mf2x7_t vd,105 const __bf16 *rs1,106 ptrdiff_t rs2, size_t vl) {107 return __riscv_vlsseg7e16_tumu(vm, vd, rs1, rs2, vl);108}109 110// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vlsseg7e16_v_bf16m1x7_tumu(111// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {112// CHECK-RV64-NEXT: entry:113// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv8i8_7t.p0.i64.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 0, i64 4)114// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]115//116vbfloat16m1x7_t test_vlsseg7e16_v_bf16m1x7_tumu(vbool16_t vm,117 vbfloat16m1x7_t vd,118 const __bf16 *rs1,119 ptrdiff_t rs2, size_t vl) {120 return __riscv_vlsseg7e16_tumu(vm, vd, rs1, rs2, vl);121}122 123// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @test_vlsseg7e16_v_bf16mf4x7_mu(124// CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {125// CHECK-RV64-NEXT: entry:126// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv2i8_7t.p0.i64.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 1, i64 4)127// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 7) [[TMP0]]128//129vbfloat16mf4x7_t test_vlsseg7e16_v_bf16mf4x7_mu(vbool64_t vm,130 vbfloat16mf4x7_t vd,131 const __bf16 *rs1,132 ptrdiff_t rs2, size_t vl) {133 return __riscv_vlsseg7e16_mu(vm, vd, rs1, rs2, vl);134}135 136// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @test_vlsseg7e16_v_bf16mf2x7_mu(137// CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {138// CHECK-RV64-NEXT: entry:139// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 4 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv4i8_7t.p0.i64.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 1, i64 4)140// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 7) [[TMP0]]141//142vbfloat16mf2x7_t test_vlsseg7e16_v_bf16mf2x7_mu(vbool32_t vm,143 vbfloat16mf2x7_t vd,144 const __bf16 *rs1,145 ptrdiff_t rs2, size_t vl) {146 return __riscv_vlsseg7e16_mu(vm, vd, rs1, rs2, vl);147}148 149// CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @test_vlsseg7e16_v_bf16m1x7_mu(150// CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[VD:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {151// CHECK-RV64-NEXT: entry:152// CHECK-RV64-NEXT: [[TMP0:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlsseg7.mask.triscv.vector.tuple_nxv8i8_7t.p0.i64.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[VD]], ptr [[RS1]], i64 [[RS2]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 1, i64 4)153// CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP0]]154//155vbfloat16m1x7_t test_vlsseg7e16_v_bf16m1x7_mu(vbool16_t vm, vbfloat16m1x7_t vd,156 const __bf16 *rs1, ptrdiff_t rs2,157 size_t vl) {158 return __riscv_vlsseg7e16_mu(vm, vd, rs1, rs2, vl);159}160