37 lines · c
1// REQUIRES: riscv-registered-target2// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \3// RUN: -target-feature +v -target-feature +zfh -target-feature +zvfh \4// RUN: -fsyntax-only -verify %s5 6#include <riscv_vector.h>7 8vfloat32m1_t test_vfrec7_v_f32m1_rm(vfloat32m1_t op1, size_t vl) {9 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}10 return __riscv_vfrec7_v_f32m1_rm(op1, 5, vl);11}12 13vfloat32m1_t test_vfrec7_v_f32m1_rm_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) {14 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}15 return __riscv_vfrec7_v_f32m1_rm_m(mask, op1, 5, vl);16}17 18vfloat32m1_t test_vfrec7_v_f32m1_rm_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) {19 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}20 return __riscv_vfrec7_v_f32m1_rm_tu(maskedoff, op1, 5, vl);21}22 23vfloat32m1_t test_vfrec7_v_f32m1_rm_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) {24 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}25 return __riscv_vfrec7_v_f32m1_rm_tum(mask, maskedoff, op1, 5, vl);26}27 28vfloat32m1_t test_vfrec7_v_f32m1_rm_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) {29 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}30 return __riscv_vfrec7_v_f32m1_rm_tumu(mask, maskedoff, op1, 5, vl);31}32 33vfloat32m1_t test_vfrec7_v_f32m1_rm_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) {34 // expected-error@+1 {{argument value 5 is outside the valid range [0, 4]}}35 return __riscv_vfrec7_v_f32m1_rm_mu(mask, maskedoff, op1, 5, vl);36}37