826 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +zve64d \3// RUN: -target-feature +f -target-feature +d -disable-O0-optnone \4// RUN: -mvscale-min=4 -mvscale-max=4 -emit-llvm -o - %s | \5// RUN: opt -S -passes=sroa | FileCheck %s6 7// REQUIRES: riscv-registered-target8 9#include <stdint.h>10 11typedef __rvv_int8m1_t vint8m1_t;12typedef __rvv_uint8m1_t vuint8m1_t;13typedef __rvv_int16m1_t vint16m1_t;14typedef __rvv_uint16m1_t vuint16m1_t;15typedef __rvv_int32m1_t vint32m1_t;16typedef __rvv_uint32m1_t vuint32m1_t;17typedef __rvv_int64m1_t vint64m1_t;18typedef __rvv_uint64m1_t vuint64m1_t;19typedef __rvv_float32m1_t vfloat32m1_t;20typedef __rvv_float64m1_t vfloat64m1_t;21 22typedef vint8m1_t fixed_int8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));23typedef vint16m1_t fixed_int16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));24typedef vint32m1_t fixed_int32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));25typedef vint64m1_t fixed_int64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));26 27typedef vuint8m1_t fixed_uint8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));28typedef vuint16m1_t fixed_uint16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));29typedef vuint32m1_t fixed_uint32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));30typedef vuint64m1_t fixed_uint64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));31 32typedef vfloat32m1_t fixed_float32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));33typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));34 35// EQ36 37// CHECK-LABEL: @eq_i8(38// CHECK-NEXT: entry:39// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)40// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)41// CHECK-NEXT: [[CMP:%.*]] = icmp eq <32 x i8> [[A]], [[B]]42// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>43// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)44// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]45//46fixed_int8m1_t eq_i8(fixed_int8m1_t a, fixed_int8m1_t b) {47 return a == b;48}49 50// CHECK-LABEL: @eq_i16(51// CHECK-NEXT: entry:52// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)53// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)54// CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i16> [[A]], [[B]]55// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>56// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)57// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]58//59fixed_int16m1_t eq_i16(fixed_int16m1_t a, fixed_int16m1_t b) {60 return a == b;61}62 63// CHECK-LABEL: @eq_i32(64// CHECK-NEXT: entry:65// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)66// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)67// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i32> [[A]], [[B]]68// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>69// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)70// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]71//72fixed_int32m1_t eq_i32(fixed_int32m1_t a, fixed_int32m1_t b) {73 return a == b;74}75 76// CHECK-LABEL: @eq_i64(77// CHECK-NEXT: entry:78// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)79// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)80// CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i64> [[A]], [[B]]81// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>82// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)83// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]84//85fixed_int64m1_t eq_i64(fixed_int64m1_t a, fixed_int64m1_t b) {86 return a == b;87}88 89// CHECK-LABEL: @eq_u8(90// CHECK-NEXT: entry:91// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)92// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)93// CHECK-NEXT: [[CMP:%.*]] = icmp eq <32 x i8> [[A]], [[B]]94// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>95// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)96// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]97//98fixed_int8m1_t eq_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {99 return a == b;100}101 102// CHECK-LABEL: @eq_u16(103// CHECK-NEXT: entry:104// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)105// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)106// CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i16> [[A]], [[B]]107// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>108// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)109// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]110//111fixed_int16m1_t eq_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {112 return a == b;113}114 115// CHECK-LABEL: @eq_u32(116// CHECK-NEXT: entry:117// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)118// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)119// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i32> [[A]], [[B]]120// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>121// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)122// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]123//124fixed_int32m1_t eq_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {125 return a == b;126}127 128// CHECK-LABEL: @eq_u64(129// CHECK-NEXT: entry:130// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)131// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)132// CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i64> [[A]], [[B]]133// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>134// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)135// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]136//137fixed_int64m1_t eq_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {138 return a == b;139}140 141// CHECK-LABEL: @eq_f32(142// CHECK-NEXT: entry:143// CHECK-NEXT: [[A:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.*]], i64 0)144// CHECK-NEXT: [[B:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.*]], i64 0)145// CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <8 x float> [[A]], [[B]]146// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>147// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)148// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]149//150fixed_int32m1_t eq_f32(fixed_float32m1_t a, fixed_float32m1_t b) {151 return a == b;152}153 154// CHECK-LABEL: @eq_f64(155// CHECK-NEXT: entry:156// CHECK-NEXT: [[A:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.*]], i64 0)157// CHECK-NEXT: [[B:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.*]], i64 0)158// CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <4 x double> [[A]], [[B]]159// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>160// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)161// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]162//163fixed_int64m1_t eq_f64(fixed_float64m1_t a, fixed_float64m1_t b) {164 return a == b;165}166 167// NEQ168 169// CHECK-LABEL: @neq_i8(170// CHECK-NEXT: entry:171// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)172// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)173// CHECK-NEXT: [[CMP:%.*]] = icmp ne <32 x i8> [[A]], [[B]]174// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>175// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)176// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]177//178fixed_int8m1_t neq_i8(fixed_int8m1_t a, fixed_int8m1_t b) {179 return a != b;180}181 182// CHECK-LABEL: @neq_i16(183// CHECK-NEXT: entry:184// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)185// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)186// CHECK-NEXT: [[CMP:%.*]] = icmp ne <16 x i16> [[A]], [[B]]187// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>188// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)189// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]190//191fixed_int16m1_t neq_i16(fixed_int16m1_t a, fixed_int16m1_t b) {192 return a != b;193}194 195// CHECK-LABEL: @neq_i32(196// CHECK-NEXT: entry:197// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)198// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)199// CHECK-NEXT: [[CMP:%.*]] = icmp ne <8 x i32> [[A]], [[B]]200// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>201// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)202// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]203//204fixed_int32m1_t neq_i32(fixed_int32m1_t a, fixed_int32m1_t b) {205 return a != b;206}207 208// CHECK-LABEL: @neq_i64(209// CHECK-NEXT: entry:210// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)211// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)212// CHECK-NEXT: [[CMP:%.*]] = icmp ne <4 x i64> [[A]], [[B]]213// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>214// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)215// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]216//217fixed_int64m1_t neq_i64(fixed_int64m1_t a, fixed_int64m1_t b) {218 return a != b;219}220 221// CHECK-LABEL: @neq_u8(222// CHECK-NEXT: entry:223// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)224// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)225// CHECK-NEXT: [[CMP:%.*]] = icmp ne <32 x i8> [[A]], [[B]]226// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>227// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)228// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]229//230fixed_int8m1_t neq_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {231 return a != b;232}233 234// CHECK-LABEL: @neq_u16(235// CHECK-NEXT: entry:236// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)237// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)238// CHECK-NEXT: [[CMP:%.*]] = icmp ne <16 x i16> [[A]], [[B]]239// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>240// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)241// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]242//243fixed_int16m1_t neq_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {244 return a != b;245}246 247// CHECK-LABEL: @neq_u32(248// CHECK-NEXT: entry:249// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)250// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)251// CHECK-NEXT: [[CMP:%.*]] = icmp ne <8 x i32> [[A]], [[B]]252// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>253// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)254// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]255//256fixed_int32m1_t neq_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {257 return a != b;258}259 260// CHECK-LABEL: @neq_u64(261// CHECK-NEXT: entry:262// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)263// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)264// CHECK-NEXT: [[CMP:%.*]] = icmp ne <4 x i64> [[A]], [[B]]265// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>266// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)267// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]268//269fixed_int64m1_t neq_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {270 return a != b;271}272 273// CHECK-LABEL: @neq_f32(274// CHECK-NEXT: entry:275// CHECK-NEXT: [[A:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.*]], i64 0)276// CHECK-NEXT: [[B:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.*]], i64 0)277// CHECK-NEXT: [[CMP:%.*]] = fcmp une <8 x float> [[A]], [[B]]278// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>279// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)280// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]281//282fixed_int32m1_t neq_f32(fixed_float32m1_t a, fixed_float32m1_t b) {283 return a != b;284}285 286// CHECK-LABEL: @neq_f64(287// CHECK-NEXT: entry:288// CHECK-NEXT: [[A:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.*]], i64 0)289// CHECK-NEXT: [[B:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.*]], i64 0)290// CHECK-NEXT: [[CMP:%.*]] = fcmp une <4 x double> [[A]], [[B]]291// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>292// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)293// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]294//295fixed_int64m1_t neq_f64(fixed_float64m1_t a, fixed_float64m1_t b) {296 return a != b;297}298 299// LT300 301// CHECK-LABEL: @lt_i8(302// CHECK-NEXT: entry:303// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)304// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)305// CHECK-NEXT: [[CMP:%.*]] = icmp slt <32 x i8> [[A]], [[B]]306// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>307// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)308// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]309//310fixed_int8m1_t lt_i8(fixed_int8m1_t a, fixed_int8m1_t b) {311 return a < b;312}313 314// CHECK-LABEL: @lt_i16(315// CHECK-NEXT: entry:316// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)317// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)318// CHECK-NEXT: [[CMP:%.*]] = icmp slt <16 x i16> [[A]], [[B]]319// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>320// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)321// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]322//323fixed_int16m1_t lt_i16(fixed_int16m1_t a, fixed_int16m1_t b) {324 return a < b;325}326 327// CHECK-LABEL: @lt_i32(328// CHECK-NEXT: entry:329// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)330// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)331// CHECK-NEXT: [[CMP:%.*]] = icmp slt <8 x i32> [[A]], [[B]]332// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>333// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)334// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]335//336fixed_int32m1_t lt_i32(fixed_int32m1_t a, fixed_int32m1_t b) {337 return a < b;338}339 340// CHECK-LABEL: @lt_i64(341// CHECK-NEXT: entry:342// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)343// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)344// CHECK-NEXT: [[CMP:%.*]] = icmp slt <4 x i64> [[A]], [[B]]345// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>346// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)347// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]348//349fixed_int64m1_t lt_i64(fixed_int64m1_t a, fixed_int64m1_t b) {350 return a < b;351}352 353// CHECK-LABEL: @lt_u8(354// CHECK-NEXT: entry:355// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)356// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)357// CHECK-NEXT: [[CMP:%.*]] = icmp ult <32 x i8> [[A]], [[B]]358// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>359// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)360// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]361//362fixed_int8m1_t lt_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {363 return a < b;364}365 366// CHECK-LABEL: @lt_u16(367// CHECK-NEXT: entry:368// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)369// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)370// CHECK-NEXT: [[CMP:%.*]] = icmp ult <16 x i16> [[A]], [[B]]371// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>372// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)373// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]374//375fixed_int16m1_t lt_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {376 return a < b;377}378 379// CHECK-LABEL: @lt_u32(380// CHECK-NEXT: entry:381// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)382// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)383// CHECK-NEXT: [[CMP:%.*]] = icmp ult <8 x i32> [[A]], [[B]]384// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>385// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)386// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]387//388fixed_int32m1_t lt_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {389 return a < b;390}391 392// CHECK-LABEL: @lt_u64(393// CHECK-NEXT: entry:394// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)395// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)396// CHECK-NEXT: [[CMP:%.*]] = icmp ult <4 x i64> [[A]], [[B]]397// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>398// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)399// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]400//401fixed_int64m1_t lt_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {402 return a < b;403}404 405// CHECK-LABEL: @lt_f32(406// CHECK-NEXT: entry:407// CHECK-NEXT: [[A:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.*]], i64 0)408// CHECK-NEXT: [[B:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.*]], i64 0)409// CHECK-NEXT: [[CMP:%.*]] = fcmp olt <8 x float> [[A]], [[B]]410// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>411// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)412// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]413//414fixed_int32m1_t lt_f32(fixed_float32m1_t a, fixed_float32m1_t b) {415 return a < b;416}417 418// CHECK-LABEL: @lt_f64(419// CHECK-NEXT: entry:420// CHECK-NEXT: [[A:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.*]], i64 0)421// CHECK-NEXT: [[B:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.*]], i64 0)422// CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x double> [[A]], [[B]]423// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>424// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)425// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]426//427fixed_int64m1_t lt_f64(fixed_float64m1_t a, fixed_float64m1_t b) {428 return a < b;429}430 431// LEQ432 433// CHECK-LABEL: @leq_i8(434// CHECK-NEXT: entry:435// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)436// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)437// CHECK-NEXT: [[CMP:%.*]] = icmp sle <32 x i8> [[A]], [[B]]438// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>439// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)440// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]441//442fixed_int8m1_t leq_i8(fixed_int8m1_t a, fixed_int8m1_t b) {443 return a <= b;444}445 446// CHECK-LABEL: @leq_i16(447// CHECK-NEXT: entry:448// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)449// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)450// CHECK-NEXT: [[CMP:%.*]] = icmp sle <16 x i16> [[A]], [[B]]451// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>452// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)453// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]454//455fixed_int16m1_t leq_i16(fixed_int16m1_t a, fixed_int16m1_t b) {456 return a <= b;457}458 459// CHECK-LABEL: @leq_i32(460// CHECK-NEXT: entry:461// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)462// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)463// CHECK-NEXT: [[CMP:%.*]] = icmp sle <8 x i32> [[A]], [[B]]464// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>465// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)466// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]467//468fixed_int32m1_t leq_i32(fixed_int32m1_t a, fixed_int32m1_t b) {469 return a <= b;470}471 472// CHECK-LABEL: @leq_i64(473// CHECK-NEXT: entry:474// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)475// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)476// CHECK-NEXT: [[CMP:%.*]] = icmp sle <4 x i64> [[A]], [[B]]477// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>478// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)479// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]480//481fixed_int64m1_t leq_i64(fixed_int64m1_t a, fixed_int64m1_t b) {482 return a <= b;483}484 485// CHECK-LABEL: @leq_u8(486// CHECK-NEXT: entry:487// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)488// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)489// CHECK-NEXT: [[CMP:%.*]] = icmp ule <32 x i8> [[A]], [[B]]490// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>491// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)492// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]493//494fixed_int8m1_t leq_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {495 return a <= b;496}497 498// CHECK-LABEL: @leq_u16(499// CHECK-NEXT: entry:500// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)501// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)502// CHECK-NEXT: [[CMP:%.*]] = icmp ule <16 x i16> [[A]], [[B]]503// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>504// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)505// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]506//507fixed_int16m1_t leq_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {508 return a <= b;509}510 511// CHECK-LABEL: @leq_u32(512// CHECK-NEXT: entry:513// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)514// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)515// CHECK-NEXT: [[CMP:%.*]] = icmp ule <8 x i32> [[A]], [[B]]516// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>517// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)518// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]519//520fixed_int32m1_t leq_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {521 return a <= b;522}523 524// CHECK-LABEL: @leq_u64(525// CHECK-NEXT: entry:526// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)527// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)528// CHECK-NEXT: [[CMP:%.*]] = icmp ule <4 x i64> [[A]], [[B]]529// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>530// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)531// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]532//533fixed_int64m1_t leq_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {534 return a <= b;535}536 537// CHECK-LABEL: @leq_f32(538// CHECK-NEXT: entry:539// CHECK-NEXT: [[A:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.*]], i64 0)540// CHECK-NEXT: [[B:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.*]], i64 0)541// CHECK-NEXT: [[CMP:%.*]] = fcmp ole <8 x float> [[A]], [[B]]542// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>543// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)544// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]545//546fixed_int32m1_t leq_f32(fixed_float32m1_t a, fixed_float32m1_t b) {547 return a <= b;548}549 550// CHECK-LABEL: @leq_f64(551// CHECK-NEXT: entry:552// CHECK-NEXT: [[A:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.*]], i64 0)553// CHECK-NEXT: [[B:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.*]], i64 0)554// CHECK-NEXT: [[CMP:%.*]] = fcmp ole <4 x double> [[A]], [[B]]555// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>556// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)557// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]558//559fixed_int64m1_t leq_f64(fixed_float64m1_t a, fixed_float64m1_t b) {560 return a <= b;561}562 563// GT564 565// CHECK-LABEL: @gt_i8(566// CHECK-NEXT: entry:567// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)568// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)569// CHECK-NEXT: [[CMP:%.*]] = icmp sgt <32 x i8> [[A]], [[B]]570// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>571// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)572// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]573//574fixed_int8m1_t gt_i8(fixed_int8m1_t a, fixed_int8m1_t b) {575 return a > b;576}577 578// CHECK-LABEL: @gt_i16(579// CHECK-NEXT: entry:580// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)581// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)582// CHECK-NEXT: [[CMP:%.*]] = icmp sgt <16 x i16> [[A]], [[B]]583// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>584// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)585// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]586//587fixed_int16m1_t gt_i16(fixed_int16m1_t a, fixed_int16m1_t b) {588 return a > b;589}590 591// CHECK-LABEL: @gt_i32(592// CHECK-NEXT: entry:593// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)594// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)595// CHECK-NEXT: [[CMP:%.*]] = icmp sgt <8 x i32> [[A]], [[B]]596// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>597// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)598// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]599//600fixed_int32m1_t gt_i32(fixed_int32m1_t a, fixed_int32m1_t b) {601 return a > b;602}603 604// CHECK-LABEL: @gt_i64(605// CHECK-NEXT: entry:606// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)607// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)608// CHECK-NEXT: [[CMP:%.*]] = icmp sgt <4 x i64> [[A]], [[B]]609// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>610// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)611// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]612//613fixed_int64m1_t gt_i64(fixed_int64m1_t a, fixed_int64m1_t b) {614 return a > b;615}616 617// CHECK-LABEL: @gt_u8(618// CHECK-NEXT: entry:619// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)620// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)621// CHECK-NEXT: [[CMP:%.*]] = icmp ugt <32 x i8> [[A]], [[B]]622// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>623// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)624// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]625//626fixed_int8m1_t gt_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {627 return a > b;628}629 630// CHECK-LABEL: @gt_u16(631// CHECK-NEXT: entry:632// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)633// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)634// CHECK-NEXT: [[CMP:%.*]] = icmp ugt <16 x i16> [[A]], [[B]]635// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>636// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)637// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]638//639fixed_int16m1_t gt_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {640 return a > b;641}642 643// CHECK-LABEL: @gt_u32(644// CHECK-NEXT: entry:645// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)646// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)647// CHECK-NEXT: [[CMP:%.*]] = icmp ugt <8 x i32> [[A]], [[B]]648// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>649// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)650// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]651//652fixed_int32m1_t gt_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {653 return a > b;654}655 656// CHECK-LABEL: @gt_u64(657// CHECK-NEXT: entry:658// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)659// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)660// CHECK-NEXT: [[CMP:%.*]] = icmp ugt <4 x i64> [[A]], [[B]]661// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>662// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)663// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]664//665fixed_int64m1_t gt_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {666 return a > b;667}668 669// CHECK-LABEL: @gt_f32(670// CHECK-NEXT: entry:671// CHECK-NEXT: [[A:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.*]], i64 0)672// CHECK-NEXT: [[B:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.*]], i64 0)673// CHECK-NEXT: [[CMP:%.*]] = fcmp ogt <8 x float> [[A]], [[B]]674// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>675// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)676// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]677//678fixed_int32m1_t gt_f32(fixed_float32m1_t a, fixed_float32m1_t b) {679 return a > b;680}681 682// CHECK-LABEL: @gt_f64(683// CHECK-NEXT: entry:684// CHECK-NEXT: [[A:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.*]], i64 0)685// CHECK-NEXT: [[B:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.*]], i64 0)686// CHECK-NEXT: [[CMP:%.*]] = fcmp ogt <4 x double> [[A]], [[B]]687// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>688// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)689// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]690//691fixed_int64m1_t gt_f64(fixed_float64m1_t a, fixed_float64m1_t b) {692 return a > b;693}694 695// GEQ696 697// CHECK-LABEL: @geq_i8(698// CHECK-NEXT: entry:699// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)700// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)701// CHECK-NEXT: [[CMP:%.*]] = icmp sge <32 x i8> [[A]], [[B]]702// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>703// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)704// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]705//706fixed_int8m1_t geq_i8(fixed_int8m1_t a, fixed_int8m1_t b) {707 return a >= b;708}709 710// CHECK-LABEL: @geq_i16(711// CHECK-NEXT: entry:712// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)713// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)714// CHECK-NEXT: [[CMP:%.*]] = icmp sge <16 x i16> [[A]], [[B]]715// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>716// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)717// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]718//719fixed_int16m1_t geq_i16(fixed_int16m1_t a, fixed_int16m1_t b) {720 return a >= b;721}722 723// CHECK-LABEL: @geq_i32(724// CHECK-NEXT: entry:725// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)726// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)727// CHECK-NEXT: [[CMP:%.*]] = icmp sge <8 x i32> [[A]], [[B]]728// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>729// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)730// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]731//732fixed_int32m1_t geq_i32(fixed_int32m1_t a, fixed_int32m1_t b) {733 return a >= b;734}735 736// CHECK-LABEL: @geq_i64(737// CHECK-NEXT: entry:738// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)739// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)740// CHECK-NEXT: [[CMP:%.*]] = icmp sge <4 x i64> [[A]], [[B]]741// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>742// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)743// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]744//745fixed_int64m1_t geq_i64(fixed_int64m1_t a, fixed_int64m1_t b) {746 return a >= b;747}748 749// CHECK-LABEL: @geq_u8(750// CHECK-NEXT: entry:751// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)752// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)753// CHECK-NEXT: [[CMP:%.*]] = icmp uge <32 x i8> [[A]], [[B]]754// CHECK-NEXT: [[SEXT:%.*]] = sext <32 x i1> [[CMP]] to <32 x i8>755// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SEXT]], i64 0)756// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]757//758fixed_int8m1_t geq_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {759 return a >= b;760}761 762// CHECK-LABEL: @geq_u16(763// CHECK-NEXT: entry:764// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)765// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)766// CHECK-NEXT: [[CMP:%.*]] = icmp uge <16 x i16> [[A]], [[B]]767// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i16>768// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SEXT]], i64 0)769// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]770//771fixed_int16m1_t geq_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {772 return a >= b;773}774 775// CHECK-LABEL: @geq_u32(776// CHECK-NEXT: entry:777// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)778// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)779// CHECK-NEXT: [[CMP:%.*]] = icmp uge <8 x i32> [[A]], [[B]]780// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>781// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)782// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]783//784fixed_int32m1_t geq_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {785 return a >= b;786}787 788// CHECK-LABEL: @geq_u64(789// CHECK-NEXT: entry:790// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)791// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)792// CHECK-NEXT: [[CMP:%.*]] = icmp uge <4 x i64> [[A]], [[B]]793// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>794// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)795// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]796//797fixed_int64m1_t geq_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {798 return a >= b;799}800 801// CHECK-LABEL: @geq_f32(802// CHECK-NEXT: entry:803// CHECK-NEXT: [[A:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[A_COERCE:%.*]], i64 0)804// CHECK-NEXT: [[B:%.*]] = call <8 x float> @llvm.vector.extract.v8f32.nxv2f32(<vscale x 2 x float> [[B_COERCE:%.*]], i64 0)805// CHECK-NEXT: [[CMP:%.*]] = fcmp oge <8 x float> [[A]], [[B]]806// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i32>807// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SEXT]], i64 0)808// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]809//810fixed_int32m1_t geq_f32(fixed_float32m1_t a, fixed_float32m1_t b) {811 return a >= b;812}813 814// CHECK-LABEL: @geq_f64(815// CHECK-NEXT: entry:816// CHECK-NEXT: [[A:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[A_COERCE:%.*]], i64 0)817// CHECK-NEXT: [[B:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv1f64(<vscale x 1 x double> [[B_COERCE:%.*]], i64 0)818// CHECK-NEXT: [[CMP:%.*]] = fcmp oge <4 x double> [[A]], [[B]]819// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i64>820// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SEXT]], i64 0)821// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]822//823fixed_int64m1_t geq_f64(fixed_float64m1_t a, fixed_float64m1_t b) {824 return a >= b;825}826