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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +zve64d \3// RUN: -target-feature +f -target-feature +d -disable-O0-optnone \4// RUN: -mvscale-min=4 -mvscale-max=4 -emit-llvm -o - %s | \5// RUN: opt -S -passes=sroa | FileCheck %s6 7// REQUIRES: riscv-registered-target8 9#include <stdint.h>10 11typedef __rvv_int8m1_t vint8m1_t;12typedef __rvv_uint8m1_t vuint8m1_t;13typedef __rvv_int16m1_t vint16m1_t;14typedef __rvv_uint16m1_t vuint16m1_t;15typedef __rvv_int32m1_t vint32m1_t;16typedef __rvv_uint32m1_t vuint32m1_t;17typedef __rvv_int64m1_t vint64m1_t;18typedef __rvv_uint64m1_t vuint64m1_t;19typedef __rvv_float32m1_t vfloat32m1_t;20typedef __rvv_float64m1_t vfloat64m1_t;21 22typedef vint8m1_t fixed_int8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));23typedef vint16m1_t fixed_int16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));24typedef vint32m1_t fixed_int32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));25typedef vint64m1_t fixed_int64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));26 27typedef vuint8m1_t fixed_uint8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));28typedef vuint16m1_t fixed_uint16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));29typedef vuint32m1_t fixed_uint32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));30typedef vuint64m1_t fixed_uint64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));31 32typedef vfloat32m1_t fixed_float32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));33typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));34 35// CHECK-LABEL: @lshift_i8(36// CHECK-NEXT: entry:37// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)38// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)39// CHECK-NEXT: [[SHL:%.*]] = shl <32 x i8> [[A]], [[B]]40// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHL]], i64 0)41// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]42//43fixed_int8m1_t lshift_i8(fixed_int8m1_t a, fixed_int8m1_t b) {44 return a << b;45}46 47// CHECK-LABEL: @rshift_i8(48// CHECK-NEXT: entry:49// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)50// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)51// CHECK-NEXT: [[SHR:%.*]] = ashr <32 x i8> [[A]], [[B]]52// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHR]], i64 0)53// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]54//55fixed_int8m1_t rshift_i8(fixed_int8m1_t a, fixed_int8m1_t b) {56 return a >> b;57}58 59// CHECK-LABEL: @lshift_u8(60// CHECK-NEXT: entry:61// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)62// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)63// CHECK-NEXT: [[SHL:%.*]] = shl <32 x i8> [[A]], [[B]]64// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHL]], i64 0)65// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]66//67fixed_uint8m1_t lshift_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {68 return a << b;69}70 71// CHECK-LABEL: @rshift_u8(72// CHECK-NEXT: entry:73// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)74// CHECK-NEXT: [[B:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[B_COERCE:%.*]], i64 0)75// CHECK-NEXT: [[SHR:%.*]] = lshr <32 x i8> [[A]], [[B]]76// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHR]], i64 0)77// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]78//79fixed_uint8m1_t rshift_u8(fixed_uint8m1_t a, fixed_uint8m1_t b) {80 return a >> b;81}82 83// CHECK-LABEL: @lshift_i16(84// CHECK-NEXT: entry:85// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)86// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)87// CHECK-NEXT: [[SHL:%.*]] = shl <16 x i16> [[A]], [[B]]88// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHL]], i64 0)89// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]90//91fixed_int16m1_t lshift_i16(fixed_int16m1_t a, fixed_int16m1_t b) {92 return a << b;93}94 95// CHECK-LABEL: @rshift_i16(96// CHECK-NEXT: entry:97// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)98// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)99// CHECK-NEXT: [[SHR:%.*]] = ashr <16 x i16> [[A]], [[B]]100// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHR]], i64 0)101// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]102//103fixed_int16m1_t rshift_i16(fixed_int16m1_t a, fixed_int16m1_t b) {104 return a >> b;105}106 107// CHECK-LABEL: @lshift_u16(108// CHECK-NEXT: entry:109// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)110// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)111// CHECK-NEXT: [[SHL:%.*]] = shl <16 x i16> [[A]], [[B]]112// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHL]], i64 0)113// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]114//115fixed_uint16m1_t lshift_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {116 return a << b;117}118 119// CHECK-LABEL: @rshift_u16(120// CHECK-NEXT: entry:121// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)122// CHECK-NEXT: [[B:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[B_COERCE:%.*]], i64 0)123// CHECK-NEXT: [[SHR:%.*]] = lshr <16 x i16> [[A]], [[B]]124// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHR]], i64 0)125// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]126//127fixed_uint16m1_t rshift_u16(fixed_uint16m1_t a, fixed_uint16m1_t b) {128 return a >> b;129}130 131// CHECK-LABEL: @lshift_i32(132// CHECK-NEXT: entry:133// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)134// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)135// CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> [[A]], [[B]]136// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHL]], i64 0)137// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]138//139fixed_int32m1_t lshift_i32(fixed_int32m1_t a, fixed_int32m1_t b) {140 return a << b;141}142 143// CHECK-LABEL: @rshift_i32(144// CHECK-NEXT: entry:145// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)146// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)147// CHECK-NEXT: [[SHR:%.*]] = ashr <8 x i32> [[A]], [[B]]148// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHR]], i64 0)149// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]150//151fixed_int32m1_t rshift_i32(fixed_int32m1_t a, fixed_int32m1_t b) {152 return a >> b;153}154 155// CHECK-LABEL: @lshift_u32(156// CHECK-NEXT: entry:157// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)158// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)159// CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> [[A]], [[B]]160// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHL]], i64 0)161// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]162//163fixed_uint32m1_t lshift_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {164 return a << b;165}166 167// CHECK-LABEL: @rshift_u32(168// CHECK-NEXT: entry:169// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)170// CHECK-NEXT: [[B:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[B_COERCE:%.*]], i64 0)171// CHECK-NEXT: [[SHR:%.*]] = lshr <8 x i32> [[A]], [[B]]172// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHR]], i64 0)173// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]174//175fixed_uint32m1_t rshift_u32(fixed_uint32m1_t a, fixed_uint32m1_t b) {176 return a >> b;177}178 179// CHECK-LABEL: @lshift_i64(180// CHECK-NEXT: entry:181// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)182// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)183// CHECK-NEXT: [[SHL:%.*]] = shl <4 x i64> [[A]], [[B]]184// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHL]], i64 0)185// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]186//187fixed_int64m1_t lshift_i64(fixed_int64m1_t a, fixed_int64m1_t b) {188 return a << b;189}190 191// CHECK-LABEL: @rshift_i64(192// CHECK-NEXT: entry:193// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)194// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)195// CHECK-NEXT: [[SHR:%.*]] = ashr <4 x i64> [[A]], [[B]]196// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHR]], i64 0)197// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]198//199fixed_int64m1_t rshift_i64(fixed_int64m1_t a, fixed_int64m1_t b) {200 return a >> b;201}202 203// CHECK-LABEL: @lshift_u64(204// CHECK-NEXT: entry:205// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)206// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)207// CHECK-NEXT: [[SHL:%.*]] = shl <4 x i64> [[A]], [[B]]208// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHL]], i64 0)209// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]210//211fixed_uint64m1_t lshift_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {212 return a << b;213}214 215// CHECK-LABEL: @rshift_u64(216// CHECK-NEXT: entry:217// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)218// CHECK-NEXT: [[B:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[B_COERCE:%.*]], i64 0)219// CHECK-NEXT: [[SHR:%.*]] = lshr <4 x i64> [[A]], [[B]]220// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHR]], i64 0)221// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]222//223fixed_uint64m1_t rshift_u64(fixed_uint64m1_t a, fixed_uint64m1_t b) {224 return a >> b;225}226 227// CHECK-LABEL: @lshift_i8_rsplat(228// CHECK-NEXT: entry:229// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)230// CHECK-NEXT: [[CONV:%.*]] = sext i8 [[B:%.*]] to i32231// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <32 x i32> poison, i32 [[CONV]], i64 0232// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i32> [[SPLAT_SPLATINSERT]], <32 x i32> poison, <32 x i32> zeroinitializer233// CHECK-NEXT: [[SH_PROM:%.*]] = trunc <32 x i32> [[SPLAT_SPLAT]] to <32 x i8>234// CHECK-NEXT: [[SHL:%.*]] = shl <32 x i8> [[A]], [[SH_PROM]]235// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHL]], i64 0)236// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]237//238fixed_int8m1_t lshift_i8_rsplat(fixed_int8m1_t a, int8_t b) {239 return a << b;240}241 242// CHECK-LABEL: @lshift_i8_lsplat(243// CHECK-NEXT: entry:244// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)245// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <32 x i8> poison, i8 [[B:%.*]], i64 0246// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer247// CHECK-NEXT: [[SHL:%.*]] = shl <32 x i8> [[SPLAT_SPLAT]], [[A]]248// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHL]], i64 0)249// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]250//251fixed_int8m1_t lshift_i8_lsplat(fixed_int8m1_t a, int8_t b) {252 return b << a;253}254 255// CHECK-LABEL: @rshift_i8_rsplat(256// CHECK-NEXT: entry:257// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)258// CHECK-NEXT: [[CONV:%.*]] = sext i8 [[B:%.*]] to i32259// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <32 x i32> poison, i32 [[CONV]], i64 0260// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i32> [[SPLAT_SPLATINSERT]], <32 x i32> poison, <32 x i32> zeroinitializer261// CHECK-NEXT: [[SH_PROM:%.*]] = trunc <32 x i32> [[SPLAT_SPLAT]] to <32 x i8>262// CHECK-NEXT: [[SHR:%.*]] = ashr <32 x i8> [[A]], [[SH_PROM]]263// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHR]], i64 0)264// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]265//266fixed_int8m1_t rshift_i8_rsplat(fixed_int8m1_t a, int8_t b) {267 return a >> b;268}269 270// CHECK-LABEL: @rshift_i8_lsplat(271// CHECK-NEXT: entry:272// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)273// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <32 x i8> poison, i8 [[B:%.*]], i64 0274// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer275// CHECK-NEXT: [[SHR:%.*]] = ashr <32 x i8> [[SPLAT_SPLAT]], [[A]]276// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHR]], i64 0)277// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]278//279fixed_int8m1_t rshift_i8_lsplat(fixed_int8m1_t a, int8_t b) {280 return b >> a;281}282 283// CHECK-LABEL: @lshift_u8_rsplat(284// CHECK-NEXT: entry:285// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)286// CHECK-NEXT: [[CONV:%.*]] = zext i8 [[B:%.*]] to i32287// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <32 x i32> poison, i32 [[CONV]], i64 0288// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i32> [[SPLAT_SPLATINSERT]], <32 x i32> poison, <32 x i32> zeroinitializer289// CHECK-NEXT: [[SH_PROM:%.*]] = trunc <32 x i32> [[SPLAT_SPLAT]] to <32 x i8>290// CHECK-NEXT: [[SHL:%.*]] = shl <32 x i8> [[A]], [[SH_PROM]]291// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHL]], i64 0)292// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]293//294fixed_uint8m1_t lshift_u8_rsplat(fixed_uint8m1_t a, uint8_t b) {295 return a << b;296}297 298// CHECK-LABEL: @lshift_u8_lsplat(299// CHECK-NEXT: entry:300// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)301// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <32 x i8> poison, i8 [[B:%.*]], i64 0302// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer303// CHECK-NEXT: [[SHL:%.*]] = shl <32 x i8> [[SPLAT_SPLAT]], [[A]]304// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHL]], i64 0)305// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]306//307fixed_uint8m1_t lshift_u8_lsplat(fixed_uint8m1_t a, uint8_t b) {308 return b << a;309}310 311// CHECK-LABEL: @rshift_u8_rsplat(312// CHECK-NEXT: entry:313// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)314// CHECK-NEXT: [[CONV:%.*]] = zext i8 [[B:%.*]] to i32315// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <32 x i32> poison, i32 [[CONV]], i64 0316// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i32> [[SPLAT_SPLATINSERT]], <32 x i32> poison, <32 x i32> zeroinitializer317// CHECK-NEXT: [[SH_PROM:%.*]] = trunc <32 x i32> [[SPLAT_SPLAT]] to <32 x i8>318// CHECK-NEXT: [[SHR:%.*]] = lshr <32 x i8> [[A]], [[SH_PROM]]319// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHR]], i64 0)320// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]321//322fixed_uint8m1_t rshift_u8_rsplat(fixed_uint8m1_t a, uint8_t b) {323 return a >> b;324}325 326// CHECK-LABEL: @rshift_u8_lsplat(327// CHECK-NEXT: entry:328// CHECK-NEXT: [[A:%.*]] = call <32 x i8> @llvm.vector.extract.v32i8.nxv8i8(<vscale x 8 x i8> [[A_COERCE:%.*]], i64 0)329// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <32 x i8> poison, i8 [[B:%.*]], i64 0330// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <32 x i8> [[SPLAT_SPLATINSERT]], <32 x i8> poison, <32 x i32> zeroinitializer331// CHECK-NEXT: [[SHR:%.*]] = lshr <32 x i8> [[SPLAT_SPLAT]], [[A]]332// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v32i8(<vscale x 8 x i8> poison, <32 x i8> [[SHR]], i64 0)333// CHECK-NEXT: ret <vscale x 8 x i8> [[CAST_SCALABLE]]334//335fixed_uint8m1_t rshift_u8_lsplat(fixed_uint8m1_t a, uint8_t b) {336 return b >> a;337}338 339// CHECK-LABEL: @lshift_i16_rsplat(340// CHECK-NEXT: entry:341// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)342// CHECK-NEXT: [[CONV:%.*]] = sext i16 [[B:%.*]] to i32343// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[CONV]], i64 0344// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer345// CHECK-NEXT: [[SH_PROM:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT]] to <16 x i16>346// CHECK-NEXT: [[SHL:%.*]] = shl <16 x i16> [[A]], [[SH_PROM]]347// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHL]], i64 0)348// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]349//350fixed_int16m1_t lshift_i16_rsplat(fixed_int16m1_t a, int16_t b) {351 return a << b;352}353 354// CHECK-LABEL: @lshift_i16_lsplat(355// CHECK-NEXT: entry:356// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)357// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[B:%.*]], i64 0358// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer359// CHECK-NEXT: [[SHL:%.*]] = shl <16 x i16> [[SPLAT_SPLAT]], [[A]]360// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHL]], i64 0)361// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]362//363fixed_int16m1_t lshift_i16_lsplat(fixed_int16m1_t a, int16_t b) {364 return b << a;365}366 367// CHECK-LABEL: @rshift_i16_rsplat(368// CHECK-NEXT: entry:369// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)370// CHECK-NEXT: [[CONV:%.*]] = sext i16 [[B:%.*]] to i32371// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[CONV]], i64 0372// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer373// CHECK-NEXT: [[SH_PROM:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT]] to <16 x i16>374// CHECK-NEXT: [[SHR:%.*]] = ashr <16 x i16> [[A]], [[SH_PROM]]375// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHR]], i64 0)376// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]377//378fixed_int16m1_t rshift_i16_rsplat(fixed_int16m1_t a, int16_t b) {379 return a >> b;380}381 382// CHECK-LABEL: @rshift_i16_lsplat(383// CHECK-NEXT: entry:384// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)385// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[B:%.*]], i64 0386// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer387// CHECK-NEXT: [[SHR:%.*]] = ashr <16 x i16> [[SPLAT_SPLAT]], [[A]]388// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHR]], i64 0)389// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]390//391fixed_int16m1_t rshift_i16_lsplat(fixed_int16m1_t a, int16_t b) {392 return b >> a;393}394 395// CHECK-LABEL: @lshift_u16_rsplat(396// CHECK-NEXT: entry:397// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)398// CHECK-NEXT: [[CONV:%.*]] = zext i16 [[B:%.*]] to i32399// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[CONV]], i64 0400// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer401// CHECK-NEXT: [[SH_PROM:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT]] to <16 x i16>402// CHECK-NEXT: [[SHL:%.*]] = shl <16 x i16> [[A]], [[SH_PROM]]403// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHL]], i64 0)404// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]405//406fixed_uint16m1_t lshift_u16_rsplat(fixed_uint16m1_t a, uint16_t b) {407 return a << b;408}409 410// CHECK-LABEL: @lshift_u16_lsplat(411// CHECK-NEXT: entry:412// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)413// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[B:%.*]], i64 0414// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer415// CHECK-NEXT: [[SHL:%.*]] = shl <16 x i16> [[SPLAT_SPLAT]], [[A]]416// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHL]], i64 0)417// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]418//419fixed_uint16m1_t lshift_u16_lsplat(fixed_uint16m1_t a, uint16_t b) {420 return b << a;421}422 423// CHECK-LABEL: @rshift_u16_rsplat(424// CHECK-NEXT: entry:425// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)426// CHECK-NEXT: [[CONV:%.*]] = zext i16 [[B:%.*]] to i32427// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i32> poison, i32 [[CONV]], i64 0428// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i32> [[SPLAT_SPLATINSERT]], <16 x i32> poison, <16 x i32> zeroinitializer429// CHECK-NEXT: [[SH_PROM:%.*]] = trunc <16 x i32> [[SPLAT_SPLAT]] to <16 x i16>430// CHECK-NEXT: [[SHR:%.*]] = lshr <16 x i16> [[A]], [[SH_PROM]]431// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHR]], i64 0)432// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]433//434fixed_uint16m1_t rshift_u16_rsplat(fixed_uint16m1_t a, uint16_t b) {435 return a >> b;436}437 438// CHECK-LABEL: @rshift_u16_lsplat(439// CHECK-NEXT: entry:440// CHECK-NEXT: [[A:%.*]] = call <16 x i16> @llvm.vector.extract.v16i16.nxv4i16(<vscale x 4 x i16> [[A_COERCE:%.*]], i64 0)441// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <16 x i16> poison, i16 [[B:%.*]], i64 0442// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <16 x i16> [[SPLAT_SPLATINSERT]], <16 x i16> poison, <16 x i32> zeroinitializer443// CHECK-NEXT: [[SHR:%.*]] = lshr <16 x i16> [[SPLAT_SPLAT]], [[A]]444// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 4 x i16> @llvm.vector.insert.nxv4i16.v16i16(<vscale x 4 x i16> poison, <16 x i16> [[SHR]], i64 0)445// CHECK-NEXT: ret <vscale x 4 x i16> [[CAST_SCALABLE]]446//447fixed_uint16m1_t rshift_u16_lsplat(fixed_uint16m1_t a, uint16_t b) {448 return b >> a;449}450 451// CHECK-LABEL: @lshift_i32_rsplat(452// CHECK-NEXT: entry:453// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)454// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0455// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer456// CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> [[A]], [[SPLAT_SPLAT]]457// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHL]], i64 0)458// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]459//460fixed_int32m1_t lshift_i32_rsplat(fixed_int32m1_t a, int32_t b) {461 return a << b;462}463 464// CHECK-LABEL: @lshift_i32_lsplat(465// CHECK-NEXT: entry:466// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)467// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0468// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer469// CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> [[SPLAT_SPLAT]], [[A]]470// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHL]], i64 0)471// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]472//473fixed_int32m1_t lshift_i32_lsplat(fixed_int32m1_t a, int32_t b) {474 return b << a;475}476 477// CHECK-LABEL: @rshift_i32_rsplat(478// CHECK-NEXT: entry:479// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)480// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0481// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer482// CHECK-NEXT: [[SHR:%.*]] = ashr <8 x i32> [[A]], [[SPLAT_SPLAT]]483// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHR]], i64 0)484// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]485//486fixed_int32m1_t rshift_i32_rsplat(fixed_int32m1_t a, int32_t b) {487 return a >> b;488}489 490// CHECK-LABEL: @rshift_i32_lsplat(491// CHECK-NEXT: entry:492// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)493// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0494// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer495// CHECK-NEXT: [[SHR:%.*]] = ashr <8 x i32> [[SPLAT_SPLAT]], [[A]]496// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHR]], i64 0)497// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]498//499fixed_int32m1_t rshift_i32_lsplat(fixed_int32m1_t a, int32_t b) {500 return b >> a;501}502 503// CHECK-LABEL: @lshift_u32_rsplat(504// CHECK-NEXT: entry:505// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)506// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0507// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer508// CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> [[A]], [[SPLAT_SPLAT]]509// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHL]], i64 0)510// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]511//512fixed_uint32m1_t lshift_u32_rsplat(fixed_uint32m1_t a, uint32_t b) {513 return a << b;514}515 516// CHECK-LABEL: @lshift_u32_lsplat(517// CHECK-NEXT: entry:518// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)519// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0520// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer521// CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> [[SPLAT_SPLAT]], [[A]]522// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHL]], i64 0)523// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]524//525fixed_uint32m1_t lshift_u32_lsplat(fixed_uint32m1_t a, uint32_t b) {526 return b << a;527}528 529// CHECK-LABEL: @rshift_u32_rsplat(530// CHECK-NEXT: entry:531// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)532// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0533// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer534// CHECK-NEXT: [[SHR:%.*]] = lshr <8 x i32> [[A]], [[SPLAT_SPLAT]]535// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHR]], i64 0)536// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]537//538fixed_uint32m1_t rshift_u32_rsplat(fixed_uint32m1_t a, uint32_t b) {539 return a >> b;540}541 542// CHECK-LABEL: @rshift_u32_lsplat(543// CHECK-NEXT: entry:544// CHECK-NEXT: [[A:%.*]] = call <8 x i32> @llvm.vector.extract.v8i32.nxv2i32(<vscale x 2 x i32> [[A_COERCE:%.*]], i64 0)545// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i64 0546// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <8 x i32> [[SPLAT_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer547// CHECK-NEXT: [[SHR:%.*]] = lshr <8 x i32> [[SPLAT_SPLAT]], [[A]]548// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v8i32(<vscale x 2 x i32> poison, <8 x i32> [[SHR]], i64 0)549// CHECK-NEXT: ret <vscale x 2 x i32> [[CAST_SCALABLE]]550//551fixed_uint32m1_t rshift_u32_lsplat(fixed_uint32m1_t a, uint32_t b) {552 return b >> a;553}554 555// CHECK-LABEL: @lshift_i64_rsplat(556// CHECK-NEXT: entry:557// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)558// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[B:%.*]], i64 0559// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer560// CHECK-NEXT: [[SHL:%.*]] = shl <4 x i64> [[A]], [[SPLAT_SPLAT]]561// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHL]], i64 0)562// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]563//564fixed_int64m1_t lshift_i64_rsplat(fixed_int64m1_t a, int64_t b) {565 return a << b;566}567 568// CHECK-LABEL: @lshift_i64_lsplat(569// CHECK-NEXT: entry:570// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)571// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[B:%.*]], i64 0572// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer573// CHECK-NEXT: [[SHL:%.*]] = shl <4 x i64> [[SPLAT_SPLAT]], [[A]]574// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHL]], i64 0)575// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]576//577fixed_int64m1_t lshift_i64_lsplat(fixed_int64m1_t a, int64_t b) {578 return b << a;579}580 581// CHECK-LABEL: @rshift_i64_rsplat(582// CHECK-NEXT: entry:583// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)584// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[B:%.*]], i64 0585// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer586// CHECK-NEXT: [[SHR:%.*]] = ashr <4 x i64> [[A]], [[SPLAT_SPLAT]]587// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHR]], i64 0)588// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]589//590fixed_int64m1_t rshift_i64_rsplat(fixed_int64m1_t a, int64_t b) {591 return a >> b;592}593 594// CHECK-LABEL: @rshift_i64_lsplat(595// CHECK-NEXT: entry:596// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)597// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[B:%.*]], i64 0598// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer599// CHECK-NEXT: [[SHR:%.*]] = ashr <4 x i64> [[SPLAT_SPLAT]], [[A]]600// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHR]], i64 0)601// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]602//603fixed_int64m1_t rshift_i64_lsplat(fixed_int64m1_t a, int64_t b) {604 return b >> a;605}606 607// CHECK-LABEL: @lshift_u64_rsplat(608// CHECK-NEXT: entry:609// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)610// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[B:%.*]], i64 0611// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer612// CHECK-NEXT: [[SHL:%.*]] = shl <4 x i64> [[A]], [[SPLAT_SPLAT]]613// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHL]], i64 0)614// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]615//616fixed_uint64m1_t lshift_u64_rsplat(fixed_uint64m1_t a, uint64_t b) {617 return a << b;618}619 620// CHECK-LABEL: @lshift_u64_lsplat(621// CHECK-NEXT: entry:622// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)623// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[B:%.*]], i64 0624// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer625// CHECK-NEXT: [[SHL:%.*]] = shl <4 x i64> [[SPLAT_SPLAT]], [[A]]626// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHL]], i64 0)627// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]628//629fixed_uint64m1_t lshift_u64_lsplat(fixed_uint64m1_t a, uint64_t b) {630 return b << a;631}632 633// CHECK-LABEL: @rshift_u64_rsplat(634// CHECK-NEXT: entry:635// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)636// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[B:%.*]], i64 0637// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer638// CHECK-NEXT: [[SHR:%.*]] = lshr <4 x i64> [[A]], [[SPLAT_SPLAT]]639// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHR]], i64 0)640// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]641//642fixed_uint64m1_t rshift_u64_rsplat(fixed_uint64m1_t a, uint64_t b) {643 return a >> b;644}645 646// CHECK-LABEL: @rshift_u64_lsplat(647// CHECK-NEXT: entry:648// CHECK-NEXT: [[A:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[A_COERCE:%.*]], i64 0)649// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[B:%.*]], i64 0650// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x i64> [[SPLAT_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer651// CHECK-NEXT: [[SHR:%.*]] = lshr <4 x i64> [[SPLAT_SPLAT]], [[A]]652// CHECK-NEXT: [[CAST_SCALABLE:%.*]] = call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> poison, <4 x i64> [[SHR]], i64 0)653// CHECK-NEXT: ret <vscale x 1 x i64> [[CAST_SCALABLE]]654//655fixed_uint64m1_t rshift_u64_lsplat(fixed_uint64m1_t a, uint64_t b) {656 return b >> a;657}658