181 lines · c
1// RUN: %clang_cc1 -x c -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s2// RUN: %clang_cc1 -x c -ffreestanding %s -O0 -triple=i386-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s3// RUN: %clang_cc1 -x c++ -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s4// RUN: %clang_cc1 -x c++ -ffreestanding %s -O0 -triple=i386-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s5 6// RUN: %clang_cc1 -x c -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s7// RUN: %clang_cc1 -x c -ffreestanding %s -O0 -triple=i386-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s8// RUN: %clang_cc1 -x c++ -ffreestanding %s -O0 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s9// RUN: %clang_cc1 -x c++ -ffreestanding %s -O0 -triple=i386-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s10 11 12#include <immintrin.h>13#include "builtin_test_helpers.h"14 15long long test_mm512_reduce_add_epi64(__m512i __W){16// CHECK-LABEL: test_mm512_reduce_add_epi6417// CHECK: call {{.*}}i64 @llvm.vector.reduce.add.v8i64(<8 x i64> %{{.*}})18 return _mm512_reduce_add_epi64(__W);19}20TEST_CONSTEXPR(_mm512_reduce_add_epi64((__m512i)(__v8di){-4, -3, -2, -1, 0, 1, 2, 3}) == -4);21 22long long test_mm512_reduce_mul_epi64(__m512i __W){23// CHECK-LABEL: test_mm512_reduce_mul_epi6424// CHECK: call {{.*}}i64 @llvm.vector.reduce.mul.v8i64(<8 x i64> %{{.*}})25 return _mm512_reduce_mul_epi64(__W);26}27TEST_CONSTEXPR(_mm512_reduce_mul_epi64((__m512i)(__v8di){1, 2, 3, 4, 5, 6, 7, 8}) == 40320);28 29long long test_mm512_reduce_or_epi64(__m512i __W){30// CHECK-LABEL: test_mm512_reduce_or_epi6431// CHECK: call {{.*}}i64 @llvm.vector.reduce.or.v8i64(<8 x i64> %{{.*}})32 return _mm512_reduce_or_epi64(__W);33}34TEST_CONSTEXPR(_mm512_reduce_or_epi64((__m512i)(__v8di){0x100, 0x200, 0x400, 0x800, 0, 0, 0, 0}) == 0xF00);35 36long long test_mm512_reduce_and_epi64(__m512i __W){37// CHECK-LABEL: test_mm512_reduce_and_epi6438// CHECK: call {{.*}}i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %{{.*}})39 return _mm512_reduce_and_epi64(__W);40}41TEST_CONSTEXPR(_mm512_reduce_and_epi64((__m512i)(__v8di){0xFFFF, 0xFF00, 0x00FF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF00, 0x00FF}) == 0x0000);42 43long long test_mm512_mask_reduce_add_epi64(__mmask8 __M, __m512i __W){44// CHECK-LABEL: test_mm512_mask_reduce_add_epi6445// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}46// CHECK: call {{.*}}i64 @llvm.vector.reduce.add.v8i64(<8 x i64> %{{.*}})47 return _mm512_mask_reduce_add_epi64(__M, __W);48}49 50long long test_mm512_mask_reduce_mul_epi64(__mmask8 __M, __m512i __W){51// CHECK-LABEL: test_mm512_mask_reduce_mul_epi6452// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}53// CHECK: call {{.*}}i64 @llvm.vector.reduce.mul.v8i64(<8 x i64> %{{.*}})54 return _mm512_mask_reduce_mul_epi64(__M, __W);55}56 57long long test_mm512_mask_reduce_and_epi64(__mmask8 __M, __m512i __W){58// CHECK-LABEL: test_mm512_mask_reduce_and_epi6459// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}60// CHECK: call {{.*}}i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %{{.*}})61 return _mm512_mask_reduce_and_epi64(__M, __W);62}63 64long long test_mm512_mask_reduce_or_epi64(__mmask8 __M, __m512i __W){65// CHECK-LABEL: test_mm512_mask_reduce_or_epi6466// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}67// CHECK: call {{.*}}i64 @llvm.vector.reduce.or.v8i64(<8 x i64> %{{.*}})68 return _mm512_mask_reduce_or_epi64(__M, __W);69}70 71int test_mm512_reduce_add_epi32(__m512i __W){72// CHECK-LABEL: test_mm512_reduce_add_epi3273// CHECK: call {{.*}}i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %{{.*}})74 return _mm512_reduce_add_epi32(__W);75}76TEST_CONSTEXPR(_mm512_reduce_add_epi32((__m512i)(__v16si){-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7}) == -8);77 78int test_mm512_reduce_mul_epi32(__m512i __W){79// CHECK-LABEL: test_mm512_reduce_mul_epi3280// CHECK: call {{.*}}i32 @llvm.vector.reduce.mul.v16i32(<16 x i32> %{{.*}})81 return _mm512_reduce_mul_epi32(__W);82}83TEST_CONSTEXPR(_mm512_reduce_mul_epi32((__m512i)(__v16si){1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 3, 1, 1, -3, 1, 1}) == -36);84 85int test_mm512_reduce_or_epi32(__m512i __W){86// CHECK: call {{.*}}i32 @llvm.vector.reduce.or.v16i32(<16 x i32> %{{.*}})87 return _mm512_reduce_or_epi32(__W);88}89TEST_CONSTEXPR(_mm512_reduce_or_epi32((__m512i)(__v16si){0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0, 0, 0, 0, 0, 0, 0, 0}) == 0xFF);90 91int test_mm512_reduce_and_epi32(__m512i __W){92// CHECK-LABEL: test_mm512_reduce_and_epi3293// CHECK: call {{.*}}i32 @llvm.vector.reduce.and.v16i32(<16 x i32> %{{.*}})94 return _mm512_reduce_and_epi32(__W);95}96TEST_CONSTEXPR(_mm512_reduce_and_epi32((__m512i)(__v16si){0xFF, 0xF0, 0x0F, 0xFF, 0xFF, 0xFF, 0xF0, 0x0F, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0xF0, 0x0F, 0x0F}) == 0x00);97 98int test_mm512_mask_reduce_add_epi32(__mmask16 __M, __m512i __W){99// CHECK-LABEL: test_mm512_mask_reduce_add_epi32100// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}101// CHECK: call {{.*}}i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %{{.*}})102 return _mm512_mask_reduce_add_epi32(__M, __W);103}104 105int test_mm512_mask_reduce_mul_epi32(__mmask16 __M, __m512i __W){106// CHECK-LABEL: test_mm512_mask_reduce_mul_epi32107// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}108// CHECK: call {{.*}}i32 @llvm.vector.reduce.mul.v16i32(<16 x i32> %{{.*}})109 return _mm512_mask_reduce_mul_epi32(__M, __W);110}111 112int test_mm512_mask_reduce_and_epi32(__mmask16 __M, __m512i __W){113// CHECK-LABEL: test_mm512_mask_reduce_and_epi32114// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}115// CHECK: call {{.*}}i32 @llvm.vector.reduce.and.v16i32(<16 x i32> %{{.*}})116 return _mm512_mask_reduce_and_epi32(__M, __W);117}118 119int test_mm512_mask_reduce_or_epi32(__mmask16 __M, __m512i __W){120// CHECK-LABEL: test_mm512_mask_reduce_or_epi32121// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}122// CHECK: call {{.*}}i32 @llvm.vector.reduce.or.v16i32(<16 x i32> %{{.*}})123 return _mm512_mask_reduce_or_epi32(__M, __W);124}125 126double test_mm512_reduce_add_pd(__m512d __W, double ExtraAddOp){127// CHECK-LABEL: test_mm512_reduce_add_pd128// CHECK-NOT: reassoc129// CHECK: call reassoc {{.*}}double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %{{.*}})130// CHECK-NOT: reassoc131 return _mm512_reduce_add_pd(__W) + ExtraAddOp;132}133 134double test_mm512_reduce_mul_pd(__m512d __W, double ExtraMulOp){135// CHECK-LABEL: test_mm512_reduce_mul_pd136// CHECK-NOT: reassoc137// CHECK: call reassoc {{.*}}double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %{{.*}})138// CHECK-NOT: reassoc139 return _mm512_reduce_mul_pd(__W) * ExtraMulOp;140}141 142float test_mm512_reduce_add_ps(__m512 __W){143// CHECK-LABEL: test_mm512_reduce_add_ps144// CHECK: call reassoc {{.*}}float @llvm.vector.reduce.fadd.v16f32(float -0.000000e+00, <16 x float> %{{.*}})145 return _mm512_reduce_add_ps(__W);146}147 148float test_mm512_reduce_mul_ps(__m512 __W){149// CHECK-LABEL: test_mm512_reduce_mul_ps150// CHECK: call reassoc {{.*}}float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %{{.*}})151 return _mm512_reduce_mul_ps(__W);152}153 154double test_mm512_mask_reduce_add_pd(__mmask8 __M, __m512d __W){155// CHECK-LABEL: test_mm512_mask_reduce_add_pd156// CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}157// CHECK: call reassoc {{.*}}double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %{{.*}})158 return _mm512_mask_reduce_add_pd(__M, __W);159}160 161double test_mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W){162// CHECK-LABEL: test_mm512_mask_reduce_mul_pd163// CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}164// CHECK: call reassoc {{.*}}double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %{{.*}})165 return _mm512_mask_reduce_mul_pd(__M, __W);166}167 168float test_mm512_mask_reduce_add_ps(__mmask16 __M, __m512 __W){169// CHECK-LABEL: test_mm512_mask_reduce_add_ps170// CHECK: select <16 x i1> %{{.*}}, <16 x float> {{.*}}, <16 x float> {{.*}}171// CHECK: call reassoc {{.*}}float @llvm.vector.reduce.fadd.v16f32(float -0.000000e+00, <16 x float> %{{.*}})172 return _mm512_mask_reduce_add_ps(__M, __W);173}174 175float test_mm512_mask_reduce_mul_ps(__mmask16 __M, __m512 __W){176// CHECK-LABEL: test_mm512_mask_reduce_mul_ps177// CHECK: select <16 x i1> %{{.*}}, <16 x float> {{.*}}, <16 x float> %{{.*}}178// CHECK: call reassoc {{.*}}float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %{{.*}})179 return _mm512_mask_reduce_mul_ps(__M, __W);180}181