215 lines · c
1// REQUIRES: x86-registered-target2// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefix=UNCONSTRAINED --check-prefix=COMMON --check-prefix=COMMONIR3// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -ffp-exception-behavior=maytrap -DSTRICT=1 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefix=CONSTRAINED --check-prefix=COMMON --check-prefix=COMMONIR --implicit-check-not=fpexcept.maytrap4// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -S -o - -Wall -Werror | FileCheck %s --check-prefix=CHECK-ASM --check-prefix=COMMON5// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -ffp-exception-behavior=maytrap -DSTRICT=1 -S -o - -Wall -Werror | FileCheck %s --check-prefix=CHECK-ASM --check-prefix=COMMON --implicit-check-not=fpexcept.maytrap6 7// Any cases of "fpexcept.maytrap" in this test are clang bugs.8 9#ifdef STRICT10// Test that the constrained intrinsics are picking up the exception11// metadata from the AST instead of the global default from the command line.12 13#pragma float_control(except, on)14#endif15 16 17#include <immintrin.h>18 19__m512d test_mm512_cvtepi64_pd(__m512i __A) {20 // COMMON-LABEL: test_mm512_cvtepi64_pd21 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x double>22 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")23 // CHECK-ASM: vcvtqq2pd24 return _mm512_cvtepi64_pd(__A);25}26 27__m512d test_mm512_mask_cvtepi64_pd(__m512d __W, __mmask8 __U, __m512i __A) {28 // COMMON-LABEL: test_mm512_mask_cvtepi64_pd29 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x double>30 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")31 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}32 // CHECK-ASM: vcvtqq2pd33 return _mm512_mask_cvtepi64_pd(__W, __U, __A);34}35 36__m512d test_mm512_maskz_cvtepi64_pd(__mmask8 __U, __m512i __A) {37 // COMMON-LABEL: test_mm512_maskz_cvtepi64_pd38 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x double>39 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")40 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}41 // CHECK-ASM: vcvtqq2pd42 return _mm512_maskz_cvtepi64_pd(__U, __A);43}44 45__m512d test_mm512_cvt_roundepi64_pd(__m512i __A) {46 // COMMON-LABEL: test_mm512_cvt_roundepi64_pd47 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f64.v8i6448 // CHECK-ASM: vcvtqq2pd49 return _mm512_cvt_roundepi64_pd(__A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);50}51 52__m512d test_mm512_mask_cvt_roundepi64_pd(__m512d __W, __mmask8 __U, __m512i __A) {53 // COMMON-LABEL: test_mm512_mask_cvt_roundepi64_pd54 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f64.v8i6455 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}56 // CHECK-ASM: vcvtqq2pd57 return _mm512_mask_cvt_roundepi64_pd(__W, __U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);58}59 60__m512d test_mm512_maskz_cvt_roundepi64_pd(__mmask8 __U, __m512i __A) {61 // COMMON-LABEL: test_mm512_maskz_cvt_roundepi64_pd62 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f64.v8i6463 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}64 // CHECK-ASM: vcvtqq2pd65 return _mm512_maskz_cvt_roundepi64_pd(__U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);66}67 68__m256 test_mm512_cvtepi64_ps(__m512i __A) {69 // COMMON-LABEL: test_mm512_cvtepi64_ps70 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x float>71 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.sitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")72 // CHECK-ASM: vcvtqq2ps73 return _mm512_cvtepi64_ps(__A);74}75 76__m256 test_mm512_mask_cvtepi64_ps(__m256 __W, __mmask8 __U, __m512i __A) {77 // COMMON-LABEL: test_mm512_mask_cvtepi64_ps78 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x float>79 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.sitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")80 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}81 // CHECK-ASM: vcvtqq2ps82 return _mm512_mask_cvtepi64_ps(__W, __U, __A);83}84 85__m256 test_mm512_maskz_cvtepi64_ps(__mmask8 __U, __m512i __A) {86 // COMMON-LABEL: test_mm512_maskz_cvtepi64_ps87 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x float>88 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.sitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")89 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}90 // CHECK-ASM: vcvtqq2ps91 return _mm512_maskz_cvtepi64_ps(__U, __A);92}93 94__m256 test_mm512_cvt_roundepi64_ps(__m512i __A) {95 // COMMON-LABEL: test_mm512_cvt_roundepi64_ps96 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f32.v8i6497 // CHECK-ASM: vcvtqq2ps98 return _mm512_cvt_roundepi64_ps(__A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);99}100 101__m256 test_mm512_mask_cvt_roundepi64_ps(__m256 __W, __mmask8 __U, __m512i __A) {102 // COMMON-LABEL: test_mm512_mask_cvt_roundepi64_ps103 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f32.v8i64104 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}105 // CHECK-ASM: vcvtqq2ps106 return _mm512_mask_cvt_roundepi64_ps(__W, __U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);107}108 109__m256 test_mm512_maskz_cvt_roundepi64_ps(__mmask8 __U, __m512i __A) {110 // COMMON-LABEL: test_mm512_maskz_cvt_roundepi64_ps111 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f32.v8i64112 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}113 // CHECK-ASM: vcvtqq2ps114 return _mm512_maskz_cvt_roundepi64_ps(__U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);115}116 117__m512d test_mm512_cvtepu64_pd(__m512i __A) {118 // COMMON-LABEL: test_mm512_cvtepu64_pd119 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x double>120 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.uitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")121 // CHECK-ASM: vcvtuqq2pd122 return _mm512_cvtepu64_pd(__A);123}124 125__m512d test_mm512_mask_cvtepu64_pd(__m512d __W, __mmask8 __U, __m512i __A) {126 // COMMON-LABEL: test_mm512_mask_cvtepu64_pd127 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x double>128 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.uitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")129 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}130 // CHECK-ASM: vcvtuqq2pd131 return _mm512_mask_cvtepu64_pd(__W, __U, __A);132}133 134__m512d test_mm512_maskz_cvtepu64_pd(__mmask8 __U, __m512i __A) {135 // COMMON-LABEL: test_mm512_maskz_cvtepu64_pd136 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x double>137 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.uitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")138 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}139 // CHECK-ASM: vcvtuqq2pd140 return _mm512_maskz_cvtepu64_pd(__U, __A);141}142 143__m512d test_mm512_cvt_roundepu64_pd(__m512i __A) {144 // COMMON-LABEL: test_mm512_cvt_roundepu64_pd145 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f64.v8i64146 // CHECK-ASM: vcvtuqq2pd147 return _mm512_cvt_roundepu64_pd(__A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);148}149 150__m512d test_mm512_mask_cvt_roundepu64_pd(__m512d __W, __mmask8 __U, __m512i __A) {151 // COMMON-LABEL: test_mm512_mask_cvt_roundepu64_pd152 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f64.v8i64153 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}154 // CHECK-ASM: vcvtuqq2pd155 return _mm512_mask_cvt_roundepu64_pd(__W, __U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);156}157 158__m512d test_mm512_maskz_cvt_roundepu64_pd(__mmask8 __U, __m512i __A) {159 // COMMON-LABEL: test_mm512_maskz_cvt_roundepu64_pd160 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f64.v8i64161 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}162 // CHECK-ASM: vcvtuqq2pd163 return _mm512_maskz_cvt_roundepu64_pd(__U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);164}165 166__m256 test_mm512_cvtepu64_ps(__m512i __A) {167 // COMMON-LABEL: test_mm512_cvtepu64_ps168 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x float>169 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")170 // CHECK-ASM: vcvtuqq2ps171 return _mm512_cvtepu64_ps(__A);172}173 174__m256 test_mm512_mask_cvtepu64_ps(__m256 __W, __mmask8 __U, __m512i __A) {175 // COMMON-LABEL: test_mm512_mask_cvtepu64_ps176 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x float>177 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")178 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}179 // CHECK-ASM: vcvtuqq2ps180 return _mm512_mask_cvtepu64_ps(__W, __U, __A);181}182 183__m256 test_mm512_maskz_cvtepu64_ps(__mmask8 __U, __m512i __A) {184 // COMMON-LABEL: test_mm512_maskz_cvtepu64_ps185 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x float>186 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")187 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}188 // CHECK-ASM: vcvtuqq2ps189 return _mm512_maskz_cvtepu64_ps(__U, __A);190}191 192__m256 test_mm512_cvt_roundepu64_ps(__m512i __A) {193 // COMMON-LABEL: test_mm512_cvt_roundepu64_ps194 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f32.v8i64195 // CHECK-ASM: vcvtuqq2ps196 return _mm512_cvt_roundepu64_ps(__A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);197}198 199__m256 test_mm512_mask_cvt_roundepu64_ps(__m256 __W, __mmask8 __U, __m512i __A) {200 // COMMON-LABEL: test_mm512_mask_cvt_roundepu64_ps201 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f32.v8i64202 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}203 // CHECK-ASM: vcvtuqq2ps204 return _mm512_mask_cvt_roundepu64_ps(__W, __U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);205}206 207__m256 test_mm512_maskz_cvt_roundepu64_ps(__mmask8 __U, __m512i __A) {208 // COMMON-LABEL: test_mm512_maskz_cvt_roundepu64_ps209 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f32.v8i64210 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}211 // CHECK-ASM: vcvtuqq2ps212 return _mm512_maskz_cvt_roundepu64_ps(__U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);213}214 215