210 lines · c
1// REQUIRES: x86-registered-target2// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux-gnu -target-feature +avx512f -emit-llvm -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s3// RUN: %clang_cc1 -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s4// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux-gnu -target-feature +avx512f -ffp-exception-behavior=maytrap -DSTRICT=1 -emit-llvm -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s5// RUN: %clang_cc1 -flax-vector-conversions=none -fms-compatibility -ffreestanding %s -triple=x86_64-unknown-linux-gnu -target-feature +avx512f -ffp-exception-behavior=maytrap -DSTRICT=1 -emit-llvm -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s6// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux-gnu -target-feature +avx512f -S -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s7// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux-gnu -target-feature +avx512f -ffp-exception-behavior=maytrap -DSTRICT=1 -S -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s8 9#ifdef STRICT10// Test that the constrained intrinsics are picking up the exception11// metadata from the AST instead of the global default from the command line.12 13#pragma float_control(except, on)14#endif15 16#include <immintrin.h>17 18__m512d test_mm512_sqrt_pd(__m512d a)19{20 // COMMON-LABEL: test_mm512_sqrt_pd21 // UNCONSTRAINED: call <8 x double> @llvm.sqrt.v8f64(<8 x double> %{{.*}})22 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sqrt.v8f64(<8 x double> %{{.*}}, metadata !{{.*}})23 // CHECK-ASM: vsqrtpd24 return _mm512_sqrt_pd(a);25}26 27__m512d test_mm512_mask_sqrt_pd (__m512d __W, __mmask8 __U, __m512d __A)28{29 // COMMON-LABEL: test_mm512_mask_sqrt_pd30 // UNCONSTRAINED: call <8 x double> @llvm.sqrt.v8f64(<8 x double> %{{.*}})31 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sqrt.v8f64(<8 x double> %{{.*}}, metadata !{{.*}})32 // CHECK-ASM: vsqrtpd33 // COMMONIR: bitcast i8 %{{.*}} to <8 x i1>34 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}35 return _mm512_mask_sqrt_pd (__W,__U,__A);36}37 38__m512d test_mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A)39{40 // COMMON-LABEL: test_mm512_maskz_sqrt_pd41 // UNCONSTRAINED: call <8 x double> @llvm.sqrt.v8f64(<8 x double> %{{.*}})42 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sqrt.v8f64(<8 x double> %{{.*}}, metadata !{{.*}})43 // CHECK-ASM: vsqrtpd44 // COMMONIR: bitcast i8 %{{.*}} to <8 x i1>45 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> {{.*}}46 return _mm512_maskz_sqrt_pd (__U,__A);47}48 49__m512 test_mm512_sqrt_ps(__m512 a)50{51 // COMMON-LABEL: test_mm512_sqrt_ps52 // UNCONSTRAINED: call <16 x float> @llvm.sqrt.v16f32(<16 x float> %{{.*}})53 // CONSTRAINED: call <16 x float> @llvm.experimental.constrained.sqrt.v16f32(<16 x float> %{{.*}}, metadata !{{.*}})54 // CHECK-ASM: vsqrtps55 return _mm512_sqrt_ps(a);56}57 58__m512 test_mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A)59{60 // COMMON-LABEL: test_mm512_mask_sqrt_ps61 // UNCONSTRAINED: call <16 x float> @llvm.sqrt.v16f32(<16 x float> %{{.*}})62 // CONSTRAINED: call <16 x float> @llvm.experimental.constrained.sqrt.v16f32(<16 x float> %{{.*}}, metadata !{{.*}})63 // CHECK-ASM: vsqrtps64 // COMMONIR: bitcast i16 %{{.*}} to <16 x i1>65 // COMMONIR: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}66 return _mm512_mask_sqrt_ps( __W, __U, __A);67}68 69__m512 test_mm512_maskz_sqrt_ps( __mmask16 __U, __m512 __A)70{71 // COMMON-LABEL: test_mm512_maskz_sqrt_ps72 // UNCONSTRAINED: call <16 x float> @llvm.sqrt.v16f32(<16 x float> %{{.*}})73 // CONSTRAINED: call <16 x float> @llvm.experimental.constrained.sqrt.v16f32(<16 x float> %{{.*}}, metadata !{{.*}})74 // CHECK-ASM: vsqrtps75 // COMMONIR: bitcast i16 %{{.*}} to <16 x i1>76 // COMMONIR: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> {{.*}}77 return _mm512_maskz_sqrt_ps(__U ,__A);78}79 80__m256i test_mm512_cvt_roundps_ph(__m512 __A)81{82 // COMMON-LABEL: test_mm512_cvt_roundps_ph83 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.51284 return _mm512_cvt_roundps_ph(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);85}86 87__m256i test_mm512_mask_cvt_roundps_ph(__m256i __W , __mmask16 __U, __m512 __A)88{89 // COMMON-LABEL: test_mm512_mask_cvt_roundps_ph90 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.51291 return _mm512_mask_cvt_roundps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);92}93 94__m256i test_mm512_maskz_cvt_roundps_ph(__mmask16 __U, __m512 __A)95{96 // COMMON-LABEL: test_mm512_maskz_cvt_roundps_ph97 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.51298 return _mm512_maskz_cvt_roundps_ph(__U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);99}100 101__m512 test_mm512_cvt_roundph_ps(__m256i __A)102{103 // COMMON-LABEL: test_mm512_cvt_roundph_ps104 // COMMONIR: @llvm.x86.avx512.mask.vcvtph2ps.512105 return _mm512_cvt_roundph_ps(__A, _MM_FROUND_NO_EXC);106}107 108__m512 test_mm512_mask_cvt_roundph_ps(__m512 __W, __mmask16 __U, __m256i __A)109{110 // COMMON-LABEL: test_mm512_mask_cvt_roundph_ps111 // COMMONIR: @llvm.x86.avx512.mask.vcvtph2ps.512112 return _mm512_mask_cvt_roundph_ps(__W, __U, __A, _MM_FROUND_NO_EXC);113}114 115__m512 test_mm512_maskz_cvt_roundph_ps(__mmask16 __U, __m256i __A)116{117 // COMMON-LABEL: test_mm512_maskz_cvt_roundph_ps118 // COMMONIR: @llvm.x86.avx512.mask.vcvtph2ps.512119 return _mm512_maskz_cvt_roundph_ps(__U, __A, _MM_FROUND_NO_EXC);120}121 122__m128d test_mm_mask_sqrt_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){123 // COMMON-LABEL: test_mm_mask_sqrt_sd124 // COMMONIR: extractelement <2 x double> %{{.*}}, i64 0125 // UNCONSTRAINED-NEXT: call double @llvm.sqrt.f64(double %{{.*}})126 // CONSTRAINED-NEXT: call double @llvm.experimental.constrained.sqrt.f64(double %{{.*}}, metadata !{{.*}})127 // CHECK-ASM: vsqrtsd128 // COMMONIR-NEXT: extractelement <2 x double> %{{.*}}, i64 0129 // COMMONIR-NEXT: bitcast i8 %{{.*}} to <8 x i1>130 // COMMONIR-NEXT: extractelement <8 x i1> %{{.*}}, i64 0131 // COMMONIR-NEXT: select i1 {{.*}}, double {{.*}}, double {{.*}}132 // COMMONIR-NEXT: insertelement <2 x double> %{{.*}}, double {{.*}}, i64 0133 return _mm_mask_sqrt_sd(__W,__U,__A,__B);134}135 136__m128d test_mm_maskz_sqrt_sd(__mmask8 __U, __m128d __A, __m128d __B){137 // COMMON-LABEL: test_mm_maskz_sqrt_sd138 // COMMONIR: extractelement <2 x double> %{{.*}}, i64 0139 // UNCONSTRAINED-NEXT: call double @llvm.sqrt.f64(double %{{.*}})140 // CONSTRAINED-NEXT: call double @llvm.experimental.constrained.sqrt.f64(double %{{.*}}, metadata !{{.*}})141 // CHECK-ASM: vsqrtsd142 // COMMONIR-NEXT: extractelement <2 x double> %{{.*}}, i64 0143 // COMMONIR-NEXT: bitcast i8 %{{.*}} to <8 x i1>144 // COMMONIR-NEXT: extractelement <8 x i1> %{{.*}}, i64 0145 // COMMONIR-NEXT: select i1 {{.*}}, double {{.*}}, double {{.*}}146 // COMMONIR-NEXT: insertelement <2 x double> %{{.*}}, double {{.*}}, i64 0147 return _mm_maskz_sqrt_sd(__U,__A,__B);148}149 150__m128 test_mm_mask_sqrt_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){151 // COMMON-LABEL: test_mm_mask_sqrt_ss152 // COMMONIR: extractelement <4 x float> %{{.*}}, i64 0153 // UNCONSTRAINED-NEXT: call float @llvm.sqrt.f32(float %{{.*}})154 // CONSTRAINED-NEXT: call float @llvm.experimental.constrained.sqrt.f32(float %{{.*}}, metadata !{{.*}})155 // CHECK-ASM: vsqrtss156 // COMMONIR-NEXT: extractelement <4 x float> %{{.*}}, i64 0157 // COMMONIR-NEXT: bitcast i8 %{{.*}} to <8 x i1>158 // COMMONIR-NEXT: extractelement <8 x i1> %{{.*}}, i64 0159 // COMMONIR-NEXT: select i1 {{.*}}, float {{.*}}, float {{.*}}160 // COMMONIR-NEXT: insertelement <4 x float> %{{.*}}, float {{.*}}, i64 0161 return _mm_mask_sqrt_ss(__W,__U,__A,__B);162}163 164__m128 test_mm_maskz_sqrt_ss(__mmask8 __U, __m128 __A, __m128 __B){165 // COMMON-LABEL: test_mm_maskz_sqrt_ss166 // COMMONIR: extractelement <4 x float> %{{.*}}, i64 0167 // UNCONSTRAINED-NEXT: call float @llvm.sqrt.f32(float %{{.*}})168 // CONSTRAINED-NEXT: call float @llvm.experimental.constrained.sqrt.f32(float %{{.*}}, metadata !{{.*}})169 // CHECK-ASM: vsqrtss170 // COMMONIR-NEXT: extractelement <4 x float> %{{.*}}, i64 0171 // COMMONIR-NEXT: bitcast i8 %{{.*}} to <8 x i1>172 // COMMONIR-NEXT: extractelement <8 x i1> %{{.*}}, i64 0173 // COMMONIR-NEXT: select i1 {{.*}}, float {{.*}}, float {{.*}}174 // COMMONIR-NEXT: insertelement <4 x float> %{{.*}}, float {{.*}}, i64 0175 return _mm_maskz_sqrt_ss(__U,__A,__B);176}177 178__m512 test_mm512_cvtph_ps (__m256i __A)179{180 // COMMON-LABEL: test_mm512_cvtph_ps 181 // COMMONIR: bitcast <4 x i64> %{{.*}} to <16 x i16>182 // COMMONIR: bitcast <16 x i16> %{{.*}} to <16 x half>183 // UNCONSTRAINED: fpext <16 x half> %{{.*}} to <16 x float>184 // CONSTRAINED: call <16 x float> @llvm.experimental.constrained.fpext.v16f32.v16f16(<16 x half> %{{.*}}, metadata !"fpexcept.strict")185 return _mm512_cvtph_ps (__A);186}187 188__m512 test_mm512_mask_cvtph_ps (__m512 __W, __mmask16 __U, __m256i __A)189{190 // COMMON-LABEL: test_mm512_mask_cvtph_ps 191 // COMMONIR: bitcast <4 x i64> %{{.*}} to <16 x i16>192 // COMMONIR: bitcast <16 x i16> %{{.*}} to <16 x half>193 // UNCONSTRAINED: fpext <16 x half> %{{.*}} to <16 x float>194 // CONSTRAINED: call <16 x float> @llvm.experimental.constrained.fpext.v16f32.v16f16(<16 x half> %{{.*}}, metadata !"fpexcept.strict")195 // COMMONIR: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}196 return _mm512_mask_cvtph_ps (__W,__U,__A);197}198 199__m512 test_mm512_maskz_cvtph_ps (__mmask16 __U, __m256i __A)200{201 // COMMON-LABEL: test_mm512_maskz_cvtph_ps 202 // COMMONIR: bitcast <4 x i64> %{{.*}} to <16 x i16>203 // COMMONIR: bitcast <16 x i16> %{{.*}} to <16 x half>204 // UNCONSTRAINED: fpext <16 x half> %{{.*}} to <16 x float>205 // CONSTRAINED: call <16 x float> @llvm.experimental.constrained.fpext.v16f32.v16f16(<16 x half> %{{.*}}, metadata !"fpexcept.strict")206 // COMMONIR: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}207 return _mm512_maskz_cvtph_ps (__U,__A);208}209 210