12231 lines · c
1// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s2// RUN: %clang_cc1 -x c -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s3// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s4// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s5 6// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion -fexperimental-new-constant-interpreter | FileCheck %s7// RUN: %clang_cc1 -x c -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion -fexperimental-new-constant-interpreter | FileCheck %s8// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion -fexperimental-new-constant-interpreter | FileCheck %s9// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion -fexperimental-new-constant-interpreter | FileCheck %s10 11#include <immintrin.h>12#include "builtin_test_helpers.h"13 14__m512d test_mm512_sqrt_pd(__m512d a)15{16 // CHECK-LABEL: test_mm512_sqrt_pd17 // CHECK: call {{.*}}<8 x double> @llvm.sqrt.v8f64(<8 x double> %{{.*}})18 return _mm512_sqrt_pd(a);19}20 21__m512d test_mm512_mask_sqrt_pd (__m512d __W, __mmask8 __U, __m512d __A)22{23 // CHECK-LABEL: test_mm512_mask_sqrt_pd 24 // CHECK: call {{.*}}<8 x double> @llvm.sqrt.v8f64(<8 x double> %{{.*}})25 // CHECK: bitcast i8 %{{.*}} to <8 x i1>26 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}27 return _mm512_mask_sqrt_pd (__W,__U,__A);28}29 30__m512d test_mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A)31{32 // CHECK-LABEL: test_mm512_maskz_sqrt_pd 33 // CHECK: call {{.*}}<8 x double> @llvm.sqrt.v8f64(<8 x double> %{{.*}})34 // CHECK: bitcast i8 %{{.*}} to <8 x i1>35 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> {{.*}}36 return _mm512_maskz_sqrt_pd (__U,__A);37}38 39__m512d test_mm512_mask_sqrt_round_pd(__m512d __W,__mmask8 __U,__m512d __A)40{41 // CHECK-LABEL: test_mm512_mask_sqrt_round_pd42 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %{{.*}}, i32 11)43 // CHECK: bitcast i8 %{{.*}} to <8 x i1>44 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}45 return _mm512_mask_sqrt_round_pd(__W,__U,__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);46}47 48__m512d test_mm512_maskz_sqrt_round_pd(__mmask8 __U,__m512d __A)49{50 // CHECK-LABEL: test_mm512_maskz_sqrt_round_pd51 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %{{.*}}, i32 11)52 // CHECK: bitcast i8 %{{.*}} to <8 x i1>53 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> {{.*}}54 return _mm512_maskz_sqrt_round_pd(__U,__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);55}56 57__m512d test_mm512_sqrt_round_pd(__m512d __A)58{59 // CHECK-LABEL: test_mm512_sqrt_round_pd60 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %{{.*}}, i32 11)61 return _mm512_sqrt_round_pd(__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);62}63 64__m512 test_mm512_sqrt_ps(__m512 a)65{66 // CHECK-LABEL: test_mm512_sqrt_ps67 // CHECK: call {{.*}}<16 x float> @llvm.sqrt.v16f32(<16 x float> %{{.*}})68 return _mm512_sqrt_ps(a);69}70 71__m512 test_mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A)72{73 // CHECK-LABEL: test_mm512_mask_sqrt_ps74 // CHECK: call {{.*}}<16 x float> @llvm.sqrt.v16f32(<16 x float> %{{.*}})75 // CHECK: bitcast i16 %{{.*}} to <16 x i1>76 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}77 return _mm512_mask_sqrt_ps( __W, __U, __A);78}79 80__m512 test_mm512_maskz_sqrt_ps( __mmask16 __U, __m512 __A)81{82 // CHECK-LABEL: test_mm512_maskz_sqrt_ps83 // CHECK: call {{.*}}<16 x float> @llvm.sqrt.v16f32(<16 x float> %{{.*}})84 // CHECK: bitcast i16 %{{.*}} to <16 x i1>85 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> {{.*}}86 return _mm512_maskz_sqrt_ps(__U ,__A);87}88 89__m512 test_mm512_mask_sqrt_round_ps(__m512 __W,__mmask16 __U,__m512 __A)90{91 // CHECK-LABEL: test_mm512_mask_sqrt_round_ps92 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %{{.*}}, i32 11)93 // CHECK: bitcast i16 %{{.*}} to <16 x i1>94 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}95 return _mm512_mask_sqrt_round_ps(__W,__U,__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);96}97 98__m512 test_mm512_maskz_sqrt_round_ps(__mmask16 __U,__m512 __A)99{100 // CHECK-LABEL: test_mm512_maskz_sqrt_round_ps101 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %{{.*}}, i32 11)102 // CHECK: bitcast i16 %{{.*}} to <16 x i1>103 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> {{.*}}104 return _mm512_maskz_sqrt_round_ps(__U,__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);105}106 107__m512 test_mm512_sqrt_round_ps(__m512 __A)108{109 // CHECK-LABEL: test_mm512_sqrt_round_ps110 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %{{.*}}, i32 11)111 return _mm512_sqrt_round_ps(__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);112}113 114__m512d test_mm512_rsqrt14_pd(__m512d a)115{116 // CHECK-LABEL: test_mm512_rsqrt14_pd117 // CHECK: @llvm.x86.avx512.rsqrt14.pd.512118 return _mm512_rsqrt14_pd(a);119}120 121__m512d test_mm512_mask_rsqrt14_pd (__m512d __W, __mmask8 __U, __m512d __A)122{123 // CHECK-LABEL: test_mm512_mask_rsqrt14_pd 124 // CHECK: @llvm.x86.avx512.rsqrt14.pd.512125 return _mm512_mask_rsqrt14_pd (__W,__U,__A);126}127 128__m512d test_mm512_maskz_rsqrt14_pd (__mmask8 __U, __m512d __A)129{130 // CHECK-LABEL: test_mm512_maskz_rsqrt14_pd 131 // CHECK: @llvm.x86.avx512.rsqrt14.pd.512132 return _mm512_maskz_rsqrt14_pd (__U,__A);133}134 135__m512 test_mm512_rsqrt14_ps(__m512 a)136{137 // CHECK-LABEL: test_mm512_rsqrt14_ps138 // CHECK: @llvm.x86.avx512.rsqrt14.ps.512139 return _mm512_rsqrt14_ps(a);140}141 142__m512 test_mm512_mask_rsqrt14_ps (__m512 __W, __mmask16 __U, __m512 __A)143{144 // CHECK-LABEL: test_mm512_mask_rsqrt14_ps 145 // CHECK: @llvm.x86.avx512.rsqrt14.ps.512146 return _mm512_mask_rsqrt14_ps (__W,__U,__A);147}148 149__m512 test_mm512_maskz_rsqrt14_ps (__mmask16 __U, __m512 __A)150{151 // CHECK-LABEL: test_mm512_maskz_rsqrt14_ps 152 // CHECK: @llvm.x86.avx512.rsqrt14.ps.512153 return _mm512_maskz_rsqrt14_ps (__U,__A);154}155 156__m512 test_mm512_add_ps(__m512 a, __m512 b)157{158 // CHECK-LABEL: test_mm512_add_ps159 // CHECK: fadd <16 x float>160 return _mm512_add_ps(a, b);161}162TEST_CONSTEXPR(match_m512(_mm512_add_ps((__m512){-1.0f, -2.0f, -3.0f, -4.0f, -5.0f, -6.0f, -7.0f, -8.0f, +1.0f, +2.0f, +3.0f, +4.0f, +5.0f, +6.0f, +7.0f, +8.0f}, (__m512){-1.0f, -2.0f, -3.0f, -4.0f, -5.0f, -6.0f, -7.0f, -8.0f, +1.0f, +2.0f, +3.0f, +4.0f, +5.0f, +6.0f, +7.0f, +8.0f}), -2.0f, -4.0f, -6.0f, -8.0f, -10.0f, -12.0f, -14.0f, -16.0f, +2.0f, +4.0f, +6.0f, +8.0f, +10.0f, +12.0f, +14.0f, +16.0f));163 164__m512d test_mm512_add_pd(__m512d a, __m512d b)165{166 // CHECK-LABEL: test_mm512_add_pd167 // CHECK: fadd <8 x double>168 return _mm512_add_pd(a, b);169}170TEST_CONSTEXPR(match_m512d(_mm512_add_pd((__m512d){-1.0, -2.0, -3.0, -4.0, +1.0, +2.0, +3.0, +4.0}, (__m512d){-1.0, -2.0, -3.0, -4.0, +1.0, +2.0, +3.0, +4.0}), -2.0, -4.0, -6.0, -8.0, +2.0, +4.0, +6.0, +8.0));171 172__m512 test_mm512_mul_ps(__m512 a, __m512 b)173{174 // CHECK-LABEL: test_mm512_mul_ps175 // CHECK: fmul <16 x float>176 return _mm512_mul_ps(a, b);177}178TEST_CONSTEXPR(match_m512(_mm512_mul_ps((__m512){-1.0f, -2.0f, -3.0f, -4.0f, -5.0f, -6.0f, -7.0f, -8.0f, +1.0f, +2.0f, +3.0f, +4.0f, +5.0f, +6.0f, +7.0f, +8.0f}, (__m512){-1.0f, -2.0f, -3.0f, -4.0f, -5.0f, -6.0f, -7.0f, -8.0f, +1.0f, +2.0f, +3.0f, +4.0f, +5.0f, +6.0f, +7.0f, +8.0f}), +1.0f, +4.0f, +9.0f, +16.0f, +25.0f, +36.0f, +49.0f, +64.0f, +1.0f, +4.0f, +9.0f, +16.0f, +25.0f, +36.0f, +49.0f, +64.0f));179 180__m512d test_mm512_mul_pd(__m512d a, __m512d b)181{182 // CHECK-LABEL: test_mm512_mul_pd183 // CHECK: fmul <8 x double>184 return _mm512_mul_pd(a, b);185}186TEST_CONSTEXPR(match_m512d(_mm512_mul_pd((__m512d){-1.0, -2.0, -3.0, -4.0, +1.0, +2.0, +3.0, +4.0}, (__m512d){-1.0, -2.0, -3.0, -4.0, +1.0, +2.0, +3.0, +4.0}), +1.0, +4.0, +9.0, +16.0, +1.0, +4.0, +9.0, +16.0));187 188void test_mm512_storeu_si512 (void *__P, __m512i __A)189{190 // CHECK-LABEL: test_mm512_storeu_si512191 // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}192 // CHECK-NEXT: ret void193 _mm512_storeu_si512 ( __P,__A);194}195 196void test_mm512_storeu_ps(void *p, __m512 a)197{198 // CHECK-LABEL: test_mm512_storeu_ps199 // CHECK: store <16 x float> %{{.*}}, ptr %{{.*}}, align 1{{$}}200 // CHECK-NEXT: ret void201 _mm512_storeu_ps(p, a);202}203 204void test_mm512_storeu_pd(void *p, __m512d a)205{206 // CHECK-LABEL: test_mm512_storeu_pd207 // CHECK: store <8 x double> %{{.*}}, ptr %{{.*}}, align 1{{$}}208 // CHECK-NEXT: ret void209 _mm512_storeu_pd(p, a);210}211 212void test_mm512_mask_store_ps(void *p, __m512 a, __mmask16 m)213{214 // CHECK-LABEL: test_mm512_mask_store_ps215 // CHECK: @llvm.masked.store.v16f32.p0(<16 x float> %{{.*}}, ptr align 64 %{{.*}}, <16 x i1> %{{.*}})216 _mm512_mask_store_ps(p, m, a);217}218 219void test_mm512_store_si512 (void *__P, __m512i __A)220{221 // CHECK-LABEL: test_mm512_store_si512 222 // CHECK: load <8 x i64>, ptr %__A.addr.i, align 64{{$}}223 // CHECK: [[SI512_3:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}}224 // CHECK: store <8 x i64> 225 _mm512_store_si512 ( __P,__A);226}227 228void test_mm512_store_epi32 (void *__P, __m512i __A)229{230 // CHECK-LABEL: test_mm512_store_epi32 231 // CHECK: load <8 x i64>, ptr %__A.addr.i, align 64{{$}}232 // CHECK: [[Si32_3:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}}233 // CHECK: store <8 x i64> 234 _mm512_store_epi32 ( __P,__A);235}236 237void test_mm512_store_epi64 (void *__P, __m512i __A)238{239 // CHECK-LABEL: test_mm512_store_epi64 240 // CHECK: load <8 x i64>, ptr %__A.addr.i, align 64{{$}}241 // CHECK: [[SI64_3:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}}242 // CHECK: store <8 x i64> 243 _mm512_store_epi64 ( __P,__A);244}245 246void test_mm512_store_ps(void *p, __m512 a)247{248 // CHECK-LABEL: test_mm512_store_ps249 // CHECK: store <16 x float>250 _mm512_store_ps(p, a);251}252 253void test_mm512_store_pd(void *p, __m512d a)254{255 // CHECK-LABEL: test_mm512_store_pd256 // CHECK: store <8 x double>257 _mm512_store_pd(p, a);258}259 260void test_mm512_mask_store_pd(void *p, __m512d a, __mmask8 m)261{262 // CHECK-LABEL: test_mm512_mask_store_pd263 // CHECK: @llvm.masked.store.v8f64.p0(<8 x double> %{{.*}}, ptr align 64 %{{.*}}, <8 x i1> %{{.*}})264 _mm512_mask_store_pd(p, m, a);265}266 267void test_mm512_storeu_epi32(void *__P, __m512i __A) {268 // CHECK-LABEL: test_mm512_storeu_epi32269 // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}270 return _mm512_storeu_epi32(__P, __A); 271}272 273void test_mm512_mask_storeu_epi32(void *__P, __mmask16 __U, __m512i __A) {274 // CHECK-LABEL: test_mm512_mask_storeu_epi32275 // CHECK: @llvm.masked.store.v16i32.p0(<16 x i32> %{{.*}}, ptr align 1 %{{.*}}, <16 x i1> %{{.*}})276 return _mm512_mask_storeu_epi32(__P, __U, __A); 277}278 279void test_mm512_storeu_epi64(void *__P, __m512i __A) {280 // CHECK-LABEL: test_mm512_storeu_epi64281 // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}282 return _mm512_storeu_epi64(__P, __A); 283}284 285void test_mm512_mask_storeu_epi64(void *__P, __mmask8 __U, __m512i __A) {286 // CHECK-LABEL: test_mm512_mask_storeu_epi64287 // CHECK: @llvm.masked.store.v8i64.p0(<8 x i64> %{{.*}}, ptr align 1 %{{.*}}, <8 x i1> %{{.*}})288 return _mm512_mask_storeu_epi64(__P, __U, __A); 289}290 291__m512i test_mm512_loadu_si512 (void *__P)292{293 // CHECK-LABEL: test_mm512_loadu_si512 294 // CHECK: load <8 x i64>, ptr %{{.*}}, align 1{{$}}295 return _mm512_loadu_si512 ( __P);296}297 298__m512i test_mm512_loadu_epi32 (void *__P)299{300 // CHECK-LABEL: test_mm512_loadu_epi32 301 // CHECK: load <8 x i64>, ptr %{{.*}}, align 1{{$}}302 return _mm512_loadu_epi32 (__P);303}304 305__m512i test_mm512_mask_loadu_epi32 (__m512i __W, __mmask16 __U, void *__P)306{307 // CHECK-LABEL: test_mm512_mask_loadu_epi32 308 // CHECK: @llvm.masked.load.v16i32.p0(ptr align 1 %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}})309 return _mm512_mask_loadu_epi32 (__W,__U, __P);310}311 312__m512i test_mm512_maskz_loadu_epi32 (__mmask16 __U, void *__P)313{314 // CHECK-LABEL: test_mm512_maskz_loadu_epi32315 // CHECK: @llvm.masked.load.v16i32.p0(ptr align 1 %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}})316 return _mm512_maskz_loadu_epi32 (__U, __P);317}318 319__m512i test_mm512_loadu_epi64 (void *__P)320{321 // CHECK-LABEL: test_mm512_loadu_epi64 322 // CHECK: load <8 x i64>, ptr %{{.*}}, align 1{{$}}323 return _mm512_loadu_epi64 (__P);324}325 326__m512i test_mm512_mask_loadu_epi64 (__m512i __W, __mmask8 __U, void *__P)327{328 // CHECK-LABEL: test_mm512_mask_loadu_epi64 329 // CHECK: @llvm.masked.load.v8i64.p0(ptr align 1 %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}})330 return _mm512_mask_loadu_epi64 (__W,__U, __P);331}332 333__m512i test_mm512_maskz_loadu_epi64 (__mmask16 __U, void *__P)334{335 // CHECK-LABEL: test_mm512_maskz_loadu_epi64336 // CHECK: @llvm.masked.load.v8i64.p0(ptr align 1 %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}})337 return _mm512_maskz_loadu_epi64 (__U, __P);338}339 340__m512 test_mm512_loadu_ps(void *p)341{342 // CHECK-LABEL: test_mm512_loadu_ps343 // CHECK: load <16 x float>, ptr {{.*}}, align 1{{$}}344 return _mm512_loadu_ps(p);345}346 347__m512 test_mm512_mask_loadu_ps (__m512 __W, __mmask16 __U, void *__P)348{349 // CHECK-LABEL: test_mm512_mask_loadu_ps 350 // CHECK: @llvm.masked.load.v16f32.p0(ptr align 1 %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}})351 return _mm512_mask_loadu_ps (__W,__U, __P);352}353 354__m512d test_mm512_loadu_pd(void *p)355{356 // CHECK-LABEL: test_mm512_loadu_pd357 // CHECK: load <8 x double>, ptr {{.*}}, align 1{{$}}358 return _mm512_loadu_pd(p);359}360 361__m512d test_mm512_mask_loadu_pd (__m512d __W, __mmask8 __U, void *__P)362{363 // CHECK-LABEL: test_mm512_mask_loadu_pd 364 // CHECK: @llvm.masked.load.v8f64.p0(ptr align 1 %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}})365 return _mm512_mask_loadu_pd (__W,__U, __P);366}367 368__m512i test_mm512_load_si512 (void *__P)369{370 // CHECK-LABEL: test_mm512_load_si512 371 // CHECK: [[LI512_1:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}}372 // CHECK: load <8 x i64>, ptr [[LI512_1]], align 64{{$}}373 return _mm512_load_si512 ( __P);374}375 376__m512i test_mm512_load_epi32 (void *__P)377{378 // CHECK-LABEL: test_mm512_load_epi32 379 // CHECK: [[LI32_1:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}}380 // CHECK: load <8 x i64>, ptr [[LI32_1]], align 64{{$}}381 return _mm512_load_epi32 ( __P);382}383 384__m512i test_mm512_load_epi64 (void *__P)385{386 // CHECK-LABEL: test_mm512_load_epi64 387 // CHECK: [[LI64_1:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}}388 // CHECK: load <8 x i64>, ptr [[LI64_1]], align 64{{$}}389 return _mm512_load_epi64 ( __P);390}391 392__m512 test_mm512_load_ps(void *p)393{394 // CHECK-LABEL: test_mm512_load_ps395 // CHECK: load <16 x float>, ptr %{{.*}}, align 64{{$}}396 return _mm512_load_ps(p);397}398 399__m512 test_mm512_mask_load_ps (__m512 __W, __mmask16 __U, void *__P)400{401 // CHECK-LABEL: test_mm512_mask_load_ps 402 // CHECK: @llvm.masked.load.v16f32.p0(ptr align 64 %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}})403 return _mm512_mask_load_ps (__W,__U, __P);404}405 406__m512 test_mm512_maskz_load_ps(__mmask16 __U, void *__P)407{408 // CHECK-LABEL: test_mm512_maskz_load_ps409 // CHECK: @llvm.masked.load.v16f32.p0(ptr align 64 %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}})410 return _mm512_maskz_load_ps(__U, __P);411}412 413__m512d test_mm512_load_pd(void *p)414{415 // CHECK-LABEL: test_mm512_load_pd416 // CHECK: load <8 x double>, ptr %{{.*}}, align 64{{$}}417 return _mm512_load_pd(p);418}419 420__m512d test_mm512_mask_load_pd (__m512d __W, __mmask8 __U, void *__P)421{422 // CHECK-LABEL: test_mm512_mask_load_pd 423 // CHECK: @llvm.masked.load.v8f64.p0(ptr align 64 %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}})424 return _mm512_mask_load_pd (__W,__U, __P);425}426 427__m512d test_mm512_maskz_load_pd(__mmask8 __U, void *__P)428{429 // CHECK-LABEL: test_mm512_maskz_load_pd430 // CHECK: @llvm.masked.load.v8f64.p0(ptr align 64 %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}})431 return _mm512_maskz_load_pd(__U, __P);432}433 434__m512d test_mm512_set1_pd(double d)435{436 // CHECK-LABEL: test_mm512_set1_pd437 // CHECK: insertelement <8 x double> {{.*}}, i32 0438 // CHECK: insertelement <8 x double> {{.*}}, i32 1439 // CHECK: insertelement <8 x double> {{.*}}, i32 2440 // CHECK: insertelement <8 x double> {{.*}}, i32 3441 // CHECK: insertelement <8 x double> {{.*}}, i32 4442 // CHECK: insertelement <8 x double> {{.*}}, i32 5443 // CHECK: insertelement <8 x double> {{.*}}, i32 6444 // CHECK: insertelement <8 x double> {{.*}}, i32 7445 return _mm512_set1_pd(d);446}447TEST_CONSTEXPR(match_m512d(_mm512_set1_pd(-100.0), -100.0, -100.0, -100.0, -100.0, -100.0, -100.0, -100.0, -100.0));448 449__m512 test_mm512_set1_ps(float d)450{451 // CHECK-LABEL: test_mm512_set1_ps452 // CHECK: insertelement <16 x float> {{.*}}, i32 0453 // CHECK: insertelement <16 x float> {{.*}}, i32 1454 // CHECK: insertelement <16 x float> {{.*}}, i32 2455 // CHECK: insertelement <16 x float> {{.*}}, i32 3456 // CHECK: insertelement <16 x float> {{.*}}, i32 4457 // CHECK: insertelement <16 x float> {{.*}}, i32 5458 // CHECK: insertelement <16 x float> {{.*}}, i32 6459 // CHECK: insertelement <16 x float> {{.*}}, i32 15460 return _mm512_set1_ps(d);461}462TEST_CONSTEXPR(match_m512(_mm512_set1_ps(-55.0f), -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f));463 464__mmask16 test_mm512_knot(__mmask16 a)465{466 // CHECK-LABEL: test_mm512_knot467 // CHECK: [[IN:%.*]] = bitcast i16 %{{.*}} to <16 x i1>468 // CHECK: [[NOT:%.*]] = xor <16 x i1> [[IN]], splat (i1 true)469 // CHECK: bitcast <16 x i1> [[NOT]] to i16470 return _mm512_knot(a);471}472 473TEST_CONSTEXPR(_mm512_knot(0) == 0xFFFF);474TEST_CONSTEXPR(_mm512_knot(0x12345) == 0xDCBA);475 476__m512i test_mm512_alignr_epi32(__m512i a, __m512i b)477{478 // CHECK-LABEL: test_mm512_alignr_epi32479 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>480 return _mm512_alignr_epi32(a, b, 2);481}482 483__m512i test_mm512_mask_alignr_epi32(__m512i w, __mmask16 u, __m512i a, __m512i b)484{485 // CHECK-LABEL: test_mm512_mask_alignr_epi32486 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>487 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> {{.*}}488 return _mm512_mask_alignr_epi32(w, u, a, b, 2);489}490 491__m512i test_mm512_maskz_alignr_epi32( __mmask16 u, __m512i a, __m512i b)492{493 // CHECK-LABEL: test_mm512_maskz_alignr_epi32494 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>495 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> {{.*}}496 return _mm512_maskz_alignr_epi32(u, a, b, 2);497}498 499__m512i test_mm512_alignr_epi64(__m512i a, __m512i b)500{501 // CHECK-LABEL: test_mm512_alignr_epi64502 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>503 return _mm512_alignr_epi64(a, b, 2);504}505 506__m512i test_mm512_mask_alignr_epi64(__m512i w, __mmask8 u, __m512i a, __m512i b)507{508 // CHECK-LABEL: test_mm512_mask_alignr_epi64509 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>510 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> {{.*}}511 return _mm512_mask_alignr_epi64(w, u, a, b, 2);512}513 514__m512i test_mm512_maskz_alignr_epi64( __mmask8 u, __m512i a, __m512i b)515{516 // CHECK-LABEL: test_mm512_maskz_alignr_epi64517 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>518 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> {{.*}}519 return _mm512_maskz_alignr_epi64(u, a, b, 2);520}521 522TEST_CONSTEXPR(match_v16si(_mm512_alignr_epi32(((__m512i)(__v16si){100, 200, 300, 400, 500, 600, 700, 800,523 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600}),524 ((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7,525 8, 9, 10, 11, 12, 13, 14, 15}), 19),526 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 100, 200, 300));527TEST_CONSTEXPR(match_v16si(_mm512_mask_alignr_epi32(((__m512i)(__v16si){1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000,528 9000, 10000, 11000, 12000, 13000, 14000, 15000, 16000}),529 0xA5A5,530 ((__m512i)(__v16si){100, 200, 300, 400, 500, 600, 700, 800,531 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600}),532 ((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7,533 8, 9, 10, 11, 12, 13, 14, 15}), 19),534 3, 2000, 5, 4000, 5000, 8, 7000, 10,535 11, 10000, 13, 12000, 13000, 100, 15000, 300));536TEST_CONSTEXPR(match_v16si(_mm512_maskz_alignr_epi32(0x0F0F,537 ((__m512i)(__v16si){100, 200, 300, 400, 500, 600, 700, 800,538 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600}),539 ((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7,540 8, 9, 10, 11, 12, 13, 14, 15}), 19),541 3, 4, 5, 6, 0, 0, 0, 0, 11, 12, 13, 14, 0, 0, 0, 0));542 543TEST_CONSTEXPR(match_v8di(_mm512_alignr_epi64(((__m512i)(__v8di){10, 11, 12, 13, 14, 15, 16, 17}),544 ((__m512i)(__v8di){1, 2, 3, 4, 5, 6, 7, 8}), 11),545 4, 5, 6, 7, 8, 10, 11, 12));546TEST_CONSTEXPR(match_v8di(_mm512_mask_alignr_epi64(((__m512i)(__v8di){1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000}),547 0xA5,548 ((__m512i)(__v8di){10, 11, 12, 13, 14, 15, 16, 17}),549 ((__m512i)(__v8di){1, 2, 3, 4, 5, 6, 7, 8}), 11),550 4, 2000, 6, 4000, 5000, 10, 7000, 12));551TEST_CONSTEXPR(match_v8di(_mm512_maskz_alignr_epi64(0x33,552 ((__m512i)(__v8di){10, 11, 12, 13, 14, 15, 16, 17}),553 ((__m512i)(__v8di){1, 2, 3, 4, 5, 6, 7, 8}), 11),554 4, 5, 0, 0, 8, 10, 0, 0));555 556__m512d test_mm512_fmadd_round_pd(__m512d __A, __m512d __B, __m512d __C) {557 // CHECK-LABEL: test_mm512_fmadd_round_pd558 // CHECK: @llvm.x86.avx512.vfmadd.pd.512559 return _mm512_fmadd_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);560}561 562__m512d test_mm512_mask_fmadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {563 // CHECK-LABEL: test_mm512_mask_fmadd_round_pd564 // CHECK: @llvm.x86.avx512.vfmadd.pd.512565 // CHECK: bitcast i8 %{{.*}} to <8 x i1>566 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}567 return _mm512_mask_fmadd_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);568}569__m512d test_mm512_mask3_fmadd_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {570 // CHECK-LABEL: test_mm512_mask3_fmadd_round_pd571 // CHECK: @llvm.x86.avx512.vfmadd.pd.512572 // CHECK: bitcast i8 %{{.*}} to <8 x i1>573 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}574 return _mm512_mask3_fmadd_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);575}576__m512d test_mm512_maskz_fmadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {577 // CHECK-LABEL: test_mm512_maskz_fmadd_round_pd578 // CHECK: @llvm.x86.avx512.vfmadd.pd.512579 // CHECK: bitcast i8 %{{.*}} to <8 x i1>580 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer581 return _mm512_maskz_fmadd_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);582}583__m512d test_mm512_fmsub_round_pd(__m512d __A, __m512d __B, __m512d __C) {584 // CHECK-LABEL: test_mm512_fmsub_round_pd585 // CHECK: fneg <8 x double>586 // CHECK: @llvm.x86.avx512.vfmadd.pd.512587 return _mm512_fmsub_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);588}589__m512d test_mm512_mask_fmsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {590 // CHECK-LABEL: test_mm512_mask_fmsub_round_pd591 // CHECK: fneg <8 x double>592 // CHECK: @llvm.x86.avx512.vfmadd.pd.512593 // CHECK: bitcast i8 %{{.*}} to <8 x i1>594 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}595 return _mm512_mask_fmsub_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);596}597__m512d test_mm512_maskz_fmsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {598 // CHECK-LABEL: test_mm512_maskz_fmsub_round_pd599 // CHECK: fneg <8 x double>600 // CHECK: @llvm.x86.avx512.vfmadd.pd.512601 // CHECK: bitcast i8 %{{.*}} to <8 x i1>602 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer603 return _mm512_maskz_fmsub_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);604}605__m512d test_mm512_fnmadd_round_pd(__m512d __A, __m512d __B, __m512d __C) {606 // CHECK-LABEL: test_mm512_fnmadd_round_pd607 // CHECK: fneg <8 x double>608 // CHECK: @llvm.x86.avx512.vfmadd.pd.512609 return _mm512_fnmadd_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);610}611__m512d test_mm512_mask3_fnmadd_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {612 // CHECK-LABEL: test_mm512_mask3_fnmadd_round_pd613 // CHECK: fneg <8 x double>614 // CHECK: @llvm.x86.avx512.vfmadd.pd.512615 // CHECK: bitcast i8 %{{.*}} to <8 x i1>616 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}617 return _mm512_mask3_fnmadd_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);618}619__m512d test_mm512_maskz_fnmadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {620 // CHECK-LABEL: test_mm512_maskz_fnmadd_round_pd621 // CHECK: fneg <8 x double>622 // CHECK: @llvm.x86.avx512.vfmadd.pd.512623 // CHECK: bitcast i8 %{{.*}} to <8 x i1>624 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer625 return _mm512_maskz_fnmadd_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);626}627__m512d test_mm512_fnmsub_round_pd(__m512d __A, __m512d __B, __m512d __C) {628 // CHECK-LABEL: test_mm512_fnmsub_round_pd629 // CHECK: fneg <8 x double>630 // CHECK: fneg <8 x double>631 // CHECK: @llvm.x86.avx512.vfmadd.pd.512632 return _mm512_fnmsub_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);633}634__m512d test_mm512_maskz_fnmsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {635 // CHECK-LABEL: test_mm512_maskz_fnmsub_round_pd636 // CHECK: fneg <8 x double>637 // CHECK: fneg <8 x double>638 // CHECK: @llvm.x86.avx512.vfmadd.pd.512639 // CHECK: bitcast i8 %{{.*}} to <8 x i1>640 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer641 return _mm512_maskz_fnmsub_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);642}643__m512d test_mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C) {644 // CHECK-LABEL: test_mm512_fmadd_pd645 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})646 return _mm512_fmadd_pd(__A, __B, __C);647}648TEST_CONSTEXPR(match_m512d(_mm512_fmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 26.0, 38.0, 52.0, 68.0, 86.0, 106.0, 128.0, 152.0));649__m512d test_mm512_mask_fmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {650 // CHECK-LABEL: test_mm512_mask_fmadd_pd651 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})652 // CHECK: bitcast i8 %{{.*}} to <8 x i1>653 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}654 return _mm512_mask_fmadd_pd(__A, __U, __B, __C);655}656TEST_CONSTEXPR(match_m512d(_mm512_mask_fmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b11110000, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 1.0, 2.0, 3.0, 4.0, 86.0, 106.0, 128.0, 152.0));657TEST_CONSTEXPR(match_m512d(_mm512_mask_fmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b00001111, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 26.0, 38.0, 52.0, 68.0, 5.0, 6.0, 7.0, 8.0));658__m512d test_mm512_mask3_fmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {659 // CHECK-LABEL: test_mm512_mask3_fmadd_pd660 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})661 // CHECK: bitcast i8 %{{.*}} to <8 x i1>662 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}663 return _mm512_mask3_fmadd_pd(__A, __B, __C, __U);664}665TEST_CONSTEXPR(match_m512d(_mm512_mask3_fmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}, (__mmask8)0b11110000), 17.0, 18.0, 19.0, 20.0, 86.0, 106.0, 128.0, 152.0));666TEST_CONSTEXPR(match_m512d(_mm512_mask3_fmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}, (__mmask8)0b00001111), 26.0, 38.0, 52.0, 68.0, 21.0, 22.0, 23.0, 24.0));667__m512d test_mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {668 // CHECK-LABEL: test_mm512_maskz_fmadd_pd669 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})670 // CHECK: bitcast i8 %{{.*}} to <8 x i1>671 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double>672 return _mm512_maskz_fmadd_pd(__U, __A, __B, __C);673}674TEST_CONSTEXPR(match_m512d(_mm512_maskz_fmadd_pd((__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 0.0, 0.0, 0.0, 0.0, 86.0, 106.0, 128.0, 152.0));675TEST_CONSTEXPR(match_m512d(_mm512_maskz_fmadd_pd((__mmask8)0b00001111, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 26.0, 38.0, 52.0, 68.0, 0.0, 0.0, 0.0, 0.0));676__m512d test_mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C) {677 // CHECK-LABEL: test_mm512_fmsub_pd678 // CHECK: fneg <8 x double> %{{.*}}679 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})680 return _mm512_fmsub_pd(__A, __B, __C);681}682TEST_CONSTEXPR(match_m512d(_mm512_fmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), -8.0, 2.0, 14.0, 28.0, 44.0, 62.0, 82.0, 104.0));683__m512d test_mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {684 // CHECK-LABEL: test_mm512_mask_fmsub_pd685 // CHECK: fneg <8 x double> %{{.*}}686 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})687 // CHECK: bitcast i8 %{{.*}} to <8 x i1>688 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}689 return _mm512_mask_fmsub_pd(__A, __U, __B, __C);690}691TEST_CONSTEXPR(match_m512d(_mm512_mask_fmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b11110000, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 1.0, 2.0, 3.0, 4.0, 44.0, 62.0, 82.0, 104.0));692TEST_CONSTEXPR(match_m512d(_mm512_mask_fmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b00001111, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), -8.0, 2.0, 14.0, 28.0, 5.0, 6.0, 7.0, 8.0));693__m512d test_mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {694 // CHECK-LABEL: test_mm512_maskz_fmsub_pd695 // CHECK: fneg <8 x double> %{{.*}}696 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})697 // CHECK: bitcast i8 %{{.*}} to <8 x i1>698 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double>699 return _mm512_maskz_fmsub_pd(__U, __A, __B, __C);700}701TEST_CONSTEXPR(match_m512d(_mm512_maskz_fmsub_pd((__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 0.0, 0.0, 0.0, 0.0, 44.0, 62.0, 82.0, 104.0));702TEST_CONSTEXPR(match_m512d(_mm512_maskz_fmsub_pd((__mmask8)0b00001111, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), -8.0, 2.0, 14.0, 28.0, 0.0, 0.0, 0.0, 0.0));703__m512d test_mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {704 // CHECK-LABEL: test_mm512_mask3_fmsub_pd705 // CHECK: fneg <8 x double> %{{.*}}706 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})707 // CHECK: bitcast i8 %{{.*}} to <8 x i1>708 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}709 return _mm512_mask3_fmsub_pd(__A, __B, __C, __U);710}711TEST_CONSTEXPR(match_m512d(_mm512_mask3_fmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}, (__mmask8)0b11110000), 17.0, 18.0, 19.0, 20.0, 44.0, 62.0, 82.0, 104.0));712TEST_CONSTEXPR(match_m512d(_mm512_mask3_fmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}, (__mmask8)0b00001111), -8.0, 2.0, 14.0, 28.0, 21.0, 22.0, 23.0, 24.0));713__m512d test_mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C) {714 // CHECK-LABEL: test_mm512_fnmadd_pd715 // CHECK: fneg <8 x double> %{{.*}}716 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})717 return _mm512_fnmadd_pd(__A, __B, __C);718}719TEST_CONSTEXPR(match_m512d(_mm512_fnmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 8.0, -2.0, -14.0, -28.0, -44.0, -62.0, -82.0, -104.0));720__m512d test_mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {721 // CHECK-LABEL: test_mm512_mask_fnmadd_pd722 // CHECK: fneg <8 x double> %{{.*}}723 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})724 // CHECK: bitcast i8 %{{.*}} to <8 x i1>725 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}726 return _mm512_mask_fnmadd_pd(__A, __U, __B, __C);727}728TEST_CONSTEXPR(match_m512d(_mm512_mask_fnmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b11110000, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 1.0, 2.0, 3.0, 4.0, -44.0, -62.0, -82.0, -104.0));729TEST_CONSTEXPR(match_m512d(_mm512_mask_fnmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b00001111, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 8.0, -2.0, -14.0, -28.0, 5.0, 6.0, 7.0, 8.0));730__m512d test_mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {731 // CHECK-LABEL: test_mm512_mask3_fnmadd_pd732 // CHECK: fneg <8 x double> %{{.*}}733 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})734 // CHECK: bitcast i8 %{{.*}} to <8 x i1>735 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}736 return _mm512_mask3_fnmadd_pd(__A, __B, __C, __U);737}738TEST_CONSTEXPR(match_m512d(_mm512_mask3_fnmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}, (__mmask8)0b11110000), 17.0, 18.0, 19.0, 20.0, -44.0, -62.0, -82.0, -104.0));739TEST_CONSTEXPR(match_m512d(_mm512_mask3_fnmadd_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}, (__mmask8)0b00001111), 8.0, -2.0, -14.0, -28.0, 21.0, 22.0, 23.0, 24.0));740__m512d test_mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {741 // CHECK-LABEL: test_mm512_maskz_fnmadd_pd742 // CHECK: fneg <8 x double> %{{.*}}743 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})744 // CHECK: bitcast i8 %{{.*}} to <8 x i1>745 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double>746 return _mm512_maskz_fnmadd_pd(__U, __A, __B, __C);747}748TEST_CONSTEXPR(match_m512d(_mm512_maskz_fnmadd_pd((__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 0.0, 0.0, 0.0, 00.0, -44.0, -62.0, -82.0, -104.0));749TEST_CONSTEXPR(match_m512d(_mm512_maskz_fnmadd_pd((__mmask8)0b00001111, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 8.0, -2.0, -14.0, -28.0, 0.0, 0.0, 0.0, 0.0));750__m512d test_mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C) {751 // CHECK-LABEL: test_mm512_fnmsub_pd752 // CHECK: fneg <8 x double> %{{.*}}753 // CHECK: fneg <8 x double> %{{.*}}754 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})755 return _mm512_fnmsub_pd(__A, __B, __C);756}757TEST_CONSTEXPR(match_m512d(_mm512_fnmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), -26.0, -38.0, -52.0, -68.0, -86.0, -106.0, -128.0, -152.0));758__m512d test_mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {759 // CHECK-LABEL: test_mm512_mask_fnmsub_pd760 // CHECK: fneg <8 x double> %{{.*}}761 // CHECK: fneg <8 x double> %{{.*}}762 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})763 // CHECK: bitcast i8 %{{.*}} to <8 x i1>764 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}765 return _mm512_mask_fnmsub_pd(__A, __U, __B, __C);766}767TEST_CONSTEXPR(match_m512d(_mm512_mask_fnmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b11110000, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 1.0, 2.0, 3.0, 4.0, -86.0, -106.0, -128.0, -152.0));768TEST_CONSTEXPR(match_m512d(_mm512_mask_fnmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b00001111, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), -26.0, -38.0, -52.0, -68.0, 5.0, 6.0, 7.0, 8.0));769__m512d test_mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {770 // CHECK-LABEL: test_mm512_mask3_fnmsub_pd771 // CHECK: fneg <8 x double> %{{.*}}772 // CHECK: fneg <8 x double> %{{.*}}773 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})774 // CHECK: bitcast i8 %{{.*}} to <8 x i1>775 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}776 return _mm512_mask3_fnmsub_pd(__A, __B, __C, __U);777}778TEST_CONSTEXPR(match_m512d(_mm512_mask3_fnmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}, (__mmask8)0b11110000), 17.0, 18.0, 19.0, 20.0, -86.0, -106.0, -128.0, -152.0));779TEST_CONSTEXPR(match_m512d(_mm512_mask3_fnmsub_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}, (__mmask8)0b00001111), -26.0, -38.0, -52.0, -68.0, 21.0, 22.0, 23.0, 24.0));780__m512d test_mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {781 // CHECK-LABEL: test_mm512_maskz_fnmsub_pd782 // CHECK: fneg <8 x double> %{{.*}}783 // CHECK: fneg <8 x double> %{{.*}}784 // CHECK: call {{.*}}<8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})785 // CHECK: bitcast i8 %{{.*}} to <8 x i1>786 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double>787 return _mm512_maskz_fnmsub_pd(__U, __A, __B, __C);788}789TEST_CONSTEXPR(match_m512d(_mm512_maskz_fnmsub_pd((__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), 0.0, 0.0, 0.0, 0.0, -86.0, -106.0, -128.0, -152.0));790TEST_CONSTEXPR(match_m512d(_mm512_maskz_fnmsub_pd((__mmask8)0b00001111, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512d){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0}), -26.0, -38.0, -52.0, -68.0, 0.0, 0.0, 0.0, 0.0));791__m512 test_mm512_fmadd_round_ps(__m512 __A, __m512 __B, __m512 __C) {792 // CHECK-LABEL: test_mm512_fmadd_round_ps793 // CHECK: @llvm.x86.avx512.vfmadd.ps.512794 return _mm512_fmadd_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);795}796__m512 test_mm512_mask_fmadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {797 // CHECK-LABEL: test_mm512_mask_fmadd_round_ps798 // CHECK: @llvm.x86.avx512.vfmadd.ps.512799 // CHECK: bitcast i16 %{{.*}} to <16 x i1>800 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}801 return _mm512_mask_fmadd_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);802}803__m512 test_mm512_mask3_fmadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {804 // CHECK-LABEL: test_mm512_mask3_fmadd_round_ps805 // CHECK: @llvm.x86.avx512.vfmadd.ps.512806 // CHECK: bitcast i16 %{{.*}} to <16 x i1>807 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}808 return _mm512_mask3_fmadd_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);809}810__m512 test_mm512_maskz_fmadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {811 // CHECK-LABEL: test_mm512_maskz_fmadd_round_ps812 // CHECK: @llvm.x86.avx512.vfmadd.ps.512813 // CHECK: bitcast i16 %{{.*}} to <16 x i1>814 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer815 return _mm512_maskz_fmadd_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);816}817__m512 test_mm512_fmsub_round_ps(__m512 __A, __m512 __B, __m512 __C) {818 // CHECK-LABEL: test_mm512_fmsub_round_ps819 // CHECK: fneg <16 x float> %{{.*}}820 // CHECK: @llvm.x86.avx512.vfmadd.ps.512821 return _mm512_fmsub_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);822}823__m512 test_mm512_mask_fmsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {824 // CHECK-LABEL: test_mm512_mask_fmsub_round_ps825 // CHECK: fneg <16 x float> %{{.*}}826 // CHECK: @llvm.x86.avx512.vfmadd.ps.512827 // CHECK: bitcast i16 %{{.*}} to <16 x i1>828 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}829 return _mm512_mask_fmsub_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);830}831__m512 test_mm512_maskz_fmsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {832 // CHECK-LABEL: test_mm512_maskz_fmsub_round_ps833 // CHECK: fneg <16 x float> %{{.*}}834 // CHECK: @llvm.x86.avx512.vfmadd.ps.512835 // CHECK: bitcast i16 %{{.*}} to <16 x i1>836 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer837 return _mm512_maskz_fmsub_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);838}839__m512 test_mm512_fnmadd_round_ps(__m512 __A, __m512 __B, __m512 __C) {840 // CHECK-LABEL: test_mm512_fnmadd_round_ps841 // CHECK: fneg <16 x float> %{{.*}}842 // CHECK: @llvm.x86.avx512.vfmadd.ps.512843 return _mm512_fnmadd_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);844}845__m512 test_mm512_mask3_fnmadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {846 // CHECK-LABEL: test_mm512_mask3_fnmadd_round_ps847 // CHECK: fneg <16 x float> %{{.*}}848 // CHECK: @llvm.x86.avx512.vfmadd.ps.512849 // CHECK: bitcast i16 %{{.*}} to <16 x i1>850 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}851 return _mm512_mask3_fnmadd_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);852}853__m512 test_mm512_maskz_fnmadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {854 // CHECK-LABEL: test_mm512_maskz_fnmadd_round_ps855 // CHECK: fneg <16 x float> %{{.*}}856 // CHECK: @llvm.x86.avx512.vfmadd.ps.512857 // CHECK: bitcast i16 %{{.*}} to <16 x i1>858 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer859 return _mm512_maskz_fnmadd_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);860}861__m512 test_mm512_fnmsub_round_ps(__m512 __A, __m512 __B, __m512 __C) {862 // CHECK-LABEL: test_mm512_fnmsub_round_ps863 // CHECK: fneg <16 x float> %{{.*}}864 // CHECK: fneg <16 x float> %{{.*}}865 // CHECK: @llvm.x86.avx512.vfmadd.ps.512866 return _mm512_fnmsub_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);867}868__m512 test_mm512_maskz_fnmsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {869 // CHECK-LABEL: test_mm512_maskz_fnmsub_round_ps870 // CHECK: fneg <16 x float> %{{.*}}871 // CHECK: fneg <16 x float> %{{.*}}872 // CHECK: @llvm.x86.avx512.vfmadd.ps.512873 // CHECK: bitcast i16 %{{.*}} to <16 x i1>874 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer875 return _mm512_maskz_fnmsub_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);876}877__m512 test_mm512_fmadd_ps(__m512 __A, __m512 __B, __m512 __C) {878 // CHECK-LABEL: test_mm512_fmadd_ps879 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})880 return _mm512_fmadd_ps(__A, __B, __C);881}882TEST_CONSTEXPR(match_m512(_mm512_fmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 50.0, 70.0, 92.0, 116.0, 142.0, 170.0, 200.0, 232.0, 266.0, 302.0, 340.0, 380.0, 422.0, 466.0, 512.0, 560.0));883__m512 test_mm512_mask_fmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {884 // CHECK-LABEL: test_mm512_mask_fmadd_ps885 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})886 // CHECK: bitcast i16 %{{.*}} to <16 x i1>887 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}888 return _mm512_mask_fmadd_ps(__A, __U, __B, __C);889}890TEST_CONSTEXPR(match_m512(_mm512_mask_fmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__mmask16)0b1111111100000000, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 266.0, 302.0, 340.0, 380.0, 422.0, 466.0, 512.0, 560.0));891TEST_CONSTEXPR(match_m512(_mm512_mask_fmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__mmask16)0b0000000011111111, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 50.0, 70.0, 92.0, 116.0, 142.0, 170.0, 200.0, 232.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0));892__m512 test_mm512_mask3_fmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {893 // CHECK-LABEL: test_mm512_mask3_fmadd_ps894 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})895 // CHECK: bitcast i16 %{{.*}} to <16 x i1>896 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}897 return _mm512_mask3_fmadd_ps(__A, __B, __C, __U);898}899TEST_CONSTEXPR(match_m512(_mm512_mask3_fmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}, (__mmask16)0b1111111100000000), 33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 266.0, 302.0, 340.0, 380.0, 422.0, 466.0, 512.0, 560.0));900TEST_CONSTEXPR(match_m512(_mm512_mask3_fmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}, (__mmask16)0b0000000011111111), 50.0, 70.0, 92.0, 116.0, 142.0, 170.0, 200.0, 232.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0));901__m512 test_mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {902 // CHECK-LABEL: test_mm512_maskz_fmadd_ps903 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})904 // CHECK: bitcast i16 %{{.*}} to <16 x i1>905 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float>906 return _mm512_maskz_fmadd_ps(__U, __A, __B, __C);907}908TEST_CONSTEXPR(match_m512(_mm512_maskz_fmadd_ps((__mmask16)0b1111111100000000, (__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 266.0, 302.0, 340.0, 380.0, 422.0, 466.0, 512.0, 560.0));909TEST_CONSTEXPR(match_m512(_mm512_maskz_fmadd_ps((__mmask16)0b0000000011111111, (__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 50.0, 70.0, 92.0, 116.0, 142.0, 170.0, 200.0, 232.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0));910__m512 test_mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C) {911 // CHECK-LABEL: test_mm512_fmsub_ps912 // CHECK: fneg <16 x float> %{{.*}}913 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})914 return _mm512_fmsub_ps(__A, __B, __C);915}916TEST_CONSTEXPR(match_m512(_mm512_fmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), -16.0, 2.0, 22.0, 44.0, 68.0, 94.0, 122.0, 152.0, 184.0, 218.0, 254.0, 292.0, 332.0, 374.0, 418.0, 464.0));917__m512 test_mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {918 // CHECK-LABEL: test_mm512_mask_fmsub_ps919 // CHECK: fneg <16 x float> %{{.*}}920 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})921 // CHECK: bitcast i16 %{{.*}} to <16 x i1>922 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}923 return _mm512_mask_fmsub_ps(__A, __U, __B, __C);924}925TEST_CONSTEXPR(match_m512(_mm512_mask_fmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__mmask16)0b1111111100000000, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 184.0, 218.0, 254.0, 292.0, 332.0, 374.0, 418.0, 464.0));926TEST_CONSTEXPR(match_m512(_mm512_mask_fmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__mmask16)0b0000000011111111, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), -16.0, 2.0, 22.0, 44.0, 68.0, 94.0, 122.0, 152.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0));927__m512 test_mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {928 // CHECK-LABEL: test_mm512_mask3_fmsub_ps929 // CHECK: fneg <16 x float> %{{.*}}930 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})931 // CHECK: bitcast i16 %{{.*}} to <16 x i1>932 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}933 return _mm512_mask3_fmsub_ps(__A, __B, __C, __U);934}935TEST_CONSTEXPR(match_m512(_mm512_mask3_fmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}, (__mmask16)0b1111111100000000), 33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 184.0, 218.0, 254.0, 292.0, 332.0, 374.0, 418.0, 464.0));936TEST_CONSTEXPR(match_m512(_mm512_mask3_fmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}, (__mmask16)0b0000000011111111), -16.0, 2.0, 22.0, 44.0, 68.0, 94.0, 122.0, 152.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0));937__m512 test_mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {938 // CHECK-LABEL: test_mm512_maskz_fmsub_ps939 // CHECK: fneg <16 x float> %{{.*}}940 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})941 // CHECK: bitcast i16 %{{.*}} to <16 x i1>942 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float>943 return _mm512_maskz_fmsub_ps(__U, __A, __B, __C);944}945TEST_CONSTEXPR(match_m512(_mm512_maskz_fmsub_ps((__mmask16)0b1111111100000000, (__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 184.0, 218.0, 254.0, 292.0, 332.0, 374.0, 418.0, 464.0));946TEST_CONSTEXPR(match_m512(_mm512_maskz_fmsub_ps((__mmask16)0b0000000011111111, (__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), -16.0, 2.0, 22.0, 44.0, 68.0, 94.0, 122.0, 152.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0));947__m512 test_mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C) {948 // CHECK-LABEL: test_mm512_fnmadd_ps949 // CHECK: fneg <16 x float> %{{.*}}950 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})951 return _mm512_fnmadd_ps(__A, __B, __C);952}953TEST_CONSTEXPR(match_m512(_mm512_fnmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 16.0, -2.0, -22.0, -44.0, -68.0, -94.0, -122.0, -152.0, -184.0, -218.0, -254.0, -292.0, -332.0, -374.0, -418.0, -464.0));954__m512 test_mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {955 // CHECK-LABEL: test_mm512_mask_fnmadd_ps956 // CHECK: fneg <16 x float> %{{.*}}957 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})958 // CHECK: bitcast i16 %{{.*}} to <16 x i1>959 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}960 return _mm512_mask_fnmadd_ps(__A, __U, __B, __C);961}962TEST_CONSTEXPR(match_m512(_mm512_mask_fnmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__mmask16)0b1111111100000000, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, -184.0, -218.0, -254.0, -292.0, -332.0, -374.0, -418.0, -464.0));963TEST_CONSTEXPR(match_m512(_mm512_mask_fnmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__mmask16)0b0000000011111111, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 16.0, -2.0, -22.0, -44.0, -68.0, -94.0, -122.0, -152.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0));964__m512 test_mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {965 // CHECK-LABEL: test_mm512_mask3_fnmadd_ps966 // CHECK: fneg <16 x float> %{{.*}}967 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})968 // CHECK: bitcast i16 %{{.*}} to <16 x i1>969 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}970 return _mm512_mask3_fnmadd_ps(__A, __B, __C, __U);971}972TEST_CONSTEXPR(match_m512(_mm512_mask3_fnmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}, (__mmask16)0b1111111100000000), 33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, -184.0, -218.0, -254.0, -292.0, -332.0, -374.0, -418.0, -464.0));973TEST_CONSTEXPR(match_m512(_mm512_mask3_fnmadd_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}, (__mmask16)0b0000000011111111), 16.0, -2.0, -22.0, -44.0, -68.0, -94.0, -122.0, -152.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0));974__m512 test_mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {975 // CHECK-LABEL: test_mm512_maskz_fnmadd_ps976 // CHECK: fneg <16 x float> %{{.*}}977 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})978 // CHECK: bitcast i16 %{{.*}} to <16 x i1>979 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float>980 return _mm512_maskz_fnmadd_ps(__U, __A, __B, __C);981}982TEST_CONSTEXPR(match_m512(_mm512_maskz_fnmadd_ps((__mmask16)0b1111111100000000, (__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, -184.0, -218.0, -254.0, -292.0, -332.0, -374.0, -418.0, -464.0));983TEST_CONSTEXPR(match_m512(_mm512_maskz_fnmadd_ps((__mmask16)0b0000000011111111, (__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 16.0, -2.0, -22.0, -44.0, -68.0, -94.0, -122.0, -152.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0));984__m512 test_mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C) {985 // CHECK-LABEL: test_mm512_fnmsub_ps986 // CHECK: fneg <16 x float> %{{.*}}987 // CHECK: fneg <16 x float> %{{.*}}988 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})989 return _mm512_fnmsub_ps(__A, __B, __C);990}991TEST_CONSTEXPR(match_m512(_mm512_fnmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), -50.0, -70.0, -92.0, -116.0, -142.0, -170.0, -200.0, -232.0, -266.0, -302.0, -340.0, -380.0, -422.0, -466.0, -512.0, -560.0));992__m512 test_mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {993 // CHECK-LABEL: test_mm512_mask_fnmsub_ps994 // CHECK: fneg <16 x float> %{{.*}}995 // CHECK: fneg <16 x float> %{{.*}}996 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})997 // CHECK: bitcast i16 %{{.*}} to <16 x i1>998 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}999 return _mm512_mask_fnmsub_ps(__A, __U, __B, __C);1000}1001TEST_CONSTEXPR(match_m512(_mm512_mask_fnmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__mmask16)0b1111111100000000, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, -266.0, -302.0, -340.0, -380.0, -422.0, -466.0, -512.0, -560.0));1002TEST_CONSTEXPR(match_m512(_mm512_mask_fnmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__mmask16)0b0000000011111111, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), -50.0, -70.0, -92.0, -116.0, -142.0, -170.0, -200.0, -232.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0));1003__m512 test_mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {1004 // CHECK-LABEL: test_mm512_mask3_fnmsub_ps1005 // CHECK: fneg <16 x float> %{{.*}}1006 // CHECK: fneg <16 x float> %{{.*}}1007 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})1008 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1009 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1010 return _mm512_mask3_fnmsub_ps(__A, __B, __C, __U);1011}1012TEST_CONSTEXPR(match_m512(_mm512_mask3_fnmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}, (__mmask16)0b1111111100000000), 33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, -266.0, -302.0, -340.0, -380.0, -422.0, -466.0, -512.0, -560.0));1013TEST_CONSTEXPR(match_m512(_mm512_mask3_fnmsub_ps((__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}, (__mmask16)0b0000000011111111), -50.0, -70.0, -92.0, -116.0, -142.0, -170.0, -200.0, -232.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0));1014__m512 test_mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {1015 // CHECK-LABEL: test_mm512_maskz_fnmsub_ps1016 // CHECK: fneg <16 x float> %{{.*}}1017 // CHECK: fneg <16 x float> %{{.*}}1018 // CHECK: call {{.*}}<16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})1019 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1020 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float>1021 return _mm512_maskz_fnmsub_ps(__U, __A, __B, __C);1022}1023TEST_CONSTEXPR(match_m512(_mm512_maskz_fnmsub_ps((__mmask16)0b1111111100000000, (__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, -266.0, -302.0, -340.0, -380.0, -422.0, -466.0, -512.0, -560.0));1024TEST_CONSTEXPR(match_m512(_mm512_maskz_fnmsub_ps((__mmask16)0b0000000011111111, (__m512){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}, (__m512){17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0}, (__m512){33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0, 41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0}), -50.0, -70.0, -92.0, -116.0, -142.0, -170.0, -200.0, -232.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0));1025__m512d test_mm512_fmaddsub_round_pd(__m512d __A, __m512d __B, __m512d __C) {1026 // CHECK-LABEL: test_mm512_fmaddsub_round_pd1027 // CHECK: @llvm.x86.avx512.vfmaddsub.pd.5121028 return _mm512_fmaddsub_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1029}1030__m512d test_mm512_mask_fmaddsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {1031 // CHECK-LABEL: test_mm512_mask_fmaddsub_round_pd1032 // CHECK: @llvm.x86.avx512.vfmaddsub.pd.5121033 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1034 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1035 return _mm512_mask_fmaddsub_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1036}1037__m512d test_mm512_mask3_fmaddsub_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {1038 // CHECK-LABEL: test_mm512_mask3_fmaddsub_round_pd1039 // CHECK: @llvm.x86.avx512.vfmaddsub.pd.5121040 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1041 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1042 return _mm512_mask3_fmaddsub_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1043}1044__m512d test_mm512_maskz_fmaddsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {1045 // CHECK-LABEL: test_mm512_maskz_fmaddsub_round_pd1046 // CHECK: @llvm.x86.avx512.vfmaddsub.pd.5121047 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1048 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer1049 return _mm512_maskz_fmaddsub_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1050}1051__m512d test_mm512_fmsubadd_round_pd(__m512d __A, __m512d __B, __m512d __C) {1052 // CHECK-LABEL: test_mm512_fmsubadd_round_pd1053 // CHECK: fneg <8 x double> %{{.*}}1054 // CHECK: @llvm.x86.avx512.vfmaddsub.pd.5121055 return _mm512_fmsubadd_round_pd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1056}1057__m512d test_mm512_mask_fmsubadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {1058 // CHECK-LABEL: test_mm512_mask_fmsubadd_round_pd1059 // CHECK: fneg <8 x double> %{{.*}}1060 // CHECK: @llvm.x86.avx512.vfmaddsub.pd.5121061 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1062 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1063 return _mm512_mask_fmsubadd_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1064}1065__m512d test_mm512_maskz_fmsubadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {1066 // CHECK-LABEL: test_mm512_maskz_fmsubadd_round_pd1067 // CHECK: fneg <8 x double> %{{.*}}1068 // CHECK: @llvm.x86.avx512.vfmaddsub.pd.5121069 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1070 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer1071 return _mm512_maskz_fmsubadd_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1072}1073__m512d test_mm512_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C) {1074 // CHECK-LABEL: test_mm512_fmaddsub_pd1075 // CHECK-NOT: fneg1076 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}, i32 4)1077 return _mm512_fmaddsub_pd(__A, __B, __C);1078}1079__m512d test_mm512_mask_fmaddsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {1080 // CHECK-LABEL: test_mm512_mask_fmaddsub_pd1081 // CHECK-NOT: fneg1082 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}, i32 4)1083 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1084 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1085 return _mm512_mask_fmaddsub_pd(__A, __U, __B, __C);1086}1087__m512d test_mm512_mask3_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {1088 // CHECK-LABEL: test_mm512_mask3_fmaddsub_pd1089 // CHECK-NOT: fneg1090 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}, i32 4)1091 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1092 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1093 return _mm512_mask3_fmaddsub_pd(__A, __B, __C, __U);1094}1095__m512d test_mm512_maskz_fmaddsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {1096 // CHECK-LABEL: test_mm512_maskz_fmaddsub_pd1097 // CHECK-NOT: fneg1098 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}, i32 4)1099 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1100 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer1101 return _mm512_maskz_fmaddsub_pd(__U, __A, __B, __C);1102}1103__m512d test_mm512_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C) {1104 // CHECK-LABEL: test_mm512_fmsubadd_pd1105 // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}}1106 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]], i32 4)1107 return _mm512_fmsubadd_pd(__A, __B, __C);1108}1109__m512d test_mm512_mask_fmsubadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {1110 // CHECK-LABEL: test_mm512_mask_fmsubadd_pd1111 // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}}1112 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]], i32 4)1113 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1114 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1115 return _mm512_mask_fmsubadd_pd(__A, __U, __B, __C);1116}1117__m512d test_mm512_maskz_fmsubadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {1118 // CHECK-LABEL: test_mm512_maskz_fmsubadd_pd1119 // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}}1120 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]], i32 4)1121 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1122 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> zeroinitializer1123 return _mm512_maskz_fmsubadd_pd(__U, __A, __B, __C);1124}1125__m512 test_mm512_fmaddsub_round_ps(__m512 __A, __m512 __B, __m512 __C) {1126 // CHECK-LABEL: test_mm512_fmaddsub_round_ps1127 // CHECK: @llvm.x86.avx512.vfmaddsub.ps.5121128 return _mm512_fmaddsub_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1129}1130__m512 test_mm512_mask_fmaddsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {1131 // CHECK-LABEL: test_mm512_mask_fmaddsub_round_ps1132 // CHECK: @llvm.x86.avx512.vfmaddsub.ps.5121133 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1134 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1135 return _mm512_mask_fmaddsub_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1136}1137__m512 test_mm512_mask3_fmaddsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {1138 // CHECK-LABEL: test_mm512_mask3_fmaddsub_round_ps1139 // CHECK: @llvm.x86.avx512.vfmaddsub.ps.5121140 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1141 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1142 return _mm512_mask3_fmaddsub_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1143}1144__m512 test_mm512_maskz_fmaddsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {1145 // CHECK-LABEL: test_mm512_maskz_fmaddsub_round_ps1146 // CHECK: @llvm.x86.avx512.vfmaddsub.ps.5121147 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1148 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer1149 return _mm512_maskz_fmaddsub_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1150}1151__m512 test_mm512_fmsubadd_round_ps(__m512 __A, __m512 __B, __m512 __C) {1152 // CHECK-LABEL: test_mm512_fmsubadd_round_ps1153 // CHECK: fneg <16 x float> %{{.*}}1154 // CHECK: @llvm.x86.avx512.vfmaddsub.ps.5121155 return _mm512_fmsubadd_round_ps(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1156}1157__m512 test_mm512_mask_fmsubadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {1158 // CHECK-LABEL: test_mm512_mask_fmsubadd_round_ps1159 // CHECK: fneg <16 x float> %{{.*}}1160 // CHECK: @llvm.x86.avx512.vfmaddsub.ps.5121161 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1162 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1163 return _mm512_mask_fmsubadd_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1164}1165__m512 test_mm512_maskz_fmsubadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {1166 // CHECK-LABEL: test_mm512_maskz_fmsubadd_round_ps1167 // CHECK: fneg <16 x float> %{{.*}}1168 // CHECK: @llvm.x86.avx512.vfmaddsub.ps.5121169 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1170 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer1171 return _mm512_maskz_fmsubadd_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1172}1173__m512 test_mm512_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C) {1174 // CHECK-LABEL: test_mm512_fmaddsub_ps1175 // CHECK-NOT: fneg1176 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}, i32 4)1177 return _mm512_fmaddsub_ps(__A, __B, __C);1178}1179__m512 test_mm512_mask_fmaddsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {1180 // CHECK-LABEL: test_mm512_mask_fmaddsub_ps1181 // CHECK-NOT: fneg1182 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}, i32 4)1183 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1184 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1185 return _mm512_mask_fmaddsub_ps(__A, __U, __B, __C);1186}1187__m512 test_mm512_mask3_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {1188 // CHECK-LABEL: test_mm512_mask3_fmaddsub_ps1189 // CHECK-NOT: fneg1190 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}, i32 4)1191 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1192 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1193 return _mm512_mask3_fmaddsub_ps(__A, __B, __C, __U);1194}1195__m512 test_mm512_maskz_fmaddsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {1196 // CHECK-LABEL: test_mm512_maskz_fmaddsub_ps1197 // CHECK-NOT: fneg1198 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}, i32 4)1199 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1200 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer1201 return _mm512_maskz_fmaddsub_ps(__U, __A, __B, __C);1202}1203__m512 test_mm512_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C) {1204 // CHECK-LABEL: test_mm512_fmsubadd_ps1205 // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}}1206 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]], i32 4)1207 return _mm512_fmsubadd_ps(__A, __B, __C);1208}1209__m512 test_mm512_mask_fmsubadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {1210 // CHECK-LABEL: test_mm512_mask_fmsubadd_ps1211 // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}}1212 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]], i32 4)1213 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1214 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1215 return _mm512_mask_fmsubadd_ps(__A, __U, __B, __C);1216}1217__m512 test_mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {1218 // CHECK-LABEL: test_mm512_maskz_fmsubadd_ps1219 // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}}1220 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]], i32 4)1221 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1222 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> zeroinitializer1223 return _mm512_maskz_fmsubadd_ps(__U, __A, __B, __C);1224}1225__m512d test_mm512_mask3_fmsub_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {1226 // CHECK-LABEL: test_mm512_mask3_fmsub_round_pd1227 // CHECK: fneg <8 x double> %{{.*}}1228 // CHECK: @llvm.x86.avx512.vfmadd.pd.5121229 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1230 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1231 return _mm512_mask3_fmsub_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1232}1233__m512 test_mm512_mask3_fmsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {1234 // CHECK-LABEL: test_mm512_mask3_fmsub_round_ps1235 // CHECK: fneg <16 x float> %{{.*}}1236 // CHECK: @llvm.x86.avx512.vfmadd.ps.5121237 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1238 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1239 return _mm512_mask3_fmsub_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1240}1241__m512d test_mm512_mask3_fmsubadd_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {1242 // CHECK-LABEL: test_mm512_mask3_fmsubadd_round_pd1243 // CHECK: fneg <8 x double> %{{.*}}1244 // CHECK: @llvm.x86.avx512.vfmaddsub.pd.5121245 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1246 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1247 return _mm512_mask3_fmsubadd_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1248}1249__m512d test_mm512_mask3_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {1250 // CHECK-LABEL: test_mm512_mask3_fmsubadd_pd1251 // CHECK: [[NEG:%.+]] = fneg <8 x double> %{{.*}}1252 // CHECK: call {{.*}}<8 x double> @llvm.x86.avx512.vfmaddsub.pd.512(<8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]], i32 4)1253 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1254 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1255 return _mm512_mask3_fmsubadd_pd(__A, __B, __C, __U);1256}1257__m512 test_mm512_mask3_fmsubadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {1258 // CHECK-LABEL: test_mm512_mask3_fmsubadd_round_ps1259 // CHECK: fneg <16 x float> %{{.*}}1260 // CHECK: @llvm.x86.avx512.vfmaddsub.ps.5121261 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1262 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1263 return _mm512_mask3_fmsubadd_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1264}1265__m512 test_mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {1266 // CHECK-LABEL: test_mm512_mask3_fmsubadd_ps1267 // CHECK: [[NEG:%.+]] = fneg <16 x float> %{{.*}}1268 // CHECK: call {{.*}}<16 x float> @llvm.x86.avx512.vfmaddsub.ps.512(<16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]], i32 4)1269 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1270 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1271 return _mm512_mask3_fmsubadd_ps(__A, __B, __C, __U);1272}1273__m512d test_mm512_mask_fnmadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {1274 // CHECK-LABEL: test_mm512_mask_fnmadd_round_pd1275 // CHECK: fneg <8 x double>1276 // CHECK: @llvm.x86.avx512.vfmadd.pd.5121277 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1278 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1279 return _mm512_mask_fnmadd_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1280}1281__m512 test_mm512_mask_fnmadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {1282 // CHECK-LABEL: test_mm512_mask_fnmadd_round_ps1283 // CHECK: fneg <16 x float> %{{.*}}1284 // CHECK: @llvm.x86.avx512.vfmadd.ps.5121285 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1286 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1287 return _mm512_mask_fnmadd_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1288}1289__m512d test_mm512_mask_fnmsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {1290 // CHECK-LABEL: test_mm512_mask_fnmsub_round_pd1291 // CHECK: fneg <8 x double>1292 // CHECK: fneg <8 x double>1293 // CHECK: @llvm.x86.avx512.vfmadd.pd.5121294 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1295 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1296 return _mm512_mask_fnmsub_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1297}1298__m512d test_mm512_mask3_fnmsub_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {1299 // CHECK-LABEL: test_mm512_mask3_fnmsub_round_pd1300 // CHECK: fneg <8 x double>1301 // CHECK: fneg <8 x double>1302 // CHECK: @llvm.x86.avx512.vfmadd.pd.5121303 // CHECK: bitcast i8 %{{.*}} to <8 x i1>1304 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}1305 return _mm512_mask3_fnmsub_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1306}1307__m512 test_mm512_mask_fnmsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {1308 // CHECK-LABEL: test_mm512_mask_fnmsub_round_ps1309 // CHECK: fneg <16 x float> %{{.*}}1310 // CHECK: fneg <16 x float> %{{.*}}1311 // CHECK: @llvm.x86.avx512.vfmadd.ps.5121312 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1313 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1314 return _mm512_mask_fnmsub_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1315}1316__m512 test_mm512_mask3_fnmsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {1317 // CHECK-LABEL: test_mm512_mask3_fnmsub_round_ps1318 // CHECK: fneg <16 x float> %{{.*}}1319 // CHECK: fneg <16 x float> %{{.*}}1320 // CHECK: @llvm.x86.avx512.vfmadd.ps.5121321 // CHECK: bitcast i16 %{{.*}} to <16 x i1>1322 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}1323 return _mm512_mask3_fnmsub_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1324}1325 1326__mmask16 test_mm512_cmpeq_epi32_mask(__m512i __a, __m512i __b) {1327 // CHECK-LABEL: test_mm512_cmpeq_epi32_mask1328 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}1329 return (__mmask16)_mm512_cmpeq_epi32_mask(__a, __b);1330}1331 1332__mmask16 test_mm512_mask_cmpeq_epi32_mask(__mmask16 __u, __m512i __a, __m512i __b) {1333 // CHECK-LABEL: test_mm512_mask_cmpeq_epi32_mask1334 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}1335 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}1336 return (__mmask16)_mm512_mask_cmpeq_epi32_mask(__u, __a, __b);1337}1338 1339__mmask8 test_mm512_mask_cmpeq_epi64_mask(__mmask8 __u, __m512i __a, __m512i __b) {1340 // CHECK-LABEL: test_mm512_mask_cmpeq_epi64_mask1341 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}1342 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}1343 return (__mmask8)_mm512_mask_cmpeq_epi64_mask(__u, __a, __b);1344}1345 1346__mmask8 test_mm512_cmpeq_epi64_mask(__m512i __a, __m512i __b) {1347 // CHECK-LABEL: test_mm512_cmpeq_epi64_mask1348 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}1349 return (__mmask8)_mm512_cmpeq_epi64_mask(__a, __b);1350}1351 1352__mmask16 test_mm512_cmpgt_epi32_mask(__m512i __a, __m512i __b) {1353 // CHECK-LABEL: test_mm512_cmpgt_epi32_mask1354 // CHECK: icmp sgt <16 x i32> %{{.*}}, %{{.*}}1355 return (__mmask16)_mm512_cmpgt_epi32_mask(__a, __b);1356}1357 1358__mmask16 test_mm512_mask_cmpgt_epi32_mask(__mmask16 __u, __m512i __a, __m512i __b) {1359 // CHECK-LABEL: test_mm512_mask_cmpgt_epi32_mask1360 // CHECK: icmp sgt <16 x i32> %{{.*}}, %{{.*}}1361 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}1362 return (__mmask16)_mm512_mask_cmpgt_epi32_mask(__u, __a, __b);1363}1364 1365__mmask8 test_mm512_mask_cmpgt_epi64_mask(__mmask8 __u, __m512i __a, __m512i __b) {1366 // CHECK-LABEL: test_mm512_mask_cmpgt_epi64_mask1367 // CHECK: icmp sgt <8 x i64> %{{.*}}, %{{.*}}1368 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}1369 return (__mmask8)_mm512_mask_cmpgt_epi64_mask(__u, __a, __b);1370}1371 1372__mmask8 test_mm512_cmpgt_epi64_mask(__m512i __a, __m512i __b) {1373 // CHECK-LABEL: test_mm512_cmpgt_epi64_mask1374 // CHECK: icmp sgt <8 x i64> %{{.*}}, %{{.*}}1375 return (__mmask8)_mm512_cmpgt_epi64_mask(__a, __b);1376}1377 1378__m512d test_mm512_unpackhi_pd(__m512d a, __m512d b)1379{1380 // CHECK-LABEL: test_mm512_unpackhi_pd1381 // CHECK: shufflevector <8 x double> {{.*}} <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>1382 return _mm512_unpackhi_pd(a, b);1383}1384TEST_CONSTEXPR(match_m512d(_mm512_unpackhi_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}), +2.0, +10.0, +4.0, +12.0, +6.0, +14.0, +8.0, +16.0));1385 1386__m512d test_mm512_unpacklo_pd(__m512d a, __m512d b)1387{1388 // CHECK-LABEL: test_mm512_unpacklo_pd1389 // CHECK: shufflevector <8 x double> {{.*}} <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>1390 return _mm512_unpacklo_pd(a, b);1391}1392TEST_CONSTEXPR(match_m512d(_mm512_unpacklo_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}), +1.0, +9.0, +3.0, +11.0, +5.0, +13.0, +7.0, +15.0));1393 1394__m512 test_mm512_unpackhi_ps(__m512 a, __m512 b)1395{1396 // CHECK-LABEL: test_mm512_unpackhi_ps1397 // CHECK: shufflevector <16 x float> {{.*}} <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>1398 return _mm512_unpackhi_ps(a, b);1399}1400TEST_CONSTEXPR(match_m512(_mm512_unpackhi_ps((__m512){0.0f, 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f}, (__m512){16.0f, 17.0f, 18.0f, 19.0f, 20.0f, 21.0f, 22.0f, 23.0f, 24.0f, 25.0f, 26.0f, 27.0f, 28.0f, 29.0f, 30.0f, 31.0f}), +2.0f, +18.0f, +3.0f, +19.0f, +6.0f, +22.0f, +7.0f, +23.0f, +10.0f, +26.0f, +11.0f, +27.0f, +14.0f, +30.0f, +15.0f, +31.0f));1401 1402__m512 test_mm512_unpacklo_ps(__m512 a, __m512 b)1403{1404 // CHECK-LABEL: test_mm512_unpacklo_ps1405 // CHECK: shufflevector <16 x float> {{.*}} <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>1406 return _mm512_unpacklo_ps(a, b);1407}1408TEST_CONSTEXPR(match_m512(_mm512_unpacklo_ps((__m512){0.0f, 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f}, (__m512){16.0f, 17.0f, 18.0f, 19.0f, 20.0f, 21.0f, 22.0f, 23.0f, 24.0f, 25.0f, 26.0f, 27.0f, 28.0f, 29.0f, 30.0f, 31.0f}), +0.0f, +16.0f, +1.0f, +17.0f, +4.0f, +20.0f, +5.0f, +21.0f, +8.0f, +24.0f, +9.0f, +25.0f, +12.0f, +28.0f, +13.0f, +29.0f));1409 1410__mmask16 test_mm512_cmp_round_ps_mask(__m512 a, __m512 b) {1411 // CHECK-LABEL: test_mm512_cmp_round_ps_mask1412 // CHECK: fcmp oeq <16 x float> %{{.*}}, %{{.*}}1413 return _mm512_cmp_round_ps_mask(a, b, _CMP_EQ_OQ, _MM_FROUND_NO_EXC);1414}1415 1416__mmask16 test_mm512_mask_cmp_round_ps_mask(__mmask16 m, __m512 a, __m512 b) {1417 // CHECK-LABEL: test_mm512_mask_cmp_round_ps_mask1418 // CHECK: [[CMP:%.*]] = fcmp oeq <16 x float> %{{.*}}, %{{.*}}1419 // CHECK: and <16 x i1> [[CMP]], {{.*}}1420 return _mm512_mask_cmp_round_ps_mask(m, a, b, _CMP_EQ_OQ, _MM_FROUND_NO_EXC);1421}1422 1423__mmask16 test_mm512_cmp_ps_mask_eq_oq(__m512 a, __m512 b) {1424 // CHECK-LABEL: test_mm512_cmp_ps_mask_eq_oq1425 // CHECK: fcmp oeq <16 x float> %{{.*}}, %{{.*}}1426 return _mm512_cmp_ps_mask(a, b, _CMP_EQ_OQ);1427}1428 1429__mmask16 test_mm512_cmp_ps_mask_lt_os(__m512 a, __m512 b) {1430 // CHECK-LABEL: test_mm512_cmp_ps_mask_lt_os1431 // CHECK: fcmp olt <16 x float> %{{.*}}, %{{.*}}1432 return _mm512_cmp_ps_mask(a, b, _CMP_LT_OS);1433}1434 1435__mmask16 test_mm512_cmp_ps_mask_le_os(__m512 a, __m512 b) {1436 // CHECK-LABEL: test_mm512_cmp_ps_mask_le_os1437 // CHECK: fcmp ole <16 x float> %{{.*}}, %{{.*}}1438 return _mm512_cmp_ps_mask(a, b, _CMP_LE_OS);1439}1440 1441__mmask16 test_mm512_cmp_ps_mask_unord_q(__m512 a, __m512 b) {1442 // CHECK-LABEL: test_mm512_cmp_ps_mask_unord_q1443 // CHECK: fcmp uno <16 x float> %{{.*}}, %{{.*}}1444 return _mm512_cmp_ps_mask(a, b, _CMP_UNORD_Q);1445}1446 1447__mmask16 test_mm512_cmp_ps_mask_neq_uq(__m512 a, __m512 b) {1448 // CHECK-LABEL: test_mm512_cmp_ps_mask_neq_uq1449 // CHECK: fcmp une <16 x float> %{{.*}}, %{{.*}}1450 return _mm512_cmp_ps_mask(a, b, _CMP_NEQ_UQ);1451}1452 1453__mmask16 test_mm512_cmp_ps_mask_nlt_us(__m512 a, __m512 b) {1454 // CHECK-LABEL: test_mm512_cmp_ps_mask_nlt_us1455 // CHECK: fcmp uge <16 x float> %{{.*}}, %{{.*}}1456 return _mm512_cmp_ps_mask(a, b, _CMP_NLT_US);1457}1458 1459__mmask16 test_mm512_cmp_ps_mask_nle_us(__m512 a, __m512 b) {1460 // CHECK-LABEL: test_mm512_cmp_ps_mask_nle_us1461 // CHECK: fcmp ugt <16 x float> %{{.*}}, %{{.*}}1462 return _mm512_cmp_ps_mask(a, b, _CMP_NLE_US);1463}1464 1465__mmask16 test_mm512_cmp_ps_mask_ord_q(__m512 a, __m512 b) {1466 // CHECK-LABEL: test_mm512_cmp_ps_mask_ord_q1467 // CHECK: fcmp ord <16 x float> %{{.*}}, %{{.*}}1468 return _mm512_cmp_ps_mask(a, b, _CMP_ORD_Q);1469}1470 1471__mmask16 test_mm512_cmp_ps_mask_eq_uq(__m512 a, __m512 b) {1472 // CHECK-LABEL: test_mm512_cmp_ps_mask_eq_uq1473 // CHECK: fcmp ueq <16 x float> %{{.*}}, %{{.*}}1474 return _mm512_cmp_ps_mask(a, b, _CMP_EQ_UQ);1475}1476 1477__mmask16 test_mm512_cmp_ps_mask_nge_us(__m512 a, __m512 b) {1478 // CHECK-LABEL: test_mm512_cmp_ps_mask_nge_us1479 // CHECK: fcmp ult <16 x float> %{{.*}}, %{{.*}}1480 return _mm512_cmp_ps_mask(a, b, _CMP_NGE_US);1481}1482 1483__mmask16 test_mm512_cmp_ps_mask_ngt_us(__m512 a, __m512 b) {1484 // CHECK-LABEL: test_mm512_cmp_ps_mask_ngt_us1485 // CHECK: fcmp ule <16 x float> %{{.*}}, %{{.*}}1486 return _mm512_cmp_ps_mask(a, b, _CMP_NGT_US);1487}1488 1489__mmask16 test_mm512_cmp_ps_mask_false_oq(__m512 a, __m512 b) {1490 // CHECK-LABEL: test_mm512_cmp_ps_mask_false_oq1491 // CHECK: fcmp false <16 x float> %{{.*}}, %{{.*}}1492 return _mm512_cmp_ps_mask(a, b, _CMP_FALSE_OQ);1493}1494 1495__mmask16 test_mm512_cmp_ps_mask_neq_oq(__m512 a, __m512 b) {1496 // CHECK-LABEL: test_mm512_cmp_ps_mask_neq_oq1497 // CHECK: fcmp one <16 x float> %{{.*}}, %{{.*}}1498 return _mm512_cmp_ps_mask(a, b, _CMP_NEQ_OQ);1499}1500 1501__mmask16 test_mm512_cmp_ps_mask_ge_os(__m512 a, __m512 b) {1502 // CHECK-LABEL: test_mm512_cmp_ps_mask_ge_os1503 // CHECK: fcmp oge <16 x float> %{{.*}}, %{{.*}}1504 return _mm512_cmp_ps_mask(a, b, _CMP_GE_OS);1505}1506 1507__mmask16 test_mm512_cmp_ps_mask_gt_os(__m512 a, __m512 b) {1508 // CHECK-LABEL: test_mm512_cmp_ps_mask_gt_os1509 // CHECK: fcmp ogt <16 x float> %{{.*}}, %{{.*}}1510 return _mm512_cmp_ps_mask(a, b, _CMP_GT_OS);1511}1512 1513__mmask16 test_mm512_cmp_ps_mask_true_uq(__m512 a, __m512 b) {1514 // CHECK-LABEL: test_mm512_cmp_ps_mask_true_uq1515 // CHECK: fcmp true <16 x float> %{{.*}}, %{{.*}}1516 return _mm512_cmp_ps_mask(a, b, _CMP_TRUE_UQ);1517}1518 1519__mmask16 test_mm512_cmp_ps_mask_eq_os(__m512 a, __m512 b) {1520 // CHECK-LABEL: test_mm512_cmp_ps_mask_eq_os1521 // CHECK: fcmp oeq <16 x float> %{{.*}}, %{{.*}}1522 return _mm512_cmp_ps_mask(a, b, _CMP_EQ_OS);1523}1524 1525__mmask16 test_mm512_cmp_ps_mask_lt_oq(__m512 a, __m512 b) {1526 // CHECK-LABEL: test_mm512_cmp_ps_mask_lt_oq1527 // CHECK: fcmp olt <16 x float> %{{.*}}, %{{.*}}1528 return _mm512_cmp_ps_mask(a, b, _CMP_LT_OQ);1529}1530 1531__mmask16 test_mm512_cmp_ps_mask_le_oq(__m512 a, __m512 b) {1532 // CHECK-LABEL: test_mm512_cmp_ps_mask_le_oq1533 // CHECK: fcmp ole <16 x float> %{{.*}}, %{{.*}}1534 return _mm512_cmp_ps_mask(a, b, _CMP_LE_OQ);1535}1536 1537__mmask16 test_mm512_cmp_ps_mask_unord_s(__m512 a, __m512 b) {1538 // CHECK-LABEL: test_mm512_cmp_ps_mask_unord_s1539 // CHECK: fcmp uno <16 x float> %{{.*}}, %{{.*}}1540 return _mm512_cmp_ps_mask(a, b, _CMP_UNORD_S);1541}1542 1543__mmask16 test_mm512_cmp_ps_mask_neq_us(__m512 a, __m512 b) {1544 // CHECK-LABEL: test_mm512_cmp_ps_mask_neq_us1545 // CHECK: fcmp une <16 x float> %{{.*}}, %{{.*}}1546 return _mm512_cmp_ps_mask(a, b, _CMP_NEQ_US);1547}1548 1549__mmask16 test_mm512_cmp_ps_mask_nlt_uq(__m512 a, __m512 b) {1550 // CHECK-LABEL: test_mm512_cmp_ps_mask_nlt_uq1551 // CHECK: fcmp uge <16 x float> %{{.*}}, %{{.*}}1552 return _mm512_cmp_ps_mask(a, b, _CMP_NLT_UQ);1553}1554 1555__mmask16 test_mm512_cmp_ps_mask_nle_uq(__m512 a, __m512 b) {1556 // CHECK-LABEL: test_mm512_cmp_ps_mask_nle_uq1557 // CHECK: fcmp ugt <16 x float> %{{.*}}, %{{.*}}1558 return _mm512_cmp_ps_mask(a, b, _CMP_NLE_UQ);1559}1560 1561__mmask16 test_mm512_cmp_ps_mask_ord_s(__m512 a, __m512 b) {1562 // CHECK-LABEL: test_mm512_cmp_ps_mask_ord_s1563 // CHECK: fcmp ord <16 x float> %{{.*}}, %{{.*}}1564 return _mm512_cmp_ps_mask(a, b, _CMP_ORD_S);1565}1566 1567__mmask16 test_mm512_cmp_ps_mask_eq_us(__m512 a, __m512 b) {1568 // CHECK-LABEL: test_mm512_cmp_ps_mask_eq_us1569 // CHECK: fcmp ueq <16 x float> %{{.*}}, %{{.*}}1570 return _mm512_cmp_ps_mask(a, b, _CMP_EQ_US);1571}1572 1573__mmask16 test_mm512_cmp_ps_mask_nge_uq(__m512 a, __m512 b) {1574 // CHECK-LABEL: test_mm512_cmp_ps_mask_nge_uq1575 // CHECK: fcmp ult <16 x float> %{{.*}}, %{{.*}}1576 return _mm512_cmp_ps_mask(a, b, _CMP_NGE_UQ);1577}1578 1579__mmask16 test_mm512_cmp_ps_mask_ngt_uq(__m512 a, __m512 b) {1580 // CHECK-LABEL: test_mm512_cmp_ps_mask_ngt_uq1581 // CHECK: fcmp ule <16 x float> %{{.*}}, %{{.*}}1582 return _mm512_cmp_ps_mask(a, b, _CMP_NGT_UQ);1583}1584 1585__mmask16 test_mm512_cmp_ps_mask_false_os(__m512 a, __m512 b) {1586 // CHECK-LABEL: test_mm512_cmp_ps_mask_false_os1587 // CHECK: fcmp false <16 x float> %{{.*}}, %{{.*}}1588 return _mm512_cmp_ps_mask(a, b, _CMP_FALSE_OS);1589}1590 1591__mmask16 test_mm512_cmp_ps_mask_neq_os(__m512 a, __m512 b) {1592 // CHECK-LABEL: test_mm512_cmp_ps_mask_neq_os1593 // CHECK: fcmp one <16 x float> %{{.*}}, %{{.*}}1594 return _mm512_cmp_ps_mask(a, b, _CMP_NEQ_OS);1595}1596 1597__mmask16 test_mm512_cmp_ps_mask_ge_oq(__m512 a, __m512 b) {1598 // CHECK-LABEL: test_mm512_cmp_ps_mask_ge_oq1599 // CHECK: fcmp oge <16 x float> %{{.*}}, %{{.*}}1600 return _mm512_cmp_ps_mask(a, b, _CMP_GE_OQ);1601}1602 1603__mmask16 test_mm512_cmp_ps_mask_gt_oq(__m512 a, __m512 b) {1604 // CHECK-LABEL: test_mm512_cmp_ps_mask_gt_oq1605 // CHECK: fcmp ogt <16 x float> %{{.*}}, %{{.*}}1606 return _mm512_cmp_ps_mask(a, b, _CMP_GT_OQ);1607}1608 1609__mmask16 test_mm512_cmp_ps_mask_true_us(__m512 a, __m512 b) {1610 // CHECK-LABEL: test_mm512_cmp_ps_mask_true_us1611 // CHECK: fcmp true <16 x float> %{{.*}}, %{{.*}}1612 return _mm512_cmp_ps_mask(a, b, _CMP_TRUE_US);1613}1614 1615__mmask16 test_mm512_mask_cmp_ps_mask_eq_oq(__mmask16 m, __m512 a, __m512 b) {1616 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_eq_oq1617 // CHECK: [[CMP:%.*]] = fcmp oeq <16 x float> %{{.*}}, %{{.*}}1618 // CHECK: and <16 x i1> [[CMP]], {{.*}}1619 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_EQ_OQ);1620}1621 1622__mmask16 test_mm512_mask_cmp_ps_mask_lt_os(__mmask16 m, __m512 a, __m512 b) {1623 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_lt_os1624 // CHECK: [[CMP:%.*]] = fcmp olt <16 x float> %{{.*}}, %{{.*}}1625 // CHECK: and <16 x i1> [[CMP]], {{.*}}1626 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_LT_OS);1627}1628 1629__mmask16 test_mm512_mask_cmp_ps_mask_le_os(__mmask16 m, __m512 a, __m512 b) {1630 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_le_os1631 // CHECK: [[CMP:%.*]] = fcmp ole <16 x float> %{{.*}}, %{{.*}}1632 // CHECK: and <16 x i1> [[CMP]], {{.*}}1633 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_LE_OS);1634}1635 1636__mmask16 test_mm512_mask_cmp_ps_mask_unord_q(__mmask16 m, __m512 a, __m512 b) {1637 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_unord_q1638 // CHECK: [[CMP:%.*]] = fcmp uno <16 x float> %{{.*}}, %{{.*}}1639 // CHECK: and <16 x i1> [[CMP]], {{.*}}1640 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_UNORD_Q);1641}1642 1643__mmask16 test_mm512_mask_cmp_ps_mask_neq_uq(__mmask16 m, __m512 a, __m512 b) {1644 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_neq_uq1645 // CHECK: [[CMP:%.*]] = fcmp une <16 x float> %{{.*}}, %{{.*}}1646 // CHECK: and <16 x i1> [[CMP]], {{.*}}1647 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NEQ_UQ);1648}1649 1650__mmask16 test_mm512_mask_cmp_ps_mask_nlt_us(__mmask16 m, __m512 a, __m512 b) {1651 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_nlt_us1652 // CHECK: [[CMP:%.*]] = fcmp uge <16 x float> %{{.*}}, %{{.*}}1653 // CHECK: and <16 x i1> [[CMP]], {{.*}}1654 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NLT_US);1655}1656 1657__mmask16 test_mm512_mask_cmp_ps_mask_nle_us(__mmask16 m, __m512 a, __m512 b) {1658 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_nle_us1659 // CHECK: [[CMP:%.*]] = fcmp ugt <16 x float> %{{.*}}, %{{.*}}1660 // CHECK: and <16 x i1> [[CMP]], {{.*}}1661 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NLE_US);1662}1663 1664__mmask16 test_mm512_mask_cmp_ps_mask_ord_q(__mmask16 m, __m512 a, __m512 b) {1665 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_ord_q1666 // CHECK: [[CMP:%.*]] = fcmp ord <16 x float> %{{.*}}, %{{.*}}1667 // CHECK: and <16 x i1> [[CMP]], {{.*}}1668 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_ORD_Q);1669}1670 1671__mmask16 test_mm512_mask_cmp_ps_mask_eq_uq(__mmask16 m, __m512 a, __m512 b) {1672 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_eq_uq1673 // CHECK: [[CMP:%.*]] = fcmp ueq <16 x float> %{{.*}}, %{{.*}}1674 // CHECK: and <16 x i1> [[CMP]], {{.*}}1675 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_EQ_UQ);1676}1677 1678__mmask16 test_mm512_mask_cmp_ps_mask_nge_us(__mmask16 m, __m512 a, __m512 b) {1679 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_nge_us1680 // CHECK: [[CMP:%.*]] = fcmp ult <16 x float> %{{.*}}, %{{.*}}1681 // CHECK: and <16 x i1> [[CMP]], {{.*}}1682 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NGE_US);1683}1684 1685__mmask16 test_mm512_mask_cmp_ps_mask_ngt_us(__mmask16 m, __m512 a, __m512 b) {1686 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_ngt_us1687 // CHECK: [[CMP:%.*]] = fcmp ule <16 x float> %{{.*}}, %{{.*}}1688 // CHECK: and <16 x i1> [[CMP]], {{.*}}1689 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NGT_US);1690}1691 1692__mmask16 test_mm512_mask_cmp_ps_mask_false_oq(__mmask16 m, __m512 a, __m512 b) {1693 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_false_oq1694 // CHECK: [[CMP:%.*]] = fcmp false <16 x float> %{{.*}}, %{{.*}}1695 // CHECK: and <16 x i1> [[CMP]], {{.*}}1696 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_FALSE_OQ);1697}1698 1699__mmask16 test_mm512_mask_cmp_ps_mask_neq_oq(__mmask16 m, __m512 a, __m512 b) {1700 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_neq_oq1701 // CHECK: [[CMP:%.*]] = fcmp one <16 x float> %{{.*}}, %{{.*}}1702 // CHECK: and <16 x i1> [[CMP]], {{.*}}1703 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NEQ_OQ);1704}1705 1706__mmask16 test_mm512_mask_cmp_ps_mask_ge_os(__mmask16 m, __m512 a, __m512 b) {1707 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_ge_os1708 // CHECK: [[CMP:%.*]] = fcmp oge <16 x float> %{{.*}}, %{{.*}}1709 // CHECK: and <16 x i1> [[CMP]], {{.*}}1710 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_GE_OS);1711}1712 1713__mmask16 test_mm512_mask_cmp_ps_mask_gt_os(__mmask16 m, __m512 a, __m512 b) {1714 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_gt_os1715 // CHECK: [[CMP:%.*]] = fcmp ogt <16 x float> %{{.*}}, %{{.*}}1716 // CHECK: and <16 x i1> [[CMP]], {{.*}}1717 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_GT_OS);1718}1719 1720__mmask16 test_mm512_mask_cmp_ps_mask_true_uq(__mmask16 m, __m512 a, __m512 b) {1721 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_true_uq1722 // CHECK: [[CMP:%.*]] = fcmp true <16 x float> %{{.*}}, %{{.*}}1723 // CHECK: and <16 x i1> [[CMP]], {{.*}}1724 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_TRUE_UQ);1725}1726 1727__mmask16 test_mm512_mask_cmp_ps_mask_eq_os(__mmask16 m, __m512 a, __m512 b) {1728 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_eq_os1729 // CHECK: [[CMP:%.*]] = fcmp oeq <16 x float> %{{.*}}, %{{.*}}1730 // CHECK: and <16 x i1> [[CMP]], {{.*}}1731 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_EQ_OS);1732}1733 1734__mmask16 test_mm512_mask_cmp_ps_mask_lt_oq(__mmask16 m, __m512 a, __m512 b) {1735 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_lt_oq1736 // CHECK: [[CMP:%.*]] = fcmp olt <16 x float> %{{.*}}, %{{.*}}1737 // CHECK: and <16 x i1> [[CMP]], {{.*}}1738 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_LT_OQ);1739}1740 1741__mmask16 test_mm512_mask_cmp_ps_mask_le_oq(__mmask16 m, __m512 a, __m512 b) {1742 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_le_oq1743 // CHECK: [[CMP:%.*]] = fcmp ole <16 x float> %{{.*}}, %{{.*}}1744 // CHECK: and <16 x i1> [[CMP]], {{.*}}1745 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_LE_OQ);1746}1747 1748__mmask16 test_mm512_mask_cmp_ps_mask_unord_s(__mmask16 m, __m512 a, __m512 b) {1749 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_unord_s1750 // CHECK: [[CMP:%.*]] = fcmp uno <16 x float> %{{.*}}, %{{.*}}1751 // CHECK: and <16 x i1> [[CMP]], {{.*}}1752 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_UNORD_S);1753}1754 1755__mmask16 test_mm512_mask_cmp_ps_mask_neq_us(__mmask16 m, __m512 a, __m512 b) {1756 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_neq_us1757 // CHECK: [[CMP:%.*]] = fcmp une <16 x float> %{{.*}}, %{{.*}}1758 // CHECK: and <16 x i1> [[CMP]], {{.*}}1759 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NEQ_US);1760}1761 1762__mmask16 test_mm512_mask_cmp_ps_mask_nlt_uq(__mmask16 m, __m512 a, __m512 b) {1763 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_nlt_uq1764 // CHECK: [[CMP:%.*]] = fcmp uge <16 x float> %{{.*}}, %{{.*}}1765 // CHECK: and <16 x i1> [[CMP]], {{.*}}1766 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NLT_UQ);1767}1768 1769__mmask16 test_mm512_mask_cmp_ps_mask_nle_uq(__mmask16 m, __m512 a, __m512 b) {1770 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_nle_uq1771 // CHECK: [[CMP:%.*]] = fcmp ugt <16 x float> %{{.*}}, %{{.*}}1772 // CHECK: and <16 x i1> [[CMP]], {{.*}}1773 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NLE_UQ);1774}1775 1776__mmask16 test_mm512_mask_cmp_ps_mask_ord_s(__mmask16 m, __m512 a, __m512 b) {1777 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_ord_s1778 // CHECK: [[CMP:%.*]] = fcmp ord <16 x float> %{{.*}}, %{{.*}}1779 // CHECK: and <16 x i1> [[CMP]], {{.*}}1780 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_ORD_S);1781}1782 1783__mmask16 test_mm512_mask_cmp_ps_mask_eq_us(__mmask16 m, __m512 a, __m512 b) {1784 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_eq_us1785 // CHECK: [[CMP:%.*]] = fcmp ueq <16 x float> %{{.*}}, %{{.*}}1786 // CHECK: and <16 x i1> [[CMP]], {{.*}}1787 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_EQ_US);1788}1789 1790__mmask16 test_mm512_mask_cmp_ps_mask_nge_uq(__mmask16 m, __m512 a, __m512 b) {1791 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_nge_uq1792 // CHECK: [[CMP:%.*]] = fcmp ult <16 x float> %{{.*}}, %{{.*}}1793 // CHECK: and <16 x i1> [[CMP]], {{.*}}1794 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NGE_UQ);1795}1796 1797__mmask16 test_mm512_mask_cmp_ps_mask_ngt_uq(__mmask16 m, __m512 a, __m512 b) {1798 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_ngt_uq1799 // CHECK: [[CMP:%.*]] = fcmp ule <16 x float> %{{.*}}, %{{.*}}1800 // CHECK: and <16 x i1> [[CMP]], {{.*}}1801 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NGT_UQ);1802}1803 1804__mmask16 test_mm512_mask_cmp_ps_mask_false_os(__mmask16 m, __m512 a, __m512 b) {1805 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_false_os1806 // CHECK: [[CMP:%.*]] = fcmp false <16 x float> %{{.*}}, %{{.*}}1807 // CHECK: and <16 x i1> [[CMP]], {{.*}}1808 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_FALSE_OS);1809}1810 1811__mmask16 test_mm512_mask_cmp_ps_mask_neq_os(__mmask16 m, __m512 a, __m512 b) {1812 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_neq_os1813 // CHECK: [[CMP:%.*]] = fcmp one <16 x float> %{{.*}}, %{{.*}}1814 // CHECK: and <16 x i1> [[CMP]], {{.*}}1815 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_NEQ_OS);1816}1817 1818__mmask16 test_mm512_mask_cmp_ps_mask_ge_oq(__mmask16 m, __m512 a, __m512 b) {1819 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_ge_oq1820 // CHECK: [[CMP:%.*]] = fcmp oge <16 x float> %{{.*}}, %{{.*}}1821 // CHECK: and <16 x i1> [[CMP]], {{.*}}1822 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_GE_OQ);1823}1824 1825__mmask16 test_mm512_mask_cmp_ps_mask_gt_oq(__mmask16 m, __m512 a, __m512 b) {1826 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_gt_oq1827 // CHECK: [[CMP:%.*]] = fcmp ogt <16 x float> %{{.*}}, %{{.*}}1828 // CHECK: and <16 x i1> [[CMP]], {{.*}}1829 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_GT_OQ);1830}1831 1832__mmask16 test_mm512_mask_cmp_ps_mask_true_us(__mmask16 m, __m512 a, __m512 b) {1833 // CHECK-LABEL: test_mm512_mask_cmp_ps_mask_true_us1834 // CHECK: [[CMP:%.*]] = fcmp true <16 x float> %{{.*}}, %{{.*}}1835 // CHECK: and <16 x i1> [[CMP]], {{.*}}1836 return _mm512_mask_cmp_ps_mask(m, a, b, _CMP_TRUE_US);1837}1838 1839__mmask8 test_mm512_cmp_round_pd_mask(__m512d a, __m512d b) {1840 // CHECK-LABEL: test_mm512_cmp_round_pd_mask1841 // CHECK: [[CMP:%.*]] = fcmp oeq <8 x double> %{{.*}}, %{{.*}}1842 return _mm512_cmp_round_pd_mask(a, b, _CMP_EQ_OQ, _MM_FROUND_NO_EXC);1843}1844 1845__mmask8 test_mm512_mask_cmp_round_pd_mask(__mmask8 m, __m512d a, __m512d b) {1846 // CHECK-LABEL: test_mm512_mask_cmp_round_pd_mask1847 // CHECK: [[CMP:%.*]] = fcmp oeq <8 x double> %{{.*}}, %{{.*}}1848 // CHECK: and <8 x i1> [[CMP]], {{.*}}1849 return _mm512_mask_cmp_round_pd_mask(m, a, b, _CMP_EQ_OQ, _MM_FROUND_NO_EXC);1850}1851 1852__mmask8 test_mm512_cmp_pd_mask_eq_oq(__m512d a, __m512d b) {1853 // CHECK-LABEL: test_mm512_cmp_pd_mask_eq_oq1854 // CHECK: fcmp oeq <8 x double> %{{.*}}, %{{.*}}1855 return _mm512_cmp_pd_mask(a, b, _CMP_EQ_OQ);1856}1857 1858__mmask8 test_mm512_cmp_pd_mask_lt_os(__m512d a, __m512d b) {1859 // CHECK-LABEL: test_mm512_cmp_pd_mask_lt_os1860 // CHECK: fcmp olt <8 x double> %{{.*}}, %{{.*}}1861 return _mm512_cmp_pd_mask(a, b, _CMP_LT_OS);1862}1863 1864__mmask8 test_mm512_cmp_pd_mask_le_os(__m512d a, __m512d b) {1865 // CHECK-LABEL: test_mm512_cmp_pd_mask_le_os1866 // CHECK: fcmp ole <8 x double> %{{.*}}, %{{.*}}1867 return _mm512_cmp_pd_mask(a, b, _CMP_LE_OS);1868}1869 1870__mmask8 test_mm512_cmp_pd_mask_unord_q(__m512d a, __m512d b) {1871 // CHECK-LABEL: test_mm512_cmp_pd_mask_unord_q1872 // CHECK: fcmp uno <8 x double> %{{.*}}, %{{.*}}1873 return _mm512_cmp_pd_mask(a, b, _CMP_UNORD_Q);1874}1875 1876__mmask8 test_mm512_cmp_pd_mask_neq_uq(__m512d a, __m512d b) {1877 // CHECK-LABEL: test_mm512_cmp_pd_mask_neq_uq1878 // CHECK: fcmp une <8 x double> %{{.*}}, %{{.*}}1879 return _mm512_cmp_pd_mask(a, b, _CMP_NEQ_UQ);1880}1881 1882__mmask8 test_mm512_cmp_pd_mask_nlt_us(__m512d a, __m512d b) {1883 // CHECK-LABEL: test_mm512_cmp_pd_mask_nlt_us1884 // CHECK: fcmp uge <8 x double> %{{.*}}, %{{.*}}1885 return _mm512_cmp_pd_mask(a, b, _CMP_NLT_US);1886}1887 1888__mmask8 test_mm512_cmp_pd_mask_nle_us(__m512d a, __m512d b) {1889 // CHECK-LABEL: test_mm512_cmp_pd_mask_nle_us1890 // CHECK: fcmp ugt <8 x double> %{{.*}}, %{{.*}}1891 return _mm512_cmp_pd_mask(a, b, _CMP_NLE_US);1892}1893 1894__mmask8 test_mm512_cmp_pd_mask_ord_q(__m512d a, __m512d b) {1895 // CHECK-LABEL: test_mm512_cmp_pd_mask_ord_q1896 // CHECK: fcmp ord <8 x double> %{{.*}}, %{{.*}}1897 return _mm512_cmp_pd_mask(a, b, _CMP_ORD_Q);1898}1899 1900__mmask8 test_mm512_cmp_pd_mask_eq_uq(__m512d a, __m512d b) {1901 // CHECK-LABEL: test_mm512_cmp_pd_mask_eq_uq1902 // CHECK: fcmp ueq <8 x double> %{{.*}}, %{{.*}}1903 return _mm512_cmp_pd_mask(a, b, _CMP_EQ_UQ);1904}1905 1906__mmask8 test_mm512_cmp_pd_mask_nge_us(__m512d a, __m512d b) {1907 // CHECK-LABEL: test_mm512_cmp_pd_mask_nge_us1908 // CHECK: fcmp ult <8 x double> %{{.*}}, %{{.*}}1909 return _mm512_cmp_pd_mask(a, b, _CMP_NGE_US);1910}1911 1912__mmask8 test_mm512_cmp_pd_mask_ngt_us(__m512d a, __m512d b) {1913 // CHECK-LABEL: test_mm512_cmp_pd_mask_ngt_us1914 // CHECK: fcmp ule <8 x double> %{{.*}}, %{{.*}}1915 return _mm512_cmp_pd_mask(a, b, _CMP_NGT_US);1916}1917 1918__mmask8 test_mm512_cmp_pd_mask_false_oq(__m512d a, __m512d b) {1919 // CHECK-LABEL: test_mm512_cmp_pd_mask_false_oq1920 // CHECK: fcmp false <8 x double> %{{.*}}, %{{.*}}1921 return _mm512_cmp_pd_mask(a, b, _CMP_FALSE_OQ);1922}1923 1924__mmask8 test_mm512_cmp_pd_mask_neq_oq(__m512d a, __m512d b) {1925 // CHECK-LABEL: test_mm512_cmp_pd_mask_neq_oq1926 // CHECK: fcmp one <8 x double> %{{.*}}, %{{.*}}1927 return _mm512_cmp_pd_mask(a, b, _CMP_NEQ_OQ);1928}1929 1930__mmask8 test_mm512_cmp_pd_mask_ge_os(__m512d a, __m512d b) {1931 // CHECK-LABEL: test_mm512_cmp_pd_mask_ge_os1932 // CHECK: fcmp oge <8 x double> %{{.*}}, %{{.*}}1933 return _mm512_cmp_pd_mask(a, b, _CMP_GE_OS);1934}1935 1936__mmask8 test_mm512_cmp_pd_mask_gt_os(__m512d a, __m512d b) {1937 // CHECK-LABEL: test_mm512_cmp_pd_mask_gt_os1938 // CHECK: fcmp ogt <8 x double> %{{.*}}, %{{.*}}1939 return _mm512_cmp_pd_mask(a, b, _CMP_GT_OS);1940}1941 1942__mmask8 test_mm512_cmp_pd_mask_true_uq(__m512d a, __m512d b) {1943 // CHECK-LABEL: test_mm512_cmp_pd_mask_true_uq1944 // CHECK: fcmp true <8 x double> %{{.*}}, %{{.*}}1945 return _mm512_cmp_pd_mask(a, b, _CMP_TRUE_UQ);1946}1947 1948__mmask8 test_mm512_cmp_pd_mask_eq_os(__m512d a, __m512d b) {1949 // CHECK-LABEL: test_mm512_cmp_pd_mask_eq_os1950 // CHECK: fcmp oeq <8 x double> %{{.*}}, %{{.*}}1951 return _mm512_cmp_pd_mask(a, b, _CMP_EQ_OS);1952}1953 1954__mmask8 test_mm512_cmp_pd_mask_lt_oq(__m512d a, __m512d b) {1955 // CHECK-LABEL: test_mm512_cmp_pd_mask_lt_oq1956 // CHECK: fcmp olt <8 x double> %{{.*}}, %{{.*}}1957 return _mm512_cmp_pd_mask(a, b, _CMP_LT_OQ);1958}1959 1960__mmask8 test_mm512_cmp_pd_mask_le_oq(__m512d a, __m512d b) {1961 // CHECK-LABEL: test_mm512_cmp_pd_mask_le_oq1962 // CHECK: fcmp ole <8 x double> %{{.*}}, %{{.*}}1963 return _mm512_cmp_pd_mask(a, b, _CMP_LE_OQ);1964}1965 1966__mmask8 test_mm512_cmp_pd_mask_unord_s(__m512d a, __m512d b) {1967 // CHECK-LABEL: test_mm512_cmp_pd_mask_unord_s1968 // CHECK: fcmp uno <8 x double> %{{.*}}, %{{.*}}1969 return _mm512_cmp_pd_mask(a, b, _CMP_UNORD_S);1970}1971 1972__mmask8 test_mm512_cmp_pd_mask_neq_us(__m512d a, __m512d b) {1973 // CHECK-LABEL: test_mm512_cmp_pd_mask_neq_us1974 // CHECK: fcmp une <8 x double> %{{.*}}, %{{.*}}1975 return _mm512_cmp_pd_mask(a, b, _CMP_NEQ_US);1976}1977 1978__mmask8 test_mm512_cmp_pd_mask_nlt_uq(__m512d a, __m512d b) {1979 // CHECK-LABEL: test_mm512_cmp_pd_mask_nlt_uq1980 // CHECK: fcmp uge <8 x double> %{{.*}}, %{{.*}}1981 return _mm512_cmp_pd_mask(a, b, _CMP_NLT_UQ);1982}1983 1984__mmask8 test_mm512_cmp_pd_mask_nle_uq(__m512d a, __m512d b) {1985 // CHECK-LABEL: test_mm512_cmp_pd_mask_nle_uq1986 // CHECK: fcmp ugt <8 x double> %{{.*}}, %{{.*}}1987 return _mm512_cmp_pd_mask(a, b, _CMP_NLE_UQ);1988}1989 1990__mmask8 test_mm512_cmp_pd_mask_ord_s(__m512d a, __m512d b) {1991 // CHECK-LABEL: test_mm512_cmp_pd_mask_ord_s1992 // CHECK: fcmp ord <8 x double> %{{.*}}, %{{.*}}1993 return _mm512_cmp_pd_mask(a, b, _CMP_ORD_S);1994}1995 1996__mmask8 test_mm512_cmp_pd_mask_eq_us(__m512d a, __m512d b) {1997 // CHECK-LABEL: test_mm512_cmp_pd_mask_eq_us1998 // CHECK: fcmp ueq <8 x double> %{{.*}}, %{{.*}}1999 return _mm512_cmp_pd_mask(a, b, _CMP_EQ_US);2000}2001 2002__mmask8 test_mm512_cmp_pd_mask_nge_uq(__m512d a, __m512d b) {2003 // CHECK-LABEL: test_mm512_cmp_pd_mask_nge_uq2004 // CHECK: fcmp ult <8 x double> %{{.*}}, %{{.*}}2005 return _mm512_cmp_pd_mask(a, b, _CMP_NGE_UQ);2006}2007 2008__mmask8 test_mm512_cmp_pd_mask_ngt_uq(__m512d a, __m512d b) {2009 // CHECK-LABEL: test_mm512_cmp_pd_mask_ngt_uq2010 // CHECK: fcmp ule <8 x double> %{{.*}}, %{{.*}}2011 return _mm512_cmp_pd_mask(a, b, _CMP_NGT_UQ);2012}2013 2014__mmask8 test_mm512_cmp_pd_mask_false_os(__m512d a, __m512d b) {2015 // CHECK-LABEL: test_mm512_cmp_pd_mask_false_os2016 // CHECK: fcmp false <8 x double> %{{.*}}, %{{.*}}2017 return _mm512_cmp_pd_mask(a, b, _CMP_FALSE_OS);2018}2019 2020__mmask8 test_mm512_cmp_pd_mask_neq_os(__m512d a, __m512d b) {2021 // CHECK-LABEL: test_mm512_cmp_pd_mask_neq_os2022 // CHECK: fcmp one <8 x double> %{{.*}}, %{{.*}}2023 return _mm512_cmp_pd_mask(a, b, _CMP_NEQ_OS);2024}2025 2026__mmask8 test_mm512_cmp_pd_mask_ge_oq(__m512d a, __m512d b) {2027 // CHECK-LABEL: test_mm512_cmp_pd_mask_ge_oq2028 // CHECK: fcmp oge <8 x double> %{{.*}}, %{{.*}}2029 return _mm512_cmp_pd_mask(a, b, _CMP_GE_OQ);2030}2031 2032__mmask8 test_mm512_cmp_pd_mask_gt_oq(__m512d a, __m512d b) {2033 // CHECK-LABEL: test_mm512_cmp_pd_mask_gt_oq2034 // CHECK: fcmp ogt <8 x double> %{{.*}}, %{{.*}}2035 return _mm512_cmp_pd_mask(a, b, _CMP_GT_OQ);2036}2037 2038__mmask8 test_mm512_cmp_pd_mask_true_us(__m512d a, __m512d b) {2039 // CHECK-LABEL: test_mm512_cmp_pd_mask_true_us2040 // CHECK: fcmp true <8 x double> %{{.*}}, %{{.*}}2041 return _mm512_cmp_pd_mask(a, b, _CMP_TRUE_US);2042}2043 2044__mmask8 test_mm512_mask_cmp_pd_mask_eq_oq(__mmask8 m, __m512d a, __m512d b) {2045 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_eq_oq2046 // CHECK: [[CMP:%.*]] = fcmp oeq <8 x double> %{{.*}}, %{{.*}}2047 // CHECK: and <8 x i1> [[CMP]], {{.*}}2048 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_EQ_OQ);2049}2050 2051__mmask8 test_mm512_mask_cmp_pd_mask_lt_os(__mmask8 m, __m512d a, __m512d b) {2052 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_lt_os2053 // CHECK: [[CMP:%.*]] = fcmp olt <8 x double> %{{.*}}, %{{.*}}2054 // CHECK: and <8 x i1> [[CMP]], {{.*}}2055 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_LT_OS);2056}2057 2058__mmask8 test_mm512_mask_cmp_pd_mask_le_os(__mmask8 m, __m512d a, __m512d b) {2059 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_le_os2060 // CHECK: [[CMP:%.*]] = fcmp ole <8 x double> %{{.*}}, %{{.*}}2061 // CHECK: and <8 x i1> [[CMP]], {{.*}}2062 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_LE_OS);2063}2064 2065__mmask8 test_mm512_mask_cmp_pd_mask_unord_q(__mmask8 m, __m512d a, __m512d b) {2066 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_unord_q2067 // CHECK: [[CMP:%.*]] = fcmp uno <8 x double> %{{.*}}, %{{.*}}2068 // CHECK: and <8 x i1> [[CMP]], {{.*}}2069 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_UNORD_Q);2070}2071 2072__mmask8 test_mm512_mask_cmp_pd_mask_neq_uq(__mmask8 m, __m512d a, __m512d b) {2073 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_neq_uq2074 // CHECK: [[CMP:%.*]] = fcmp une <8 x double> %{{.*}}, %{{.*}}2075 // CHECK: and <8 x i1> [[CMP]], {{.*}}2076 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NEQ_UQ);2077}2078 2079__mmask8 test_mm512_mask_cmp_pd_mask_nlt_us(__mmask8 m, __m512d a, __m512d b) {2080 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_nlt_us2081 // CHECK: [[CMP:%.*]] = fcmp uge <8 x double> %{{.*}}, %{{.*}}2082 // CHECK: and <8 x i1> [[CMP]], {{.*}}2083 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NLT_US);2084}2085 2086__mmask8 test_mm512_mask_cmp_pd_mask_nle_us(__mmask8 m, __m512d a, __m512d b) {2087 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_nle_us2088 // CHECK: [[CMP:%.*]] = fcmp ugt <8 x double> %{{.*}}, %{{.*}}2089 // CHECK: and <8 x i1> [[CMP]], {{.*}}2090 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NLE_US);2091}2092 2093__mmask8 test_mm512_mask_cmp_pd_mask_ord_q(__mmask8 m, __m512d a, __m512d b) {2094 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_ord_q2095 // CHECK: [[CMP:%.*]] = fcmp ord <8 x double> %{{.*}}, %{{.*}}2096 // CHECK: and <8 x i1> [[CMP]], {{.*}}2097 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_ORD_Q);2098}2099 2100__mmask8 test_mm512_mask_cmp_pd_mask_eq_uq(__mmask8 m, __m512d a, __m512d b) {2101 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_eq_uq2102 // CHECK: [[CMP:%.*]] = fcmp ueq <8 x double> %{{.*}}, %{{.*}}2103 // CHECK: and <8 x i1> [[CMP]], {{.*}}2104 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_EQ_UQ);2105}2106 2107__mmask8 test_mm512_mask_cmp_pd_mask_nge_us(__mmask8 m, __m512d a, __m512d b) {2108 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_nge_us2109 // CHECK: [[CMP:%.*]] = fcmp ult <8 x double> %{{.*}}, %{{.*}}2110 // CHECK: and <8 x i1> [[CMP]], {{.*}}2111 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NGE_US);2112}2113 2114__mmask8 test_mm512_mask_cmp_pd_mask_ngt_us(__mmask8 m, __m512d a, __m512d b) {2115 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_ngt_us2116 // CHECK: [[CMP:%.*]] = fcmp ule <8 x double> %{{.*}}, %{{.*}}2117 // CHECK: and <8 x i1> [[CMP]], {{.*}}2118 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NGT_US);2119}2120 2121__mmask8 test_mm512_mask_cmp_pd_mask_false_oq(__mmask8 m, __m512d a, __m512d b) {2122 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_false_oq2123 // CHECK: [[CMP:%.*]] = fcmp false <8 x double> %{{.*}}, %{{.*}}2124 // CHECK: and <8 x i1> [[CMP]], {{.*}}2125 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_FALSE_OQ);2126}2127 2128__mmask8 test_mm512_mask_cmp_pd_mask_neq_oq(__mmask8 m, __m512d a, __m512d b) {2129 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_neq_oq2130 // CHECK: [[CMP:%.*]] = fcmp one <8 x double> %{{.*}}, %{{.*}}2131 // CHECK: and <8 x i1> [[CMP]], {{.*}}2132 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NEQ_OQ);2133}2134 2135__mmask8 test_mm512_mask_cmp_pd_mask_ge_os(__mmask8 m, __m512d a, __m512d b) {2136 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_ge_os2137 // CHECK: [[CMP:%.*]] = fcmp oge <8 x double> %{{.*}}, %{{.*}}2138 // CHECK: and <8 x i1> [[CMP]], {{.*}}2139 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_GE_OS);2140}2141 2142__mmask8 test_mm512_mask_cmp_pd_mask_gt_os(__mmask8 m, __m512d a, __m512d b) {2143 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_gt_os2144 // CHECK: [[CMP:%.*]] = fcmp ogt <8 x double> %{{.*}}, %{{.*}}2145 // CHECK: and <8 x i1> [[CMP]], {{.*}}2146 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_GT_OS);2147}2148 2149__mmask8 test_mm512_mask_cmp_pd_mask_true_uq(__mmask8 m, __m512d a, __m512d b) {2150 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_true_uq2151 // CHECK: [[CMP:%.*]] = fcmp true <8 x double> %{{.*}}, %{{.*}}2152 // CHECK: and <8 x i1> [[CMP]], {{.*}}2153 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_TRUE_UQ);2154}2155 2156__mmask8 test_mm512_mask_cmp_pd_mask_eq_os(__mmask8 m, __m512d a, __m512d b) {2157 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_eq_os2158 // CHECK: [[CMP:%.*]] = fcmp oeq <8 x double> %{{.*}}, %{{.*}}2159 // CHECK: and <8 x i1> [[CMP]], {{.*}}2160 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_EQ_OS);2161}2162 2163__mmask8 test_mm512_mask_cmp_pd_mask_lt_oq(__mmask8 m, __m512d a, __m512d b) {2164 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_lt_oq2165 // CHECK: [[CMP:%.*]] = fcmp olt <8 x double> %{{.*}}, %{{.*}}2166 // CHECK: and <8 x i1> [[CMP]], {{.*}}2167 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_LT_OQ);2168}2169 2170__mmask8 test_mm512_mask_cmp_pd_mask_le_oq(__mmask8 m, __m512d a, __m512d b) {2171 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_le_oq2172 // CHECK: [[CMP:%.*]] = fcmp ole <8 x double> %{{.*}}, %{{.*}}2173 // CHECK: and <8 x i1> [[CMP]], {{.*}}2174 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_LE_OQ);2175}2176 2177__mmask8 test_mm512_mask_cmp_pd_mask_unord_s(__mmask8 m, __m512d a, __m512d b) {2178 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_unord_s2179 // CHECK: [[CMP:%.*]] = fcmp uno <8 x double> %{{.*}}, %{{.*}}2180 // CHECK: and <8 x i1> [[CMP]], {{.*}}2181 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_UNORD_S);2182}2183 2184__mmask8 test_mm512_mask_cmp_pd_mask_neq_us(__mmask8 m, __m512d a, __m512d b) {2185 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_neq_us2186 // CHECK: [[CMP:%.*]] = fcmp une <8 x double> %{{.*}}, %{{.*}}2187 // CHECK: and <8 x i1> [[CMP]], {{.*}}2188 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NEQ_US);2189}2190 2191__mmask8 test_mm512_mask_cmp_pd_mask_nlt_uq(__mmask8 m, __m512d a, __m512d b) {2192 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_nlt_uq2193 // CHECK: [[CMP:%.*]] = fcmp uge <8 x double> %{{.*}}, %{{.*}}2194 // CHECK: and <8 x i1> [[CMP]], {{.*}}2195 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NLT_UQ);2196}2197 2198__mmask8 test_mm512_mask_cmp_pd_mask_nle_uq(__mmask8 m, __m512d a, __m512d b) {2199 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_nle_uq2200 // CHECK: [[CMP:%.*]] = fcmp ugt <8 x double> %{{.*}}, %{{.*}}2201 // CHECK: and <8 x i1> [[CMP]], {{.*}}2202 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NLE_UQ);2203}2204 2205__mmask8 test_mm512_mask_cmp_pd_mask_ord_s(__mmask8 m, __m512d a, __m512d b) {2206 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_ord_s2207 // CHECK: [[CMP:%.*]] = fcmp ord <8 x double> %{{.*}}, %{{.*}}2208 // CHECK: and <8 x i1> [[CMP]], {{.*}}2209 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_ORD_S);2210}2211 2212__mmask8 test_mm512_mask_cmp_pd_mask_eq_us(__mmask8 m, __m512d a, __m512d b) {2213 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_eq_us2214 // CHECK: [[CMP:%.*]] = fcmp ueq <8 x double> %{{.*}}, %{{.*}}2215 // CHECK: and <8 x i1> [[CMP]], {{.*}}2216 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_EQ_US);2217}2218 2219__mmask8 test_mm512_mask_cmp_pd_mask_nge_uq(__mmask8 m, __m512d a, __m512d b) {2220 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_nge_uq2221 // CHECK: [[CMP:%.*]] = fcmp ult <8 x double> %{{.*}}, %{{.*}}2222 // CHECK: and <8 x i1> [[CMP]], {{.*}}2223 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NGE_UQ);2224}2225 2226__mmask8 test_mm512_mask_cmp_pd_mask_ngt_uq(__mmask8 m, __m512d a, __m512d b) {2227 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_ngt_uq2228 // CHECK: [[CMP:%.*]] = fcmp ule <8 x double> %{{.*}}, %{{.*}}2229 // CHECK: and <8 x i1> [[CMP]], {{.*}}2230 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NGT_UQ);2231}2232 2233__mmask8 test_mm512_mask_cmp_pd_mask_false_os(__mmask8 m, __m512d a, __m512d b) {2234 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_false_os2235 // CHECK: [[CMP:%.*]] = fcmp false <8 x double> %{{.*}}, %{{.*}}2236 // CHECK: and <8 x i1> [[CMP]], {{.*}}2237 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_FALSE_OS);2238}2239 2240__mmask8 test_mm512_mask_cmp_pd_mask_neq_os(__mmask8 m, __m512d a, __m512d b) {2241 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_neq_os2242 // CHECK: [[CMP:%.*]] = fcmp one <8 x double> %{{.*}}, %{{.*}}2243 // CHECK: and <8 x i1> [[CMP]], {{.*}}2244 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_NEQ_OS);2245}2246 2247__mmask8 test_mm512_mask_cmp_pd_mask_ge_oq(__mmask8 m, __m512d a, __m512d b) {2248 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_ge_oq2249 // CHECK: [[CMP:%.*]] = fcmp oge <8 x double> %{{.*}}, %{{.*}}2250 // CHECK: and <8 x i1> [[CMP]], {{.*}}2251 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_GE_OQ);2252}2253 2254__mmask8 test_mm512_mask_cmp_pd_mask_gt_oq(__mmask8 m, __m512d a, __m512d b) {2255 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_gt_oq2256 // CHECK: [[CMP:%.*]] = fcmp ogt <8 x double> %{{.*}}, %{{.*}}2257 // CHECK: and <8 x i1> [[CMP]], {{.*}}2258 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_GT_OQ);2259}2260 2261__mmask8 test_mm512_mask_cmp_pd_mask_true_us(__mmask8 m, __m512d a, __m512d b) {2262 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask_true_us2263 // CHECK: [[CMP:%.*]] = fcmp true <8 x double> %{{.*}}, %{{.*}}2264 // CHECK: and <8 x i1> [[CMP]], {{.*}}2265 return _mm512_mask_cmp_pd_mask(m, a, b, _CMP_TRUE_US);2266}2267 2268__mmask8 test_mm512_mask_cmp_pd_mask(__mmask8 m, __m512d a, __m512d b) {2269 // CHECK-LABEL: test_mm512_mask_cmp_pd_mask2270 // CHECK: [[CMP:%.*]] = fcmp oeq <8 x double> %{{.*}}, %{{.*}}2271 // CHECK: and <8 x i1> [[CMP]], {{.*}}2272 return _mm512_mask_cmp_pd_mask(m, a, b, 0);2273}2274 2275__mmask8 test_mm512_cmpeq_pd_mask(__m512d a, __m512d b) {2276 // CHECK-LABEL: test_mm512_cmpeq_pd_mask2277 // CHECK: fcmp oeq <8 x double> %{{.*}}, %{{.*}}2278 return _mm512_cmpeq_pd_mask(a, b);2279}2280 2281__mmask16 test_mm512_cmpeq_ps_mask(__m512 a, __m512 b) {2282 // CHECK-LABEL: test_mm512_cmpeq_ps_mask2283 // CHECK: fcmp oeq <16 x float> %{{.*}}, %{{.*}}2284 return _mm512_cmpeq_ps_mask(a, b);2285}2286 2287__mmask8 test_mm512_mask_cmpeq_pd_mask(__mmask8 k, __m512d a, __m512d b) {2288 // CHECK-LABEL: test_mm512_mask_cmpeq_pd_mask2289 // CHECK: [[CMP:%.*]] = fcmp oeq <8 x double> %{{.*}}, %{{.*}}2290 // CHECK: and <8 x i1> [[CMP]], {{.*}}2291 return _mm512_mask_cmpeq_pd_mask(k, a, b);2292}2293 2294__mmask16 test_mm512_mask_cmpeq_ps_mask(__mmask16 k, __m512 a, __m512 b) {2295 // CHECK-LABEL: test_mm512_mask_cmpeq_ps_mask2296 // CHECK: [[CMP:%.*]] = fcmp oeq <16 x float> %{{.*}}, %{{.*}}2297 // CHECK: and <16 x i1> [[CMP]], {{.*}}2298 return _mm512_mask_cmpeq_ps_mask(k, a, b);2299}2300 2301__mmask8 test_mm512_cmple_pd_mask(__m512d a, __m512d b) {2302 // CHECK-LABEL: test_mm512_cmple_pd_mask2303 // CHECK: fcmp ole <8 x double> %{{.*}}, %{{.*}}2304 return _mm512_cmple_pd_mask(a, b);2305}2306 2307__mmask16 test_mm512_cmple_ps_mask(__m512 a, __m512 b) {2308 // CHECK-LABEL: test_mm512_cmple_ps_mask2309 // CHECK: fcmp ole <16 x float> %{{.*}}, %{{.*}}2310 return _mm512_cmple_ps_mask(a, b);2311}2312 2313__mmask8 test_mm512_mask_cmple_pd_mask(__mmask8 k, __m512d a, __m512d b) {2314 // CHECK-LABEL: test_mm512_mask_cmple_pd_mask2315 // CHECK: [[CMP:%.*]] = fcmp ole <8 x double> %{{.*}}, %{{.*}}2316 // CHECK: and <8 x i1> [[CMP]], {{.*}}2317 return _mm512_mask_cmple_pd_mask(k, a, b);2318}2319 2320__mmask16 test_mm512_mask_cmple_ps_mask(__mmask16 k, __m512 a, __m512 b) {2321 // CHECK-LABEL: test_mm512_mask_cmple_ps_mask2322 // CHECK: [[CMP:%.*]] = fcmp ole <16 x float> %{{.*}}, %{{.*}}2323 // CHECK: and <16 x i1> [[CMP]], {{.*}}2324 return _mm512_mask_cmple_ps_mask(k, a, b);2325}2326 2327__mmask8 test_mm512_cmplt_pd_mask(__m512d a, __m512d b) {2328 // CHECK-LABEL: test_mm512_cmplt_pd_mask2329 // CHECK: fcmp olt <8 x double> %{{.*}}, %{{.*}}2330 return _mm512_cmplt_pd_mask(a, b);2331}2332 2333__mmask16 test_mm512_cmplt_ps_mask(__m512 a, __m512 b) {2334 // CHECK-LABEL: test_mm512_cmplt_ps_mask2335 // CHECK: fcmp olt <16 x float> %{{.*}}, %{{.*}}2336 return _mm512_cmplt_ps_mask(a, b);2337}2338 2339__mmask8 test_mm512_mask_cmplt_pd_mask(__mmask8 k, __m512d a, __m512d b) {2340 // CHECK-LABEL: test_mm512_mask_cmplt_pd_mask2341 // CHECK: [[CMP:%.*]] = fcmp olt <8 x double> %{{.*}}, %{{.*}}2342 // CHECK: and <8 x i1> [[CMP]], {{.*}}2343 return _mm512_mask_cmplt_pd_mask(k, a, b);2344}2345 2346__mmask16 test_mm512_mask_cmplt_ps_mask(__mmask16 k, __m512 a, __m512 b) {2347 // CHECK-LABEL: test_mm512_mask_cmplt_ps_mask2348 // CHECK: [[CMP:%.*]] = fcmp olt <16 x float> %{{.*}}, %{{.*}}2349 // CHECK: and <16 x i1> [[CMP]], {{.*}}2350 return _mm512_mask_cmplt_ps_mask(k, a, b);2351}2352 2353__mmask8 test_mm512_cmpneq_pd_mask(__m512d a, __m512d b) {2354 // CHECK-LABEL: test_mm512_cmpneq_pd_mask2355 // CHECK: fcmp une <8 x double> %{{.*}}, %{{.*}}2356 return _mm512_cmpneq_pd_mask(a, b);2357}2358 2359__mmask16 test_mm512_cmpneq_ps_mask(__m512 a, __m512 b) {2360 // CHECK-LABEL: test_mm512_cmpneq_ps_mask2361 // CHECK: fcmp une <16 x float> %{{.*}}, %{{.*}}2362 return _mm512_cmpneq_ps_mask(a, b);2363}2364 2365__mmask8 test_mm512_mask_cmpneq_pd_mask(__mmask8 k, __m512d a, __m512d b) {2366 // CHECK-LABEL: test_mm512_mask_cmpneq_pd_mask2367 // CHECK: [[CMP:%.*]] = fcmp une <8 x double> %{{.*}}, %{{.*}}2368 // CHECK: and <8 x i1> [[CMP]], {{.*}}2369 return _mm512_mask_cmpneq_pd_mask(k, a, b);2370}2371 2372__mmask16 test_mm512_mask_cmpneq_ps_mask(__mmask16 k, __m512 a, __m512 b) {2373 // CHECK-LABEL: test_mm512_mask_cmpneq_ps_mask2374 // CHECK: [[CMP:%.*]] = fcmp une <16 x float> %{{.*}}, %{{.*}}2375 // CHECK: and <16 x i1> [[CMP]], {{.*}}2376 return _mm512_mask_cmpneq_ps_mask(k, a, b);2377}2378 2379__mmask8 test_mm512_cmpnle_pd_mask(__m512d a, __m512d b) {2380 // CHECK-LABEL: test_mm512_cmpnle_pd_mask2381 // CHECK: fcmp ugt <8 x double> %{{.*}}, %{{.*}}2382 return _mm512_cmpnle_pd_mask(a, b);2383}2384 2385__mmask16 test_mm512_cmpnle_ps_mask(__m512 a, __m512 b) {2386 // CHECK-LABEL: test_mm512_cmpnle_ps_mask2387 // CHECK: fcmp ugt <16 x float> %{{.*}}, %{{.*}}2388 return _mm512_cmpnle_ps_mask(a, b);2389}2390 2391__mmask8 test_mm512_mask_cmpnle_pd_mask(__mmask8 k, __m512d a, __m512d b) {2392 // CHECK-LABEL: test_mm512_mask_cmpnle_pd_mask2393 // CHECK: [[CMP:%.*]] = fcmp ugt <8 x double> %{{.*}}, %{{.*}}2394 // CHECK: and <8 x i1> [[CMP]], {{.*}}2395 return _mm512_mask_cmpnle_pd_mask(k, a, b);2396}2397 2398__mmask16 test_mm512_mask_cmpnle_ps_mask(__mmask16 k, __m512 a, __m512 b) {2399 // CHECK-LABEL: test_mm512_mask_cmpnle_ps_mask2400 // CHECK: [[CMP:%.*]] = fcmp ugt <16 x float> %{{.*}}, %{{.*}}2401 // CHECK: and <16 x i1> [[CMP]], {{.*}}2402 return _mm512_mask_cmpnle_ps_mask(k, a, b);2403}2404 2405__mmask8 test_mm512_cmpnlt_pd_mask(__m512d a, __m512d b) {2406 // CHECK-LABEL: test_mm512_cmpnlt_pd_mask2407 // CHECK: fcmp uge <8 x double> %{{.*}}, %{{.*}}2408 return _mm512_cmpnlt_pd_mask(a, b);2409}2410 2411__mmask16 test_mm512_cmpnlt_ps_mask(__m512 a, __m512 b) {2412 // CHECK-LABEL: test_mm512_cmpnlt_ps_mask2413 // CHECK: fcmp uge <16 x float> %{{.*}}, %{{.*}}2414 return _mm512_cmpnlt_ps_mask(a, b);2415}2416 2417__mmask8 test_mm512_mask_cmpnlt_pd_mask(__mmask8 k, __m512d a, __m512d b) {2418 // CHECK-LABEL: test_mm512_mask_cmpnlt_pd_mask2419 // CHECK: [[CMP:%.*]] = fcmp uge <8 x double> %{{.*}}, %{{.*}}2420 // CHECK: and <8 x i1> [[CMP]], {{.*}}2421 return _mm512_mask_cmpnlt_pd_mask(k, a, b);2422}2423 2424__mmask16 test_mm512_mask_cmpnlt_ps_mask(__mmask16 k, __m512 a, __m512 b) {2425 // CHECK-LABEL: test_mm512_mask_cmpnlt_ps_mask2426 // CHECK: [[CMP:%.*]] = fcmp uge <16 x float> %{{.*}}, %{{.*}}2427 // CHECK: and <16 x i1> [[CMP]], {{.*}}2428 return _mm512_mask_cmpnlt_ps_mask(k, a, b);2429}2430 2431__mmask8 test_mm512_cmpord_pd_mask(__m512d a, __m512d b) {2432 // CHECK-LABEL: test_mm512_cmpord_pd_mask2433 // CHECK: fcmp ord <8 x double> %{{.*}}, %{{.*}}2434 return _mm512_cmpord_pd_mask(a, b);2435}2436 2437__mmask16 test_mm512_cmpord_ps_mask(__m512 a, __m512 b) {2438 // CHECK-LABEL: test_mm512_cmpord_ps_mask2439 // CHECK: fcmp ord <16 x float> %{{.*}}, %{{.*}}2440 return _mm512_cmpord_ps_mask(a, b);2441}2442 2443__mmask8 test_mm512_mask_cmpord_pd_mask(__mmask8 k, __m512d a, __m512d b) {2444 // CHECK-LABEL: test_mm512_mask_cmpord_pd_mask2445 // CHECK: [[CMP:%.*]] = fcmp ord <8 x double> %{{.*}}, %{{.*}}2446 // CHECK: and <8 x i1> [[CMP]], {{.*}}2447 return _mm512_mask_cmpord_pd_mask(k, a, b);2448}2449 2450__mmask16 test_mm512_mask_cmpord_ps_mask(__mmask16 k, __m512 a, __m512 b) {2451 // CHECK-LABEL: test_mm512_mask_cmpord_ps_mask2452 // CHECK: [[CMP:%.*]] = fcmp ord <16 x float> %{{.*}}, %{{.*}}2453 // CHECK: and <16 x i1> [[CMP]], {{.*}}2454 return _mm512_mask_cmpord_ps_mask(k, a, b);2455}2456 2457__mmask8 test_mm512_cmpunord_pd_mask(__m512d a, __m512d b) {2458 // CHECK-LABEL: test_mm512_cmpunord_pd_mask2459 // CHECK: fcmp uno <8 x double> %{{.*}}, %{{.*}}2460 return _mm512_cmpunord_pd_mask(a, b);2461}2462 2463__mmask16 test_mm512_cmpunord_ps_mask(__m512 a, __m512 b) {2464 // CHECK-LABEL: test_mm512_cmpunord_ps_mask2465 // CHECK: fcmp uno <16 x float> %{{.*}}, %{{.*}}2466 return _mm512_cmpunord_ps_mask(a, b);2467}2468 2469__mmask8 test_mm512_mask_cmpunord_pd_mask(__mmask8 k, __m512d a, __m512d b) {2470 // CHECK-LABEL: test_mm512_mask_cmpunord_pd_mask2471 // CHECK: [[CMP:%.*]] = fcmp uno <8 x double> %{{.*}}, %{{.*}}2472 // CHECK: and <8 x i1> [[CMP]], {{.*}}2473 return _mm512_mask_cmpunord_pd_mask(k, a, b);2474}2475 2476__mmask16 test_mm512_mask_cmpunord_ps_mask(__mmask16 k, __m512 a, __m512 b) {2477 // CHECK-LABEL: test_mm512_mask_cmpunord_ps_mask2478 // CHECK: [[CMP:%.*]] = fcmp uno <16 x float> %{{.*}}, %{{.*}}2479 // CHECK: and <16 x i1> [[CMP]], {{.*}}2480 return _mm512_mask_cmpunord_ps_mask(k, a, b);2481}2482 2483__m256d test_mm512_extractf64x4_pd(__m512d a)2484{2485 // CHECK-LABEL: test_mm512_extractf64x4_pd2486 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>2487 return _mm512_extractf64x4_pd(a, 1);2488}2489TEST_CONSTEXPR(match_m256d(_mm512_extractf64x4_pd(((__m512d){0.0,1.0,2.0,3.0, 4.0,5.0,6.0,7.0}),1),4.0, 5.0, 6.0, 7.0));2490 2491__m256d test_mm512_mask_extractf64x4_pd(__m256d __W,__mmask8 __U,__m512d __A){2492 // CHECK-LABEL: test_mm512_mask_extractf64x4_pd2493 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>2494 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}2495 return _mm512_mask_extractf64x4_pd( __W, __U, __A, 1);2496}2497TEST_CONSTEXPR(match_m256d(_mm512_mask_extractf64x4_pd(((__m256d){100.0,101.0,102.0,103.0}), (__mmask8)0x5,((__m512d){0.0,1.0,2.0,3.0, 4.0,5.0,6.0,7.0}), 1), 4.0, 101.0, 6.0, 103.0));2498 2499__m256d test_mm512_maskz_extractf64x4_pd(__mmask8 __U,__m512d __A){2500 // CHECK-LABEL: test_mm512_maskz_extractf64x4_pd2501 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>2502 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}2503 return _mm512_maskz_extractf64x4_pd( __U, __A, 1);2504}2505TEST_CONSTEXPR(match_m256d(_mm512_maskz_extractf64x4_pd((__mmask8)0x3,((__m512d){0.0,1.0,2.0,3.0, 4.0,5.0,6.0,7.0}),1),4.0, 5.0, 0.0, 0.0));2506 2507__m128 test_mm512_extractf32x4_ps(__m512 a)2508{2509 // CHECK-LABEL: test_mm512_extractf32x4_ps2510 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>2511 return _mm512_extractf32x4_ps(a, 1);2512}2513TEST_CONSTEXPR(match_m128(_mm512_extractf32x4_ps(((__m512){0,1,2,3, 4,5,6,7, 8,9,10,11, 12,13,14,15}),1),4.0f, 5.0f, 6.0f, 7.0f));2514 2515__m128 test_mm512_mask_extractf32x4_ps(__m128 __W, __mmask8 __U,__m512 __A){2516 // CHECK-LABEL: test_mm512_mask_extractf32x4_ps2517 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>2518 // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}2519 return _mm512_mask_extractf32x4_ps( __W, __U, __A, 1);2520}2521TEST_CONSTEXPR(match_m128(_mm512_mask_extractf32x4_ps(((__m128){100,101,102,103}),(__mmask8)0x5,((__m512){0,1,2,3, 4,5,6,7, 8,9,10,11, 12,13,14,15}),1),4.0f, 101.0f, 6.0f, 103.0f));2522 2523__m128 test_mm512_maskz_extractf32x4_ps( __mmask8 __U,__m512 __A){2524 // CHECK-LABEL: test_mm512_maskz_extractf32x4_ps2525 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>2526 // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}2527 return _mm512_maskz_extractf32x4_ps(__U, __A, 1);2528}2529TEST_CONSTEXPR(match_m128(_mm512_maskz_extractf32x4_ps((__mmask8)0x3,((__m512){0,1,2,3, 4,5,6,7, 8,9,10,11, 12,13,14,15}),1),4.0f, 5.0f, 0.0f, 0.0f));2530 2531__mmask16 test_mm512_cmpeq_epu32_mask(__m512i __a, __m512i __b) {2532 // CHECK-LABEL: test_mm512_cmpeq_epu32_mask2533 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}2534 return (__mmask16)_mm512_cmpeq_epu32_mask(__a, __b);2535}2536 2537__mmask16 test_mm512_mask_cmpeq_epu32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2538 // CHECK-LABEL: test_mm512_mask_cmpeq_epu32_mask2539 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}2540 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2541 return (__mmask16)_mm512_mask_cmpeq_epu32_mask(__u, __a, __b);2542}2543 2544__mmask8 test_mm512_cmpeq_epu64_mask(__m512i __a, __m512i __b) {2545 // CHECK-LABEL: test_mm512_cmpeq_epu64_mask2546 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}2547 return (__mmask8)_mm512_cmpeq_epu64_mask(__a, __b);2548}2549 2550__mmask8 test_mm512_mask_cmpeq_epu64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2551 // CHECK-LABEL: test_mm512_mask_cmpeq_epu64_mask2552 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}2553 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2554 return (__mmask8)_mm512_mask_cmpeq_epu64_mask(__u, __a, __b);2555}2556 2557__mmask16 test_mm512_cmpge_epi32_mask(__m512i __a, __m512i __b) {2558 // CHECK-LABEL: test_mm512_cmpge_epi32_mask2559 // CHECK: icmp sge <16 x i32> %{{.*}}, %{{.*}}2560 return (__mmask16)_mm512_cmpge_epi32_mask(__a, __b);2561}2562 2563__mmask16 test_mm512_mask_cmpge_epi32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2564 // CHECK-LABEL: test_mm512_mask_cmpge_epi32_mask2565 // CHECK: icmp sge <16 x i32> %{{.*}}, %{{.*}}2566 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2567 return (__mmask16)_mm512_mask_cmpge_epi32_mask(__u, __a, __b);2568}2569 2570__mmask8 test_mm512_cmpge_epi64_mask(__m512i __a, __m512i __b) {2571 // CHECK-LABEL: test_mm512_cmpge_epi64_mask2572 // CHECK: icmp sge <8 x i64> %{{.*}}, %{{.*}}2573 return (__mmask8)_mm512_cmpge_epi64_mask(__a, __b);2574}2575 2576__mmask8 test_mm512_mask_cmpge_epi64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2577 // CHECK-LABEL: test_mm512_mask_cmpge_epi64_mask2578 // CHECK: icmp sge <8 x i64> %{{.*}}, %{{.*}}2579 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2580 return (__mmask8)_mm512_mask_cmpge_epi64_mask(__u, __a, __b);2581}2582 2583__mmask16 test_mm512_cmpge_epu32_mask(__m512i __a, __m512i __b) {2584 // CHECK-LABEL: test_mm512_cmpge_epu32_mask2585 // CHECK: icmp uge <16 x i32> %{{.*}}, %{{.*}}2586 return (__mmask16)_mm512_cmpge_epu32_mask(__a, __b);2587}2588 2589__mmask16 test_mm512_mask_cmpge_epu32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2590 // CHECK-LABEL: test_mm512_mask_cmpge_epu32_mask2591 // CHECK: icmp uge <16 x i32> %{{.*}}, %{{.*}}2592 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2593 return (__mmask16)_mm512_mask_cmpge_epu32_mask(__u, __a, __b);2594}2595 2596__mmask8 test_mm512_cmpge_epu64_mask(__m512i __a, __m512i __b) {2597 // CHECK-LABEL: test_mm512_cmpge_epu64_mask2598 // CHECK: icmp uge <8 x i64> %{{.*}}, %{{.*}}2599 return (__mmask8)_mm512_cmpge_epu64_mask(__a, __b);2600}2601 2602__mmask8 test_mm512_mask_cmpge_epu64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2603 // CHECK-LABEL: test_mm512_mask_cmpge_epu64_mask2604 // CHECK: icmp uge <8 x i64> %{{.*}}, %{{.*}}2605 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2606 return (__mmask8)_mm512_mask_cmpge_epu64_mask(__u, __a, __b);2607}2608 2609__mmask16 test_mm512_cmpgt_epu32_mask(__m512i __a, __m512i __b) {2610 // CHECK-LABEL: test_mm512_cmpgt_epu32_mask2611 // CHECK: icmp ugt <16 x i32> %{{.*}}, %{{.*}}2612 return (__mmask16)_mm512_cmpgt_epu32_mask(__a, __b);2613}2614 2615__mmask16 test_mm512_mask_cmpgt_epu32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2616 // CHECK-LABEL: test_mm512_mask_cmpgt_epu32_mask2617 // CHECK: icmp ugt <16 x i32> %{{.*}}, %{{.*}}2618 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2619 return (__mmask16)_mm512_mask_cmpgt_epu32_mask(__u, __a, __b);2620}2621 2622__mmask8 test_mm512_cmpgt_epu64_mask(__m512i __a, __m512i __b) {2623 // CHECK-LABEL: test_mm512_cmpgt_epu64_mask2624 // CHECK: icmp ugt <8 x i64> %{{.*}}, %{{.*}}2625 return (__mmask8)_mm512_cmpgt_epu64_mask(__a, __b);2626}2627 2628__mmask8 test_mm512_mask_cmpgt_epu64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2629 // CHECK-LABEL: test_mm512_mask_cmpgt_epu64_mask2630 // CHECK: icmp ugt <8 x i64> %{{.*}}, %{{.*}}2631 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2632 return (__mmask8)_mm512_mask_cmpgt_epu64_mask(__u, __a, __b);2633}2634 2635__mmask16 test_mm512_cmple_epi32_mask(__m512i __a, __m512i __b) {2636 // CHECK-LABEL: test_mm512_cmple_epi32_mask2637 // CHECK: icmp sle <16 x i32> %{{.*}}, %{{.*}}2638 return (__mmask16)_mm512_cmple_epi32_mask(__a, __b);2639}2640 2641__mmask16 test_mm512_mask_cmple_epi32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2642 // CHECK-LABEL: test_mm512_mask_cmple_epi32_mask2643 // CHECK: icmp sle <16 x i32> %{{.*}}, %{{.*}}2644 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2645 return (__mmask16)_mm512_mask_cmple_epi32_mask(__u, __a, __b);2646}2647 2648__mmask8 test_mm512_cmple_epi64_mask(__m512i __a, __m512i __b) {2649 // CHECK-LABEL: test_mm512_cmple_epi64_mask2650 // CHECK: icmp sle <8 x i64> %{{.*}}, %{{.*}}2651 return (__mmask8)_mm512_cmple_epi64_mask(__a, __b);2652}2653 2654__mmask8 test_mm512_mask_cmple_epi64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2655 // CHECK-LABEL: test_mm512_mask_cmple_epi64_mask2656 // CHECK: icmp sle <8 x i64> %{{.*}}, %{{.*}}2657 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2658 return (__mmask8)_mm512_mask_cmple_epi64_mask(__u, __a, __b);2659}2660 2661__mmask16 test_mm512_cmple_epu32_mask(__m512i __a, __m512i __b) {2662 // CHECK-LABEL: test_mm512_cmple_epu32_mask2663 // CHECK: icmp ule <16 x i32> %{{.*}}, %{{.*}}2664 return (__mmask16)_mm512_cmple_epu32_mask(__a, __b);2665}2666 2667__mmask16 test_mm512_mask_cmple_epu32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2668 // CHECK-LABEL: test_mm512_mask_cmple_epu32_mask2669 // CHECK: icmp ule <16 x i32> %{{.*}}, %{{.*}}2670 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2671 return (__mmask16)_mm512_mask_cmple_epu32_mask(__u, __a, __b);2672}2673 2674__mmask8 test_mm512_cmple_epu64_mask(__m512i __a, __m512i __b) {2675 // CHECK-LABEL: test_mm512_cmple_epu64_mask2676 // CHECK: icmp ule <8 x i64> %{{.*}}, %{{.*}}2677 return (__mmask8)_mm512_cmple_epu64_mask(__a, __b);2678}2679 2680__mmask8 test_mm512_mask_cmple_epu64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2681 // CHECK-LABEL: test_mm512_mask_cmple_epu64_mask2682 // CHECK: icmp ule <8 x i64> %{{.*}}, %{{.*}}2683 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2684 return (__mmask8)_mm512_mask_cmple_epu64_mask(__u, __a, __b);2685}2686 2687__mmask16 test_mm512_cmplt_epi32_mask(__m512i __a, __m512i __b) {2688 // CHECK-LABEL: test_mm512_cmplt_epi32_mask2689 // CHECK: icmp slt <16 x i32> %{{.*}}, %{{.*}}2690 return (__mmask16)_mm512_cmplt_epi32_mask(__a, __b);2691}2692 2693__mmask16 test_mm512_mask_cmplt_epi32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2694 // CHECK-LABEL: test_mm512_mask_cmplt_epi32_mask2695 // CHECK: icmp slt <16 x i32> %{{.*}}, %{{.*}}2696 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2697 return (__mmask16)_mm512_mask_cmplt_epi32_mask(__u, __a, __b);2698}2699 2700__mmask8 test_mm512_cmplt_epi64_mask(__m512i __a, __m512i __b) {2701 // CHECK-LABEL: test_mm512_cmplt_epi64_mask2702 // CHECK: icmp slt <8 x i64> %{{.*}}, %{{.*}}2703 return (__mmask8)_mm512_cmplt_epi64_mask(__a, __b);2704}2705 2706__mmask8 test_mm512_mask_cmplt_epi64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2707 // CHECK-LABEL: test_mm512_mask_cmplt_epi64_mask2708 // CHECK: icmp slt <8 x i64> %{{.*}}, %{{.*}}2709 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2710 return (__mmask8)_mm512_mask_cmplt_epi64_mask(__u, __a, __b);2711}2712 2713__mmask16 test_mm512_cmplt_epu32_mask(__m512i __a, __m512i __b) {2714 // CHECK-LABEL: test_mm512_cmplt_epu32_mask2715 // CHECK: icmp ult <16 x i32> %{{.*}}, %{{.*}}2716 return (__mmask16)_mm512_cmplt_epu32_mask(__a, __b);2717}2718 2719__mmask16 test_mm512_mask_cmplt_epu32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2720 // CHECK-LABEL: test_mm512_mask_cmplt_epu32_mask2721 // CHECK: icmp ult <16 x i32> %{{.*}}, %{{.*}}2722 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2723 return (__mmask16)_mm512_mask_cmplt_epu32_mask(__u, __a, __b);2724}2725 2726__mmask8 test_mm512_cmplt_epu64_mask(__m512i __a, __m512i __b) {2727 // CHECK-LABEL: test_mm512_cmplt_epu64_mask2728 // CHECK: icmp ult <8 x i64> %{{.*}}, %{{.*}}2729 return (__mmask8)_mm512_cmplt_epu64_mask(__a, __b);2730}2731 2732__mmask8 test_mm512_mask_cmplt_epu64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2733 // CHECK-LABEL: test_mm512_mask_cmplt_epu64_mask2734 // CHECK: icmp ult <8 x i64> %{{.*}}, %{{.*}}2735 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2736 return (__mmask8)_mm512_mask_cmplt_epu64_mask(__u, __a, __b);2737}2738 2739__mmask16 test_mm512_cmpneq_epi32_mask(__m512i __a, __m512i __b) {2740 // CHECK-LABEL: test_mm512_cmpneq_epi32_mask2741 // CHECK: icmp ne <16 x i32> %{{.*}}, %{{.*}}2742 return (__mmask16)_mm512_cmpneq_epi32_mask(__a, __b);2743}2744 2745__mmask16 test_mm512_mask_cmpneq_epi32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2746 // CHECK-LABEL: test_mm512_mask_cmpneq_epi32_mask2747 // CHECK: icmp ne <16 x i32> %{{.*}}, %{{.*}}2748 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2749 return (__mmask16)_mm512_mask_cmpneq_epi32_mask(__u, __a, __b);2750}2751 2752__mmask8 test_mm512_cmpneq_epi64_mask(__m512i __a, __m512i __b) {2753 // CHECK-LABEL: test_mm512_cmpneq_epi64_mask2754 // CHECK: icmp ne <8 x i64> %{{.*}}, %{{.*}}2755 return (__mmask8)_mm512_cmpneq_epi64_mask(__a, __b);2756}2757 2758__mmask8 test_mm512_mask_cmpneq_epi64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2759 // CHECK-LABEL: test_mm512_mask_cmpneq_epi64_mask2760 // CHECK: icmp ne <8 x i64> %{{.*}}, %{{.*}}2761 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2762 return (__mmask8)_mm512_mask_cmpneq_epi64_mask(__u, __a, __b);2763}2764 2765__mmask16 test_mm512_cmpneq_epu32_mask(__m512i __a, __m512i __b) {2766 // CHECK-LABEL: test_mm512_cmpneq_epu32_mask2767 // CHECK: icmp ne <16 x i32> %{{.*}}, %{{.*}}2768 return (__mmask16)_mm512_cmpneq_epu32_mask(__a, __b);2769}2770 2771__mmask16 test_mm512_mask_cmpneq_epu32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2772 // CHECK-LABEL: test_mm512_mask_cmpneq_epu32_mask2773 // CHECK: icmp ne <16 x i32> %{{.*}}, %{{.*}}2774 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2775 return (__mmask16)_mm512_mask_cmpneq_epu32_mask(__u, __a, __b);2776}2777 2778__mmask8 test_mm512_cmpneq_epu64_mask(__m512i __a, __m512i __b) {2779 // CHECK-LABEL: test_mm512_cmpneq_epu64_mask2780 // CHECK: icmp ne <8 x i64> %{{.*}}, %{{.*}}2781 return (__mmask8)_mm512_cmpneq_epu64_mask(__a, __b);2782}2783 2784__mmask8 test_mm512_mask_cmpneq_epu64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2785 // CHECK-LABEL: test_mm512_mask_cmpneq_epu64_mask2786 // CHECK: icmp ne <8 x i64> %{{.*}}, %{{.*}}2787 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2788 return (__mmask8)_mm512_mask_cmpneq_epu64_mask(__u, __a, __b);2789}2790 2791__mmask16 test_mm512_cmp_eq_epi32_mask(__m512i __a, __m512i __b) {2792 // CHECK-LABEL: test_mm512_cmp_eq_epi32_mask2793 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}2794 return (__mmask16)_mm512_cmp_epi32_mask(__a, __b, _MM_CMPINT_EQ);2795}2796 2797__mmask16 test_mm512_mask_cmp_eq_epi32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2798 // CHECK-LABEL: test_mm512_mask_cmp_eq_epi32_mask2799 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}2800 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2801 return (__mmask16)_mm512_mask_cmp_epi32_mask(__u, __a, __b, _MM_CMPINT_EQ);2802}2803 2804__mmask8 test_mm512_cmp_eq_epi64_mask(__m512i __a, __m512i __b) {2805 // CHECK-LABEL: test_mm512_cmp_eq_epi64_mask2806 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}2807 return (__mmask8)_mm512_cmp_epi64_mask(__a, __b, _MM_CMPINT_EQ);2808}2809 2810__mmask8 test_mm512_mask_cmp_eq_epi64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2811 // CHECK-LABEL: test_mm512_mask_cmp_eq_epi64_mask2812 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}2813 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2814 return (__mmask8)_mm512_mask_cmp_epi64_mask(__u, __a, __b, _MM_CMPINT_EQ);2815}2816 2817__mmask16 test_mm512_cmp_epu32_mask(__m512i __a, __m512i __b) {2818 // CHECK-LABEL: test_mm512_cmp_epu32_mask2819 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}2820 return (__mmask16)_mm512_cmp_epu32_mask(__a, __b, 0);2821}2822 2823__mmask16 test_mm512_mask_cmp_epu32_mask(__mmask16 __u, __m512i __a, __m512i __b) {2824 // CHECK-LABEL: test_mm512_mask_cmp_epu32_mask2825 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}2826 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}2827 return (__mmask16)_mm512_mask_cmp_epu32_mask(__u, __a, __b, 0);2828}2829 2830__mmask8 test_mm512_cmp_epu64_mask(__m512i __a, __m512i __b) {2831 // CHECK-LABEL: test_mm512_cmp_epu64_mask2832 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}2833 return (__mmask8)_mm512_cmp_epu64_mask(__a, __b, 0);2834}2835 2836__mmask8 test_mm512_mask_cmp_epu64_mask(__mmask8 __u, __m512i __a, __m512i __b) {2837 // CHECK-LABEL: test_mm512_mask_cmp_epu64_mask2838 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}2839 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}2840 return (__mmask8)_mm512_mask_cmp_epu64_mask(__u, __a, __b, 0);2841}2842 2843__m512d test_mm512_mask_blend_pd(__mmask8 __U, __m512d __A, __m512d __W) {2844 // CHECK-LABEL: test_mm512_mask_blend_pd2845 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}2846 return _mm512_mask_blend_pd(__U, __A, __W);2847}2848TEST_CONSTEXPR(match_m512d(2849 _mm512_mask_blend_pd(2850 (__mmask8)0x01,2851 (__m512d)(__v8df){2.0, 2.0, 2.0, 2.0, 2.0, 2.0, 2.0, 2.0},2852 (__m512d)(__v8df){10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0}2853 ),2854 10.0, 2.0, 2.0, 2.0, 2.0, 2.0, 2.0, 2.02855));2856 2857__m512 test_mm512_mask_blend_ps(__mmask8 __U, __m512 __A, __m512 __W) {2858 // CHECK-LABEL: test_mm512_mask_blend_ps2859 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}2860 return _mm512_mask_blend_ps(__U, __A, __W);2861}2862TEST_CONSTEXPR(match_m512(2863 _mm512_mask_blend_ps(2864 (__mmask16)0x01,2865 (__m512)(__v16sf){2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f,2866 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f},2867 (__m512)(__v16sf){10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f, 17.0f,2868 18.0f, 19.0f, 20.0f, 21.0f, 22.0f, 23.0f, 24.0f, 25.0f}2869 ),2870 10.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f,2871 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f, 2.0f2872));2873 2874__m512i test_mm512_mask_and_epi32(__m512i __src,__mmask16 __k, __m512i __a, __m512i __b) {2875 // CHECK-LABEL: test_mm512_mask_and_epi322876 // CHECK: and <16 x i32> 2877 // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>2878 // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}2879 return _mm512_mask_and_epi32(__src, __k,__a, __b);2880}2881TEST_CONSTEXPR(match_v16si(_mm512_mask_and_epi32((__m512i)(__v16si){1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000}, (__mmask16)0x0001, (__m512i)(__v16si){7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7}, (__m512i)(__v16si){3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3}), 3, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000));2882 2883__m512i test_mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b) {2884 // CHECK-LABEL: test_mm512_maskz_and_epi322885 // CHECK: and <16 x i32> 2886 // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>2887 // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}2888 return _mm512_maskz_and_epi32(__k,__a, __b);2889}2890 2891__m512i test_mm512_mask_and_epi64(__m512i __src,__mmask8 __k, __m512i __a, __m512i __b) {2892 // CHECK-LABEL: test_mm512_mask_and_epi642893 // CHECK: %[[AND_RES:.*]] = and <8 x i64>2894 // CHECK: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>2895 // CHECK: select <8 x i1> %[[MASK]], <8 x i64> %[[AND_RES]], <8 x i64> %{{.*}}2896 return _mm512_mask_and_epi64(__src, __k,__a, __b);2897}2898TEST_CONSTEXPR(match_m512i(_mm512_mask_and_epi64((__m512i){1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000}, (__mmask8)0x01, (__m512i){7, 7, 7, 7, 7, 7, 7, 7}, (__m512i){3, 3, 3, 3, 3, 3, 3, 3}), 3, 1000, 1000, 1000, 1000, 1000, 1000, 1000));2899 2900__m512i test_mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b) {2901 // CHECK-LABEL: test_mm512_maskz_and_epi642902 // CHECK: %[[AND_RES:.*]] = and <8 x i64>2903 // CHECK: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>2904 // CHECK: select <8 x i1> %[[MASK]], <8 x i64> %[[AND_RES]], <8 x i64> %{{.*}}2905 return _mm512_maskz_and_epi64(__k,__a, __b);2906}2907 2908__m512i test_mm512_mask_or_epi32(__m512i __src,__mmask16 __k, __m512i __a, __m512i __b) {2909 // CHECK-LABEL: test_mm512_mask_or_epi322910 // CHECK: or <16 x i32> 2911 // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>2912 // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}2913 return _mm512_mask_or_epi32(__src, __k,__a, __b);2914}2915 2916__m512i test_mm512_maskz_or_epi32(__mmask16 __k, __m512i __a, __m512i __b) {2917 // CHECK-LABEL: test_mm512_maskz_or_epi322918 // CHECK: or <16 x i32> 2919 // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>2920 // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}2921 return _mm512_maskz_or_epi32(__k,__a, __b);2922}2923 2924__m512i test_mm512_mask_or_epi64(__m512i __src,__mmask8 __k, __m512i __a, __m512i __b) {2925 // CHECK-LABEL: test_mm512_mask_or_epi642926 // CHECK: %[[OR_RES:.*]] = or <8 x i64>2927 // CHECK: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>2928 // CHECK: select <8 x i1> %[[MASK]], <8 x i64> %[[OR_RES]], <8 x i64> %{{.*}}2929 return _mm512_mask_or_epi64(__src, __k,__a, __b);2930}2931 2932__m512i test_mm512_maskz_or_epi64(__mmask8 __k, __m512i __a, __m512i __b) {2933 // CHECK-LABEL: test_mm512_maskz_or_epi642934 // CHECK: %[[OR_RES:.*]] = or <8 x i64>2935 // CHECK: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>2936 // CHECK: select <8 x i1> %[[MASK]], <8 x i64> %[[OR_RES]], <8 x i64> %{{.*}}2937 return _mm512_maskz_or_epi64(__k,__a, __b);2938}2939 2940__m512i test_mm512_mask_xor_epi32(__m512i __src,__mmask16 __k, __m512i __a, __m512i __b) {2941 // CHECK-LABEL: test_mm512_mask_xor_epi322942 // CHECK: xor <16 x i32> 2943 // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>2944 // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}2945 return _mm512_mask_xor_epi32(__src, __k,__a, __b);2946}2947 2948__m512i test_mm512_maskz_xor_epi32(__mmask16 __k, __m512i __a, __m512i __b) {2949 // CHECK-LABEL: test_mm512_maskz_xor_epi322950 // CHECK: xor <16 x i32> 2951 // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>2952 // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}2953 return _mm512_maskz_xor_epi32(__k,__a, __b);2954}2955 2956__m512i test_mm512_mask_xor_epi64(__m512i __src,__mmask8 __k, __m512i __a, __m512i __b) {2957 // CHECK-LABEL: test_mm512_mask_xor_epi642958 // CHECK: %[[XOR_RES:.*]] = xor <8 x i64>2959 // CHECK: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>2960 // CHECK: select <8 x i1> %[[MASK]], <8 x i64> %[[XOR_RES]], <8 x i64> %{{.*}}2961 return _mm512_mask_xor_epi64(__src, __k,__a, __b);2962}2963 2964__m512i test_mm512_maskz_xor_epi64(__mmask8 __k, __m512i __a, __m512i __b) {2965 // CHECK-LABEL: test_mm512_maskz_xor_epi642966 // CHECK: %[[XOR_RES:.*]] = xor <8 x i64>2967 // CHECK: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>2968 // CHECK: select <8 x i1> %[[MASK]], <8 x i64> %[[XOR_RES]], <8 x i64> %{{.*}}2969 return _mm512_maskz_xor_epi64(__k,__a, __b);2970}2971 2972__m512i test_mm512_and_epi32(__m512i __src,__mmask16 __k, __m512i __a, __m512i __b) {2973 // CHECK-LABEL: test_mm512_and_epi322974 // CHECK: and <16 x i32>2975 return _mm512_and_epi32(__a, __b);2976}2977TEST_CONSTEXPR(match_v16si(_mm512_and_epi32((__m512i)(__v16si){0, -1, 0, -1, 0, 0, -1, -1, 0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v16si){0, 0, -1, -1, 0, -1, 0, -1, 0, 0, -1, -1, 0, -1, 0, -1}), 0, 0, 0, -1, 0, 0, 0, -1, 0, 0, 0, -1, 0, 0, 0, -1));2978 2979__m512i test_mm512_and_epi64(__m512i __src,__mmask8 __k, __m512i __a, __m512i __b) {2980 // CHECK-LABEL: test_mm512_and_epi642981 // CHECK: and <8 x i64>2982 return _mm512_and_epi64(__a, __b);2983}2984TEST_CONSTEXPR(match_v8di(_mm512_and_epi64((__m512i)(__v8di){0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v8di){0, 0, -1, -1, 0, -1, 0, -1}), 0, 0, 0, -1, 0, 0, 0, -1));2985 2986__m512i test_mm512_or_epi32(__m512i __src,__mmask16 __k, __m512i __a, __m512i __b) {2987 // CHECK-LABEL: test_mm512_or_epi322988 // CHECK: or <16 x i32>2989 return _mm512_or_epi32(__a, __b);2990}2991TEST_CONSTEXPR(match_v16si(_mm512_or_epi32((__m512i)(__v16si){0, -1, 0, -1, 0, 0, -1, -1, 0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v16si){0, 0, -1, -1, 0, -1, 0, -1, 0, 0, -1, -1, 0, -1, 0, -1}), 0, -1, -1, -1, 0, -1, -1, -1, 0, -1, -1, -1, 0, -1, -1, -1));2992 2993__m512i test_mm512_or_epi64(__m512i __src,__mmask8 __k, __m512i __a, __m512i __b) {2994 // CHECK-LABEL: test_mm512_or_epi642995 // CHECK: or <8 x i64>2996 return _mm512_or_epi64(__a, __b);2997}2998TEST_CONSTEXPR(match_v8di(_mm512_or_epi64((__m512i)(__v8di){0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v8di){0, 0, -1, -1, 0, -1, 0, -1}), 0, -1, -1, -1, 0, -1, -1, -1));2999 3000__m512i test_mm512_xor_epi32(__m512i __src,__mmask16 __k, __m512i __a, __m512i __b) {3001 // CHECK-LABEL: test_mm512_xor_epi323002 // CHECK: xor <16 x i32>3003 return _mm512_xor_epi32(__a, __b);3004}3005TEST_CONSTEXPR(match_v16si(_mm512_xor_epi32((__m512i)(__v16si){0, -1, 0, -1, 0, 0, -1, -1, 0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v16si){0, 0, -1, -1, 0, -1, 0, -1, 0, 0, -1, -1, 0, -1, 0, -1}), 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0));3006 3007__m512i test_mm512_xor_epi64(__m512i __src,__mmask8 __k, __m512i __a, __m512i __b) {3008 // CHECK-LABEL: test_mm512_xor_epi643009 // CHECK: xor <8 x i64>3010 return _mm512_xor_epi64(__a, __b);3011}3012TEST_CONSTEXPR(match_v8di(_mm512_xor_epi64((__m512i)(__v8di){0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v8di){0, 0, -1, -1, 0, -1, 0, -1}), 0, -1, -1, 0, 0, -1, -1, 0));3013 3014__m512i test_mm512_maskz_andnot_epi32 (__mmask16 __k,__m512i __A, __m512i __B){3015 // CHECK-LABEL: test_mm512_maskz_andnot_epi323016 // CHECK: xor <16 x i32> %{{.*}}, splat (i32 -1)3017 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}3018 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}3019 return _mm512_maskz_andnot_epi32(__k,__A,__B);3020}3021 3022__m512i test_mm512_mask_andnot_epi32 (__mmask16 __k,__m512i __A, __m512i __B,3023 __m512i __src) {3024 // CHECK-LABEL: test_mm512_mask_andnot_epi323025 // CHECK: xor <16 x i32> %{{.*}}, splat (i32 -1)3026 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}3027 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}3028 return _mm512_mask_andnot_epi32(__src,__k,__A,__B);3029}3030 3031__m512i test_mm512_andnot_si512(__m512i __A, __m512i __B)3032{3033 //CHECK-LABEL: test_mm512_andnot_si5123034 //CHECK: load {{.*}}%__A.addr.i, align 643035 //CHECK: %not.i = xor{{.*}}, splat (i64 -1)3036 //CHECK: load {{.*}}%__B.addr.i, align 643037 //CHECK: and <8 x i64> %not.i,{{.*}}3038 3039 return _mm512_andnot_si512(__A, __B);3040}3041TEST_CONSTEXPR(match_v8di(_mm512_andnot_si512((__m512i)(__v8di){0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v8di){0, 0, -1, -1, 0, -1, 0, -1}), 0, 0, -1, 0, 0, -1, 0, 0));3042 3043__m512i test_mm512_andnot_epi32(__m512i __A, __m512i __B) {3044 // CHECK-LABEL: test_mm512_andnot_epi323045 // CHECK: xor <16 x i32> %{{.*}}, splat (i32 -1)3046 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}3047 return _mm512_andnot_epi32(__A,__B);3048}3049TEST_CONSTEXPR(match_v16si(_mm512_andnot_epi32((__m512i)(__v16si){0, -1, 0, -1, 0, 0, -1, -1, 0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v16si){0, 0, -1, -1, 0, -1, 0, -1, 0, 0, -1, -1, 0, -1, 0, -1}), 0, 0, -1, 0, 0, -1, 0, 0, 0, 0, -1, 0, 0, -1, 0, 0));3050 3051__m512i test_mm512_maskz_andnot_epi64 (__mmask8 __k,__m512i __A, __m512i __B) {3052 // CHECK-LABEL: test_mm512_maskz_andnot_epi643053 // CHECK: xor <8 x i64> %{{.*}}, splat (i64 -1)3054 // CHECK: and <8 x i64> %{{.*}}, %{{.*}}3055 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3056 return _mm512_maskz_andnot_epi64(__k,__A,__B);3057}3058 3059__m512i test_mm512_mask_andnot_epi64 (__mmask8 __k,__m512i __A, __m512i __B, 3060 __m512i __src) {3061 //CHECK-LABEL: test_mm512_mask_andnot_epi643062 // CHECK: xor <8 x i64> %{{.*}}, splat (i64 -1)3063 // CHECK: and <8 x i64> %{{.*}}, %{{.*}}3064 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3065 return _mm512_mask_andnot_epi64(__src,__k,__A,__B);3066}3067 3068__m512i test_mm512_andnot_epi64(__m512i __A, __m512i __B) {3069 //CHECK-LABEL: test_mm512_andnot_epi643070 // CHECK: xor <8 x i64> %{{.*}}, splat (i64 -1)3071 // CHECK: and <8 x i64> %{{.*}}, %{{.*}}3072 return _mm512_andnot_epi64(__A,__B);3073}3074TEST_CONSTEXPR(match_v8di(_mm512_andnot_epi64((__m512i)(__v8di){0, -1, 0, -1, 0, 0, -1, -1}, (__m512i)(__v8di){0, 0, -1, -1, 0, -1, 0, -1}), 0, 0, -1, 0, 0, -1, 0, 0));3075 3076__m512i test_mm512_maskz_sub_epi32 (__mmask16 __k,__m512i __A, __m512i __B) {3077 //CHECK-LABEL: test_mm512_maskz_sub_epi323078 //CHECK: sub <16 x i32> %{{.*}}, %{{.*}}3079 //CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}3080 return _mm512_maskz_sub_epi32(__k,__A,__B);3081}3082 3083TEST_CONSTEXPR(match_v16si(_mm512_maskz_sub_epi32(0xB3F3, (__m512i)(__v16si){ -32, -33, -34, 35, 36, 37, -38, -39, 40, 41, -42, 43, -44, -45, 46, -47}, (__m512i)(__v16si){ 1, 2, -3, -4, -5, -6, -7, 8, 9, 10, 11, -12, 13, 14, -15, -16}), -33, -35, 0, 0, 41, 43, -31, -47, 31, 31, 0, 0, -57, -59, 0, -31));3084 3085__m512i test_mm512_mask_sub_epi32 (__mmask16 __k,__m512i __A, __m512i __B, 3086 __m512i __src) {3087 //CHECK-LABEL: test_mm512_mask_sub_epi323088 //CHECK: sub <16 x i32> %{{.*}}, %{{.*}}3089 //CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}3090 return _mm512_mask_sub_epi32(__src,__k,__A,__B);3091}3092 3093TEST_CONSTEXPR(match_v16si(_mm512_mask_sub_epi32((__m512i)(__v16si){ 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0xB3F3, (__m512i)(__v16si){ -32, -33, -34, 35, 36, 37, -38, -39, 40, 41, -42, 43, -44, -45, 46, -47}, (__m512i)(__v16si){ 1, 2, -3, -4, -5, -6, -7, 8, 9, 10, 11, -12, 13, 14, -15, -16}), -33, -35, 99, 99, 41, 43, -31, -47, 31, 31, 99, 99, -57, -59, 99, -31));3094 3095__m512i test_mm512_sub_epi32(__m512i __A, __m512i __B) {3096 //CHECK-LABEL: test_mm512_sub_epi323097 //CHECK: sub <16 x i32>3098 return _mm512_sub_epi32(__A,__B);3099}3100 3101TEST_CONSTEXPR(match_v16si(_mm512_sub_epi32((__m512i)(__v16si){ -32, -33, -34, 35, 36, 37, -38, -39, 40, 41, -42, 43, -44, -45, 46, -47}, (__m512i)(__v16si){ 1, 2, -3, -4, -5, -6, -7, 8, 9, 10, 11, -12, 13, 14, -15, -16}), -33, -35, -31, 39, 41, 43, -31, -47, 31, 31, -53, 55, -57, -59, 61, -31));3102 3103__m512i test_mm512_maskz_sub_epi64 (__mmask8 __k,__m512i __A, __m512i __B) {3104 //CHECK-LABEL: test_mm512_maskz_sub_epi643105 //CHECK: sub <8 x i64> %{{.*}}, %{{.*}}3106 //CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3107 return _mm512_maskz_sub_epi64(__k,__A,__B);3108}3109 3110TEST_CONSTEXPR(match_v8di(_mm512_maskz_sub_epi64(0x6A, (__m512i)(__v8di){ -16, 17, -18, 19, -20, 21, 22, 23}, (__m512i)(__v8di){ -1, -2, -3, 4, 5, -6, -7, 8}), 0, 19, 0, 15, 0, 27, 29, 0));3111 3112__m512i test_mm512_mask_sub_epi64 (__mmask8 __k,__m512i __A, __m512i __B, 3113 __m512i __src) {3114 //CHECK-LABEL: test_mm512_mask_sub_epi643115 //CHECK: sub <8 x i64> %{{.*}}, %{{.*}}3116 //CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3117 return _mm512_mask_sub_epi64(__src,__k,__A,__B);3118}3119 3120TEST_CONSTEXPR(match_v8di(_mm512_mask_sub_epi64((__m512i)(__v8di){ 99, 99, 99, 99, 99, 99, 99, 99}, 0x6A, (__m512i)(__v8di){ -16, 17, -18, 19, -20, 21, 22, 23}, (__m512i)(__v8di){ -1, -2, -3, 4, 5, -6, -7, 8}), 99, 19, 99, 15, 99, 27, 29, 99));3121 3122__m512i test_mm512_sub_epi64(__m512i __A, __m512i __B) {3123 //CHECK-LABEL: test_mm512_sub_epi643124 //CHECK: sub <8 x i64>3125 return _mm512_sub_epi64(__A,__B);3126}3127 3128TEST_CONSTEXPR(match_v8di(_mm512_sub_epi64((__m512i)(__v8di){ -16, 17, -18, 19, -20, 21, 22, 23}, (__m512i)(__v8di){ -1, -2, -3, 4, 5, -6, -7, 8}), -15, 19, -15, 15, -25, 27, 29, 15));3129 3130__m512i test_mm512_maskz_add_epi32 (__mmask16 __k,__m512i __A, __m512i __B) {3131 //CHECK-LABEL: test_mm512_maskz_add_epi323132 //CHECK: add <16 x i32> %{{.*}}, %{{.*}}3133 //CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}3134 return _mm512_maskz_add_epi32(__k,__A,__B);3135}3136 3137TEST_CONSTEXPR(match_v16si(_mm512_maskz_add_epi32(0xB3F3, (__m512i)(__v16si){ -32, -33, -34, 35, 36, 37, -38, -39, 40, 41, -42, 43, -44, -45, 46, -47}, (__m512i)(__v16si){ 1, 2, -3, -4, -5, -6, -7, 8, 9, 10, 11, -12, 13, 14, -15, -16}), -31, -31, 0, 0, 31, 31, -45, -31, 49, 51, 0, 0, -31, -31, 0, -63));3138 3139__m512i test_mm512_mask_add_epi32 (__mmask16 __k,__m512i __A, __m512i __B, 3140 __m512i __src) {3141 //CHECK-LABEL: test_mm512_mask_add_epi323142 //CHECK: add <16 x i32> %{{.*}}, %{{.*}}3143 //CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}3144 return _mm512_mask_add_epi32(__src,__k,__A,__B);3145}3146 3147TEST_CONSTEXPR(match_v16si(_mm512_mask_add_epi32((__m512i)(__v16si){ 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0xB3F3, (__m512i)(__v16si){ -32, -33, -34, 35, 36, 37, -38, -39, 40, 41, -42, 43, -44, -45, 46, -47}, (__m512i)(__v16si){ 1, 2, -3, -4, -5, -6, -7, 8, 9, 10, 11, -12, 13, 14, -15, -16}), -31, -31, 99, 99, 31, 31, -45, -31, 49, 51, 99, 99, -31, -31, 99, -63));3148 3149__m512i test_mm512_add_epi32(__m512i __A, __m512i __B) {3150 //CHECK-LABEL: test_mm512_add_epi323151 //CHECK: add <16 x i32>3152 return _mm512_add_epi32(__A,__B);3153}3154 3155TEST_CONSTEXPR(match_v16si(_mm512_add_epi32((__m512i)(__v16si){ -32, -33, -34, 35, 36, 37, -38, -39, 40, 41, -42, 43, -44, -45, 46, -47}, (__m512i)(__v16si){ 1, 2, -3, -4, -5, -6, -7, 8, 9, 10, 11, -12, 13, 14, -15, -16}), -31, -31, -37, 31, 31, 31, -45, -31, 49, 51, -31, 31, -31, -31, 31, -63));3156 3157__m512i test_mm512_maskz_add_epi64 (__mmask8 __k,__m512i __A, __m512i __B) {3158 //CHECK-LABEL: test_mm512_maskz_add_epi643159 //CHECK: add <8 x i64> %{{.*}}, %{{.*}}3160 //CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3161 return _mm512_maskz_add_epi64(__k,__A,__B);3162}3163 3164TEST_CONSTEXPR(match_v8di(_mm512_maskz_add_epi64(0x6A, (__m512i)(__v8di){ -16, 17, -18, 19, -20, 21, 22, 23}, (__m512i)(__v8di){ -1, -2, -3, 4, 5, -6, -7, 8}), 0, 15, 0, 23, 0, 15, 15, 0));3165 3166__m512i test_mm512_mask_add_epi64 (__mmask8 __k,__m512i __A, __m512i __B, 3167 __m512i __src) {3168 //CHECK-LABEL: test_mm512_mask_add_epi643169 //CHECK: add <8 x i64> %{{.*}}, %{{.*}}3170 //CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3171 return _mm512_mask_add_epi64(__src,__k,__A,__B);3172}3173 3174TEST_CONSTEXPR(match_v8di(_mm512_mask_add_epi64((__m512i)(__v8di){ 99, 99, 99, 99, 99, 99, 99, 99}, 0x6A, (__m512i)(__v8di){ -16, 17, -18, 19, -20, 21, 22, 23}, (__m512i)(__v8di){ -1, -2, -3, 4, 5, -6, -7, 8}), 99, 15, 99, 23, 99, 15, 15, 99));3175 3176__m512i test_mm512_add_epi64(__m512i __A, __m512i __B) {3177 //CHECK-LABEL: test_mm512_add_epi643178 //CHECK: add <8 x i64>3179 return _mm512_add_epi64(__A,__B);3180}3181 3182TEST_CONSTEXPR(match_v8di(_mm512_add_epi64((__m512i)(__v8di){ -16, 17, -18, 19, -20, 21, 22, 23}, (__m512i)(__v8di){ -1, -2, -3, 4, 5, -6, -7, 8}), -17, 15, -21, 23, -15, 15, 15, 31));3183 3184__m512i test_mm512_mul_epi32(__m512i __A, __m512i __B) {3185 //CHECK-LABEL: test_mm512_mul_epi323186 //CHECK: shl <8 x i64> %{{.*}}, splat (i64 32)3187 //CHECK: ashr <8 x i64> %{{.*}}, splat (i64 32)3188 //CHECK: shl <8 x i64> %{{.*}}, splat (i64 32)3189 //CHECK: ashr <8 x i64> %{{.*}}, splat (i64 32)3190 //CHECK: mul <8 x i64> %{{.*}}, %{{.*}}3191 return _mm512_mul_epi32(__A,__B);3192}3193TEST_CONSTEXPR(match_v8di(_mm512_mul_epi32((__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), -32, 84, -120, 140, -144, 132, -104, -60));3194 3195__m512i test_mm512_maskz_mul_epi32 (__mmask8 __k,__m512i __A, __m512i __B) {3196 //CHECK-LABEL: test_mm512_maskz_mul_epi323197 //CHECK: shl <8 x i64> %{{.*}}, splat (i64 32)3198 //CHECK: ashr <8 x i64> %{{.*}}, splat (i64 32)3199 //CHECK: shl <8 x i64> %{{.*}}, splat (i64 32)3200 //CHECK: ashr <8 x i64> %{{.*}}, splat (i64 32)3201 //CHECK: mul <8 x i64> %{{.*}}, %{{.*}}3202 //CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3203 return _mm512_maskz_mul_epi32(__k,__A,__B);3204}3205TEST_CONSTEXPR(match_m512i(_mm512_maskz_mul_epi32((__mmask8)0b11110000, (__m512i){1, 2, 3, 4, 5, 6, 7, 8}, (__m512i){10, 20, 30, 40, 50, 60, 70, 80}), 0, 0, 0, 0, 250, 360, 490, 640));3206 3207__m512i test_mm512_mask_mul_epi32 (__mmask8 __k,__m512i __A, __m512i __B, __m512i __src) {3208 //CHECK-LABEL: test_mm512_mask_mul_epi323209 //CHECK: shl <8 x i64> %{{.*}}, splat (i64 32)3210 //CHECK: ashr <8 x i64> %{{.*}}, splat (i64 32)3211 //CHECK: shl <8 x i64> %{{.*}}, splat (i64 32)3212 //CHECK: ashr <8 x i64> %{{.*}}, splat (i64 32)3213 //CHECK: mul <8 x i64> %{{.*}}, %{{.*}}3214 //CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3215 return _mm512_mask_mul_epi32(__src,__k,__A,__B);3216}3217TEST_CONSTEXPR(match_m512i(_mm512_mask_mul_epi32((__m512i){1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000}, (__mmask8)0b11110000, (__m512i){1, 2, 3, 4, 5, 6, 7, 8}, (__m512i){10, 20, 30, 40, 50, 60, 70, 80}), 1000, 2000, 3000, 4000, 250, 360, 490, 640));3218 3219__m512i test_mm512_mul_epu32 (__m512i __A, __m512i __B) {3220 //CHECK-LABEL: test_mm512_mul_epu323221 //CHECK: and <8 x i64> %{{.*}}, splat (i64 4294967295)3222 //CHECK: and <8 x i64> %{{.*}}, splat (i64 4294967295)3223 //CHECK: mul <8 x i64> %{{.*}}, %{{.*}}3224 return _mm512_mul_epu32(__A,__B);3225}3226TEST_CONSTEXPR(match_m512i(_mm512_mul_epu32((__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), 4294967264, 84, 21474836360, 140, 38654705520, 132, 55834574744, 64424509380));3227 3228__m512i test_mm512_maskz_mul_epu32 (__mmask8 __k,__m512i __A, __m512i __B) {3229 //CHECK-LABEL: test_mm512_maskz_mul_epu323230 //CHECK: and <8 x i64> %{{.*}}, splat (i64 4294967295)3231 //CHECK: and <8 x i64> %{{.*}}, splat (i64 4294967295)3232 //CHECK: mul <8 x i64> %{{.*}}, %{{.*}}3233 //CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3234 return _mm512_maskz_mul_epu32(__k,__A,__B);3235}3236TEST_CONSTEXPR(match_m512i(_mm512_maskz_mul_epu32((__mmask8)0b11110000, (__m512i){1, 2, 3, 4, 5, 6, 7, 8}, (__m512i){10, 20, 30, 40, 50, 60, 70, 80}), 0, 0, 0, 0, 250, 360, 490, 640));3237 3238__m512i test_mm512_mask_mul_epu32 (__mmask8 __k,__m512i __A, __m512i __B, __m512i __src) {3239 //CHECK-LABEL: test_mm512_mask_mul_epu323240 //CHECK: and <8 x i64> %{{.*}}, splat (i64 4294967295)3241 //CHECK: and <8 x i64> %{{.*}}, splat (i64 4294967295)3242 //CHECK: mul <8 x i64> %{{.*}}, %{{.*}}3243 //CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3244 return _mm512_mask_mul_epu32(__src,__k,__A,__B);3245}3246TEST_CONSTEXPR(match_m512i(_mm512_mask_mul_epu32((__m512i){1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000}, (__mmask8)0b11110000, (__m512i){1, 2, 3, 4, 5, 6, 7, 8}, (__m512i){10, 20, 30, 40, 50, 60, 70, 80}), 1000, 2000, 3000, 4000, 250, 360, 490, 640));3247 3248__m512i test_mm512_maskz_mullo_epi32 (__mmask16 __k,__m512i __A, __m512i __B) {3249 //CHECK-LABEL: test_mm512_maskz_mullo_epi323250 //CHECK: mul <16 x i32> %{{.*}}, %{{.*}}3251 //CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}3252 return _mm512_maskz_mullo_epi32(__k,__A,__B);3253}3254TEST_CONSTEXPR(match_v16si(_mm512_maskz_mullo_epi32(0x00FF, (__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-2, +3, +4, +5, -6, +7, +8, +9, -10, +11, +12, +13, -14, +15, +16, +17}), -2, -6, +12, -20, -30, -42, +56, -72, 0, 0, 0, 0, 0, 0, 0, 0));3255 3256__m512i test_mm512_mask_mullo_epi32 (__mmask16 __k,__m512i __A, __m512i __B, __m512i __src) {3257 //CHECK-LABEL: test_mm512_mask_mullo_epi323258 //CHECK: mul <16 x i32> %{{.*}}, %{{.*}}3259 //CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}3260 return _mm512_mask_mullo_epi32(__src,__k,__A,__B);3261}3262TEST_CONSTEXPR(match_v16si(_mm512_mask_mullo_epi32((__m512i)(__v16si){-100, +200, -300, +400, -500, +600, -700, +800, -900, +1000, -1100, +1200, -1300, +1400, -1500, +1600}, 0x00FF, (__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-2, +3, +4, +5, -6, +7, +8, +9, -10, +11, +12, +13, -14, +15, +16, +17}), -2, -6, +12, -20, -30, -42, +56, -72, -900, +1000, -1100, +1200, -1300, +1400, -1500, +1600));3263 3264__m512i test_mm512_mullo_epi32(__m512i __A, __m512i __B) {3265 //CHECK-LABEL: test_mm512_mullo_epi323266 //CHECK: mul <16 x i32>3267 return _mm512_mullo_epi32(__A,__B);3268}3269TEST_CONSTEXPR(match_v16si(_mm512_mullo_epi32((__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-2, +3, +4, +5, -6, +7, +8, +9, -10, +11, +12, +13, -14, +15, +16, +17}), -2, -6, +12, -20, -30, -42, +56, -72, -90, -110, +132, -156, -182, -210, +240, -272));3270 3271__m512i test_mm512_mullox_epi64 (__m512i __A, __m512i __B) {3272 // CHECK-LABEL: test_mm512_mullox_epi643273 // CHECK: mul <8 x i64>3274 return (__m512i) _mm512_mullox_epi64(__A, __B);3275}3276TEST_CONSTEXPR(match_v8di(_mm512_mullox_epi64((__m512i)(__v8di){+1, -2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-2, +3, +4, +5, -6, +7, +8, +9}), -2, -6, +12, -20, -30, -42, +56, -72));3277 3278__m512i test_mm512_mask_mullox_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {3279 // CHECK-LABEL: test_mm512_mask_mullox_epi643280 // CHECK: mul <8 x i64> %{{.*}}, %{{.*}}3281 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}3282 return (__m512i) _mm512_mask_mullox_epi64(__W, __U, __A, __B);3283}3284TEST_CONSTEXPR(match_v8di(_mm512_mask_mullox_epi64((__m512i)(__v8di){-100, +200, -300, +400, -500, +600, -700, +800}, 0x00FF, (__m512i)(__v8di){+1, -2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-2, +3, +4, +5, -6, +7, +8, +9}), -2, -6, +12, -20, -30, -42, +56, -72));3285 3286__m512d test_mm512_add_round_pd(__m512d __A, __m512d __B) {3287 // CHECK-LABEL: test_mm512_add_round_pd3288 // CHECK: @llvm.x86.avx512.add.pd.5123289 return _mm512_add_round_pd(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3290}3291__m512d test_mm512_mask_add_round_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {3292 // CHECK-LABEL: test_mm512_mask_add_round_pd3293 // CHECK: @llvm.x86.avx512.add.pd.5123294 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3295 return _mm512_mask_add_round_pd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3296}3297__m512d test_mm512_maskz_add_round_pd(__mmask8 __U, __m512d __A, __m512d __B) {3298 // CHECK-LABEL: test_mm512_maskz_add_round_pd3299 // CHECK: @llvm.x86.avx512.add.pd.5123300 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3301 return _mm512_maskz_add_round_pd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3302}3303__m512d test_mm512_mask_add_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {3304 // CHECK-LABEL: test_mm512_mask_add_pd3305 // CHECK: fadd <8 x double> %{{.*}}, %{{.*}}3306 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3307 return _mm512_mask_add_pd(__W,__U,__A,__B); 3308}3309TEST_CONSTEXPR(match_m512d(_mm512_mask_add_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__mmask8)0b11110000, (__m512d){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}, (__m512d){100.0, 200.0, 300.0, 400.0, 500.0, 600.0, 700.0, 800.0}), 1.0, 2.0, 3.0, 4.0, 550.0, 660.0, 770.0, 880.0));3310 3311__m512d test_mm512_maskz_add_pd(__mmask8 __U, __m512d __A, __m512d __B) {3312 // CHECK-LABEL: test_mm512_maskz_add_pd3313 // CHECK: fadd <8 x double> %{{.*}}, %{{.*}}3314 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3315 return _mm512_maskz_add_pd(__U,__A,__B); 3316}3317TEST_CONSTEXPR(match_m512d(_mm512_maskz_add_pd((__mmask8)0b11110000, (__m512d){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}, (__m512d){100.0, 200.0, 300.0, 400.0, 500.0, 600.0, 700.0, 800.0}), 0.0, 0.0, 0.0, 0.0, 550.0, 660.0, 770.0, 880.0));3318 3319__m512 test_mm512_add_round_ps(__m512 __A, __m512 __B) {3320 // CHECK-LABEL: test_mm512_add_round_ps3321 // CHECK: @llvm.x86.avx512.add.ps.5123322 return _mm512_add_round_ps(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3323}3324__m512 test_mm512_mask_add_round_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {3325 // CHECK-LABEL: test_mm512_mask_add_round_ps3326 // CHECK: @llvm.x86.avx512.add.ps.5123327 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3328 return _mm512_mask_add_round_ps(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3329}3330__m512 test_mm512_maskz_add_round_ps(__mmask16 __U, __m512 __A, __m512 __B) {3331 // CHECK-LABEL: test_mm512_maskz_add_round_ps3332 // CHECK: @llvm.x86.avx512.add.ps.5123333 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3334 return _mm512_maskz_add_round_ps(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3335}3336__m512 test_mm512_mask_add_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {3337 // CHECK-LABEL: test_mm512_mask_add_ps3338 // CHECK: fadd <16 x float> %{{.*}}, %{{.*}}3339 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3340 return _mm512_mask_add_ps(__W,__U,__A,__B); 3341}3342TEST_CONSTEXPR(match_m512(_mm512_mask_add_ps((__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__mmask16)0b1111111100000000, (__m512){10.0f, 20.0f, 30.0f, 40.0f, 50.0f, 60.0f, 70.0f, 80.0f, 90.0f, 100.0f, 110.0f, 120.0f, 130.0f, 140.0f, 150.0f, 160.0f}, (__m512){100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, 900.0f, 1000.0f, 1100.0f, 1200.0f, 1300.0f, 1400.0f, 1500.0f, 1600.0f}), 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 990.0f, 1100.0f, 1210.0f, 1320.0f, 1430.0f, 1540.0f, 1650.0f, 1760.0f));3343 3344__m512 test_mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) {3345 // CHECK-LABEL: test_mm512_maskz_add_ps3346 // CHECK: fadd <16 x float> %{{.*}}, %{{.*}}3347 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3348 return _mm512_maskz_add_ps(__U,__A,__B); 3349}3350TEST_CONSTEXPR(match_m512(_mm512_maskz_add_ps((__mmask16)0b1111111100000000, (__m512){10.0f, 20.0f, 30.0f, 40.0f, 50.0f, 60.0f, 70.0f, 80.0f, 90.0f, 100.0f, 110.0f, 120.0f, 130.0f, 140.0f, 150.0f, 160.0f}, (__m512){100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, 900.0f, 1000.0f, 1100.0f, 1200.0f, 1300.0f, 1400.0f, 1500.0f, 1600.0f}), 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 990.0f, 1100.0f, 1210.0f, 1320.0f, 1430.0f, 1540.0f, 1650.0f, 1760.0f));3351 3352__m128 test_mm_add_round_ss(__m128 __A, __m128 __B) {3353 // CHECK-LABEL: test_mm_add_round_ss3354 // CHECK: @llvm.x86.avx512.mask.add.ss.round3355 return _mm_add_round_ss(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3356}3357__m128 test_mm_mask_add_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3358 // CHECK-LABEL: test_mm_mask_add_round_ss3359 // CHECK: @llvm.x86.avx512.mask.add.ss.round3360 return _mm_mask_add_round_ss(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3361}3362__m128 test_mm_maskz_add_round_ss(__mmask8 __U, __m128 __A, __m128 __B) {3363 // CHECK-LABEL: test_mm_maskz_add_round_ss3364 // CHECK: @llvm.x86.avx512.mask.add.ss.round3365 return _mm_maskz_add_round_ss(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3366}3367__m128 test_mm_mask_add_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3368 // CHECK-LABEL: test_mm_mask_add_ss3369 // CHECK-NOT: @llvm.x86.avx512.mask.add.ss.round3370 // CHECK: extractelement <4 x float> %{{.*}}, i32 03371 // CHECK: extractelement <4 x float> %{{.*}}, i32 03372 // CHECK: fadd float %{{.*}}, %{{.*}}3373 // CHECK: insertelement <4 x float> %{{.*}}, i32 03374 // CHECK: extractelement <4 x float> %{{.*}}, i64 03375 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 03376 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3377 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03378 // CHECK-NEXT: select i1 %{{.*}}, float %{{.*}}, float %{{.*}}3379 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 03380 return _mm_mask_add_ss(__W,__U,__A,__B); 3381}3382TEST_CONSTEXPR(match_m128(_mm_mask_add_ss((__m128)(__v4sf){10.0f, 100.0f, 200.0f, 300.0f}, 0x1,(__m128)(__v4sf){1.25f, 3.0f, 4.0f, 5.0f},(__m128)(__v4sf){2.75f, 6.0f, 7.0f, 8.0f}),4.0f, 100.0f, 200.0f, 300.0f));3383 3384__m128 test_mm_maskz_add_ss(__mmask8 __U, __m128 __A, __m128 __B) {3385 // CHECK-LABEL: test_mm_maskz_add_ss3386 // CHECK-NOT: @llvm.x86.avx512.mask.add.ss.round3387 // CHECK: extractelement <4 x float> %{{.*}}, i32 03388 // CHECK: extractelement <4 x float> %{{.*}}, i32 03389 // CHECK: fadd float %{{.*}}, %{{.*}}3390 // CHECK: insertelement <4 x float> %{{.*}}, i32 03391 // CHECK: extractelement <4 x float> %{{.*}}, i64 03392 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 03393 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3394 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03395 // CHECK-NEXT: select i1 %{{.*}}, float %{{.*}}, float %{{.*}}3396 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 03397 return _mm_maskz_add_ss(__U,__A,__B); 3398}3399TEST_CONSTEXPR(match_m128(_mm_maskz_add_ss(0x1, (__m128)(__v4sf){1.25f, 3.0f, 4.0f, 5.0f}, (__m128)(__v4sf){2.75f, 6.0f, 7.0f, 8.0f}), 4.0f, 0.0f, 0.0f, 0.0f));3400 3401__m128d test_mm_add_round_sd(__m128d __A, __m128d __B) {3402 // CHECK-LABEL: test_mm_add_round_sd3403 // CHECK: @llvm.x86.avx512.mask.add.sd.round3404 return _mm_add_round_sd(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3405}3406__m128d test_mm_mask_add_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3407 // CHECK-LABEL: test_mm_mask_add_round_sd3408 // CHECK: @llvm.x86.avx512.mask.add.sd.round3409 return _mm_mask_add_round_sd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3410}3411__m128d test_mm_maskz_add_round_sd(__mmask8 __U, __m128d __A, __m128d __B) {3412 // CHECK-LABEL: test_mm_maskz_add_round_sd3413 // CHECK: @llvm.x86.avx512.mask.add.sd.round3414 return _mm_maskz_add_round_sd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3415}3416__m128d test_mm_mask_add_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3417 // CHECK-LABEL: test_mm_mask_add_sd3418 // CHECK-NOT: @llvm.x86.avx512.mask.add.sd.round3419 // CHECK: extractelement <2 x double> %{{.*}}, i32 03420 // CHECK: extractelement <2 x double> %{{.*}}, i32 03421 // CHECK: fadd double %{{.*}}, %{{.*}}3422 // CHECK: insertelement <2 x double> {{.*}}, i32 03423 // CHECK: extractelement <2 x double> %{{.*}}, i64 03424 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 03425 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3426 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03427 // CHECK-NEXT: select i1 %{{.*}}, double %{{.*}}, double %{{.*}}3428 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 03429 return _mm_mask_add_sd(__W,__U,__A,__B); 3430}3431TEST_CONSTEXPR(match_m128d(_mm_mask_add_sd((__m128d)(__v2df){10.0, 999.0}, 0x1, (__m128d)(__v2df){5.5, 77.0}, (__m128d)(__v2df){0.25, 88.0}), 5.75, 999.0));3432 3433__m128d test_mm_maskz_add_sd(__mmask8 __U, __m128d __A, __m128d __B) {3434 // CHECK-LABEL: test_mm_maskz_add_sd3435 // CHECK-NOT: @llvm.x86.avx512.mask.add.sd.round3436 // CHECK: extractelement <2 x double> %{{.*}}, i32 03437 // CHECK: extractelement <2 x double> %{{.*}}, i32 03438 // CHECK: fadd double %{{.*}}, %{{.*}}3439 // CHECK: insertelement <2 x double> {{.*}}, i32 03440 // CHECK: extractelement <2 x double> %{{.*}}, i64 03441 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 03442 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3443 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03444 // CHECK-NEXT: select i1 %{{.*}}, double %{{.*}}, double %{{.*}}3445 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 03446 return _mm_maskz_add_sd(__U,__A,__B); 3447}3448TEST_CONSTEXPR(match_m128d(_mm_maskz_add_sd(0x1, (__m128d)(__v2df){5.5, 77.0}, (__m128d)(__v2df){0.25, 88.0}), 5.75, 0.0));3449 3450__m512d test_mm512_sub_round_pd(__m512d __A, __m512d __B) {3451 // CHECK-LABEL: test_mm512_sub_round_pd3452 // CHECK: @llvm.x86.avx512.sub.pd.5123453 return _mm512_sub_round_pd(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3454}3455__m512d test_mm512_mask_sub_round_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {3456 // CHECK-LABEL: test_mm512_mask_sub_round_pd3457 // CHECK: @llvm.x86.avx512.sub.pd.5123458 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3459 return _mm512_mask_sub_round_pd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3460}3461__m512d test_mm512_maskz_sub_round_pd(__mmask8 __U, __m512d __A, __m512d __B) {3462 // CHECK-LABEL: test_mm512_maskz_sub_round_pd3463 // CHECK: @llvm.x86.avx512.sub.pd.5123464 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3465 return _mm512_maskz_sub_round_pd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3466}3467__m512d test_mm512_mask_sub_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {3468 // CHECK-LABEL: test_mm512_mask_sub_pd3469 // CHECK: fsub <8 x double> %{{.*}}, %{{.*}}3470 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3471 return _mm512_mask_sub_pd(__W,__U,__A,__B); 3472}3473TEST_CONSTEXPR(match_m512d(_mm512_mask_sub_pd((__m512d){100.0, 200.0, 300.0, 400.0, 500.0, 600.0, 700.0, 800.0}, (__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 100.0, 200.0, 300.0, 400.0, -45.0, -54.0, -63.0, -72.0));3474 3475__m512d test_mm512_maskz_sub_pd(__mmask8 __U, __m512d __A, __m512d __B) {3476 // CHECK-LABEL: test_mm512_maskz_sub_pd3477 // CHECK: fsub <8 x double> %{{.*}}, %{{.*}}3478 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3479 return _mm512_maskz_sub_pd(__U,__A,__B); 3480}3481TEST_CONSTEXPR(match_m512d(_mm512_maskz_sub_pd((__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 0.0, 0.0, 0.0, 0.0, -45.0, -54.0, -63.0, -72.0));3482 3483__m512 test_mm512_sub_round_ps(__m512 __A, __m512 __B) {3484 // CHECK-LABEL: test_mm512_sub_round_ps3485 // CHECK: @llvm.x86.avx512.sub.ps.5123486 return _mm512_sub_round_ps(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3487}3488__m512 test_mm512_mask_sub_round_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {3489 // CHECK-LABEL: test_mm512_mask_sub_round_ps3490 // CHECK: @llvm.x86.avx512.sub.ps.5123491 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3492 return _mm512_mask_sub_round_ps(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3493}3494__m512 test_mm512_maskz_sub_round_ps(__mmask16 __U, __m512 __A, __m512 __B) {3495 // CHECK-LABEL: test_mm512_maskz_sub_round_ps3496 // CHECK: @llvm.x86.avx512.sub.ps.5123497 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3498 return _mm512_maskz_sub_round_ps(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3499}3500__m512 test_mm512_mask_sub_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {3501 // CHECK-LABEL: test_mm512_mask_sub_ps3502 // CHECK: fsub <16 x float> %{{.*}}, %{{.*}}3503 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3504 return _mm512_mask_sub_ps(__W,__U,__A,__B); 3505}3506TEST_CONSTEXPR(match_m512(_mm512_mask_sub_ps((__m512){100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, 900.0f, 1000.0f, 1100.0f, 1200.0f, 1300.0f, 1400.0f, 1500.0f, 1600.0f}, (__mmask16)0b1111111100000000, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){10.0f, 20.0f, 30.0f, 40.0f, 50.0f, 60.0f, 70.0f, 80.0f, 90.0f, 100.0f, 110.0f, 120.0f, 130.0f, 140.0f, 150.0f, 160.0f}), 100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, -81.0f, -90.0f, -99.0f, -108.0f, -117.0f, -126.0f, -135.0f, -144.0f));3507 3508__m512 test_mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) {3509 // CHECK-LABEL: test_mm512_maskz_sub_ps3510 // CHECK: fsub <16 x float> %{{.*}}, %{{.*}}3511 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3512 return _mm512_maskz_sub_ps(__U,__A,__B); 3513}3514TEST_CONSTEXPR(match_m512(_mm512_maskz_sub_ps((__mmask16)0b1111111100000000, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){10.0f, 20.0f, 30.0f, 40.0f, 50.0f, 60.0f, 70.0f, 80.0f, 90.0f, 100.0f, 110.0f, 120.0f, 130.0f, 140.0f, 150.0f, 160.0f}), 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, -81.0f, -90.0f, -99.0f, -108.0f, -117.0f, -126.0f, -135.0f, -144.0f));3515 3516__m128 test_mm_sub_round_ss(__m128 __A, __m128 __B) {3517 // CHECK-LABEL: test_mm_sub_round_ss3518 // CHECK: @llvm.x86.avx512.mask.sub.ss.round3519 return _mm_sub_round_ss(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3520}3521__m128 test_mm_mask_sub_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3522 // CHECK-LABEL: test_mm_mask_sub_round_ss3523 // CHECK: @llvm.x86.avx512.mask.sub.ss.round3524 return _mm_mask_sub_round_ss(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3525}3526__m128 test_mm_maskz_sub_round_ss(__mmask8 __U, __m128 __A, __m128 __B) {3527 // CHECK-LABEL: test_mm_maskz_sub_round_ss3528 // CHECK: @llvm.x86.avx512.mask.sub.ss.round3529 return _mm_maskz_sub_round_ss(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3530}3531__m128 test_mm_mask_sub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3532 // CHECK-LABEL: test_mm_mask_sub_ss3533 // CHECK-NOT: @llvm.x86.avx512.mask.sub.ss.round3534 // CHECK: extractelement <4 x float> %{{.*}}, i32 03535 // CHECK: extractelement <4 x float> %{{.*}}, i32 03536 // CHECK: fsub float %{{.*}}, %{{.*}}3537 // CHECK: insertelement <4 x float> {{.*}}, i32 03538 // CHECK: extractelement <4 x float> %{{.*}}, i64 03539 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 03540 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3541 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03542 // CHECK-NEXT: select i1 %{{.*}}, float %{{.*}}, float %{{.*}}3543 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 03544 return _mm_mask_sub_ss(__W,__U,__A,__B); 3545}3546TEST_CONSTEXPR(match_m128(_mm_mask_sub_ss((__m128)(__v4sf){-1.0f, 10.0f, 20.0f, 30.0f}, 0x1, (__m128)(__v4sf){7.0f, 3.0f, 4.0f, 5.0f}, (__m128)(__v4sf){2.5f, 6.0f, 7.0f, 8.0f}), 4.5f, 10.0f, 20.0f, 30.0f));3547 3548__m128 test_mm_maskz_sub_ss(__mmask8 __U, __m128 __A, __m128 __B) {3549 // CHECK-LABEL: test_mm_maskz_sub_ss3550 // CHECK-NOT: @llvm.x86.avx512.mask.sub.ss.round3551 // CHECK: extractelement <4 x float> %{{.*}}, i32 03552 // CHECK: extractelement <4 x float> %{{.*}}, i32 03553 // CHECK: fsub float %{{.*}}, %{{.*}}3554 // CHECK: insertelement <4 x float> {{.*}}, i32 03555 // CHECK: extractelement <4 x float> %{{.*}}, i64 03556 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 03557 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3558 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03559 // CHECK-NEXT: select i1 %{{.*}}, float %{{.*}}, float %{{.*}}3560 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 03561 return _mm_maskz_sub_ss(__U,__A,__B); 3562}3563TEST_CONSTEXPR(match_m128(_mm_maskz_sub_ss(0x1, (__m128)(__v4sf){7.0f, 3.0f, 4.0f, 5.0f}, (__m128)(__v4sf){2.5f, 6.0f, 7.0f, 8.0f}), 4.5f, 0.0f, 0.0f, 0.0f));3564 3565__m128d test_mm_sub_round_sd(__m128d __A, __m128d __B) {3566 // CHECK-LABEL: test_mm_sub_round_sd3567 // CHECK: @llvm.x86.avx512.mask.sub.sd.round3568 return _mm_sub_round_sd(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3569}3570__m128d test_mm_mask_sub_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3571 // CHECK-LABEL: test_mm_mask_sub_round_sd3572 // CHECK: @llvm.x86.avx512.mask.sub.sd.round3573 return _mm_mask_sub_round_sd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3574}3575__m128d test_mm_maskz_sub_round_sd(__mmask8 __U, __m128d __A, __m128d __B) {3576 // CHECK-LABEL: test_mm_maskz_sub_round_sd3577 // CHECK: @llvm.x86.avx512.mask.sub.sd.round3578 return _mm_maskz_sub_round_sd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3579}3580__m128d test_mm_mask_sub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3581 // CHECK-LABEL: test_mm_mask_sub_sd3582 // CHECK-NOT: @llvm.x86.avx512.mask.sub.sd.round3583 // CHECK: extractelement <2 x double> %{{.*}}, i32 03584 // CHECK: extractelement <2 x double> %{{.*}}, i32 03585 // CHECK: fsub double %{{.*}}, %{{.*}}3586 // CHECK: insertelement <2 x double> {{.*}}, i32 03587 // CHECK: extractelement <2 x double> %{{.*}}, i64 03588 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 03589 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3590 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03591 // CHECK-NEXT: select i1 %{{.*}}, double %{{.*}}, double %{{.*}}3592 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 03593 return _mm_mask_sub_sd(__W,__U,__A,__B); 3594}3595TEST_CONSTEXPR(match_m128d(_mm_mask_sub_sd((__m128d)(__v2df){-1.0, 111.0}, 0x1, (__m128d)(__v2df){9.0, 70.0}, (__m128d)(__v2df){3.5, 80.0}), 5.5, 111.0));3596 3597__m128d test_mm_maskz_sub_sd(__mmask8 __U, __m128d __A, __m128d __B) {3598 // CHECK-LABEL: test_mm_maskz_sub_sd3599 // CHECK-NOT: @llvm.x86.avx512.mask.sub.sd.round3600 // CHECK: extractelement <2 x double> %{{.*}}, i32 03601 // CHECK: extractelement <2 x double> %{{.*}}, i32 03602 // CHECK: fsub double %{{.*}}, %{{.*}}3603 // CHECK: insertelement <2 x double> {{.*}}, i32 03604 // CHECK: extractelement <2 x double> %{{.*}}, i64 03605 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 03606 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3607 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03608 // CHECK-NEXT: select i1 %{{.*}}, double %{{.*}}, double %{{.*}}3609 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 03610 return _mm_maskz_sub_sd(__U,__A,__B); 3611}3612TEST_CONSTEXPR(match_m128d(_mm_maskz_sub_sd(0x1, (__m128d)(__v2df){9.0, 70.0}, (__m128d)(__v2df){3.5, 80.0}), 5.5, 0.0));3613 3614__m512d test_mm512_mul_round_pd(__m512d __A, __m512d __B) {3615 // CHECK-LABEL: test_mm512_mul_round_pd3616 // CHECK: @llvm.x86.avx512.mul.pd.5123617 return _mm512_mul_round_pd(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3618}3619__m512d test_mm512_mask_mul_round_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {3620 // CHECK-LABEL: test_mm512_mask_mul_round_pd3621 // CHECK: @llvm.x86.avx512.mul.pd.5123622 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3623 return _mm512_mask_mul_round_pd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3624}3625__m512d test_mm512_maskz_mul_round_pd(__mmask8 __U, __m512d __A, __m512d __B) {3626 // CHECK-LABEL: test_mm512_maskz_mul_round_pd3627 // CHECK: @llvm.x86.avx512.mul.pd.5123628 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3629 return _mm512_maskz_mul_round_pd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3630}3631__m512d test_mm512_mask_mul_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {3632 // CHECK-LABEL: test_mm512_mask_mul_pd3633 // CHECK: fmul <8 x double> %{{.*}}, %{{.*}}3634 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3635 return _mm512_mask_mul_pd(__W,__U,__A,__B); 3636}3637TEST_CONSTEXPR(match_m512d(_mm512_mask_mul_pd((__m512d){100.0, 200.0, 300.0, 400.0, 500.0, 600.0, 700.0, 800.0}, (__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 100.0, 200.0, 300.0, 400.0, 250.0, 360.0, 490.0, 640.0));3638 3639__m512d test_mm512_maskz_mul_pd(__mmask8 __U, __m512d __A, __m512d __B) {3640 // CHECK-LABEL: test_mm512_maskz_mul_pd3641 // CHECK: fmul <8 x double> %{{.*}}, %{{.*}}3642 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3643 return _mm512_maskz_mul_pd(__U,__A,__B); 3644}3645TEST_CONSTEXPR(match_m512d(_mm512_maskz_mul_pd((__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 0.0, 0.0, 0.0, 0.0, 250.0, 360.0, 490.0, 640.0));3646 3647__m512 test_mm512_mul_round_ps(__m512 __A, __m512 __B) {3648 // CHECK-LABEL: test_mm512_mul_round_ps3649 // CHECK: @llvm.x86.avx512.mul.ps.5123650 return _mm512_mul_round_ps(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3651}3652__m512 test_mm512_mask_mul_round_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {3653 // CHECK-LABEL: test_mm512_mask_mul_round_ps3654 // CHECK: @llvm.x86.avx512.mul.ps.5123655 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3656 return _mm512_mask_mul_round_ps(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3657}3658__m512 test_mm512_maskz_mul_round_ps(__mmask16 __U, __m512 __A, __m512 __B) {3659 // CHECK-LABEL: test_mm512_maskz_mul_round_ps3660 // CHECK: @llvm.x86.avx512.mul.ps.5123661 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3662 return _mm512_maskz_mul_round_ps(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3663}3664__m512 test_mm512_mask_mul_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {3665 // CHECK-LABEL: test_mm512_mask_mul_ps3666 // CHECK: fmul <16 x float> %{{.*}}, %{{.*}}3667 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3668 return _mm512_mask_mul_ps(__W,__U,__A,__B); 3669}3670TEST_CONSTEXPR(match_m512(_mm512_mask_mul_ps((__m512){100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, 900.0f, 1000.0f, 1100.0f, 1200.0f, 1300.0f, 1400.0f, 1500.0f, 1600.0f}, (__mmask16)0b1111111100000000, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){10.0f, 20.0f, 30.0f, 40.0f, 50.0f, 60.0f, 70.0f, 80.0f, 90.0f, 100.0f, 110.0f, 120.0f, 130.0f, 140.0f, 150.0f, 160.0f}), 100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, 810.0f, 1000.0f, 1210.0f, 1440.0f, 1690.0f, 1960.0f, 2250.0f, 2560.0f));3671 3672__m512 test_mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) {3673 // CHECK-LABEL: test_mm512_maskz_mul_ps3674 // CHECK: fmul <16 x float> %{{.*}}, %{{.*}}3675 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3676 return _mm512_maskz_mul_ps(__U,__A,__B); 3677}3678TEST_CONSTEXPR(match_m512(_mm512_maskz_mul_ps((__mmask16)0b1111111100000000, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){10.0f, 20.0f, 30.0f, 40.0f, 50.0f, 60.0f, 70.0f, 80.0f, 90.0f, 100.0f, 110.0f, 120.0f, 130.0f, 140.0f, 150.0f, 160.0f}), 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 810.0f, 1000.0f, 1210.0f, 1440.0f, 1690.0f, 1960.0f, 2250.0f, 2560.0f));3679 3680__m128 test_mm_mul_round_ss(__m128 __A, __m128 __B) {3681 // CHECK-LABEL: test_mm_mul_round_ss3682 // CHECK: @llvm.x86.avx512.mask.mul.ss.round3683 return _mm_mul_round_ss(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3684}3685__m128 test_mm_mask_mul_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3686 // CHECK-LABEL: test_mm_mask_mul_round_ss3687 // CHECK: @llvm.x86.avx512.mask.mul.ss.round3688 return _mm_mask_mul_round_ss(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3689}3690__m128 test_mm_maskz_mul_round_ss(__mmask8 __U, __m128 __A, __m128 __B) {3691 // CHECK-LABEL: test_mm_maskz_mul_round_ss3692 // CHECK: @llvm.x86.avx512.mask.mul.ss.round3693 return _mm_maskz_mul_round_ss(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3694}3695__m128 test_mm_mask_mul_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3696 // CHECK-LABEL: test_mm_mask_mul_ss3697 // CHECK-NOT: @llvm.x86.avx512.mask.mul.ss.round3698 // CHECK: extractelement <4 x float> %{{.*}}, i32 03699 // CHECK: extractelement <4 x float> %{{.*}}, i32 03700 // CHECK: fmul float %{{.*}}, %{{.*}}3701 // CHECK: insertelement <4 x float> {{.*}}, i32 03702 // CHECK: extractelement <4 x float> %{{.*}}, i64 03703 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 03704 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3705 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03706 // CHECK-NEXT: select i1 %{{.*}}, float %{{.*}}, float %{{.*}}3707 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 03708 return _mm_mask_mul_ss(__W,__U,__A,__B); 3709}3710TEST_CONSTEXPR(match_m128(_mm_mask_mul_ss((__m128)(__v4sf){42.0f, -1.0f, -2.0f, -3.0f}, 0x1, (__m128)(__v4sf){6.0f, 9.0f, 9.0f, 9.0f}, (__m128)(__v4sf){7.0f, 8.0f, 8.0f, 8.0f}), 42.0f, -1.0f, -2.0f, -3.0f));3711 3712__m128 test_mm_maskz_mul_ss(__mmask8 __U, __m128 __A, __m128 __B) {3713 // CHECK-LABEL: test_mm_maskz_mul_ss3714 // CHECK-NOT: @llvm.x86.avx512.mask.mul.ss.round3715 // CHECK: extractelement <4 x float> %{{.*}}, i32 03716 // CHECK: extractelement <4 x float> %{{.*}}, i32 03717 // CHECK: fmul float %{{.*}}, %{{.*}}3718 // CHECK: insertelement <4 x float> {{.*}}, i32 03719 // CHECK: extractelement <4 x float> %{{.*}}, i64 03720 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 03721 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3722 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03723 // CHECK-NEXT: select i1 %{{.*}}, float %{{.*}}, float %{{.*}}3724 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 03725 return _mm_maskz_mul_ss(__U,__A,__B); 3726}3727TEST_CONSTEXPR(match_m128(_mm_maskz_mul_ss(0x1, (__m128)(__v4sf){6.0f, 9.0f, 9.0f, 9.0f}, (__m128)(__v4sf){7.0f, 8.0f, 8.0f, 8.0f}), 42.0f, 0.0f, 0.0f, 0.0f));3728 3729__m128d test_mm_mul_round_sd(__m128d __A, __m128d __B) {3730 // CHECK-LABEL: test_mm_mul_round_sd3731 // CHECK: @llvm.x86.avx512.mask.mul.sd.round3732 return _mm_mul_round_sd(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3733}3734__m128d test_mm_mask_mul_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3735 // CHECK-LABEL: test_mm_mask_mul_round_sd3736 // CHECK: @llvm.x86.avx512.mask.mul.sd.round3737 return _mm_mask_mul_round_sd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3738}3739__m128d test_mm_maskz_mul_round_sd(__mmask8 __U, __m128d __A, __m128d __B) {3740 // CHECK-LABEL: test_mm_maskz_mul_round_sd3741 // CHECK: @llvm.x86.avx512.mask.mul.sd.round3742 return _mm_maskz_mul_round_sd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3743}3744__m128d test_mm_mask_mul_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3745 // CHECK-LABEL: test_mm_mask_mul_sd3746 // CHECK-NOT: @llvm.x86.avx512.mask.mul.sd.round3747 // CHECK: extractelement <2 x double> %{{.*}}, i32 03748 // CHECK: extractelement <2 x double> %{{.*}}, i32 03749 // CHECK: fmul double %{{.*}}, %{{.*}}3750 // CHECK: insertelement <2 x double> {{.*}}, i32 03751 // CHECK: extractelement <2 x double> %{{.*}}, i64 03752 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 03753 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3754 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03755 // CHECK-NEXT: select i1 %{{.*}}, double %{{.*}}, double %{{.*}}3756 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 03757 return _mm_mask_mul_sd(__W,__U,__A,__B); 3758}3759TEST_CONSTEXPR(match_m128d(_mm_mask_mul_sd((__m128d)(__v2df){123.0, -9.0}, 0x1, (__m128d)(__v2df){2.5, 1.0}, (__m128d)(__v2df){4.0, 2.0}), 10.0, -9.0));3760 3761__m128d test_mm_maskz_mul_sd(__mmask8 __U, __m128d __A, __m128d __B) {3762 // CHECK-LABEL: test_mm_maskz_mul_sd3763 // CHECK-NOT: @llvm.x86.avx512.mask.mul.sd.round3764 // CHECK: extractelement <2 x double> %{{.*}}, i32 03765 // CHECK: extractelement <2 x double> %{{.*}}, i32 03766 // CHECK: fmul double %{{.*}}, %{{.*}}3767 // CHECK: insertelement <2 x double> {{.*}}, i32 03768 // CHECK: extractelement <2 x double> %{{.*}}, i64 03769 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 03770 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3771 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03772 // CHECK-NEXT: select i1 %{{.*}}, double %{{.*}}, double %{{.*}}3773 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 03774 return _mm_maskz_mul_sd(__U,__A,__B); 3775}3776TEST_CONSTEXPR(match_m128d(_mm_maskz_mul_sd(0x1, (__m128d)(__v2df){2.5, 1.0}, (__m128d)(__v2df){4.0, 2.0}), 10.0, 0.0));3777 3778__m512d test_mm512_div_round_pd(__m512d __A, __m512d __B) {3779 // CHECK-LABEL: test_mm512_div_round_pd3780 // CHECK: @llvm.x86.avx512.div.pd.5123781 return _mm512_div_round_pd(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3782}3783__m512d test_mm512_mask_div_round_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {3784 // CHECK-LABEL: test_mm512_mask_div_round_pd3785 // CHECK: @llvm.x86.avx512.div.pd.5123786 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3787 return _mm512_mask_div_round_pd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3788}3789__m512d test_mm512_maskz_div_round_pd(__mmask8 __U, __m512d __A, __m512d __B) {3790 // CHECK-LABEL: test_mm512_maskz_div_round_pd3791 // CHECK: @llvm.x86.avx512.div.pd.5123792 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3793 return _mm512_maskz_div_round_pd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3794}3795__m512d test_mm512_div_pd(__m512d __a, __m512d __b) {3796 // CHECK-LABEL: test_mm512_div_pd3797 // CHECK: fdiv <8 x double>3798 return _mm512_div_pd(__a,__b); 3799}3800TEST_CONSTEXPR(match_m512d(_mm512_div_pd((__m512d){+8.0, +6.0, +4.0, +2.0, -8.0, -6.0, -4.0, -2.0}, (__m512d){+2.0, +2.0, +2.0, +2.0, -2.0, -2.0, -2.0, -2.0}), +4.0, +3.0, +2.0, +1.0, +4.0, +3.0, +2.0, +1.0));3801__m512d test_mm512_mask_div_pd(__m512d __w, __mmask8 __u, __m512d __a, __m512d __b) {3802 // CHECK-LABEL: test_mm512_mask_div_pd3803 // CHECK: fdiv <8 x double> %{{.*}}, %{{.*}}3804 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3805 return _mm512_mask_div_pd(__w,__u,__a,__b); 3806}3807TEST_CONSTEXPR(match_m512d(_mm512_mask_div_pd((__m512d){100.0, 200.0, 300.0, 400.0, 500.0, 600.0, 700.0, 800.0}, (__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 100.0, 200.0, 300.0, 400.0, 0.1, 0.1, 0.1, 0.1));3808 3809__m512d test_mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) {3810 // CHECK-LABEL: test_mm512_maskz_div_pd3811 // CHECK: fdiv <8 x double> %{{.*}}, %{{.*}}3812 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}3813 return _mm512_maskz_div_pd(__U,__A,__B); 3814}3815TEST_CONSTEXPR(match_m512d(_mm512_maskz_div_pd((__mmask8)0b11110000, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}, (__m512d){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 0.0, 0.0, 0.0, 0.0, 0.1, 0.1, 0.1, 0.1));3816 3817__m512 test_mm512_div_round_ps(__m512 __A, __m512 __B) {3818 // CHECK-LABEL: test_mm512_div_round_ps3819 // CHECK: @llvm.x86.avx512.div.ps.5123820 return _mm512_div_round_ps(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3821}3822__m512 test_mm512_mask_div_round_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {3823 // CHECK-LABEL: test_mm512_mask_div_round_ps3824 // CHECK: @llvm.x86.avx512.div.ps.5123825 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3826 return _mm512_mask_div_round_ps(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3827}3828__m512 test_mm512_maskz_div_round_ps(__mmask16 __U, __m512 __A, __m512 __B) {3829 // CHECK-LABEL: test_mm512_maskz_div_round_ps3830 // CHECK: @llvm.x86.avx512.div.ps.5123831 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3832 return _mm512_maskz_div_round_ps(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3833}3834__m512 test_mm512_div_ps(__m512 __A, __m512 __B) {3835 // CHECK-LABEL: test_mm512_div_ps3836 // CHECK: fdiv <16 x float>3837 return _mm512_div_ps(__A,__B); 3838}3839TEST_CONSTEXPR(match_m512(_mm512_div_ps((__m512){+16.0f, +14.0f, +12.0f, +10.0f, +8.0f, +6.0f, +4.0f, +2.0f, -16.0f, -14.0f, -12.0f, -10.0f, -8.0f, -6.0f, -4.0f, -2.0f}, (__m512){+2.0f, +2.0f, +2.0f, +2.0f, +2.0f, +2.0f, +2.0f, +2.0f, -2.0f, -2.0f, -2.0f, -2.0f, -2.0f, -2.0f, -2.0f, -2.0f}), +8.0f, +7.0f, +6.0f, +5.0f, +4.0f, +3.0f, +2.0f, +1.0f, +8.0f, +7.0f, +6.0f, +5.0f, +4.0f, +3.0f, +2.0f, +1.0f));3840__m512 test_mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {3841 // CHECK-LABEL: test_mm512_mask_div_ps3842 // CHECK: fdiv <16 x float> %{{.*}}, %{{.*}}3843 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3844 return _mm512_mask_div_ps(__W,__U,__A,__B); 3845}3846TEST_CONSTEXPR(match_m512(_mm512_mask_div_ps((__m512){100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, 900.0f, 1000.0f, 1100.0f, 1200.0f, 1300.0f, 1400.0f, 1500.0f, 1600.0f}, (__mmask16)0b1111111100000000, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){10.0f, 20.0f, 30.0f, 40.0f, 50.0f, 60.0f, 70.0f, 80.0f, 90.0f, 100.0f, 110.0f, 120.0f, 130.0f, 140.0f, 150.0f, 160.0f}), 100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, 0.1f, 0.1f, 0.1f, 0.1f, 0.1f, 0.1f, 0.1f, 0.1f));3847 3848__m512 test_mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) {3849 // CHECK-LABEL: test_mm512_maskz_div_ps3850 // CHECK: fdiv <16 x float> %{{.*}}, %{{.*}}3851 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}3852 return _mm512_maskz_div_ps(__U,__A,__B); 3853}3854TEST_CONSTEXPR(match_m512(_mm512_maskz_div_ps((__mmask16)0b1111111100000000, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}, (__m512){10.0f, 20.0f, 30.0f, 40.0f, 50.0f, 60.0f, 70.0f, 80.0f, 90.0f, 100.0f, 110.0f, 120.0f, 130.0f, 140.0f, 150.0f, 160.0f}), 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.1f, 0.1f, 0.1f, 0.1f, 0.1f, 0.1f, 0.1f, 0.1f));3855 3856__m128 test_mm_div_round_ss(__m128 __A, __m128 __B) {3857 // CHECK-LABEL: test_mm_div_round_ss3858 // CHECK: @llvm.x86.avx512.mask.div.ss.round3859 return _mm_div_round_ss(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3860}3861__m128 test_mm_mask_div_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3862 // CHECK-LABEL: test_mm_mask_div_round_ss3863 // CHECK: @llvm.x86.avx512.mask.div.ss.round3864 return _mm_mask_div_round_ss(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3865}3866__m128 test_mm_maskz_div_round_ss(__mmask8 __U, __m128 __A, __m128 __B) {3867 // CHECK-LABEL: test_mm_maskz_div_round_ss3868 // CHECK: @llvm.x86.avx512.mask.div.ss.round3869 return _mm_maskz_div_round_ss(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3870}3871__m128 test_mm_mask_div_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3872 // CHECK-LABEL: test_mm_mask_div_ss3873 // CHECK: extractelement <4 x float> %{{.*}}, i32 03874 // CHECK: extractelement <4 x float> %{{.*}}, i32 03875 // CHECK: fdiv float %{{.*}}, %{{.*}}3876 // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 03877 // CHECK: extractelement <4 x float> %{{.*}}, i64 03878 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 03879 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3880 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03881 // CHECK-NEXT: select i1 %{{.*}}, float %{{.*}}, float %{{.*}}3882 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 03883 return _mm_mask_div_ss(__W,__U,__A,__B); 3884}3885TEST_CONSTEXPR(match_m128(_mm_mask_div_ss((__m128)(__v4sf){-7.0f, 5.0f, 6.0f, 7.0f}, 0x1, (__m128)(__v4sf){9.0f, 1.0f, 1.0f, 1.0f}, (__m128)(__v4sf){3.0f, 2.0f, 2.0f, 2.0f}), 3.0f, 5.0f, 6.0f, 7.0f));3886 3887__m128 test_mm_maskz_div_ss(__mmask8 __U, __m128 __A, __m128 __B) {3888 // CHECK-LABEL: test_mm_maskz_div_ss3889 // CHECK: extractelement <4 x float> %{{.*}}, i32 03890 // CHECK: extractelement <4 x float> %{{.*}}, i32 03891 // CHECK: fdiv float %{{.*}}, %{{.*}}3892 // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 03893 // CHECK: extractelement <4 x float> %{{.*}}, i64 03894 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 03895 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3896 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03897 // CHECK-NEXT: select i1 %{{.*}}, float %{{.*}}, float %{{.*}}3898 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float %{{.*}}, i64 03899 return _mm_maskz_div_ss(__U,__A,__B); 3900}3901TEST_CONSTEXPR(match_m128(_mm_maskz_div_ss(0x1, (__m128)(__v4sf){9.0f, 1.0f, 1.0f, 1.0f}, (__m128)(__v4sf){3.0f, 2.0f, 2.0f, 2.0f}), 3.0f, 0.0f, 0.0f, 0.0f));3902 3903__m128d test_mm_div_round_sd(__m128d __A, __m128d __B) {3904 // CHECK-LABEL: test_mm_div_round_sd3905 // CHECK: @llvm.x86.avx512.mask.div.sd.round3906 return _mm_div_round_sd(__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3907}3908__m128d test_mm_mask_div_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3909 // CHECK-LABEL: test_mm_mask_div_round_sd3910 // CHECK: @llvm.x86.avx512.mask.div.sd.round3911 return _mm_mask_div_round_sd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3912}3913__m128d test_mm_maskz_div_round_sd(__mmask8 __U, __m128d __A, __m128d __B) {3914 // CHECK-LABEL: test_mm_maskz_div_round_sd3915 // CHECK: @llvm.x86.avx512.mask.div.sd.round3916 return _mm_maskz_div_round_sd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3917}3918__m128d test_mm_mask_div_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3919 // CHECK-LABEL: test_mm_mask_div_sd3920 // CHECK: extractelement <2 x double> %{{.*}}, i32 03921 // CHECK: extractelement <2 x double> %{{.*}}, i32 03922 // CHECK: fdiv double %{{.*}}, %{{.*}}3923 // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 03924 // CHECK: extractelement <2 x double> %{{.*}}, i64 03925 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 03926 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3927 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03928 // CHECK-NEXT: select i1 %{{.*}}, double %{{.*}}, double %{{.*}}3929 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 03930 return _mm_mask_div_sd(__W,__U,__A,__B); 3931}3932TEST_CONSTEXPR(match_m128d(_mm_mask_div_sd((__m128d)(__v2df){-8.0, 44.0}, 0x1, (__m128d)(__v2df){8.0, 10.0}, (__m128d)(__v2df){2.0, 20.0}), 4.0, 44.0));3933 3934__m128d test_mm_maskz_div_sd(__mmask8 __U, __m128d __A, __m128d __B) {3935 // CHECK-LABEL: test_mm_maskz_div_sd3936 // CHECK: extractelement <2 x double> %{{.*}}, i32 03937 // CHECK: extractelement <2 x double> %{{.*}}, i32 03938 // CHECK: fdiv double %{{.*}}, %{{.*}}3939 // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 03940 // CHECK: extractelement <2 x double> %{{.*}}, i64 03941 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 03942 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3943 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03944 // CHECK-NEXT: select i1 %{{.*}}, double %{{.*}}, double %{{.*}}3945 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double %{{.*}}, i64 03946 return _mm_maskz_div_sd(__U,__A,__B); 3947}3948TEST_CONSTEXPR(match_m128d(_mm_maskz_div_sd(0x1, (__m128d)(__v2df){8.0, 10.0}, (__m128d)(__v2df){2.0, 20.0}), 4.0, 0.0));3949 3950__m128 test_mm_max_round_ss(__m128 __A, __m128 __B) {3951 // CHECK-LABEL: test_mm_max_round_ss3952 // CHECK: @llvm.x86.avx512.mask.max.ss.round3953 return _mm_max_round_ss(__A,__B,0x08); 3954}3955__m128 test_mm_mask_max_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3956 // CHECK-LABEL: test_mm_mask_max_round_ss3957 // CHECK: @llvm.x86.avx512.mask.max.ss.round3958 return _mm_mask_max_round_ss(__W,__U,__A,__B,0x08); 3959}3960__m128 test_mm_maskz_max_round_ss(__mmask8 __U, __m128 __A, __m128 __B) {3961 // CHECK-LABEL: test_mm_maskz_max_round_ss3962 // CHECK: @llvm.x86.avx512.mask.max.ss.round3963 return _mm_maskz_max_round_ss(__U,__A,__B,0x08); 3964}3965__m128 test_mm_mask_max_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3966 // CHECK-LABEL: test_mm_mask_max_ss3967 // CHECK: @llvm.x86.avx512.mask.max.ss.round3968 return _mm_mask_max_ss(__W,__U,__A,__B); 3969}3970__m128 test_mm_maskz_max_ss(__mmask8 __U, __m128 __A, __m128 __B) {3971 // CHECK-LABEL: test_mm_maskz_max_ss3972 // CHECK: @llvm.x86.avx512.mask.max.ss.round3973 return _mm_maskz_max_ss(__U,__A,__B); 3974}3975__m128d test_mm_max_round_sd(__m128d __A, __m128d __B) {3976 // CHECK-LABEL: test_mm_max_round_sd3977 // CHECK: @llvm.x86.avx512.mask.max.sd.round3978 return _mm_max_round_sd(__A,__B,0x08); 3979}3980__m128d test_mm_mask_max_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3981 // CHECK-LABEL: test_mm_mask_max_round_sd3982 // CHECK: @llvm.x86.avx512.mask.max.sd.round3983 return _mm_mask_max_round_sd(__W,__U,__A,__B,0x08); 3984}3985__m128d test_mm_maskz_max_round_sd(__mmask8 __U, __m128d __A, __m128d __B) {3986 // CHECK-LABEL: test_mm_maskz_max_round_sd3987 // CHECK: @llvm.x86.avx512.mask.max.sd.round3988 return _mm_maskz_max_round_sd(__U,__A,__B,0x08); 3989}3990__m128d test_mm_mask_max_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3991 // CHECK-LABEL: test_mm_mask_max_sd3992 // CHECK: @llvm.x86.avx512.mask.max.sd.round3993 return _mm_mask_max_sd(__W,__U,__A,__B); 3994}3995__m128d test_mm_maskz_max_sd(__mmask8 __U, __m128d __A, __m128d __B) {3996 // CHECK-LABEL: test_mm_maskz_max_sd3997 // CHECK: @llvm.x86.avx512.mask.max.sd.round3998 return _mm_maskz_max_sd(__U,__A,__B); 3999}4000__m128 test_mm_min_round_ss(__m128 __A, __m128 __B) {4001 // CHECK-LABEL: test_mm_min_round_ss4002 // CHECK: @llvm.x86.avx512.mask.min.ss.round4003 return _mm_min_round_ss(__A,__B,0x08); 4004}4005__m128 test_mm_mask_min_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {4006 // CHECK-LABEL: test_mm_mask_min_round_ss4007 // CHECK: @llvm.x86.avx512.mask.min.ss.round4008 return _mm_mask_min_round_ss(__W,__U,__A,__B,0x08); 4009}4010__m128 test_mm_maskz_min_round_ss(__mmask8 __U, __m128 __A, __m128 __B) {4011 // CHECK-LABEL: test_mm_maskz_min_round_ss4012 // CHECK: @llvm.x86.avx512.mask.min.ss.round4013 return _mm_maskz_min_round_ss(__U,__A,__B,0x08); 4014}4015__m128 test_mm_mask_min_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {4016 // CHECK-LABEL: test_mm_mask_min_ss4017 // CHECK: @llvm.x86.avx512.mask.min.ss.round4018 return _mm_mask_min_ss(__W,__U,__A,__B); 4019}4020__m128 test_mm_maskz_min_ss(__mmask8 __U, __m128 __A, __m128 __B) {4021 // CHECK-LABEL: test_mm_maskz_min_ss4022 // CHECK: @llvm.x86.avx512.mask.min.ss.round4023 return _mm_maskz_min_ss(__U,__A,__B); 4024}4025__m128d test_mm_min_round_sd(__m128d __A, __m128d __B) {4026 // CHECK-LABEL: test_mm_min_round_sd4027 // CHECK: @llvm.x86.avx512.mask.min.sd.round4028 return _mm_min_round_sd(__A,__B,0x08); 4029}4030__m128d test_mm_mask_min_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {4031 // CHECK-LABEL: test_mm_mask_min_round_sd4032 // CHECK: @llvm.x86.avx512.mask.min.sd.round4033 return _mm_mask_min_round_sd(__W,__U,__A,__B,0x08); 4034}4035__m128d test_mm_maskz_min_round_sd(__mmask8 __U, __m128d __A, __m128d __B) {4036 // CHECK-LABEL: test_mm_maskz_min_round_sd4037 // CHECK: @llvm.x86.avx512.mask.min.sd.round4038 return _mm_maskz_min_round_sd(__U,__A,__B,0x08); 4039}4040__m128d test_mm_mask_min_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {4041 // CHECK-LABEL: test_mm_mask_min_sd4042 // CHECK: @llvm.x86.avx512.mask.min.sd.round4043 return _mm_mask_min_sd(__W,__U,__A,__B); 4044}4045__m128d test_mm_maskz_min_sd(__mmask8 __U, __m128d __A, __m128d __B) {4046 // CHECK-LABEL: test_mm_maskz_min_sd4047 // CHECK: @llvm.x86.avx512.mask.min.sd.round4048 return _mm_maskz_min_sd(__U,__A,__B); 4049}4050 4051__m512 test_mm512_undefined(void) {4052 // CHECK-LABEL: test_mm512_undefined4053 // CHECK: ret <16 x float> zeroinitializer4054 return _mm512_undefined();4055}4056 4057__m512 test_mm512_undefined_ps(void) {4058 // CHECK-LABEL: test_mm512_undefined_ps4059 // CHECK: ret <16 x float> zeroinitializer4060 return _mm512_undefined_ps();4061}4062 4063__m512d test_mm512_undefined_pd(void) {4064 // CHECK-LABEL: test_mm512_undefined_pd4065 // CHECK: ret <8 x double> zeroinitializer4066 return _mm512_undefined_pd();4067}4068 4069__m512i test_mm512_undefined_epi32(void) {4070 // CHECK-LABEL: test_mm512_undefined_epi324071 // CHECK: ret <8 x i64> zeroinitializer4072 return _mm512_undefined_epi32();4073}4074 4075__m512i test_mm512_cvtepi8_epi32(__m128i __A) {4076 // CHECK-LABEL: test_mm512_cvtepi8_epi324077 // CHECK: sext <16 x i8> %{{.*}} to <16 x i32>4078 return _mm512_cvtepi8_epi32(__A); 4079}4080 4081TEST_CONSTEXPR(match_v16si(_mm512_cvtepi8_epi32(_mm_setr_epi8(-3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12)), -3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12));4082 4083__m512i test_mm512_mask_cvtepi8_epi32(__m512i __W, __mmask16 __U, __m128i __A) {4084 // CHECK-LABEL: test_mm512_mask_cvtepi8_epi324085 // CHECK: sext <16 x i8> %{{.*}} to <16 x i32>4086 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4087 return _mm512_mask_cvtepi8_epi32(__W, __U, __A); 4088}4089 4090TEST_CONSTEXPR(match_v16si(_mm512_mask_cvtepi8_epi32(_mm512_set1_epi32(-777), /*1010 0101 1101 0101=*/0xa5d5, _mm_setr_epi8(1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16)), 1, -777, 3, -777, 5, -777, 7, -8, 9, -777, 11, -777, -777, -14, -777, -16));4091 4092__m512i test_mm512_maskz_cvtepi8_epi32(__mmask16 __U, __m128i __A) {4093 // CHECK-LABEL: test_mm512_maskz_cvtepi8_epi324094 // CHECK: sext <16 x i8> %{{.*}} to <16 x i32>4095 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4096 return _mm512_maskz_cvtepi8_epi32(__U, __A); 4097}4098 4099TEST_CONSTEXPR(match_v16si(_mm512_maskz_cvtepi8_epi32(/*1010 0101 1101 0101=*/0xa5d5, _mm_setr_epi8(1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16)), 1, 0, 3, 0, 5, 0, 7, -8, 9, 0, 11, 0, 0, -14, 0, -16));4100 4101__m512i test_mm512_cvtepi8_epi64(__m128i __A) {4102 // CHECK-LABEL: test_mm512_cvtepi8_epi644103 // CHECK: sext <8 x i8> %{{.*}} to <8 x i64>4104 return _mm512_cvtepi8_epi64(__A); 4105}4106 4107TEST_CONSTEXPR(match_v8di(_mm512_cvtepi8_epi64(_mm_setr_epi8(-3, 2, -1, 0, 1, -2, 3, -4, 0, 0, 0, 0, 0, 0, 0, 0)), -3, 2, -1, 0, 1, -2, 3, -4));4108 4109__m512i test_mm512_mask_cvtepi8_epi64(__m512i __W, __mmask8 __U, __m128i __A) {4110 // CHECK-LABEL: test_mm512_mask_cvtepi8_epi644111 // CHECK: sext <8 x i8> %{{.*}} to <8 x i64>4112 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4113 return _mm512_mask_cvtepi8_epi64(__W, __U, __A); 4114}4115 4116TEST_CONSTEXPR(match_v8di(_mm512_mask_cvtepi8_epi64(_mm512_set1_epi64((long long) -777), /*1101 1100=*/0xdc, _mm_setr_epi8(1, -2, 3, -4, 5, -6, 7, -8, 0, 0, 0, 0, 0, 0, 0, 0)), -777, -777, 3, -4, 5, -777, 7, -8));4117 4118__m512i test_mm512_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) {4119 // CHECK-LABEL: test_mm512_maskz_cvtepi8_epi644120 // CHECK: sext <8 x i8> %{{.*}} to <8 x i64>4121 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4122 return _mm512_maskz_cvtepi8_epi64(__U, __A); 4123}4124 4125TEST_CONSTEXPR(match_v8di(_mm512_maskz_cvtepi8_epi64(/*1101 1100=*/0xdc, _mm_setr_epi8(1, -2, 3, -4, 5, -6, 7, -8, 0, 0, 0, 0, 0, 0, 0, 0)), 0, 0, 3, -4, 5, 0, 7, -8));4126 4127__m512i test_mm512_cvtepi32_epi64(__m256i __X) {4128 // CHECK-LABEL: test_mm512_cvtepi32_epi644129 // CHECK: sext <8 x i32> %{{.*}} to <8 x i64>4130 return _mm512_cvtepi32_epi64(__X); 4131}4132 4133TEST_CONSTEXPR(match_v8di(_mm512_cvtepi32_epi64(_mm256_setr_epi32(-70000, 2, -1, 0, 1, -2, 3, -4)), -70000, 2, -1, 0, 1, -2, 3, -4));4134 4135__m512i test_mm512_mask_cvtepi32_epi64(__m512i __W, __mmask8 __U, __m256i __X) {4136 // CHECK-LABEL: test_mm512_mask_cvtepi32_epi644137 // CHECK: sext <8 x i32> %{{.*}} to <8 x i64>4138 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4139 return _mm512_mask_cvtepi32_epi64(__W, __U, __X); 4140}4141 4142TEST_CONSTEXPR(match_v8di(_mm512_mask_cvtepi32_epi64(_mm512_set1_epi64((long long) -777), /*0011 1010=*/0x3a, _mm256_setr_epi32(1, -2, 3, -4, 5, -6, 7, -8)), -777, -2, -777, -4, 5, -6, -777, -777));4143 4144__m512i test_mm512_maskz_cvtepi32_epi64(__mmask8 __U, __m256i __X) {4145 // CHECK-LABEL: test_mm512_maskz_cvtepi32_epi644146 // CHECK: sext <8 x i32> %{{.*}} to <8 x i64>4147 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4148 return _mm512_maskz_cvtepi32_epi64(__U, __X); 4149}4150 4151TEST_CONSTEXPR(match_v8di(_mm512_maskz_cvtepi32_epi64(/*0011 1010=*/0x3a, _mm256_setr_epi32(1, -2, 3, -4, 5, -6, 7, -8)), 0, -2, 0, -4, 5, -6, 0, 0));4152 4153__m512i test_mm512_cvtepi16_epi32(__m256i __A) {4154 // CHECK-LABEL: test_mm512_cvtepi16_epi324155 // CHECK: sext <16 x i16> %{{.*}} to <16 x i32>4156 return _mm512_cvtepi16_epi32(__A); 4157}4158 4159TEST_CONSTEXPR(match_v16si(_mm512_cvtepi16_epi32(_mm256_setr_epi16(-300, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12)), -300, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12));4160 4161__m512i test_mm512_mask_cvtepi16_epi32(__m512i __W, __mmask16 __U, __m256i __A) {4162 // CHECK-LABEL: test_mm512_mask_cvtepi16_epi324163 // CHECK: sext <16 x i16> %{{.*}} to <16 x i32>4164 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4165 return _mm512_mask_cvtepi16_epi32(__W, __U, __A); 4166}4167 4168TEST_CONSTEXPR(match_v16si(_mm512_mask_cvtepi16_epi32(_mm512_set1_epi32(-777), /*1001 1101 1001 1110=*/0x9d9e, _mm256_setr_epi16(1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16)), -777, -2, 3, -4, 5, -777, -777, -8, 9, -777, 11, -12, 13, -777, -777, -16));4169 4170__m512i test_mm512_maskz_cvtepi16_epi32(__mmask16 __U, __m256i __A) {4171 // CHECK-LABEL: test_mm512_maskz_cvtepi16_epi324172 // CHECK: sext <16 x i16> %{{.*}} to <16 x i32>4173 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4174 return _mm512_maskz_cvtepi16_epi32(__U, __A); 4175}4176 4177TEST_CONSTEXPR(match_v16si(_mm512_maskz_cvtepi16_epi32(/*1001 1101 1001 1110=*/0x9d9e, _mm256_setr_epi16(1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16)), 0, -2, 3, -4, 5, 0, 0, -8, 9, 0, 11, -12, 13, 0, 0, -16));4178 4179__m512i test_mm512_cvtepi16_epi64(__m128i __A) {4180 // CHECK-LABEL: test_mm512_cvtepi16_epi644181 // CHECK: sext <8 x i16> %{{.*}} to <8 x i64>4182 return _mm512_cvtepi16_epi64(__A); 4183}4184 4185TEST_CONSTEXPR(match_v8di(_mm512_cvtepi16_epi64(_mm_setr_epi16(-300, 2, -1, 0, 1, -2, 3, -4)), -300, 2, -1, 0, 1, -2, 3, -4));4186 4187__m512i test_mm512_mask_cvtepi16_epi64(__m512i __W, __mmask8 __U, __m128i __A) {4188 // CHECK-LABEL: test_mm512_mask_cvtepi16_epi644189 // CHECK: sext <8 x i16> %{{.*}} to <8 x i64>4190 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4191 return _mm512_mask_cvtepi16_epi64(__W, __U, __A); 4192}4193 4194TEST_CONSTEXPR(match_v8di(_mm512_mask_cvtepi16_epi64(_mm512_set1_epi64((long long) -777), /*1100 0011=*/0xc3, _mm_setr_epi16(1, -2, 3, -4, 5, -6, 7, -8)), 1, -2, -777, -777, -777, -777, 7, -8));4195 4196__m512i test_mm512_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) {4197 // CHECK-LABEL: test_mm512_maskz_cvtepi16_epi644198 // CHECK: sext <8 x i16> %{{.*}} to <8 x i64>4199 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4200 return _mm512_maskz_cvtepi16_epi64(__U, __A); 4201}4202 4203TEST_CONSTEXPR(match_v8di(_mm512_maskz_cvtepi16_epi64(/*1100 0011=*/0xc3, _mm_setr_epi16(1, -2, 3, -4, 5, -6, 7, -8)), 1, -2, 0, 0, 0, 0, 7, -8));4204 4205__m512i test_mm512_cvtepu8_epi32(__m128i __A) {4206 // CHECK-LABEL: test_mm512_cvtepu8_epi324207 // CHECK: zext <16 x i8> %{{.*}} to <16 x i32>4208 return _mm512_cvtepu8_epi32(__A); 4209}4210 4211TEST_CONSTEXPR(match_v16si(_mm512_cvtepu8_epi32(_mm_setr_epi8(-3, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12)), 253, 2, 255, 0, 1, 254, 3, 252, 5, 250, 7, 248, 9, 246, 11, 244));4212 4213__m512i test_mm512_mask_cvtepu8_epi32(__m512i __W, __mmask16 __U, __m128i __A) {4214 // CHECK-LABEL: test_mm512_mask_cvtepu8_epi324215 // CHECK: zext <16 x i8> %{{.*}} to <16 x i32>4216 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4217 return _mm512_mask_cvtepu8_epi32(__W, __U, __A); 4218}4219 4220TEST_CONSTEXPR(match_v16si(_mm512_mask_cvtepu8_epi32(_mm512_set1_epi32(-777), /*1010 0101 1101 0101=*/0xa5d5, (__m128i)(__v16qu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), 1, -777, 3, -777, 5, -777, 7, 8, 9, -777, 11, -777, -777, 14, -777, 16));4221 4222__m512i test_mm512_maskz_cvtepu8_epi32(__mmask16 __U, __m128i __A) {4223 // CHECK-LABEL: test_mm512_maskz_cvtepu8_epi324224 // CHECK: zext <16 x i8> %{{.*}} to <16 x i32>4225 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4226 return _mm512_maskz_cvtepu8_epi32(__U, __A); 4227}4228 4229TEST_CONSTEXPR(match_v16si(_mm512_maskz_cvtepu8_epi32(/*1010 0101 1101 0101=*/0xa5d5, (__m128i)(__v16qu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), 1, 0, 3, 0, 5, 0, 7, 8, 9, 0, 11, 0, 0, 14, 0, 16));4230 4231__m512i test_mm512_cvtepu8_epi64(__m128i __A) {4232 // CHECK-LABEL: test_mm512_cvtepu8_epi644233 // CHECK: zext <8 x i8> %{{.*}} to <8 x i64>4234 return _mm512_cvtepu8_epi64(__A); 4235}4236 4237TEST_CONSTEXPR(match_v8di(_mm512_cvtepu8_epi64(_mm_setr_epi8(-3, 2, -1, 0, 1, -2, 3, -4, 0, 0, 0, 0, 0, 0, 0, 0)), 253, 2, 255, 0, 1, 254, 3, 252));4238 4239__m512i test_mm512_mask_cvtepu8_epi64(__m512i __W, __mmask8 __U, __m128i __A) {4240 // CHECK-LABEL: test_mm512_mask_cvtepu8_epi644241 // CHECK: zext <8 x i8> %{{.*}} to <8 x i64>4242 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4243 return _mm512_mask_cvtepu8_epi64(__W, __U, __A); 4244}4245 4246TEST_CONSTEXPR(match_v8di(_mm512_mask_cvtepu8_epi64(_mm512_set1_epi64((long long) -777), /*1011 1001=*/0xb9, (__m128i)(__v16qu){1, 2, 3, 4, 5, 6, 7, 8, 0, 0, 0, 0, 0, 0, 0, 0}), 1, -777, -777, 4, 5, 6, -777, 8));4247 4248__m512i test_mm512_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A) {4249 // CHECK-LABEL: test_mm512_maskz_cvtepu8_epi644250 // CHECK: zext <8 x i8> %{{.*}} to <8 x i64>4251 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4252 return _mm512_maskz_cvtepu8_epi64(__U, __A); 4253}4254 4255TEST_CONSTEXPR(match_v8di(_mm512_maskz_cvtepu8_epi64(/*1011 1001=*/0xb9, (__m128i)(__v16qu){1, 2, 3, 4, 5, 6, 7, 8, 0, 0, 0, 0, 0, 0, 0, 0}), 1, 0, 0, 4, 5, 6, 0, 8));4256 4257__m512i test_mm512_cvtepu32_epi64(__m256i __X) {4258 // CHECK-LABEL: test_mm512_cvtepu32_epi644259 // CHECK: zext <8 x i32> %{{.*}} to <8 x i64>4260 return _mm512_cvtepu32_epi64(__X); 4261}4262TEST_CONSTEXPR(match_v8di(_mm512_cvtepu32_epi64(_mm256_setr_epi32(-70000, 2, -1, 0, 1, -2, 3, -4)), 4294897296, 2, 4294967295, 0, 1, 4294967294, 3, 4294967292));4263 4264__m512i test_mm512_mask_cvtepu32_epi64(__m512i __W, __mmask8 __U, __m256i __X) {4265 // CHECK-LABEL: test_mm512_mask_cvtepu32_epi644266 // CHECK: zext <8 x i32> %{{.*}} to <8 x i64>4267 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4268 return _mm512_mask_cvtepu32_epi64(__W, __U, __X); 4269}4270 4271TEST_CONSTEXPR(match_v8di(_mm512_mask_cvtepu32_epi64(_mm512_set1_epi64((long long) -777), /*0101 0001=*/0x51, (__m256i)(__v8su){1, 2, 3, 4, 5, 6, 7, 8}), 1, -777, -777, -777, 5, -777, 7, -777));4272 4273__m512i test_mm512_maskz_cvtepu32_epi64(__mmask8 __U, __m256i __X) {4274 // CHECK-LABEL: test_mm512_maskz_cvtepu32_epi644275 // CHECK: zext <8 x i32> %{{.*}} to <8 x i64>4276 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4277 return _mm512_maskz_cvtepu32_epi64(__U, __X); 4278}4279 4280TEST_CONSTEXPR(match_v8di(_mm512_maskz_cvtepu32_epi64(/*0101 0001=*/0x51, (__m256i)(__v8su){1, 2, 3, 4, 5, 6, 7, 8}), 1, 0, 0, 0, 5, 0, 7, 0));4281 4282__m512i test_mm512_cvtepu16_epi32(__m256i __A) {4283 // CHECK-LABEL: test_mm512_cvtepu16_epi324284 // CHECK: zext <16 x i16> %{{.*}} to <16 x i32>4285 return _mm512_cvtepu16_epi32(__A); 4286}4287TEST_CONSTEXPR(match_v16si(_mm512_cvtepu16_epi32(_mm256_setr_epi16(-300, 2, -1, 0, 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12)), 65236, 2, 65535, 0, 1, 65534, 3, 65532, 5, 65530, 7, 65528, 9, 65526, 11, 65524));4288 4289__m512i test_mm512_mask_cvtepu16_epi32(__m512i __W, __mmask16 __U, __m256i __A) {4290 // CHECK-LABEL: test_mm512_mask_cvtepu16_epi324291 // CHECK: zext <16 x i16> %{{.*}} to <16 x i32>4292 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4293 return _mm512_mask_cvtepu16_epi32(__W, __U, __A); 4294}4295 4296TEST_CONSTEXPR(match_v16si(_mm512_mask_cvtepu16_epi32(_mm512_set1_epi32(-777), /*1001 0110 1010 0010=*/0x96a2, (__m256i)(__v16hu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), -777, 2, -777, -777, -777, 6, -777, 8, -777, 10, 11, -777, 13, -777, -777, 16));4297 4298__m512i test_mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A) {4299 // CHECK-LABEL: test_mm512_maskz_cvtepu16_epi324300 // CHECK: zext <16 x i16> %{{.*}} to <16 x i32>4301 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4302 return _mm512_maskz_cvtepu16_epi32(__U, __A); 4303}4304 4305TEST_CONSTEXPR(match_v16si(_mm512_maskz_cvtepu16_epi32(/*1001 0110 1010 0010=*/0x96a2, (__m256i)(__v16hu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), 0, 2, 0, 0, 0, 6, 0, 8, 0, 10, 11, 0, 13, 0, 0, 16));4306 4307__m512i test_mm512_cvtepu16_epi64(__m128i __A) {4308 // CHECK-LABEL: test_mm512_cvtepu16_epi644309 // CHECK: zext <8 x i16> %{{.*}} to <8 x i64>4310 return _mm512_cvtepu16_epi64(__A); 4311}4312TEST_CONSTEXPR(match_v8di(_mm512_cvtepu16_epi64(_mm_setr_epi16(-300, 2, -1, 0, 1, -2, 3, -4)), 65236, 2, 65535, 0, 1, 65534, 3, 65532));4313 4314__m512i test_mm512_mask_cvtepu16_epi64(__m512i __W, __mmask8 __U, __m128i __A) {4315 // CHECK-LABEL: test_mm512_mask_cvtepu16_epi644316 // CHECK: zext <8 x i16> %{{.*}} to <8 x i64>4317 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4318 return _mm512_mask_cvtepu16_epi64(__W, __U, __A); 4319}4320 4321TEST_CONSTEXPR(match_v8di(_mm512_mask_cvtepu16_epi64(_mm512_set1_epi64((long long) -777), /*0000 0101=*/0x05, (__m128i)(__v8hu){1, 2, 3, 4, 5, 6, 7, 8}), 1, -777, 3, -777, -777, -777, -777, -777));4322 4323__m512i test_mm512_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) {4324 // CHECK-LABEL: test_mm512_maskz_cvtepu16_epi644325 // CHECK: zext <8 x i16> %{{.*}} to <8 x i64>4326 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4327 return _mm512_maskz_cvtepu16_epi64(__U, __A); 4328}4329 4330TEST_CONSTEXPR(match_v8di(_mm512_maskz_cvtepu16_epi64(/*0000 0101=*/0x05, (__m128i)(__v8hu){1, 2, 3, 4, 5, 6, 7, 8}), 1, 0, 3, 0, 0, 0, 0, 0));4331 4332__m512i test_mm512_rol_epi32(__m512i __A) {4333 // CHECK-LABEL: test_mm512_rol_epi324334 // CHECK: @llvm.fshl.v16i324335 return _mm512_rol_epi32(__A, 5); 4336}4337TEST_CONSTEXPR(match_v16si(_mm512_rol_epi32(((__m512i)(__v16si){1, -2, 3, -4, -5, 6, -7, 8, 9, -10, 11, -12, 13, -14, 15, -16}), 5), 32, -33, 96, -97, -129, 192, -193, 256, 288, -289, 352, -353, 416, -417, 480, -481));4338 4339__m512i test_mm512_mask_rol_epi32(__m512i __W, __mmask16 __U, __m512i __A) {4340 // CHECK-LABEL: test_mm512_mask_rol_epi324341 // CHECK: @llvm.fshl.v16i324342 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4343 return _mm512_mask_rol_epi32(__W, __U, __A, 5); 4344}4345TEST_CONSTEXPR(match_v16si(_mm512_mask_rol_epi32(((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}), 0xC873, ((__m512i)(__v16si){1, -2, 3, -4, -5, 6, -7, 8, 9, -10, 11, -12, 13, -14, 15, -16}), 5), 32, -33, 99, 99, -129, 192, -193, 99, 99, 99, 99, -353, 99, 99, 480, -481));4346 4347__m512i test_mm512_maskz_rol_epi32(__mmask16 __U, __m512i __A) {4348 // CHECK-LABEL: test_mm512_maskz_rol_epi324349 // CHECK: @llvm.fshl.v16i324350 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4351 return _mm512_maskz_rol_epi32(__U, __A, 5); 4352}4353TEST_CONSTEXPR(match_v16si(_mm512_maskz_rol_epi32(0x378C, ((__m512i)(__v16si){1, -2, 3, -4, -5, 6, -7, 8, 9, -10, 11, -12, 13, -14, 15, -16}), 5), 0, 0, 96, -97, 0, 0, 0, 256, 288, -289, 352, 0, 416, -417, 0, 0));4354 4355__m512i test_mm512_rol_epi64(__m512i __A) {4356 // CHECK-LABEL: test_mm512_rol_epi644357 // CHECK: @llvm.fshl.v8i644358 return _mm512_rol_epi64(__A, 5); 4359}4360TEST_CONSTEXPR(match_v8di(_mm512_rol_epi64(((__m512i)(__v8di){1, -2, 3, -4, -5, 6, -7, 8}), 5), 32, -33, 96, -97, -129, 192, -193, 256));4361 4362__m512i test_mm512_mask_rol_epi64(__m512i __W, __mmask8 __U, __m512i __A) {4363 // CHECK-LABEL: test_mm512_mask_rol_epi644364 // CHECK: @llvm.fshl.v8i644365 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4366 return _mm512_mask_rol_epi64(__W, __U, __A, 5); 4367}4368TEST_CONSTEXPR(match_v8di(_mm512_mask_rol_epi64(((__m512i)(__v8di){99, 99, 99, 99, 99, 99, 99, 99}), 0x73, ((__m512i)(__v8di){1, -2, 3, -4, -5, 6, -7, 8}), 5), 32, -33, 99, 99, -129, 192, -193, 99));4369 4370__m512i test_mm512_maskz_rol_epi64(__mmask8 __U, __m512i __A) {4371 // CHECK-LABEL: test_mm512_maskz_rol_epi644372 // CHECK: @llvm.fshl.v8i644373 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4374 return _mm512_maskz_rol_epi64(__U, __A, 5); 4375}4376TEST_CONSTEXPR(match_v8di(_mm512_maskz_rol_epi64(0x37, ((__m512i)(__v8di){1, -2, 3, -4, -5, 6, -7, 8}), 5), 32, -33, 96, 0, -129, 192, 0, 0));4377 4378__m512i test_mm512_rolv_epi32(__m512i __A, __m512i __B) {4379 // CHECK-LABEL: test_mm512_rolv_epi324380 // CHECK: @llvm.fshl.v16i324381 return _mm512_rolv_epi32(__A, __B); 4382}4383TEST_CONSTEXPR(match_v16si(_mm512_rolv_epi32((__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, -32769, 786432, -24577, -4194305, -10485761, 7168, 67108864, 2304, -301989889, -641, -353, -193, -1073741823, 60, 2147483640));4384 4385__m512i test_mm512_mask_rolv_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {4386 // CHECK-LABEL: test_mm512_mask_rolv_epi324387 // CHECK: @llvm.fshl.v16i324388 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4389 return _mm512_mask_rolv_epi32(__W, __U, __A, __B); 4390}4391TEST_CONSTEXPR(match_v16si(_mm512_mask_rolv_epi32((__m512i)(__v16si){ 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999}, 0xBFF5, (__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, 999, 786432, 999, -4194305, -10485761, 7168, 67108864, 2304, -301989889, -641, -353, -193, -1073741823, 999, 2147483640));4392 4393__m512i test_mm512_maskz_rolv_epi32(__mmask16 __U, __m512i __A, __m512i __B) {4394 // CHECK-LABEL: test_mm512_maskz_rolv_epi324395 // CHECK: @llvm.fshl.v16i324396 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4397 return _mm512_maskz_rolv_epi32(__U, __A, __B); 4398}4399TEST_CONSTEXPR(match_v16si(_mm512_maskz_rolv_epi32(0xBFF5, (__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, 0, 786432, 0, -4194305, -10485761, 7168, 67108864, 2304, -301989889, -641, -353, -193, -1073741823, 0, 2147483640));4400 4401__m512i test_mm512_rolv_epi64(__m512i __A, __m512i __B) {4402 // CHECK-LABEL: test_mm512_rolv_epi644403 // CHECK: @llvm.fshl.v8i644404 return _mm512_rolv_epi64(__A, __B); 4405}4406TEST_CONSTEXPR(match_v8di(_mm512_rolv_epi64((__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 256, -129, 864691128455135232LL, -97, 5764607523034234880LL, -4611686018427387904LL, -25, -15));4407 4408__m512i test_mm512_mask_rolv_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {4409 // CHECK-LABEL: test_mm512_mask_rolv_epi644410 // CHECK: @llvm.fshl.v8i644411 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4412 return _mm512_mask_rolv_epi64(__W, __U, __A, __B); 4413}4414TEST_CONSTEXPR(match_v8di(_mm512_mask_rolv_epi64((__m512i)(__v8di){ 999, 999, 999, 999, 999, 999, 999, 999}, 0x19, (__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 256, 999, 999, -97, 5764607523034234880LL, 999, 999, 999));4415 4416__m512i test_mm512_maskz_rolv_epi64(__mmask8 __U, __m512i __A, __m512i __B) {4417 // CHECK-LABEL: test_mm512_maskz_rolv_epi644418 // CHECK: @llvm.fshl.v8i644419 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4420 return _mm512_maskz_rolv_epi64(__U, __A, __B); 4421}4422TEST_CONSTEXPR(match_v8di(_mm512_maskz_rolv_epi64(0x19, (__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 256, 0, 0, -97, 5764607523034234880LL, 0, 0, 0));4423 4424__m512i test_mm512_ror_epi32(__m512i __A) {4425 // CHECK-LABEL: test_mm512_ror_epi324426 // CHECK: @llvm.fshr.v16i324427 return _mm512_ror_epi32(__A, 5); 4428}4429TEST_CONSTEXPR(match_v16si(_mm512_ror_epi32(((__m512i)(__v16si){1, -2, 3, -4, -5, 6, -7, 8, 9, -10, 11, -12, 13, -14, 15, -16}), 5), 134217728, -134217729, 402653184, -402653185, -536870913, 805306368, -805306369, 1073741824, 1207959552, -1207959553, 1476395008, -1476395009, 1744830464, -1744830465, 2013265920, -2013265921));4430 4431__m512i test_mm512_mask_ror_epi32(__m512i __W, __mmask16 __U, __m512i __A) {4432 // CHECK-LABEL: test_mm512_mask_ror_epi324433 // CHECK: @llvm.fshr.v16i324434 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4435 return _mm512_mask_ror_epi32(__W, __U, __A, 5); 4436}4437TEST_CONSTEXPR(match_v16si(_mm512_mask_ror_epi32(((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}), 0xC873, ((__m512i)(__v16si){1, -2, 3, -4, -5, 6, -7, 8, 9, -10, 11, -12, 13, -14, 15, -16}), 5), 134217728, -134217729, 99, 99, -536870913, 805306368, -805306369, 99, 99, 99, 99, -1476395009, 99, 99, 2013265920, -2013265921));4438 4439__m512i test_mm512_maskz_ror_epi32(__mmask16 __U, __m512i __A) {4440 // CHECK-LABEL: test_mm512_maskz_ror_epi324441 // CHECK: @llvm.fshr.v16i324442 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4443 return _mm512_maskz_ror_epi32(__U, __A, 5); 4444}4445TEST_CONSTEXPR(match_v16si(_mm512_maskz_ror_epi32(0x378C, ((__m512i)(__v16si){1, -2, 3, -4, -5, 6, -7, 8, 9, -10, 11, -12, 13, -14, 15, -16}), 5), 0, 0, 402653184, -402653185, 0, 0, 0, 1073741824, 1207959552, -1207959553, 1476395008, 0, 1744830464, -1744830465, 0, 0));4446 4447__m512i test_mm512_ror_epi64(__m512i __A) {4448 // CHECK-LABEL: test_mm512_ror_epi644449 // CHECK: @llvm.fshr.v8i644450 return _mm512_ror_epi64(__A, 5); 4451}4452TEST_CONSTEXPR(match_v8di(_mm512_ror_epi64(((__m512i)(__v8di){1, -2, 3, -4, -5, 6, -7, 8}), 5), 576460752303423488LL, -576460752303423489LL, 1729382256910270464LL, -1729382256910270465LL, -2305843009213693953LL, 3458764513820540928LL, -3458764513820540929LL, 4611686018427387904LL)); 4453 4454__m512i test_mm512_mask_ror_epi64(__m512i __W, __mmask8 __U, __m512i __A) {4455 // CHECK-LABEL: test_mm512_mask_ror_epi644456 // CHECK: @llvm.fshr.v8i644457 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4458 return _mm512_mask_ror_epi64(__W, __U, __A, 5); 4459}4460TEST_CONSTEXPR(match_v8di(_mm512_mask_ror_epi64(((__m512i)(__v8di){99, 99, 99, 99, 99, 99, 99, 99}), 0x73, ((__m512i)(__v8di){1, -2, 3, -4, -5, 6, -7, 8}), 5), 576460752303423488LL, -576460752303423489LL, 99, 99, -2305843009213693953LL, 3458764513820540928LL, -3458764513820540929LL, 99)); 4461 4462__m512i test_mm512_maskz_ror_epi64(__mmask8 __U, __m512i __A) {4463 // CHECK-LABEL: test_mm512_maskz_ror_epi644464 // CHECK: @llvm.fshr.v8i644465 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4466 return _mm512_maskz_ror_epi64(__U, __A, 5); 4467}4468TEST_CONSTEXPR(match_v8di(_mm512_maskz_ror_epi64(0x37, ((__m512i)(__v8di){1, -2, 3, -4, -5, 6, -7, 8}), 5), 576460752303423488LL, -576460752303423489LL, 1729382256910270464LL, 0, -2305843009213693953LL, 3458764513820540928LL, 0, 0));4469 4470__m512i test_mm512_rorv_epi32(__m512i __A, __m512i __B) {4471 // CHECK-LABEL: test_mm512_rorv_epi324472 // CHECK: @llvm.fshr.v16i324473 return _mm512_rorv_epi32(__A, __B); 4474}4475TEST_CONSTEXPR(match_v16si(_mm512_rorv_epi32((__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, -131073, 49152, -1572865, -16385, -10241, 29360128, 4096, 150994944, -1153, -671088641, -1476395009, 1073741823, 112, -1073741821, -31));4476 4477__m512i test_mm512_mask_rorv_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {4478 // CHECK-LABEL: test_mm512_mask_rorv_epi324479 // CHECK: @llvm.fshr.v16i324480 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4481 return _mm512_mask_rorv_epi32(__W, __U, __A, __B); 4482}4483TEST_CONSTEXPR(match_v16si(_mm512_mask_rorv_epi32((__m512i)(__v16si){ 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999}, 0xBFF5, (__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, 999, 49152, 999, -16385, -10241, 29360128, 4096, 150994944, -1153, -671088641, -1476395009, 1073741823, 112, 999, -31));4484 4485__m512i test_mm512_maskz_rorv_epi32(__mmask16 __U, __m512i __A, __m512i __B) {4486 // CHECK-LABEL: test_mm512_maskz_rorv_epi324487 // CHECK: @llvm.fshr.v16i324488 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4489 return _mm512_maskz_rorv_epi32(__U, __A, __B); 4490}4491TEST_CONSTEXPR(match_v16si(_mm512_maskz_rorv_epi32(0xBFF5, (__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, 0, 49152, 0, -16385, -10241, 29360128, 4096, 150994944, -1153, -671088641, -1476395009, 1073741823, 112, 0, -31));4492 4493__m512i test_mm512_rorv_epi64(__m512i __A, __m512i __B) {4494 // CHECK-LABEL: test_mm512_rorv_epi644495 // CHECK: @llvm.fshr.v8i644496 return _mm512_rorv_epi64(__A, __B); 4497}4498TEST_CONSTEXPR(match_v8di(_mm512_rorv_epi64((__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 72057594037927936LL, -144115188075855873LL, 192, -1729382256910270465LL, 80, 48, 9223372036854775806LL, 9223372036854775804LL));4499 4500__m512i test_mm512_mask_rorv_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {4501 // CHECK-LABEL: test_mm512_mask_rorv_epi644502 // CHECK: @llvm.fshr.v8i644503 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4504 return _mm512_mask_rorv_epi64(__W, __U, __A, __B); 4505}4506TEST_CONSTEXPR(match_v8di(_mm512_mask_rorv_epi64((__m512i)(__v8di){ 999, 999, 999, 999, 999, 999, 999, 999}, 0x19, (__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 72057594037927936LL, 999, 999, -1729382256910270465LL, 80, 999, 999, 999));4507 4508__m512i test_mm512_maskz_rorv_epi64(__mmask8 __U, __m512i __A, __m512i __B) {4509 // CHECK-LABEL: test_mm512_maskz_rorv_epi644510 // CHECK: @llvm.fshr.v8i644511 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4512 return _mm512_maskz_rorv_epi64(__U, __A, __B); 4513}4514TEST_CONSTEXPR(match_v8di(_mm512_maskz_rorv_epi64(0x19, (__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 72057594037927936LL, 0, 0, -1729382256910270465LL, 80, 0, 0, 0));4515 4516__m512i test_mm512_slli_epi32(__m512i __A) {4517 // CHECK-LABEL: test_mm512_slli_epi324518 // CHECK: @llvm.x86.avx512.pslli.d.5124519 return _mm512_slli_epi32(__A, 5); 4520}4521TEST_CONSTEXPR(match_v16si(_mm512_slli_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 0), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15));4522TEST_CONSTEXPR(match_v16si(_mm512_slli_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0, 0x2, 0x4, 0x6, 0x8, 0xa, 0xc, 0xe, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e));4523TEST_CONSTEXPR(match_v16si(_mm512_slli_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 10), 0, 0x400, 0x800, 0xc00, 0x1000, 0x1400, 0x1800, 0x1c00, 0x2000, 0x2400, 0x2800, 0x2c00, 0x3000, 0x3400, 0x3800, 0x3c00));4524TEST_CONSTEXPR(match_v16si(_mm512_slli_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 32), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));4525TEST_CONSTEXPR(match_v16si(_mm512_slli_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 33), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));4526 4527__m512i test_mm512_slli_epi32_2(__m512i __A, unsigned int __B) {4528 // CHECK-LABEL: test_mm512_slli_epi32_24529 // CHECK: @llvm.x86.avx512.pslli.d.5124530 return _mm512_slli_epi32(__A, __B); 4531}4532 4533__m512i test_mm512_mask_slli_epi32(__m512i __W, __mmask16 __U, __m512i __A) {4534 // CHECK-LABEL: test_mm512_mask_slli_epi324535 // CHECK: @llvm.x86.avx512.pslli.d.5124536 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4537 return _mm512_mask_slli_epi32(__W, __U, __A, 5); 4538}4539TEST_CONSTEXPR(match_v16si(_mm512_mask_slli_epi32((__m512i)(__v16si){100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115}, (__mmask16)0x5555, (__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0x0, 101, 0x4, 103, 0x8, 105, 0xc, 107, 0x10, 109, 0x14, 111, 0x18, 113, 0x1c, 115));4540 4541__m512i test_mm512_mask_slli_epi32_2(__m512i __W, __mmask16 __U, __m512i __A, unsigned int __B) {4542 // CHECK-LABEL: test_mm512_mask_slli_epi32_24543 // CHECK: @llvm.x86.avx512.pslli.d.5124544 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4545 return _mm512_mask_slli_epi32(__W, __U, __A, __B); 4546}4547 4548__m512i test_mm512_maskz_slli_epi32(__mmask16 __U, __m512i __A) {4549 // CHECK-LABEL: test_mm512_maskz_slli_epi324550 // CHECK: @llvm.x86.avx512.pslli.d.5124551 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4552 return _mm512_maskz_slli_epi32(__U, __A, 5); 4553}4554TEST_CONSTEXPR(match_v16si(_mm512_maskz_slli_epi32((__mmask16)0x00ffcc71, (__m512i)(__v16si){0xff, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 32), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));4555TEST_CONSTEXPR(match_v16si(_mm512_maskz_slli_epi32((__mmask16)0, (__m512i)(__v16si){0xff, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 16), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));4556TEST_CONSTEXPR(match_v16si(_mm512_maskz_slli_epi32((__mmask16)0xffff, (__m512i)(__v16si){0xff, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0x1fe, 0x2, 0x4, 0x6, 0x8, 0xa, 0xc, 0xe, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e));4557TEST_CONSTEXPR(match_v16si(_mm512_maskz_slli_epi32((__mmask16)0x7fff, (__m512i)(__v16si){0xff, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0x1fe, 0x2, 0x4, 0x6, 0x8, 0xa, 0xc, 0xe, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0));4558TEST_CONSTEXPR(match_v16si(_mm512_maskz_slli_epi32((__mmask16)0x71cc, (__m512i)(__v16si){0xff, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0, 0, 0x4, 0x6, 0, 0, 0xc, 0xe, 0x10, 0, 0, 0, 0x18, 0x1a, 0x1c, 0));4559 4560__m512i test_mm512_maskz_slli_epi32_2(__mmask16 __U, __m512i __A, unsigned int __B) {4561 // CHECK-LABEL: test_mm512_maskz_slli_epi32_24562 // CHECK: @llvm.x86.avx512.pslli.d.5124563 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4564 return _mm512_maskz_slli_epi32(__U, __A, __B); 4565}4566 4567__m512i test_mm512_slli_epi64(__m512i __A) {4568 // CHECK-LABEL: test_mm512_slli_epi644569 // CHECK: @llvm.x86.avx512.pslli.q.5124570 return _mm512_slli_epi64(__A, 5); 4571}4572TEST_CONSTEXPR(match_v8di(_mm512_slli_epi64((__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, 1), 0x0, 0x2, 0x4, 0x6, 0x8, 0xa, 0xc, 0xe));4573 4574__m512i test_mm512_slli_epi64_2(__m512i __A, unsigned int __B) {4575 // CHECK-LABEL: test_mm512_slli_epi64_24576 // CHECK: @llvm.x86.avx512.pslli.q.5124577 return _mm512_slli_epi64(__A, __B); 4578}4579 4580__m512i test_mm512_mask_slli_epi64(__m512i __W, __mmask8 __U, __m512i __A) {4581 // CHECK-LABEL: test_mm512_mask_slli_epi644582 // CHECK: @llvm.x86.avx512.pslli.q.5124583 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4584 return _mm512_mask_slli_epi64(__W, __U, __A, 5); 4585}4586TEST_CONSTEXPR(match_v8di(_mm512_mask_slli_epi64((__m512i)(__v8di){100, 101, 102, 103, 104, 105, 106, 107}, (__mmask8)0x0F, (__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, 2), 0x0, 0x4, 0x8, 0xc, 104, 105, 106, 107));4587 4588__m512i test_mm512_mask_slli_epi64_2(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B) {4589 // CHECK-LABEL: test_mm512_mask_slli_epi64_24590 // CHECK: @llvm.x86.avx512.pslli.q.5124591 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4592 return _mm512_mask_slli_epi64(__W, __U, __A, __B); 4593}4594 4595__m512i test_mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A) {4596 // CHECK-LABEL: test_mm512_maskz_slli_epi644597 // CHECK: @llvm.x86.avx512.pslli.q.5124598 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4599 return _mm512_maskz_slli_epi64(__U, __A, 5); 4600}4601TEST_CONSTEXPR(match_v8di(_mm512_maskz_slli_epi64((__mmask8)0x00ffcc71, (__m512i)(__v8di){0xff, 1, 2, 3, 4, 5, 6, 7}, 64), 0, 0, 0, 0, 0, 0, 0, 0));4602TEST_CONSTEXPR(match_v8di(_mm512_maskz_slli_epi64((__mmask8)0, (__m512i)(__v8di){0xff, 1, 2, 3, 4, 5, 6, 7}, 16), 0, 0, 0, 0, 0, 0, 0, 0));4603TEST_CONSTEXPR(match_v8di(_mm512_maskz_slli_epi64((__mmask8)0xff, (__m512i)(__v8di){0xff, 1, 2, 3, 4, 5, 6, 7}, 1), 0x1fe, 0x2, 0x4, 0x6, 0x8, 0xa, 0xc, 0xe));4604TEST_CONSTEXPR(match_v8di(_mm512_maskz_slli_epi64((__mmask8)0x7f, (__m512i)(__v8di){0xff, 1, 2, 3, 4, 5, 6, 7}, 1), 0x1fe, 0x2, 0x4, 0x6, 0x8, 0xa, 0xc, 0));4605TEST_CONSTEXPR(match_v8di(_mm512_maskz_slli_epi64((__mmask8)0x71, (__m512i)(__v8di){0xff, 1, 2, 3, 4, 5, 6, 7}, 1), 0x1fe, 0, 0, 0, 0x8, 0xa, 0xc, 0));4606 4607__m512i test_mm512_maskz_slli_epi64_2(__mmask8 __U, __m512i __A, unsigned int __B) {4608 // CHECK-LABEL: test_mm512_maskz_slli_epi64_24609 // CHECK: @llvm.x86.avx512.pslli.q.5124610 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4611 return _mm512_maskz_slli_epi64(__U, __A, __B); 4612}4613 4614__m512i test_mm512_srli_epi32(__m512i __A) {4615 // CHECK-LABEL: test_mm512_srli_epi324616 // CHECK: @llvm.x86.avx512.psrli.d.5124617 return _mm512_srli_epi32(__A, 5); 4618}4619TEST_CONSTEXPR(match_v16si(_mm512_srli_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 10), 0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0));4620 4621__m512i test_mm512_srli_epi32_2(__m512i __A, unsigned int __B) {4622 // CHECK-LABEL: test_mm512_srli_epi32_24623 // CHECK: @llvm.x86.avx512.psrli.d.5124624 return _mm512_srli_epi32(__A, __B); 4625}4626 4627__m512i test_mm512_mask_srli_epi32(__m512i __W, __mmask16 __U, __m512i __A) {4628 // CHECK-LABEL: test_mm512_mask_srli_epi324629 // CHECK: @llvm.x86.avx512.psrli.d.5124630 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4631 return _mm512_mask_srli_epi32(__W, __U, __A, 5); 4632}4633TEST_CONSTEXPR(match_v16si(_mm512_mask_srli_epi32((__m512i)(__v16si){100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115}, (__mmask16)0x5555, (__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0x0, 101, 0x1, 103, 0x2, 105, 0x3, 107, 0x4, 109, 0x5, 111, 0x6, 113, 0x7, 115));4634 4635__m512i test_mm512_mask_srli_epi32_2(__m512i __W, __mmask16 __U, __m512i __A, unsigned int __B) {4636 // CHECK-LABEL: test_mm512_mask_srli_epi32_24637 // CHECK: @llvm.x86.avx512.psrli.d.5124638 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4639 return _mm512_mask_srli_epi32(__W, __U, __A, __B); 4640}4641 4642__m512i test_mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A) {4643 // CHECK-LABEL: test_mm512_maskz_srli_epi324644 // CHECK: @llvm.x86.avx512.psrli.d.5124645 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4646 return _mm512_maskz_srli_epi32(__U, __A, 5); 4647}4648TEST_CONSTEXPR(match_v16si(_mm512_maskz_srli_epi32((__mmask16)0x71cc, (__m512i)(__v16si){0xff, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0, 0, 0x1, 0x1, 0, 0, 0x3, 0x3, 0x4, 0, 0, 0, 0x6, 0x6, 0x7, 0));4649 4650__m512i test_mm512_maskz_srli_epi32_2(__mmask16 __U, __m512i __A, unsigned int __B) {4651 // CHECK-LABEL: test_mm512_maskz_srli_epi32_24652 // CHECK: @llvm.x86.avx512.psrli.d.5124653 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4654 return _mm512_maskz_srli_epi32(__U, __A, __B); 4655}4656 4657__m512i test_mm512_srli_epi64(__m512i __A) {4658 // CHECK-LABEL: test_mm512_srli_epi644659 // CHECK: @llvm.x86.avx512.psrli.q.5124660 return _mm512_srli_epi64(__A, 5); 4661}4662TEST_CONSTEXPR(match_v8di(_mm512_srli_epi64((__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, 1), 0x0, 0x0, 0x1, 0x1, 0x2, 0x2, 0x3, 0x3));4663 4664__m512i test_mm512_srli_epi64_2(__m512i __A, unsigned int __B) {4665 // CHECK-LABEL: test_mm512_srli_epi64_24666 // CHECK: @llvm.x86.avx512.psrli.q.5124667 return _mm512_srli_epi64(__A, __B); 4668}4669 4670__m512i test_mm512_mask_srli_epi64(__m512i __W, __mmask8 __U, __m512i __A) {4671 // CHECK-LABEL: test_mm512_mask_srli_epi644672 // CHECK: @llvm.x86.avx512.psrli.q.5124673 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4674 return _mm512_mask_srli_epi64(__W, __U, __A, 5); 4675}4676TEST_CONSTEXPR(match_v8di(_mm512_mask_srli_epi64((__m512i)(__v8di){100, 101, 102, 103, 104, 105, 106, 107}, (__mmask8)0x0F, (__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, 2), 0x0, 0x0, 0x0, 0x0, 104, 105, 106, 107));4677 4678__m512i test_mm512_mask_srli_epi64_2(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B) {4679 // CHECK-LABEL: test_mm512_mask_srli_epi64_24680 // CHECK: @llvm.x86.avx512.psrli.q.5124681 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4682 return _mm512_mask_srli_epi64(__W, __U, __A, __B); 4683}4684 4685__m512i test_mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A) {4686 // CHECK-LABEL: test_mm512_maskz_srli_epi644687 // CHECK: @llvm.x86.avx512.psrli.q.5124688 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4689 return _mm512_maskz_srli_epi64(__U, __A, 5); 4690}4691TEST_CONSTEXPR(match_v8di(_mm512_maskz_srli_epi64((__mmask8)0x71, (__m512i)(__v8di){0xff, 1, 2, 3, 4, 5, 6, 7}, 1), 0x7f, 0, 0, 0, 0x2, 0x2, 0x3, 0));4692 4693__m512i test_mm512_maskz_srli_epi64_2(__mmask8 __U, __m512i __A, unsigned int __B) {4694 // CHECK-LABEL: test_mm512_maskz_srli_epi64_24695 // CHECK: @llvm.x86.avx512.psrli.q.5124696 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4697 return _mm512_maskz_srli_epi64(__U, __A, __B); 4698}4699 4700__m512i test_mm512_mask_load_epi32(__m512i __W, __mmask16 __U, void const *__P) {4701 // CHECK-LABEL: test_mm512_mask_load_epi324702 // CHECK: @llvm.masked.load.v16i32.p0(ptr align 64 %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}})4703 return _mm512_mask_load_epi32(__W, __U, __P); 4704}4705 4706__m512i test_mm512_maskz_load_epi32(__mmask16 __U, void const *__P) {4707 // CHECK-LABEL: test_mm512_maskz_load_epi324708 // CHECK: @llvm.masked.load.v16i32.p0(ptr align 64 %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}})4709 return _mm512_maskz_load_epi32(__U, __P); 4710}4711 4712__m512i test_mm512_mask_mov_epi32(__m512i __W, __mmask16 __U, __m512i __A) {4713 // CHECK-LABEL: test_mm512_mask_mov_epi324714 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4715 return _mm512_mask_mov_epi32(__W, __U, __A); 4716}4717 4718__m512i test_mm512_maskz_mov_epi32(__mmask16 __U, __m512i __A) {4719 // CHECK-LABEL: test_mm512_maskz_mov_epi324720 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}4721 return _mm512_maskz_mov_epi32(__U, __A); 4722}4723 4724__m512i test_mm512_mask_mov_epi64(__m512i __W, __mmask8 __U, __m512i __A) {4725 // CHECK-LABEL: test_mm512_mask_mov_epi644726 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4727 return _mm512_mask_mov_epi64(__W, __U, __A); 4728}4729 4730__m512i test_mm512_maskz_mov_epi64(__mmask8 __U, __m512i __A) {4731 // CHECK-LABEL: test_mm512_maskz_mov_epi644732 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}4733 return _mm512_maskz_mov_epi64(__U, __A); 4734}4735 4736__m512i test_mm512_mask_load_epi64(__m512i __W, __mmask8 __U, void const *__P) {4737 // CHECK-LABEL: test_mm512_mask_load_epi644738 // CHECK: @llvm.masked.load.v8i64.p0(ptr align 64 %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}})4739 return _mm512_mask_load_epi64(__W, __U, __P); 4740}4741 4742__m512i test_mm512_maskz_load_epi64(__mmask8 __U, void const *__P) {4743 // CHECK-LABEL: test_mm512_maskz_load_epi644744 // CHECK: @llvm.masked.load.v8i64.p0(ptr align 64 %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}})4745 return _mm512_maskz_load_epi64(__U, __P); 4746}4747 4748void test_mm512_mask_store_epi32(void *__P, __mmask16 __U, __m512i __A) {4749 // CHECK-LABEL: test_mm512_mask_store_epi324750 // CHECK: @llvm.masked.store.v16i32.p0(<16 x i32> %{{.*}}, ptr align 64 %{{.*}}, <16 x i1> %{{.*}})4751 return _mm512_mask_store_epi32(__P, __U, __A); 4752}4753 4754void test_mm512_mask_store_epi64(void *__P, __mmask8 __U, __m512i __A) {4755 // CHECK-LABEL: test_mm512_mask_store_epi644756 // CHECK: @llvm.masked.store.v8i64.p0(<8 x i64> %{{.*}}, ptr align 64 %{{.*}}, <8 x i1> %{{.*}})4757 return _mm512_mask_store_epi64(__P, __U, __A); 4758}4759 4760__m512d test_mm512_movedup_pd(__m512d __A) {4761 // CHECK-LABEL: test_mm512_movedup_pd4762 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>4763 return _mm512_movedup_pd(__A);4764}4765TEST_CONSTEXPR(match_m512d(_mm512_movedup_pd((__m512d){-1.0, +2.0, +3.0, +4.0, -5.0, -6.0, +7.0, +8.0}), -1.0, -1.0, +3.0, +3.0, -5.0, -5.0, +7.0, +7.0));4766 4767__m512d test_mm512_mask_movedup_pd(__m512d __W, __mmask8 __U, __m512d __A) {4768 // CHECK-LABEL: test_mm512_mask_movedup_pd4769 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>4770 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}4771 return _mm512_mask_movedup_pd(__W, __U, __A);4772}4773 4774__m512d test_mm512_maskz_movedup_pd(__mmask8 __U, __m512d __A) {4775 // CHECK-LABEL: test_mm512_maskz_movedup_pd4776 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>4777 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}4778 return _mm512_maskz_movedup_pd(__U, __A);4779}4780 4781int test_mm_comi_round_sd(__m128d __A, __m128d __B) {4782 // CHECK-LABEL: test_mm_comi_round_sd4783 // CHECK: @llvm.x86.avx512.vcomi.sd4784 return _mm_comi_round_sd(__A, __B, 5, _MM_FROUND_NO_EXC); 4785}4786 4787int test_mm_comi_round_ss(__m128 __A, __m128 __B) {4788 // CHECK-LABEL: test_mm_comi_round_ss4789 // CHECK: @llvm.x86.avx512.vcomi.ss4790 return _mm_comi_round_ss(__A, __B, 5, _MM_FROUND_NO_EXC); 4791}4792 4793__m512d test_mm512_fixupimm_round_pd(__m512d __A, __m512d __B, __m512i __C) {4794 // CHECK-LABEL: test_mm512_fixupimm_round_pd4795 // CHECK: @llvm.x86.avx512.mask.fixupimm.pd.5124796 return _mm512_fixupimm_round_pd(__A, __B, __C, 5, 8); 4797}4798 4799__m512d test_mm512_mask_fixupimm_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512i __C) {4800 // CHECK-LABEL: test_mm512_mask_fixupimm_round_pd4801 // CHECK: @llvm.x86.avx512.mask.fixupimm.pd.5124802 return _mm512_mask_fixupimm_round_pd(__A, __U, __B, __C, 5, 8); 4803}4804 4805__m512d test_mm512_fixupimm_pd(__m512d __A, __m512d __B, __m512i __C) {4806 // CHECK-LABEL: test_mm512_fixupimm_pd4807 // CHECK: @llvm.x86.avx512.mask.fixupimm.pd.5124808 return _mm512_fixupimm_pd(__A, __B, __C, 5); 4809}4810 4811__m512d test_mm512_mask_fixupimm_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512i __C) {4812 // CHECK-LABEL: test_mm512_mask_fixupimm_pd4813 // CHECK: @llvm.x86.avx512.mask.fixupimm.pd.5124814 return _mm512_mask_fixupimm_pd(__A, __U, __B, __C, 5); 4815}4816 4817__m512d test_mm512_maskz_fixupimm_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512i __C) {4818 // CHECK-LABEL: test_mm512_maskz_fixupimm_round_pd4819 // CHECK: @llvm.x86.avx512.maskz.fixupimm.pd.5124820 return _mm512_maskz_fixupimm_round_pd(__U, __A, __B, __C, 5, 8); 4821}4822 4823__m512d test_mm512_maskz_fixupimm_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512i __C) {4824 // CHECK-LABEL: test_mm512_maskz_fixupimm_pd4825 // CHECK: @llvm.x86.avx512.maskz.fixupimm.pd.5124826 return _mm512_maskz_fixupimm_pd(__U, __A, __B, __C, 5); 4827}4828 4829__m512 test_mm512_fixupimm_round_ps(__m512 __A, __m512 __B, __m512i __C) {4830 // CHECK-LABEL: test_mm512_fixupimm_round_ps4831 // CHECK: @llvm.x86.avx512.mask.fixupimm.ps.5124832 return _mm512_fixupimm_round_ps(__A, __B, __C, 5, 8); 4833}4834 4835__m512 test_mm512_mask_fixupimm_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512i __C) {4836 // CHECK-LABEL: test_mm512_mask_fixupimm_round_ps4837 // CHECK: @llvm.x86.avx512.mask.fixupimm.ps.5124838 return _mm512_mask_fixupimm_round_ps(__A, __U, __B, __C, 5, 8); 4839}4840 4841__m512 test_mm512_fixupimm_ps(__m512 __A, __m512 __B, __m512i __C) {4842 // CHECK-LABEL: test_mm512_fixupimm_ps4843 // CHECK: @llvm.x86.avx512.mask.fixupimm.ps.5124844 return _mm512_fixupimm_ps(__A, __B, __C, 5); 4845}4846 4847__m512 test_mm512_mask_fixupimm_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512i __C) {4848 // CHECK-LABEL: test_mm512_mask_fixupimm_ps4849 // CHECK: @llvm.x86.avx512.mask.fixupimm.ps.5124850 return _mm512_mask_fixupimm_ps(__A, __U, __B, __C, 5); 4851}4852 4853__m512 test_mm512_maskz_fixupimm_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512i __C) {4854 // CHECK-LABEL: test_mm512_maskz_fixupimm_round_ps4855 // CHECK: @llvm.x86.avx512.maskz.fixupimm.ps.5124856 return _mm512_maskz_fixupimm_round_ps(__U, __A, __B, __C, 5, 8); 4857}4858 4859__m512 test_mm512_maskz_fixupimm_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512i __C) {4860 // CHECK-LABEL: test_mm512_maskz_fixupimm_ps4861 // CHECK: @llvm.x86.avx512.maskz.fixupimm.ps.5124862 return _mm512_maskz_fixupimm_ps(__U, __A, __B, __C, 5); 4863}4864 4865__m128d test_mm_fixupimm_round_sd(__m128d __A, __m128d __B, __m128i __C) {4866 // CHECK-LABEL: test_mm_fixupimm_round_sd4867 // CHECK: @llvm.x86.avx512.mask.fixupimm4868 return _mm_fixupimm_round_sd(__A, __B, __C, 5, 8); 4869}4870 4871__m128d test_mm_mask_fixupimm_round_sd(__m128d __A, __mmask8 __U, __m128d __B, __m128i __C) {4872 // CHECK-LABEL: test_mm_mask_fixupimm_round_sd4873 // CHECK: @llvm.x86.avx512.mask.fixupimm4874 return _mm_mask_fixupimm_round_sd(__A, __U, __B, __C, 5, 8); 4875}4876 4877__m128d test_mm_fixupimm_sd(__m128d __A, __m128d __B, __m128i __C) {4878 // CHECK-LABEL: test_mm_fixupimm_sd4879 // CHECK: @llvm.x86.avx512.mask.fixupimm4880 return _mm_fixupimm_sd(__A, __B, __C, 5); 4881}4882 4883__m128d test_mm_mask_fixupimm_sd(__m128d __A, __mmask8 __U, __m128d __B, __m128i __C) {4884 // CHECK-LABEL: test_mm_mask_fixupimm_sd4885 // CHECK: @llvm.x86.avx512.mask.fixupimm4886 return _mm_mask_fixupimm_sd(__A, __U, __B, __C, 5); 4887}4888 4889__m128d test_mm_maskz_fixupimm_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128i __C) {4890 // CHECK-LABEL: test_mm_maskz_fixupimm_round_sd4891 // CHECK: @llvm.x86.avx512.maskz.fixupimm4892 return _mm_maskz_fixupimm_round_sd(__U, __A, __B, __C, 5, 8); 4893}4894 4895__m128d test_mm_maskz_fixupimm_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128i __C) {4896 // CHECK-LABEL: test_mm_maskz_fixupimm_sd4897 // CHECK: @llvm.x86.avx512.maskz.fixupimm4898 return _mm_maskz_fixupimm_sd(__U, __A, __B, __C, 5); 4899}4900 4901__m128 test_mm_fixupimm_round_ss(__m128 __A, __m128 __B, __m128i __C) {4902 // CHECK-LABEL: test_mm_fixupimm_round_ss4903 // CHECK: @llvm.x86.avx512.mask.fixupimm4904 return _mm_fixupimm_round_ss(__A, __B, __C, 5, 8); 4905}4906 4907__m128 test_mm_mask_fixupimm_round_ss(__m128 __A, __mmask8 __U, __m128 __B, __m128i __C) {4908 // CHECK-LABEL: test_mm_mask_fixupimm_round_ss4909 // CHECK: @llvm.x86.avx512.mask.fixupimm4910 return _mm_mask_fixupimm_round_ss(__A, __U, __B, __C, 5, 8); 4911}4912 4913__m128 test_mm_fixupimm_ss(__m128 __A, __m128 __B, __m128i __C) {4914 // CHECK-LABEL: test_mm_fixupimm_ss4915 // CHECK: @llvm.x86.avx512.mask.fixupimm4916 return _mm_fixupimm_ss(__A, __B, __C, 5); 4917}4918 4919__m128 test_mm_mask_fixupimm_ss(__m128 __A, __mmask8 __U, __m128 __B, __m128i __C) {4920 // CHECK-LABEL: test_mm_mask_fixupimm_ss4921 // CHECK: @llvm.x86.avx512.mask.fixupimm4922 return _mm_mask_fixupimm_ss(__A, __U, __B, __C, 5); 4923}4924 4925__m128 test_mm_maskz_fixupimm_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128i __C) {4926 // CHECK-LABEL: test_mm_maskz_fixupimm_round_ss4927 // CHECK: @llvm.x86.avx512.maskz.fixupimm4928 return _mm_maskz_fixupimm_round_ss(__U, __A, __B, __C, 5, 8); 4929}4930 4931__m128 test_mm_maskz_fixupimm_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128i __C) {4932 // CHECK-LABEL: test_mm_maskz_fixupimm_ss4933 // CHECK: @llvm.x86.avx512.maskz.fixupimm4934 return _mm_maskz_fixupimm_ss(__U, __A, __B, __C, 5); 4935}4936 4937__m128d test_mm_getexp_round_sd(__m128d __A, __m128d __B) {4938 // CHECK-LABEL: test_mm_getexp_round_sd4939 // CHECK: @llvm.x86.avx512.mask.getexp.sd4940 return _mm_getexp_round_sd(__A, __B, 8); 4941}4942 4943__m128d test_mm_getexp_sd(__m128d __A, __m128d __B) {4944 // CHECK-LABEL: test_mm_getexp_sd4945 // CHECK: @llvm.x86.avx512.mask.getexp.sd4946 return _mm_getexp_sd(__A, __B); 4947}4948 4949__m128 test_mm_getexp_round_ss(__m128 __A, __m128 __B) {4950 // CHECK-LABEL: test_mm_getexp_round_ss4951 // CHECK: @llvm.x86.avx512.mask.getexp.ss4952 return _mm_getexp_round_ss(__A, __B, 8); 4953}4954 4955__m128 test_mm_getexp_ss(__m128 __A, __m128 __B) {4956 // CHECK-LABEL: test_mm_getexp_ss4957 // CHECK: @llvm.x86.avx512.mask.getexp.ss4958 return _mm_getexp_ss(__A, __B); 4959}4960 4961__m128d test_mm_getmant_round_sd(__m128d __A, __m128d __B) {4962 // CHECK-LABEL: test_mm_getmant_round_sd4963 // CHECK: @llvm.x86.avx512.mask.getmant.sd4964 return _mm_getmant_round_sd(__A, __B, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_src, 8); 4965}4966 4967__m128d test_mm_getmant_sd(__m128d __A, __m128d __B) {4968 // CHECK-LABEL: test_mm_getmant_sd4969 // CHECK: @llvm.x86.avx512.mask.getmant.sd4970 return _mm_getmant_sd(__A, __B, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_src); 4971}4972 4973__m128 test_mm_getmant_round_ss(__m128 __A, __m128 __B) {4974 // CHECK-LABEL: test_mm_getmant_round_ss4975 // CHECK: @llvm.x86.avx512.mask.getmant.ss4976 return _mm_getmant_round_ss(__A, __B, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_src, 8); 4977}4978 4979__m128 test_mm_getmant_ss(__m128 __A, __m128 __B) {4980 // CHECK-LABEL: test_mm_getmant_ss4981 // CHECK: @llvm.x86.avx512.mask.getmant.ss4982 return _mm_getmant_ss(__A, __B, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_src); 4983}4984 4985__mmask16 test_mm512_kmov(__mmask16 __A) {4986 // CHECK-LABEL: test_mm512_kmov4987 // CHECK: load i16, ptr %__A.addr.i, align 2{{$}}4988 return _mm512_kmov(__A); 4989}4990 4991__m512d test_mm512_mask_unpackhi_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {4992 // CHECK-LABEL: test_mm512_mask_unpackhi_pd4993 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>4994 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}4995 return _mm512_mask_unpackhi_pd(__W, __U, __A, __B); 4996}4997#if __x86_64__4998long long test_mm_cvt_roundsd_si64(__m128d __A) {4999 // CHECK-LABEL: test_mm_cvt_roundsd_si645000 // CHECK: @llvm.x86.avx512.vcvtsd2si645001 return _mm_cvt_roundsd_si64(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5002}5003#endif5004__m512i test_mm512_mask2_permutex2var_epi32(__m512i __A, __m512i __I, __mmask16 __U, __m512i __B) {5005 // CHECK-LABEL: test_mm512_mask2_permutex2var_epi325006 // CHECK: @llvm.x86.avx512.vpermi2var.d.5125007 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}5008 return _mm512_mask2_permutex2var_epi32(__A, __I, __U, __B); 5009}5010__m512i test_mm512_unpackhi_epi32(__m512i __A, __m512i __B) {5011 // CHECK-LABEL: test_mm512_unpackhi_epi325012 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>5013 return _mm512_unpackhi_epi32(__A, __B); 5014}5015TEST_CONSTEXPR(match_v16si(_mm512_unpackhi_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m512i)(__v16si){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 2, 18, 3, 19, 6, 22, 7, 23, 10, 26, 11, 27, 14, 30, 15, 31));5016 5017__m512d test_mm512_maskz_unpackhi_pd(__mmask8 __U, __m512d __A, __m512d __B) {5018 // CHECK-LABEL: test_mm512_maskz_unpackhi_pd5019 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>5020 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5021 return _mm512_maskz_unpackhi_pd(__U, __A, __B); 5022}5023#if __x86_64__5024long long test_mm_cvt_roundsd_i64(__m128d __A) {5025 // CHECK-LABEL: test_mm_cvt_roundsd_i645026 // CHECK: @llvm.x86.avx512.vcvtsd2si645027 return _mm_cvt_roundsd_i64(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5028}5029#endif5030__m512d test_mm512_mask2_permutex2var_pd(__m512d __A, __m512i __I, __mmask8 __U, __m512d __B) {5031 // CHECK-LABEL: test_mm512_mask2_permutex2var_pd5032 // CHECK: @llvm.x86.avx512.vpermi2var.pd.5125033 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5034 return _mm512_mask2_permutex2var_pd(__A, __I, __U, __B); 5035}5036__m512i test_mm512_mask_unpackhi_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {5037 // CHECK-LABEL: test_mm512_mask_unpackhi_epi325038 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>5039 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}5040 return _mm512_mask_unpackhi_epi32(__W, __U, __A, __B); 5041}5042 5043__m512 test_mm512_mask_unpackhi_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {5044 // CHECK-LABEL: test_mm512_mask_unpackhi_ps5045 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>5046 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5047 return _mm512_mask_unpackhi_ps(__W, __U, __A, __B); 5048}5049 5050__m512 test_mm512_maskz_unpackhi_ps(__mmask16 __U, __m512 __A, __m512 __B) {5051 // CHECK-LABEL: test_mm512_maskz_unpackhi_ps5052 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>5053 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5054 return _mm512_maskz_unpackhi_ps(__U, __A, __B); 5055}5056 5057__m512d test_mm512_mask_unpacklo_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {5058 // CHECK-LABEL: test_mm512_mask_unpacklo_pd5059 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>5060 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5061 return _mm512_mask_unpacklo_pd(__W, __U, __A, __B); 5062}5063 5064__m512d test_mm512_maskz_unpacklo_pd(__mmask8 __U, __m512d __A, __m512d __B) {5065 // CHECK-LABEL: test_mm512_maskz_unpacklo_pd5066 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>5067 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5068 return _mm512_maskz_unpacklo_pd(__U, __A, __B); 5069}5070 5071__m512 test_mm512_mask_unpacklo_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {5072 // CHECK-LABEL: test_mm512_mask_unpacklo_ps5073 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>5074 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5075 return _mm512_mask_unpacklo_ps(__W, __U, __A, __B); 5076}5077 5078__m512 test_mm512_maskz_unpacklo_ps(__mmask16 __U, __m512 __A, __m512 __B) {5079 // CHECK-LABEL: test_mm512_maskz_unpacklo_ps5080 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>5081 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5082 return _mm512_maskz_unpacklo_ps(__U, __A, __B); 5083}5084int test_mm_cvt_roundsd_si32(__m128d __A) {5085 // CHECK-LABEL: test_mm_cvt_roundsd_si325086 // CHECK: @llvm.x86.avx512.vcvtsd2si325087 return _mm_cvt_roundsd_si32(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5088}5089 5090int test_mm_cvt_roundsd_i32(__m128d __A) {5091 // CHECK-LABEL: test_mm_cvt_roundsd_i325092 // CHECK: @llvm.x86.avx512.vcvtsd2si325093 return _mm_cvt_roundsd_i32(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5094}5095 5096unsigned test_mm_cvt_roundsd_u32(__m128d __A) {5097 // CHECK-LABEL: test_mm_cvt_roundsd_u325098 // CHECK: @llvm.x86.avx512.vcvtsd2usi325099 return _mm_cvt_roundsd_u32(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5100}5101 5102unsigned test_mm_cvtsd_u32(__m128d __A) {5103 // CHECK-LABEL: test_mm_cvtsd_u325104 // CHECK: @llvm.x86.avx512.vcvtsd2usi325105 return _mm_cvtsd_u32(__A); 5106}5107 5108int test_mm512_cvtsi512_si32(__m512i a) {5109 // CHECK-LABEL: test_mm512_cvtsi512_si325110 // CHECK: %{{.*}} = extractelement <16 x i32> %{{.*}}, i32 05111 return _mm512_cvtsi512_si32(a);5112}5113 5114#ifdef __x86_64__5115unsigned long long test_mm_cvt_roundsd_u64(__m128d __A) {5116 // CHECK-LABEL: test_mm_cvt_roundsd_u645117 // CHECK: @llvm.x86.avx512.vcvtsd2usi645118 return _mm_cvt_roundsd_u64(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5119}5120 5121unsigned long long test_mm_cvtsd_u64(__m128d __A) {5122 // CHECK-LABEL: test_mm_cvtsd_u645123 // CHECK: @llvm.x86.avx512.vcvtsd2usi645124 return _mm_cvtsd_u64(__A); 5125}5126#endif5127 5128int test_mm_cvt_roundss_si32(__m128 __A) {5129 // CHECK-LABEL: test_mm_cvt_roundss_si325130 // CHECK: @llvm.x86.avx512.vcvtss2si325131 return _mm_cvt_roundss_si32(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5132}5133 5134int test_mm_cvt_roundss_i32(__m128 __A) {5135 // CHECK-LABEL: test_mm_cvt_roundss_i325136 // CHECK: @llvm.x86.avx512.vcvtss2si325137 return _mm_cvt_roundss_i32(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5138}5139 5140#ifdef __x86_64__5141long long test_mm_cvt_roundss_si64(__m128 __A) {5142 // CHECK-LABEL: test_mm_cvt_roundss_si645143 // CHECK: @llvm.x86.avx512.vcvtss2si645144 return _mm_cvt_roundss_si64(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5145}5146 5147long long test_mm_cvt_roundss_i64(__m128 __A) {5148 // CHECK-LABEL: test_mm_cvt_roundss_i645149 // CHECK: @llvm.x86.avx512.vcvtss2si645150 return _mm_cvt_roundss_i64(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5151}5152#endif5153 5154unsigned test_mm_cvt_roundss_u32(__m128 __A) {5155 // CHECK-LABEL: test_mm_cvt_roundss_u325156 // CHECK: @llvm.x86.avx512.vcvtss2usi325157 return _mm_cvt_roundss_u32(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5158}5159 5160unsigned test_mm_cvtss_u32(__m128 __A) {5161 // CHECK-LABEL: test_mm_cvtss_u325162 // CHECK: @llvm.x86.avx512.vcvtss2usi325163 return _mm_cvtss_u32(__A); 5164}5165 5166#ifdef __x86_64__5167unsigned long long test_mm_cvt_roundss_u64(__m128 __A) {5168 // CHECK-LABEL: test_mm_cvt_roundss_u645169 // CHECK: @llvm.x86.avx512.vcvtss2usi645170 return _mm_cvt_roundss_u64(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5171}5172 5173unsigned long long test_mm_cvtss_u64(__m128 __A) {5174 // CHECK-LABEL: test_mm_cvtss_u645175 // CHECK: @llvm.x86.avx512.vcvtss2usi645176 return _mm_cvtss_u64(__A); 5177}5178#endif5179 5180int test_mm_cvtt_roundsd_i32(__m128d __A) {5181 // CHECK-LABEL: test_mm_cvtt_roundsd_i325182 // CHECK: @llvm.x86.avx512.cvttsd2si5183 return _mm_cvtt_roundsd_i32(__A, _MM_FROUND_NO_EXC);5184}5185 5186int test_mm_cvtt_roundsd_si32(__m128d __A) {5187 // CHECK-LABEL: test_mm_cvtt_roundsd_si325188 // CHECK: @llvm.x86.avx512.cvttsd2si5189 return _mm_cvtt_roundsd_si32(__A, _MM_FROUND_NO_EXC);5190}5191 5192int test_mm_cvttsd_i32(__m128d __A) {5193 // CHECK-LABEL: test_mm_cvttsd_i325194 // CHECK: @llvm.x86.avx512.cvttsd2si5195 return _mm_cvttsd_i32(__A); 5196}5197 5198#ifdef __x86_64__5199long long test_mm_cvtt_roundsd_si64(__m128d __A) {5200 // CHECK-LABEL: test_mm_cvtt_roundsd_si645201 // CHECK: @llvm.x86.avx512.cvttsd2si645202 return _mm_cvtt_roundsd_si64(__A, _MM_FROUND_NO_EXC);5203}5204 5205long long test_mm_cvtt_roundsd_i64(__m128d __A) {5206 // CHECK-LABEL: test_mm_cvtt_roundsd_i645207 // CHECK: @llvm.x86.avx512.cvttsd2si645208 return _mm_cvtt_roundsd_i64(__A, _MM_FROUND_NO_EXC);5209}5210 5211long long test_mm_cvttsd_i64(__m128d __A) {5212 // CHECK-LABEL: test_mm_cvttsd_i645213 // CHECK: @llvm.x86.avx512.cvttsd2si645214 return _mm_cvttsd_i64(__A); 5215}5216#endif5217 5218unsigned test_mm_cvtt_roundsd_u32(__m128d __A) {5219 // CHECK-LABEL: test_mm_cvtt_roundsd_u325220 // CHECK: @llvm.x86.avx512.cvttsd2usi5221 return _mm_cvtt_roundsd_u32(__A, _MM_FROUND_NO_EXC);5222}5223 5224unsigned test_mm_cvttsd_u32(__m128d __A) {5225 // CHECK-LABEL: test_mm_cvttsd_u325226 // CHECK: @llvm.x86.avx512.cvttsd2usi5227 return _mm_cvttsd_u32(__A); 5228}5229 5230#ifdef __x86_64__5231unsigned long long test_mm_cvtt_roundsd_u64(__m128d __A) {5232 // CHECK-LABEL: test_mm_cvtt_roundsd_u645233 // CHECK: @llvm.x86.avx512.cvttsd2usi645234 return _mm_cvtt_roundsd_u64(__A, _MM_FROUND_NO_EXC);5235}5236 5237unsigned long long test_mm_cvttsd_u64(__m128d __A) {5238 // CHECK-LABEL: test_mm_cvttsd_u645239 // CHECK: @llvm.x86.avx512.cvttsd2usi645240 return _mm_cvttsd_u64(__A); 5241}5242#endif5243 5244int test_mm_cvtt_roundss_i32(__m128 __A) {5245 // CHECK-LABEL: test_mm_cvtt_roundss_i325246 // CHECK: @llvm.x86.avx512.cvttss2si5247 return _mm_cvtt_roundss_i32(__A, _MM_FROUND_NO_EXC);5248}5249 5250int test_mm_cvtt_roundss_si32(__m128 __A) {5251 // CHECK-LABEL: test_mm_cvtt_roundss_si325252 // CHECK: @llvm.x86.avx512.cvttss2si5253 return _mm_cvtt_roundss_si32(__A, _MM_FROUND_NO_EXC);5254}5255 5256int test_mm_cvttss_i32(__m128 __A) {5257 // CHECK-LABEL: test_mm_cvttss_i325258 // CHECK: @llvm.x86.avx512.cvttss2si5259 return _mm_cvttss_i32(__A); 5260}5261 5262#ifdef __x86_64__5263float test_mm_cvtt_roundss_i64(__m128 __A) {5264 // CHECK-LABEL: test_mm_cvtt_roundss_i645265 // CHECK: @llvm.x86.avx512.cvttss2si645266 return _mm_cvtt_roundss_i64(__A, _MM_FROUND_NO_EXC);5267}5268 5269long long test_mm_cvtt_roundss_si64(__m128 __A) {5270 // CHECK-LABEL: test_mm_cvtt_roundss_si645271 // CHECK: @llvm.x86.avx512.cvttss2si645272 return _mm_cvtt_roundss_si64(__A, _MM_FROUND_NO_EXC);5273}5274 5275long long test_mm_cvttss_i64(__m128 __A) {5276 // CHECK-LABEL: test_mm_cvttss_i645277 // CHECK: @llvm.x86.avx512.cvttss2si645278 return _mm_cvttss_i64(__A); 5279}5280#endif5281 5282unsigned test_mm_cvtt_roundss_u32(__m128 __A) {5283 // CHECK-LABEL: test_mm_cvtt_roundss_u325284 // CHECK: @llvm.x86.avx512.cvttss2usi5285 return _mm_cvtt_roundss_u32(__A, _MM_FROUND_NO_EXC);5286}5287 5288unsigned test_mm_cvttss_u32(__m128 __A) {5289 // CHECK-LABEL: test_mm_cvttss_u325290 // CHECK: @llvm.x86.avx512.cvttss2usi5291 return _mm_cvttss_u32(__A); 5292}5293 5294#ifdef __x86_64__5295unsigned long long test_mm_cvtt_roundss_u64(__m128 __A) {5296 // CHECK-LABEL: test_mm_cvtt_roundss_u645297 // CHECK: @llvm.x86.avx512.cvttss2usi645298 return _mm_cvtt_roundss_u64(__A, _MM_FROUND_NO_EXC);5299}5300 5301unsigned long long test_mm_cvttss_u64(__m128 __A) {5302 // CHECK-LABEL: test_mm_cvttss_u645303 // CHECK: @llvm.x86.avx512.cvttss2usi645304 return _mm_cvttss_u64(__A); 5305}5306#endif5307 5308__m512i test_mm512_cvtt_roundps_epu32(__m512 __A) 5309{5310 // CHECK-LABEL: test_mm512_cvtt_roundps_epu325311 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.5125312 return _mm512_cvtt_roundps_epu32(__A, _MM_FROUND_NO_EXC);5313}5314 5315__m512i test_mm512_mask_cvtt_roundps_epu32(__m512i __W, __mmask16 __U, __m512 __A)5316{5317 // CHECK-LABEL: test_mm512_mask_cvtt_roundps_epu325318 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.5125319 return _mm512_mask_cvtt_roundps_epu32(__W, __U, __A, _MM_FROUND_NO_EXC);5320}5321 5322__m512i test_mm512_maskz_cvtt_roundps_epu32( __mmask16 __U, __m512 __A)5323{5324 // CHECK-LABEL: test_mm512_maskz_cvtt_roundps_epu325325 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.5125326 5327 return _mm512_maskz_cvtt_roundps_epu32(__U, __A, _MM_FROUND_NO_EXC);5328}5329 5330__m256i test_mm512_cvt_roundps_ph(__m512 __A)5331{5332 // CHECK-LABEL: test_mm512_cvt_roundps_ph5333 // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.5125334 return _mm512_cvt_roundps_ph(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5335}5336 5337__m256i test_mm512_mask_cvt_roundps_ph(__m256i __W , __mmask16 __U, __m512 __A)5338{5339 // CHECK-LABEL: test_mm512_mask_cvt_roundps_ph5340 // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.5125341 return _mm512_mask_cvt_roundps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5342}5343 5344__m256i test_mm512_maskz_cvt_roundps_ph(__mmask16 __U, __m512 __A)5345{5346 // CHECK-LABEL: test_mm512_maskz_cvt_roundps_ph5347 // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.5125348 return _mm512_maskz_cvt_roundps_ph(__U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5349}5350 5351__m512 test_mm512_cvt_roundph_ps(__m256i __A)5352{5353 // CHECK-LABEL: test_mm512_cvt_roundph_ps5354 // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512(5355 return _mm512_cvt_roundph_ps(__A, _MM_FROUND_NO_EXC);5356}5357 5358__m512 test_mm512_mask_cvt_roundph_ps(__m512 __W, __mmask16 __U, __m256i __A)5359{5360 // CHECK-LABEL: test_mm512_mask_cvt_roundph_ps5361 // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512(5362 return _mm512_mask_cvt_roundph_ps(__W, __U, __A, _MM_FROUND_NO_EXC);5363}5364 5365__m512 test_mm512_maskz_cvt_roundph_ps(__mmask16 __U, __m256i __A)5366{5367 // CHECK-LABEL: test_mm512_maskz_cvt_roundph_ps5368 // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512(5369 return _mm512_maskz_cvt_roundph_ps(__U, __A, _MM_FROUND_NO_EXC);5370}5371 5372__m512 test_mm512_cvt_roundepi32_ps( __m512i __A)5373{5374 // CHECK-LABEL: test_mm512_cvt_roundepi32_ps5375 // CHECK: @llvm.x86.avx512.sitofp.round.v16f32.v16i325376 return _mm512_cvt_roundepi32_ps(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5377}5378 5379__m512 test_mm512_mask_cvt_roundepi32_ps(__m512 __W, __mmask16 __U, __m512i __A)5380{5381 // CHECK-LABEL: test_mm512_mask_cvt_roundepi32_ps5382 // CHECK: @llvm.x86.avx512.sitofp.round.v16f32.v16i325383 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5384 return _mm512_mask_cvt_roundepi32_ps(__W,__U,__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5385}5386 5387__m512 test_mm512_maskz_cvt_roundepi32_ps(__mmask16 __U, __m512i __A)5388{5389 // CHECK-LABEL: test_mm512_maskz_cvt_roundepi32_ps5390 // CHECK: @llvm.x86.avx512.sitofp.round.v16f32.v16i325391 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5392 return _mm512_maskz_cvt_roundepi32_ps(__U,__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5393}5394 5395__m512 test_mm512_cvt_roundepu32_ps(__m512i __A)5396{5397 // CHECK-LABEL: test_mm512_cvt_roundepu32_ps5398 // CHECK: @llvm.x86.avx512.uitofp.round.v16f32.v16i325399 return _mm512_cvt_roundepu32_ps(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5400}5401 5402__m512 test_mm512_mask_cvt_roundepu32_ps(__m512 __W, __mmask16 __U,__m512i __A)5403{5404 // CHECK-LABEL: test_mm512_mask_cvt_roundepu32_ps5405 // CHECK: @llvm.x86.avx512.uitofp.round.v16f32.v16i325406 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5407 return _mm512_mask_cvt_roundepu32_ps(__W,__U,__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5408}5409 5410__m512 test_mm512_maskz_cvt_roundepu32_ps(__mmask16 __U,__m512i __A)5411{5412 // CHECK-LABEL: test_mm512_maskz_cvt_roundepu32_ps5413 // CHECK: @llvm.x86.avx512.uitofp.round.v16f32.v16i325414 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5415 return _mm512_maskz_cvt_roundepu32_ps(__U,__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5416}5417 5418__m256 test_mm512_cvt_roundpd_ps(__m512d A)5419{5420 // CHECK-LABEL: test_mm512_cvt_roundpd_ps5421 // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.5125422 return _mm512_cvt_roundpd_ps(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5423}5424 5425__m256 test_mm512_mask_cvt_roundpd_ps(__m256 W, __mmask8 U,__m512d A)5426{5427 // CHECK-LABEL: test_mm512_mask_cvt_roundpd_ps5428 // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.5125429 return _mm512_mask_cvt_roundpd_ps(W,U,A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5430}5431 5432__m256 test_mm512_maskz_cvt_roundpd_ps(__mmask8 U, __m512d A)5433{5434 // CHECK-LABEL: test_mm512_maskz_cvt_roundpd_ps5435 // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.5125436 return _mm512_maskz_cvt_roundpd_ps(U,A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5437}5438 5439__m256i test_mm512_cvtt_roundpd_epi32(__m512d A)5440{5441 // CHECK-LABEL: test_mm512_cvtt_roundpd_epi325442 // CHECK: @llvm.x86.avx512.mask.cvttpd2dq.5125443 return _mm512_cvtt_roundpd_epi32(A,_MM_FROUND_NO_EXC);5444}5445 5446__m256i test_mm512_mask_cvtt_roundpd_epi32(__m256i W, __mmask8 U, __m512d A)5447{5448 // CHECK-LABEL: test_mm512_mask_cvtt_roundpd_epi325449 // CHECK: @llvm.x86.avx512.mask.cvttpd2dq.5125450 return _mm512_mask_cvtt_roundpd_epi32(W,U,A,_MM_FROUND_NO_EXC);5451}5452 5453__m256i test_mm512_maskz_cvtt_roundpd_epi32(__mmask8 U, __m512d A)5454{5455 // CHECK-LABEL: test_mm512_maskz_cvtt_roundpd_epi325456 // CHECK: @llvm.x86.avx512.mask.cvttpd2dq.5125457 return _mm512_maskz_cvtt_roundpd_epi32(U,A,_MM_FROUND_NO_EXC);5458}5459 5460__m512i test_mm512_cvtt_roundps_epi32(__m512 A)5461{5462 // CHECK-LABEL: test_mm512_cvtt_roundps_epi325463 // CHECK: @llvm.x86.avx512.mask.cvttps2dq.5125464 return _mm512_cvtt_roundps_epi32(A,_MM_FROUND_NO_EXC);5465}5466 5467__m512i test_mm512_mask_cvtt_roundps_epi32(__m512i W,__mmask16 U, __m512 A)5468{5469 // CHECK-LABEL: test_mm512_mask_cvtt_roundps_epi325470 // CHECK: @llvm.x86.avx512.mask.cvttps2dq.5125471 return _mm512_mask_cvtt_roundps_epi32(W,U,A,_MM_FROUND_NO_EXC);5472}5473 5474__m512i test_mm512_maskz_cvtt_roundps_epi32(__mmask16 U, __m512 A)5475{5476 // CHECK-LABEL: test_mm512_maskz_cvtt_roundps_epi325477 // CHECK: @llvm.x86.avx512.mask.cvttps2dq.5125478 return _mm512_maskz_cvtt_roundps_epi32(U,A,_MM_FROUND_NO_EXC);5479}5480 5481__m512i test_mm512_cvt_roundps_epi32(__m512 __A)5482{5483 // CHECK-LABEL: test_mm512_cvt_roundps_epi325484 // CHECK: @llvm.x86.avx512.mask.cvtps2dq.5125485 return _mm512_cvt_roundps_epi32(__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5486}5487 5488__m512i test_mm512_mask_cvt_roundps_epi32(__m512i __W,__mmask16 __U,__m512 __A)5489{5490 // CHECK-LABEL: test_mm512_mask_cvt_roundps_epi325491 // CHECK: @llvm.x86.avx512.mask.cvtps2dq.5125492 return _mm512_mask_cvt_roundps_epi32(__W,__U,__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5493}5494 5495__m512i test_mm512_maskz_cvt_roundps_epi32(__mmask16 __U, __m512 __A)5496{5497 // CHECK-LABEL: test_mm512_maskz_cvt_roundps_epi325498 // CHECK: @llvm.x86.avx512.mask.cvtps2dq.5125499 return _mm512_maskz_cvt_roundps_epi32(__U,__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5500}5501 5502__m256i test_mm512_cvt_roundpd_epi32(__m512d A)5503{5504 // CHECK-LABEL: test_mm512_cvt_roundpd_epi325505 // CHECK: @llvm.x86.avx512.mask.cvtpd2dq.5125506 return _mm512_cvt_roundpd_epi32(A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5507}5508 5509__m256i test_mm512_mask_cvt_roundpd_epi32(__m256i W,__mmask8 U,__m512d A)5510{5511 // CHECK-LABEL: test_mm512_mask_cvt_roundpd_epi325512 // CHECK: @llvm.x86.avx512.mask.cvtpd2dq.5125513 return _mm512_mask_cvt_roundpd_epi32(W,U,A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5514}5515 5516__m256i test_mm512_maskz_cvt_roundpd_epi32(__mmask8 U, __m512d A)5517{5518 // CHECK-LABEL: test_mm512_maskz_cvt_roundpd_epi325519 // CHECK: @llvm.x86.avx512.mask.cvtpd2dq.5125520 return _mm512_maskz_cvt_roundpd_epi32(U,A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5521}5522 5523__m512i test_mm512_cvt_roundps_epu32(__m512 __A)5524{5525 // CHECK-LABEL: test_mm512_cvt_roundps_epu325526 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.5125527 return _mm512_cvt_roundps_epu32(__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5528}5529 5530__m512i test_mm512_mask_cvt_roundps_epu32(__m512i __W,__mmask16 __U,__m512 __A)5531{5532 // CHECK-LABEL: test_mm512_mask_cvt_roundps_epu325533 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.5125534 return _mm512_mask_cvt_roundps_epu32(__W,__U,__A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5535}5536 5537__m512i test_mm512_maskz_cvt_roundps_epu32(__mmask16 __U,__m512 __A)5538{5539 // CHECK-LABEL: test_mm512_maskz_cvt_roundps_epu325540 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.5125541 return _mm512_maskz_cvt_roundps_epu32(__U,__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5542}5543 5544__m256i test_mm512_cvt_roundpd_epu32(__m512d A)5545{5546 // CHECK-LABEL: test_mm512_cvt_roundpd_epu325547 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.5125548 return _mm512_cvt_roundpd_epu32(A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5549}5550 5551__m256i test_mm512_mask_cvt_roundpd_epu32(__m256i W, __mmask8 U, __m512d A)5552{5553 // CHECK-LABEL: test_mm512_mask_cvt_roundpd_epu325554 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.5125555 return _mm512_mask_cvt_roundpd_epu32(W,U,A,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5556}5557 5558__m256i test_mm512_maskz_cvt_roundpd_epu32(__mmask8 U, __m512d A) 5559{5560 // CHECK-LABEL: test_mm512_maskz_cvt_roundpd_epu325561 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.5125562 return _mm512_maskz_cvt_roundpd_epu32(U, A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);5563}5564 5565__m512 test_mm512_mask2_permutex2var_ps(__m512 __A, __m512i __I, __mmask16 __U, __m512 __B) {5566 // CHECK-LABEL: test_mm512_mask2_permutex2var_ps5567 // CHECK: @llvm.x86.avx512.vpermi2var.ps.5125568 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5569 return _mm512_mask2_permutex2var_ps(__A, __I, __U, __B); 5570}5571 5572__m512i test_mm512_mask2_permutex2var_epi64(__m512i __A, __m512i __I, __mmask8 __U, __m512i __B) {5573 // CHECK-LABEL: test_mm512_mask2_permutex2var_epi645574 // CHECK: @llvm.x86.avx512.vpermi2var.q.5125575 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}5576 return _mm512_mask2_permutex2var_epi64(__A, __I, __U, __B); 5577}5578 5579__m512d test_mm512_permute_pd(__m512d __X) {5580 // CHECK-LABEL: test_mm512_permute_pd5581 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>5582 return _mm512_permute_pd(__X, 2);5583}5584TEST_CONSTEXPR(match_m512d(_mm512_permute_pd(((__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}), 2), 0.0, 1.0, 2.0, 2.0, 4.0, 4.0, 6.0, 6.0));5585 5586__m512d test_mm512_mask_permute_pd(__m512d __W, __mmask8 __U, __m512d __X) {5587 // CHECK-LABEL: test_mm512_mask_permute_pd5588 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>5589 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5590 return _mm512_mask_permute_pd(__W, __U, __X, 2);5591}5592TEST_CONSTEXPR(match_m512d(_mm512_mask_permute_pd(5593 ((__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}),5594 (__mmask8)0b01010100,5595 ((__m512d){8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0}),5596 2),5597 0.0, 1.0, 10.0, 3.0, 12.0, 5.0, 14.0, 7.05598));5599 5600__m512d test_mm512_maskz_permute_pd(__mmask8 __U, __m512d __X) {5601 // CHECK-LABEL: test_mm512_maskz_permute_pd5602 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>5603 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5604 return _mm512_maskz_permute_pd(__U, __X, 2);5605}5606TEST_CONSTEXPR(match_m512d(_mm512_maskz_permute_pd(5607 (__mmask8)0b01010100,5608 ((__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}),5609 2),5610 0.0, 0.0, 2.0, 0.0, 4.0, 0.0, 6.0, 0.05611));5612 5613__m512 test_mm512_permute_ps(__m512 __X) {5614 // CHECK-LABEL: test_mm512_permute_ps5615 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> poison, <16 x i32> <i32 2, i32 0, i32 0, i32 0, i32 6, i32 4, i32 4, i32 4, i32 10, i32 8, i32 8, i32 8, i32 14, i32 12, i32 12, i32 12>5616 return _mm512_permute_ps(__X, 2);5617}5618TEST_CONSTEXPR(match_m512(_mm512_permute_ps(5619 ((__m512){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}),5620 2),5621 2, 0, 0, 0, 6, 4, 4, 4, 10, 8, 8, 8, 14, 12, 12, 125622));5623 5624__m512 test_mm512_mask_permute_ps(__m512 __W, __mmask16 __U, __m512 __X) {5625 // CHECK-LABEL: test_mm512_mask_permute_ps5626 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> poison, <16 x i32> <i32 2, i32 0, i32 0, i32 0, i32 6, i32 4, i32 4, i32 4, i32 10, i32 8, i32 8, i32 8, i32 14, i32 12, i32 12, i32 12>5627 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5628 return _mm512_mask_permute_ps(__W, __U, __X, 2);5629}5630TEST_CONSTEXPR(match_m512(_mm512_mask_permute_ps(5631 ((__m512){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}),5632 (__mmask16)0b1010101010101010,5633 ((__m512){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}),5634 2),5635 0, 16, 2, 16, 4, 20, 6, 20, 8, 24, 10, 24, 12, 28, 14, 285636));5637 5638__m512 test_mm512_maskz_permute_ps(__mmask16 __U, __m512 __X) {5639 // CHECK-LABEL: test_mm512_maskz_permute_ps5640 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> poison, <16 x i32> <i32 2, i32 0, i32 0, i32 0, i32 6, i32 4, i32 4, i32 4, i32 10, i32 8, i32 8, i32 8, i32 14, i32 12, i32 12, i32 12>5641 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5642 return _mm512_maskz_permute_ps(__U, __X, 2);5643}5644TEST_CONSTEXPR(match_m512(_mm512_maskz_permute_ps(5645 (__mmask16)0b1010101010101010,5646 ((__m512){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}),5647 2),5648 0, 0, 0, 0, 0, 4, 0, 4, 0, 8, 0, 8, 0, 12, 0, 125649));5650 5651__m512d test_mm512_permutevar_pd(__m512d __A, __m512i __C) {5652 // CHECK-LABEL: test_mm512_permutevar_pd5653 // CHECK: @llvm.x86.avx512.vpermilvar.pd.5125654 return _mm512_permutevar_pd(__A, __C); 5655}5656TEST_CONSTEXPR(match_m512d(5657 _mm512_permutevar_pd(5658 ((__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}),5659 ((__m512i){0b00, 0b00, 0b10, 0b00, 0b00, 0b10, 0b10, 0b10})5660 ),5661 0.0, 0.0, 3.0, 2.0, 4.0, 5.0, 7.0, 7.05662));5663 5664__m512d test_mm512_mask_permutevar_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512i __C) {5665 // CHECK-LABEL: test_mm512_mask_permutevar_pd5666 // CHECK: @llvm.x86.avx512.vpermilvar.pd.5125667 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5668 return _mm512_mask_permutevar_pd(__W, __U, __A, __C); 5669}5670TEST_CONSTEXPR(match_m512d(5671 _mm512_mask_permutevar_pd(5672 ((__m512d){8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0}),5673 (__mmask8)0b01010101,5674 ((__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}),5675 ((__m512i){0b00, 0b00, 0b10, 0b00, 0b00, 0b10, 0b10, 0b10})5676 ),5677 0.0, 9.0, 3.0, 11.0, 4.0, 13.0, 7.0, 15.05678));5679 5680__m512d test_mm512_maskz_permutevar_pd(__mmask8 __U, __m512d __A, __m512i __C) {5681 // CHECK-LABEL: test_mm512_maskz_permutevar_pd5682 // CHECK: @llvm.x86.avx512.vpermilvar.pd.5125683 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5684 return _mm512_maskz_permutevar_pd(__U, __A, __C); 5685}5686TEST_CONSTEXPR(match_m512d(5687 _mm512_maskz_permutevar_pd(5688 (__mmask8)0b01010101,5689 ((__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}),5690 ((__m512i){0b00, 0b00, 0b10, 0b00, 0b00, 0b10, 0b10, 0b10})5691 ),5692 0.0, 0.0, 3.0, 0.0, 4.0, 0.0, 7.0, 0.05693));5694 5695__m512 test_mm512_permutevar_ps(__m512 __A, __m512i __C) {5696 // CHECK-LABEL: test_mm512_permutevar_ps5697 // CHECK: @llvm.x86.avx512.vpermilvar.ps.5125698 return _mm512_permutevar_ps(__A, __C); 5699}5700TEST_CONSTEXPR(match_m512(5701 _mm512_permutevar_ps(5702 ((__m512){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0}),5703 ((__m512i)(__v16si){0b11, 0b10, 0b01, 0b00, 0b01, 0b00, 0b11, 0b10, 0b10, 0b11, 0b00, 0b01, 0b00, 0b11, 0b01, 0b10})5704 ),5705 3.0, 2.0, 1.0, 0.0, 5.0, 4.0, 7.0, 6.0, 10.0, 11.0, 8.0, 9.0, 12.0, 15.0, 13.0, 14.05706));5707 5708__m512 test_mm512_mask_permutevar_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512i __C) {5709 // CHECK-LABEL: test_mm512_mask_permutevar_ps5710 // CHECK: @llvm.x86.avx512.vpermilvar.ps.5125711 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5712 return _mm512_mask_permutevar_ps(__W, __U, __A, __C); 5713}5714TEST_CONSTEXPR(match_m512(5715 _mm512_mask_permutevar_ps(5716 ((__m512){16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0}),5717 (__mmask16)0b0101010101010101,5718 ((__m512){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0}),5719 ((__m512i)(__v16si){0b11, 0b10, 0b01, 0b00, 0b01, 0b00, 0b11, 0b10, 0b10, 0b11, 0b00, 0b01, 0b00, 0b11, 0b01, 0b10})5720 ),5721 3.0, 17.0, 1.0, 19.0, 5.0, 21.0, 7.0, 23.0, 10.0, 25.0, 8.0, 27.0, 12.0, 29.0, 13.0, 31.05722));5723 5724__m512 test_mm512_maskz_permutevar_ps(__mmask16 __U, __m512 __A, __m512i __C) {5725 // CHECK-LABEL: test_mm512_maskz_permutevar_ps5726 // CHECK: @llvm.x86.avx512.vpermilvar.ps.5125727 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5728 return _mm512_maskz_permutevar_ps(__U, __A, __C); 5729}5730TEST_CONSTEXPR(match_m512(5731 _mm512_maskz_permutevar_ps(5732 (__mmask16)0b0101010101010101,5733 ((__m512){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0}),5734 ((__m512i)(__v16si){0b11, 0b10, 0b01, 0b00, 0b01, 0b00, 0b11, 0b10, 0b10, 0b11, 0b00, 0b01, 0b00, 0b11, 0b01, 0b10})5735 ),5736 3.0, 0.0, 1.0, 0.0, 5.0, 0.0, 7.0, 0.0, 10.0, 0.0, 8.0, 0.0, 12.0, 0.0, 13.0, 0.05737));5738 5739__m512i test_mm512_permutex2var_epi32(__m512i __A, __m512i __I, __m512i __B) {5740 // CHECK-LABEL: test_mm512_permutex2var_epi325741 // CHECK: @llvm.x86.avx512.vpermi2var.d.5125742 return _mm512_permutex2var_epi32(__A, __I, __B); 5743}5744 5745__m512i test_mm512_maskz_permutex2var_epi32(__mmask16 __U, __m512i __A, __m512i __I, __m512i __B) {5746 // CHECK-LABEL: test_mm512_maskz_permutex2var_epi325747 // CHECK: @llvm.x86.avx512.vpermi2var.d.5125748 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}5749 return _mm512_maskz_permutex2var_epi32(__U, __A, __I, __B); 5750}5751 5752__m512i test_mm512_mask_permutex2var_epi32 (__m512i __A, __mmask16 __U, __m512i __I, __m512i __B)5753{5754 // CHECK-LABEL: test_mm512_mask_permutex2var_epi32 5755 // CHECK: @llvm.x86.avx512.vpermi2var.d.5125756 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}5757 return _mm512_mask_permutex2var_epi32 (__A,__U,__I,__B);5758}5759 5760__m512d test_mm512_permutex2var_pd (__m512d __A, __m512i __I, __m512d __B)5761{5762 // CHECK-LABEL: test_mm512_permutex2var_pd 5763 // CHECK: @llvm.x86.avx512.vpermi2var.pd.5125764 return _mm512_permutex2var_pd (__A, __I,__B);5765}5766 5767__m512d test_mm512_mask_permutex2var_pd (__m512d __A, __mmask8 __U, __m512i __I, __m512d __B)5768{5769 // CHECK-LABEL: test_mm512_mask_permutex2var_pd 5770 // CHECK: @llvm.x86.avx512.vpermi2var.pd.5125771 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5772 return _mm512_mask_permutex2var_pd (__A,__U,__I,__B);5773}5774 5775__m512d test_mm512_maskz_permutex2var_pd(__mmask8 __U, __m512d __A, __m512i __I, __m512d __B) {5776 // CHECK-LABEL: test_mm512_maskz_permutex2var_pd5777 // CHECK: @llvm.x86.avx512.vpermi2var.pd.5125778 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}5779 return _mm512_maskz_permutex2var_pd(__U, __A, __I, __B); 5780}5781 5782__m512 test_mm512_permutex2var_ps (__m512 __A, __m512i __I, __m512 __B)5783{5784 // CHECK-LABEL: test_mm512_permutex2var_ps 5785 // CHECK: @llvm.x86.avx512.vpermi2var.ps.5125786 return _mm512_permutex2var_ps (__A, __I, __B);5787}5788 5789__m512 test_mm512_mask_permutex2var_ps (__m512 __A, __mmask16 __U, __m512i __I, __m512 __B)5790{5791 // CHECK-LABEL: test_mm512_mask_permutex2var_ps 5792 // CHECK: @llvm.x86.avx512.vpermi2var.ps.5125793 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5794 return _mm512_mask_permutex2var_ps (__A,__U,__I,__B);5795}5796 5797__m512 test_mm512_maskz_permutex2var_ps(__mmask16 __U, __m512 __A, __m512i __I, __m512 __B) {5798 // CHECK-LABEL: test_mm512_maskz_permutex2var_ps5799 // CHECK: @llvm.x86.avx512.vpermi2var.ps.5125800 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}5801 return _mm512_maskz_permutex2var_ps(__U, __A, __I, __B); 5802}5803 5804__m512i test_mm512_permutex2var_epi64 (__m512i __A, __m512i __I, __m512i __B){5805 // CHECK-LABEL: test_mm512_permutex2var_epi645806 // CHECK: @llvm.x86.avx512.vpermi2var.q.5125807 return _mm512_permutex2var_epi64(__A, __I, __B);5808}5809 5810__m512i test_mm512_mask_permutex2var_epi64 (__m512i __A, __mmask8 __U, __m512i __I, __m512i __B){5811 // CHECK-LABEL: test_mm512_mask_permutex2var_epi645812 // CHECK: @llvm.x86.avx512.vpermi2var.q.5125813 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}5814 return _mm512_mask_permutex2var_epi64(__A, __U, __I, __B);5815}5816 5817__m512i test_mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I, __m512i __B) {5818 // CHECK-LABEL: test_mm512_maskz_permutex2var_epi645819 // CHECK: @llvm.x86.avx512.vpermi2var.q.5125820 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}5821 return _mm512_maskz_permutex2var_epi64(__U, __A, __I, __B);5822}5823 5824TEST_CONSTEXPR(match_v16si(5825 _mm512_permutex2var_epi32(5826 (__m512i)(__v16si){0, 10, 20, 30, 40, 50, 60, 70,5827 80, 90, 100, 110, 120, 130, 140, 150},5828 (__m512i)(__v16si){0, 15, 16, 31, 1, 17, 2, 18,5829 3, 19, 4, 20, 5, 21, 6, 22},5830 (__m512i)(__v16si){200, 210, 220, 230, 240, 250, 260, 270,5831 280, 290, 300, 310, 320, 330, 340, 350}),5832 0, 150, 200, 350, 10, 210, 20, 220,5833 30, 230, 40, 240, 50, 250, 60, 260));5834TEST_CONSTEXPR(match_v16si(5835 _mm512_mask_permutex2var_epi32(5836 (__m512i)(__v16si){-1, -2, -3, -4, -5, -6, -7, -8,5837 -9, -10, -11, -12, -13, -14, -15, -16},5838 0xAAAA,5839 (__m512i)(__v16si){0, 15, 16, 31, 1, 17, 2, 18,5840 3, 19, 4, 20, 5, 21, 6, 22},5841 (__m512i)(__v16si){200, 210, 220, 230, 240, 250, 260, 270,5842 280, 290, 300, 310, 320, 330, 340, 350}),5843 -1, -16, -3, 350, -5, 210, -7, 220,5844 -9, 230, -11, 240, -13, 250, -15, 260));5845TEST_CONSTEXPR(match_v16si(5846 _mm512_maskz_permutex2var_epi32(5847 0x5555,5848 (__m512i)(__v16si){0, 10, 20, 30, 40, 50, 60, 70,5849 80, 90, 100, 110, 120, 130, 140, 150},5850 (__m512i)(__v16si){0, 15, 16, 31, 1, 17, 2, 18,5851 3, 19, 4, 20, 5, 21, 6, 22},5852 (__m512i)(__v16si){200, 210, 220, 230, 240, 250, 260, 270,5853 280, 290, 300, 310, 320, 330, 340, 350}),5854 0, 0, 200, 0, 10, 0, 20, 0,5855 30, 0, 40, 0, 50, 0, 60, 0));5856TEST_CONSTEXPR(match_m512(5857 _mm512_permutex2var_ps(5858 (__m512){1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f,5859 9.f, 10.f, 11.f, 12.f, 13.f, 14.f, 15.f, 16.f},5860 (__m512i)(__v16si){0, 15, 16, 31, 1, 17, 2, 18,5861 3, 19, 4, 20, 5, 21, 6, 22},5862 (__m512){101.f, 102.f, 103.f, 104.f, 105.f, 106.f, 107.f, 108.f,5863 109.f, 110.f, 111.f, 112.f, 113.f, 114.f, 115.f, 116.f}),5864 1.f, 16.f, 101.f, 116.f, 2.f, 102.f, 3.f, 103.f,5865 4.f, 104.f, 5.f, 105.f, 6.f, 106.f, 7.f, 107.f));5866TEST_CONSTEXPR(match_m512d(5867 _mm512_permutex2var_pd(5868 (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0},5869 (__m512i)(__v8di){0, 15, 16, 23, 1, 17, 2, 18},5870 (__m512d){101.0, 102.0, 103.0, 104.0, 105.0, 106.0, 107.0, 108.0}),5871 1.0, 108.0, 1.0, 8.0, 2.0, 2.0, 3.0, 3.0));5872 5873__mmask16 test_mm512_testn_epi32_mask(__m512i __A, __m512i __B) {5874 // CHECK-LABEL: test_mm512_testn_epi32_mask5875 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}5876 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}5877 return _mm512_testn_epi32_mask(__A, __B); 5878}5879 5880__mmask16 test_mm512_mask_testn_epi32_mask(__mmask16 __U, __m512i __A, __m512i __B) {5881 // CHECK-LABEL: test_mm512_mask_testn_epi32_mask5882 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}5883 // CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}5884 // CHECK: and <16 x i1> %{{.*}}, %{{.*}}5885 return _mm512_mask_testn_epi32_mask(__U, __A, __B); 5886}5887 5888__mmask8 test_mm512_testn_epi64_mask(__m512i __A, __m512i __B) {5889 // CHECK-LABEL: test_mm512_testn_epi64_mask5890 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}5891 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}5892 return _mm512_testn_epi64_mask(__A, __B); 5893}5894 5895__mmask8 test_mm512_mask_testn_epi64_mask(__mmask8 __U, __m512i __A, __m512i __B) {5896 // CHECK-LABEL: test_mm512_mask_testn_epi64_mask5897 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}5898 // CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}5899 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}5900 return _mm512_mask_testn_epi64_mask(__U, __A, __B); 5901}5902 5903__mmask16 test_mm512_mask_test_epi32_mask (__mmask16 __U, __m512i __A, __m512i __B)5904{5905 // CHECK-LABEL: test_mm512_mask_test_epi32_mask 5906 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}5907 // CHECK: icmp ne <16 x i32> %{{.*}}, %{{.*}}5908 return _mm512_mask_test_epi32_mask (__U,__A,__B);5909}5910 5911__mmask8 test_mm512_mask_test_epi64_mask (__mmask8 __U, __m512i __A, __m512i __B)5912{5913 // CHECK-LABEL: test_mm512_mask_test_epi64_mask 5914 // CHECK: and <16 x i32> %{{.*}}, %{{.*}}5915 // CHECK: icmp ne <8 x i64> %{{.*}}, %{{.*}}5916 // CHECK: and <8 x i1> %{{.*}}, %{{.*}}5917 return _mm512_mask_test_epi64_mask (__U,__A,__B);5918}5919 5920__m512i test_mm512_maskz_unpackhi_epi32(__mmask16 __U, __m512i __A, __m512i __B) {5921 // CHECK-LABEL: test_mm512_maskz_unpackhi_epi325922 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 2, i32 18, i32 3, i32 19, i32 6, i32 22, i32 7, i32 23, i32 10, i32 26, i32 11, i32 27, i32 14, i32 30, i32 15, i32 31>5923 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}5924 return _mm512_maskz_unpackhi_epi32(__U, __A, __B); 5925}5926 5927__m512i test_mm512_unpackhi_epi64(__m512i __A, __m512i __B) {5928 // CHECK-LABEL: test_mm512_unpackhi_epi645929 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>5930 return _mm512_unpackhi_epi64(__A, __B); 5931}5932TEST_CONSTEXPR(match_m512i(_mm512_unpackhi_epi64((__m512i){0, 1, 2, 3, 4, 5, 6, 7}, (__m512i){8, 9, 10, 11, 12, 13, 14, 15}), 1, 9, 3, 11, 5, 13, 7, 15));5933 5934__m512i test_mm512_mask_unpackhi_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {5935 // CHECK-LABEL: test_mm512_mask_unpackhi_epi645936 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>5937 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}5938 return _mm512_mask_unpackhi_epi64(__W, __U, __A, __B); 5939}5940 5941__m512i test_mm512_maskz_unpackhi_epi64(__mmask8 __U, __m512i __A, __m512i __B) {5942 // CHECK-LABEL: test_mm512_maskz_unpackhi_epi645943 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>5944 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}5945 return _mm512_maskz_unpackhi_epi64(__U, __A, __B); 5946}5947 5948__m512i test_mm512_unpacklo_epi32(__m512i __A, __m512i __B) {5949 // CHECK-LABEL: test_mm512_unpacklo_epi325950 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>5951 return _mm512_unpacklo_epi32(__A, __B); 5952}5953TEST_CONSTEXPR(match_v16si(_mm512_unpacklo_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m512i)(__v16si){16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 0, 16, 1, 17, 4, 20, 5, 21, 8, 24, 9, 25, 12, 28, 13, 29));5954 5955__m512i test_mm512_mask_unpacklo_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {5956 // CHECK-LABEL: test_mm512_mask_unpacklo_epi325957 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>5958 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}5959 return _mm512_mask_unpacklo_epi32(__W, __U, __A, __B); 5960}5961 5962__m512i test_mm512_maskz_unpacklo_epi32(__mmask16 __U, __m512i __A, __m512i __B) {5963 // CHECK-LABEL: test_mm512_maskz_unpacklo_epi325964 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>5965 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}5966 return _mm512_maskz_unpacklo_epi32(__U, __A, __B); 5967}5968 5969__m512i test_mm512_unpacklo_epi64(__m512i __A, __m512i __B) {5970 // CHECK-LABEL: test_mm512_unpacklo_epi645971 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>5972 return _mm512_unpacklo_epi64(__A, __B); 5973}5974TEST_CONSTEXPR(match_m512i(_mm512_unpacklo_epi64((__m512i){0, 1, 2, 3, 4, 5, 6, 7}, (__m512i){8, 9, 10, 11, 12, 13, 14, 15}), 0, 8, 2, 10, 4, 12, 6, 14));5975 5976__m512i test_mm512_mask_unpacklo_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {5977 // CHECK-LABEL: test_mm512_mask_unpacklo_epi645978 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>5979 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}5980 return _mm512_mask_unpacklo_epi64(__W, __U, __A, __B); 5981}5982 5983__m512i test_mm512_maskz_unpacklo_epi64(__mmask8 __U, __m512i __A, __m512i __B) {5984 // CHECK-LABEL: test_mm512_maskz_unpacklo_epi645985 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>5986 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}5987 return _mm512_maskz_unpacklo_epi64(__U, __A, __B); 5988}5989 5990__m128d test_mm_roundscale_round_sd(__m128d __A, __m128d __B) {5991 // CHECK-LABEL: test_mm_roundscale_round_sd5992 // CHECK: @llvm.x86.avx512.mask.rndscale.sd5993 return _mm_roundscale_round_sd(__A, __B, 3, _MM_FROUND_NO_EXC); 5994}5995 5996__m128d test_mm_roundscale_sd(__m128d __A, __m128d __B) {5997 // CHECK-LABEL: test_mm_roundscale_sd5998 // CHECK: @llvm.x86.avx512.mask.rndscale.sd5999 return _mm_roundscale_sd(__A, __B, 3); 6000}6001 6002__m128d test_mm_mask_roundscale_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){6003 // CHECK: @llvm.x86.avx512.mask.rndscale.sd6004 return _mm_mask_roundscale_sd(__W,__U,__A,__B,3);6005}6006 6007__m128d test_mm_mask_roundscale_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){6008 // CHECK: @llvm.x86.avx512.mask.rndscale.sd6009 return _mm_mask_roundscale_round_sd(__W,__U,__A,__B,3,_MM_FROUND_NO_EXC);6010}6011 6012__m128d test_mm_maskz_roundscale_sd(__mmask8 __U, __m128d __A, __m128d __B){6013 // CHECK: @llvm.x86.avx512.mask.rndscale.sd6014 return _mm_maskz_roundscale_sd(__U,__A,__B,3);6015}6016 6017__m128d test_mm_maskz_roundscale_round_sd(__mmask8 __U, __m128d __A, __m128d __B){6018 // CHECK: @llvm.x86.avx512.mask.rndscale.sd6019 return _mm_maskz_roundscale_round_sd(__U,__A,__B,3,_MM_FROUND_NO_EXC );6020}6021 6022__m128 test_mm_roundscale_round_ss(__m128 __A, __m128 __B) {6023 // CHECK-LABEL: test_mm_roundscale_round_ss6024 // CHECK: @llvm.x86.avx512.mask.rndscale.ss6025 return _mm_roundscale_round_ss(__A, __B, 3, _MM_FROUND_NO_EXC);6026}6027 6028__m128 test_mm_roundscale_ss(__m128 __A, __m128 __B) {6029 // CHECK-LABEL: test_mm_roundscale_ss6030 // CHECK: @llvm.x86.avx512.mask.rndscale.ss6031 return _mm_roundscale_ss(__A, __B, 3); 6032}6033 6034__m128 test_mm_mask_roundscale_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){6035 // CHECK-LABEL: test_mm_mask_roundscale_ss6036 // CHECK: @llvm.x86.avx512.mask.rndscale.ss6037 return _mm_mask_roundscale_ss(__W,__U,__A,__B,3);6038}6039 6040__m128 test_mm_maskz_roundscale_round_ss( __mmask8 __U, __m128 __A, __m128 __B){6041 // CHECK-LABEL: test_mm_maskz_roundscale_round_ss6042 // CHECK: @llvm.x86.avx512.mask.rndscale.ss6043 return _mm_maskz_roundscale_round_ss(__U,__A,__B,3,_MM_FROUND_NO_EXC);6044}6045 6046__m128 test_mm_maskz_roundscale_ss(__mmask8 __U, __m128 __A, __m128 __B){6047 // CHECK-LABEL: test_mm_maskz_roundscale_ss6048 // CHECK: @llvm.x86.avx512.mask.rndscale.ss6049 return _mm_maskz_roundscale_ss(__U,__A,__B,3);6050}6051 6052__m512d test_mm512_scalef_round_pd(__m512d __A, __m512d __B) {6053 // CHECK-LABEL: test_mm512_scalef_round_pd6054 // CHECK: @llvm.x86.avx512.mask.scalef.pd.5126055 return _mm512_scalef_round_pd(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6056}6057 6058__m512d test_mm512_mask_scalef_round_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {6059 // CHECK-LABEL: test_mm512_mask_scalef_round_pd6060 // CHECK: @llvm.x86.avx512.mask.scalef.pd.5126061 return _mm512_mask_scalef_round_pd(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6062}6063 6064__m512d test_mm512_maskz_scalef_round_pd(__mmask8 __U, __m512d __A, __m512d __B) {6065 // CHECK-LABEL: test_mm512_maskz_scalef_round_pd6066 // CHECK: @llvm.x86.avx512.mask.scalef.pd.5126067 return _mm512_maskz_scalef_round_pd(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6068}6069 6070__m512d test_mm512_scalef_pd(__m512d __A, __m512d __B) {6071 // CHECK-LABEL: test_mm512_scalef_pd6072 // CHECK: @llvm.x86.avx512.mask.scalef.pd.5126073 return _mm512_scalef_pd(__A, __B); 6074}6075 6076__m512d test_mm512_mask_scalef_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {6077 // CHECK-LABEL: test_mm512_mask_scalef_pd6078 // CHECK: @llvm.x86.avx512.mask.scalef.pd.5126079 return _mm512_mask_scalef_pd(__W, __U, __A, __B); 6080}6081 6082__m512d test_mm512_maskz_scalef_pd(__mmask8 __U, __m512d __A, __m512d __B) {6083 // CHECK-LABEL: test_mm512_maskz_scalef_pd6084 // CHECK: @llvm.x86.avx512.mask.scalef.pd.5126085 return _mm512_maskz_scalef_pd(__U, __A, __B); 6086}6087 6088__m512 test_mm512_scalef_round_ps(__m512 __A, __m512 __B) {6089 // CHECK-LABEL: test_mm512_scalef_round_ps6090 // CHECK: @llvm.x86.avx512.mask.scalef.ps.5126091 return _mm512_scalef_round_ps(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6092}6093 6094__m512 test_mm512_mask_scalef_round_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {6095 // CHECK-LABEL: test_mm512_mask_scalef_round_ps6096 // CHECK: @llvm.x86.avx512.mask.scalef.ps.5126097 return _mm512_mask_scalef_round_ps(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6098}6099 6100__m512 test_mm512_maskz_scalef_round_ps(__mmask16 __U, __m512 __A, __m512 __B) {6101 // CHECK-LABEL: test_mm512_maskz_scalef_round_ps6102 // CHECK: @llvm.x86.avx512.mask.scalef.ps.5126103 return _mm512_maskz_scalef_round_ps(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6104}6105 6106__m512 test_mm512_scalef_ps(__m512 __A, __m512 __B) {6107 // CHECK-LABEL: test_mm512_scalef_ps6108 // CHECK: @llvm.x86.avx512.mask.scalef.ps.5126109 return _mm512_scalef_ps(__A, __B); 6110}6111 6112__m512 test_mm512_mask_scalef_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {6113 // CHECK-LABEL: test_mm512_mask_scalef_ps6114 // CHECK: @llvm.x86.avx512.mask.scalef.ps.5126115 return _mm512_mask_scalef_ps(__W, __U, __A, __B); 6116}6117 6118__m512 test_mm512_maskz_scalef_ps(__mmask16 __U, __m512 __A, __m512 __B) {6119 // CHECK-LABEL: test_mm512_maskz_scalef_ps6120 // CHECK: @llvm.x86.avx512.mask.scalef.ps.5126121 return _mm512_maskz_scalef_ps(__U, __A, __B); 6122}6123 6124__m128d test_mm_scalef_round_sd(__m128d __A, __m128d __B) {6125 // CHECK-LABEL: test_mm_scalef_round_sd6126 // CHECK: @llvm.x86.avx512.mask.scalef.sd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %2, i8 -1, i32 11)6127 return _mm_scalef_round_sd(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6128}6129 6130__m128d test_mm_scalef_sd(__m128d __A, __m128d __B) {6131 // CHECK-LABEL: test_mm_scalef_sd6132 // CHECK: @llvm.x86.avx512.mask.scalef6133 return _mm_scalef_sd(__A, __B); 6134}6135 6136__m128d test_mm_mask_scalef_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){6137 // CHECK-LABEL: test_mm_mask_scalef_sd6138 // CHECK: @llvm.x86.avx512.mask.scalef.sd6139 return _mm_mask_scalef_sd(__W, __U, __A, __B);6140}6141 6142__m128d test_mm_mask_scalef_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){6143 // CHECK-LABEL: test_mm_mask_scalef_round_sd6144 // CHECK: @llvm.x86.avx512.mask.scalef.sd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 %{{.*}}, i32 11)6145 return _mm_mask_scalef_round_sd(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6146}6147 6148__m128d test_mm_maskz_scalef_sd(__mmask8 __U, __m128d __A, __m128d __B){6149 // CHECK-LABEL: test_mm_maskz_scalef_sd6150 // CHECK: @llvm.x86.avx512.mask.scalef.sd6151 return _mm_maskz_scalef_sd(__U, __A, __B);6152}6153 6154__m128d test_mm_maskz_scalef_round_sd(__mmask8 __U, __m128d __A, __m128d __B){6155 // CHECK-LABEL: test_mm_maskz_scalef_round_sd6156 // CHECK: @llvm.x86.avx512.mask.scalef.sd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 %{{.*}}, i32 11)6157 return _mm_maskz_scalef_round_sd(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6158}6159 6160__m128 test_mm_scalef_round_ss(__m128 __A, __m128 __B) {6161 // CHECK-LABEL: test_mm_scalef_round_ss6162 // CHECK: @llvm.x86.avx512.mask.scalef.ss(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 -1, i32 11)6163 return _mm_scalef_round_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6164}6165 6166__m128 test_mm_scalef_ss(__m128 __A, __m128 __B) {6167 // CHECK-LABEL: test_mm_scalef_ss6168 // CHECK: @llvm.x86.avx512.mask.scalef.ss6169 return _mm_scalef_ss(__A, __B); 6170}6171 6172__m128 test_mm_mask_scalef_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){6173 // CHECK-LABEL: test_mm_mask_scalef_ss6174 // CHECK: @llvm.x86.avx512.mask.scalef.ss6175 return _mm_mask_scalef_ss(__W, __U, __A, __B);6176}6177 6178__m128 test_mm_mask_scalef_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){6179 // CHECK-LABEL: test_mm_mask_scalef_round_ss6180 // CHECK: @llvm.x86.avx512.mask.scalef.ss(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 %{{.*}}, i32 11)6181 return _mm_mask_scalef_round_ss(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6182}6183 6184__m128 test_mm_maskz_scalef_ss(__mmask8 __U, __m128 __A, __m128 __B){6185 // CHECK-LABEL: test_mm_maskz_scalef_ss6186 // CHECK: @llvm.x86.avx512.mask.scalef.ss6187 return _mm_maskz_scalef_ss(__U, __A, __B);6188}6189 6190__m128 test_mm_maskz_scalef_round_ss(__mmask8 __U, __m128 __A, __m128 __B){6191 // CHECK-LABEL: test_mm_maskz_scalef_round_ss6192 // CHECK: @llvm.x86.avx512.mask.scalef.ss(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 %{{.*}}, i32 11)6193 return _mm_maskz_scalef_round_ss(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);6194}6195 6196__m512i test_mm512_srai_epi32(__m512i __A) {6197 // CHECK-LABEL: test_mm512_srai_epi326198 // CHECK: @llvm.x86.avx512.psrai.d.5126199 return _mm512_srai_epi32(__A, 5); 6200}6201TEST_CONSTEXPR(match_v16si(_mm512_srai_epi32((__m512i)(__v16si){0, -2, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 10), 0, -1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0));6202 6203__m512i test_mm512_srai_epi32_2(__m512i __A, unsigned int __B) {6204 // CHECK-LABEL: test_mm512_srai_epi32_26205 // CHECK: @llvm.x86.avx512.psrai.d.5126206 return _mm512_srai_epi32(__A, __B); 6207}6208 6209__m512i test_mm512_mask_srai_epi32(__m512i __W, __mmask16 __U, __m512i __A) {6210 // CHECK-LABEL: test_mm512_mask_srai_epi326211 // CHECK: @llvm.x86.avx512.psrai.d.5126212 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6213 return _mm512_mask_srai_epi32(__W, __U, __A, 5); 6214}6215TEST_CONSTEXPR(match_v16si(_mm512_mask_srli_epi32((__m512i)(__v16si){100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115}, (__mmask16)0x5555, (__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0x0, 101, 0x1, 103, 0x2, 105, 0x3, 107, 0x4, 109, 0x5, 111, 0x6, 113, 0x7, 115));6216 6217__m512i test_mm512_mask_srai_epi32_2(__m512i __W, __mmask16 __U, __m512i __A, unsigned int __B) {6218 // CHECK-LABEL: test_mm512_mask_srai_epi32_26219 // CHECK: @llvm.x86.avx512.psrai.d.5126220 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6221 return _mm512_mask_srai_epi32(__W, __U, __A, __B); 6222}6223 6224__m512i test_mm512_maskz_srai_epi32(__mmask16 __U, __m512i __A) {6225 // CHECK-LABEL: test_mm512_maskz_srai_epi326226 // CHECK: @llvm.x86.avx512.psrai.d.5126227 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6228 return _mm512_maskz_srai_epi32(__U, __A, 5); 6229}6230TEST_CONSTEXPR(match_v16si(_mm512_maskz_srai_epi32((__mmask16)0x71cc, (__m512i)(__v16si){0xff, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, 1), 0, 0, 0x1, 0x1, 0, 0, 0x3, 0x3, 0x4, 0, 0, 0, 0x6, 0x6, 0x7, 0));6231 6232__m512i test_mm512_maskz_srai_epi32_2(__mmask16 __U, __m512i __A, unsigned int __B) {6233 // CHECK-LABEL: test_mm512_maskz_srai_epi32_26234 // CHECK: @llvm.x86.avx512.psrai.d.5126235 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6236 return _mm512_maskz_srai_epi32(__U, __A, __B); 6237}6238 6239__m512i test_mm512_srai_epi64(__m512i __A) {6240 // CHECK-LABEL: test_mm512_srai_epi646241 // CHECK: @llvm.x86.avx512.psrai.q.5126242 return _mm512_srai_epi64(__A, 5); 6243}6244TEST_CONSTEXPR(match_v8di(_mm512_srai_epi64((__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, 1), 0x0, 0x0, 0x1, 0x1, 0x2, 0x2, 0x3, 0x3));6245 6246__m512i test_mm512_srai_epi64_2(__m512i __A, unsigned int __B) {6247 // CHECK-LABEL: test_mm512_srai_epi64_26248 // CHECK: @llvm.x86.avx512.psrai.q.5126249 return _mm512_srai_epi64(__A, __B); 6250}6251 6252__m512i test_mm512_mask_srai_epi64(__m512i __W, __mmask8 __U, __m512i __A) {6253 // CHECK-LABEL: test_mm512_mask_srai_epi646254 // CHECK: @llvm.x86.avx512.psrai.q.5126255 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6256 return _mm512_mask_srai_epi64(__W, __U, __A, 5); 6257}6258TEST_CONSTEXPR(match_v8di(_mm512_mask_srai_epi64((__m512i)(__v8di){100, 101, 102, 103, 104, 105, 106, 107}, (__mmask8)0x0F, (__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, 2), 0x0, 0x0, 0x0, 0x0, 104, 105, 106, 107));6259 6260__m512i test_mm512_mask_srai_epi64_2(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B) {6261 // CHECK-LABEL: test_mm512_mask_srai_epi64_26262 // CHECK: @llvm.x86.avx512.psrai.q.5126263 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6264 return _mm512_mask_srai_epi64(__W, __U, __A, __B); 6265}6266 6267__m512i test_mm512_maskz_srai_epi64(__mmask8 __U, __m512i __A) {6268 // CHECK-LABEL: test_mm512_maskz_srai_epi646269 // CHECK: @llvm.x86.avx512.psrai.q.5126270 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6271 return _mm512_maskz_srai_epi64(__U, __A, 5); 6272}6273TEST_CONSTEXPR(match_v8di(_mm512_maskz_srai_epi64((__mmask8)0x71, (__m512i)(__v8di){0xff, 1, 2, 3, 4, 5, 6, 7}, 1), 0x7f, 0, 0, 0, 0x2, 0x2, 0x3, 0));6274 6275__m512i test_mm512_maskz_srai_epi64_2(__mmask8 __U, __m512i __A, unsigned int __B) {6276 // CHECK-LABEL: test_mm512_maskz_srai_epi64_26277 // CHECK: @llvm.x86.avx512.psrai.q.5126278 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6279 return _mm512_maskz_srai_epi64(__U, __A, __B); 6280}6281 6282__m512i test_mm512_sll_epi32(__m512i __A, __m128i __B) {6283 // CHECK-LABEL: test_mm512_sll_epi326284 // CHECK: @llvm.x86.avx512.psll.d.5126285 return _mm512_sll_epi32(__A, __B);6286}6287TEST_CONSTEXPR(match_v16si(_mm512_sll_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v4si){1, 0, 0, 0}), 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30));6288TEST_CONSTEXPR(match_v16si(_mm512_sll_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v4si){32, 0, 0, 0}), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));6289TEST_CONSTEXPR(match_v16si(_mm512_sll_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v4si){33, 0, 0, 0}), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));6290TEST_CONSTEXPR(match_v16si(_mm512_sll_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v4si){0, 1, 0, 0}), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));6291TEST_CONSTEXPR(match_v16si(_mm512_sll_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v4si){1, 0, 1, 1}), 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30));6292 6293__m512i test_mm512_mask_sll_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) {6294 // CHECK-LABEL: test_mm512_mask_sll_epi326295 // CHECK: @llvm.x86.avx512.psll.d.5126296 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6297 return _mm512_mask_sll_epi32(__W, __U, __A, __B); 6298}6299 6300__m512i test_mm512_maskz_sll_epi32(__mmask16 __U, __m512i __A, __m128i __B) {6301 // CHECK-LABEL: test_mm512_maskz_sll_epi326302 // CHECK: @llvm.x86.avx512.psll.d.5126303 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6304 return _mm512_maskz_sll_epi32(__U, __A, __B);6305}6306TEST_CONSTEXPR(match_v16si(_mm512_mask_sll_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0x5A5A, (__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v4si){1, 0, 0, 0}), 99, 2, 99, 6, 8, 99, 12, 99, 99, 18, 99, 22, 24, 99, 28, 99));6307TEST_CONSTEXPR(match_v16si(_mm512_maskz_sll_epi32(0xA5A5, (__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m128i)(__v4si){1, 0, 0, 0}), 0, 0, 4, 0, 0, 10, 0, 14, 16, 0, 20, 0, 0, 26, 0, 30));6308 6309__m512i test_mm512_sll_epi64(__m512i __A, __m128i __B) {6310 // CHECK-LABEL: test_mm512_sll_epi646311 // CHECK: @llvm.x86.avx512.psll.q.5126312 return _mm512_sll_epi64(__A, __B);6313}6314TEST_CONSTEXPR(match_v8di(_mm512_sll_epi64((__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, (__m128i)(__v2di){1, 0}), 0, 2, 4, 6, 8, 10, 12, 14));6315TEST_CONSTEXPR(match_v8di(_mm512_sll_epi64((__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, (__m128i)(__v2di){64, 0}), 0, 0, 0, 0, 0, 0, 0, 0));6316TEST_CONSTEXPR(match_v8di(_mm512_sll_epi64((__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, (__m128i)(__v2di){65, 0}), 0, 0, 0, 0, 0, 0, 0, 0));6317TEST_CONSTEXPR(match_v8di(_mm512_sll_epi64((__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, (__m128i)(__v2di){1, 1}), 0, 2, 4, 6, 8, 10, 12, 14));6318 6319__m512i test_mm512_mask_sll_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) {6320 // CHECK-LABEL: test_mm512_mask_sll_epi646321 // CHECK: @llvm.x86.avx512.psll.q.5126322 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6323 return _mm512_mask_sll_epi64(__W, __U, __A, __B); 6324}6325 6326__m512i test_mm512_maskz_sll_epi64(__mmask8 __U, __m512i __A, __m128i __B) {6327 // CHECK-LABEL: test_mm512_maskz_sll_epi646328 // CHECK: @llvm.x86.avx512.psll.q.5126329 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6330 return _mm512_maskz_sll_epi64(__U, __A, __B);6331}6332TEST_CONSTEXPR(match_v8di(_mm512_mask_sll_epi64((__m512i)(__v8di){99, 99, 99, 99, 99, 99, 99, 99}, 0x5A, (__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, (__m128i)(__v2di){1, 0}), 99, 2, 99, 6, 8, 99, 12, 99));6333TEST_CONSTEXPR(match_v8di(_mm512_maskz_sll_epi64(0xA5, (__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, (__m128i)(__v2di){1, 0}), 0, 0, 4, 0, 0, 10, 0, 14));6334 6335__m512i test_mm512_sllv_epi32(__m512i __X, __m512i __Y) {6336 // CHECK-LABEL: test_mm512_sllv_epi326337 // CHECK: @llvm.x86.avx512.psllv.d.5126338 return _mm512_sllv_epi32(__X, __Y); 6339}6340TEST_CONSTEXPR(match_v16si(_mm512_sllv_epi32((__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 2, -8, 24, -64, 0, 0, 0, 0, 536870912, 0, -2147483648, 0, 80, -48, 28, -16));6341 6342__m512i test_mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {6343 // CHECK-LABEL: test_mm512_mask_sllv_epi326344 // CHECK: @llvm.x86.avx512.psllv.d.5126345 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6346 return _mm512_mask_sllv_epi32(__W, __U, __X, __Y); 6347}6348TEST_CONSTEXPR(match_v16si(_mm512_mask_sllv_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0x912A, (__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 99, -8, 99, -64, 99, 0, 99, 99, 536870912, 99, 99, 99, 80, 99, 99, -16));6349 6350__m512i test_mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {6351 // CHECK-LABEL: test_mm512_maskz_sllv_epi326352 // CHECK: @llvm.x86.avx512.psllv.d.5126353 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6354 return _mm512_maskz_sllv_epi32(__U, __X, __Y); 6355}6356TEST_CONSTEXPR(match_v16si(_mm512_maskz_sllv_epi32(0x3C8F, (__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 2, -8, 24, -64, 0, 0, 0, 0, 0, 0, -2147483648, 0, 80, -48, 0, 0));6357 6358__m512i test_mm512_sllv_epi64(__m512i __X, __m512i __Y) {6359 // CHECK-LABEL: test_mm512_sllv_epi646360 // CHECK: @llvm.x86.avx512.psllv.q.5126361 return _mm512_sllv_epi64(__X, __Y); 6362}6363TEST_CONSTEXPR(match_v8di(_mm512_sllv_epi64((__m512i)(__v8di){ 16, -17, 18, -19, 20, 21, 22, 23}, (__m512i)(__v8di){ 1, 2, -3, -4, -5, 6, -7, -8}), 32, -68, 0, 0, 0, 1344, 0, 0));6364 6365__m512i test_mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) {6366 // CHECK-LABEL: test_mm512_mask_sllv_epi646367 // CHECK: @llvm.x86.avx512.psllv.q.5126368 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6369 return _mm512_mask_sllv_epi64(__W, __U, __X, __Y); 6370}6371TEST_CONSTEXPR(match_v8di(_mm512_mask_sllv_epi64((__m512i)(__v8di){ 999, 999, 999, 999, 999, 999, 999, 999}, 0xE4, (__m512i)(__v8di){ 16, -17, 18, -19, 20, 21, 22, 23}, (__m512i)(__v8di){ 1, 2, -3, -4, -5, 6, -7, -8}), 999, 999, 0, 999, 999, 1344, 0, 0));6372 6373__m512i test_mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y) {6374 // CHECK-LABEL: test_mm512_maskz_sllv_epi646375 // CHECK: @llvm.x86.avx512.psllv.q.5126376 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6377 return _mm512_maskz_sllv_epi64(__U, __X, __Y); 6378}6379TEST_CONSTEXPR(match_v8di(_mm512_maskz_sllv_epi64(0xE4, (__m512i)(__v8di){ 16, -17, 18, -19, 20, 21, 22, 23}, (__m512i)(__v8di){ 1, 2, -3, -4, -5, 6, -7, -8}), 0, 0, 0, 0, 0, 1344, 0, 0));6380 6381__m512i test_mm512_sra_epi32(__m512i __A, __m128i __B) {6382 // CHECK-LABEL: test_mm512_sra_epi326383 // CHECK: @llvm.x86.avx512.psra.d.5126384 return _mm512_sra_epi32(__A, __B);6385}6386TEST_CONSTEXPR(match_v16si(_mm512_sra_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){1, 0, 0, 0}), 0, -1, 2, -3, 4, -5, 6, -7, 8, -9, 10, -11, 12, -13, 14, -15));6387TEST_CONSTEXPR(match_v16si(_mm512_sra_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){32, 0, 0, 0}), 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1));6388TEST_CONSTEXPR(match_v16si(_mm512_sra_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){33, 0, 0, 0}), 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1));6389TEST_CONSTEXPR(match_v16si(_mm512_sra_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){0, 1, 0, 0}), 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1));6390TEST_CONSTEXPR(match_v16si(_mm512_sra_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){1, 0, 1, 1}), 0, -1, 2, -3, 4, -5, 6, -7, 8, -9, 10, -11, 12, -13, 14, -15));6391 6392__m512i test_mm512_mask_sra_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) {6393 // CHECK-LABEL: test_mm512_mask_sra_epi326394 // CHECK: @llvm.x86.avx512.psra.d.5126395 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6396 return _mm512_mask_sra_epi32(__W, __U, __A, __B); 6397}6398 6399__m512i test_mm512_maskz_sra_epi32(__mmask16 __U, __m512i __A, __m128i __B) {6400 // CHECK-LABEL: test_mm512_maskz_sra_epi326401 // CHECK: @llvm.x86.avx512.psra.d.5126402 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6403 return _mm512_maskz_sra_epi32(__U, __A, __B);6404}6405TEST_CONSTEXPR(match_v16si(_mm512_mask_sra_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0x5A5A, (__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){1, 0, 0, 0}), 99, -1, 99, -3, 4, 99, 6, 99, 99, -9, 99, -11, 12, 99, 14, 99));6406TEST_CONSTEXPR(match_v16si(_mm512_maskz_sra_epi32(0xA5A5, (__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){1, 0, 0, 0}), 0, 0, 2, 0, 0, -5, 0, -7, 8, 0, 10, 0, 0, -13, 0, -15));6407 6408__m512i test_mm512_sra_epi64(__m512i __A, __m128i __B) {6409 // CHECK-LABEL: test_mm512_sra_epi646410 // CHECK: @llvm.x86.avx512.psra.q.5126411 return _mm512_sra_epi64(__A, __B);6412}6413TEST_CONSTEXPR(match_v8di(_mm512_sra_epi64((__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){1, 0}), 0, -1, 2, -3, 4, -5, 6, -7));6414TEST_CONSTEXPR(match_v8di(_mm512_sra_epi64((__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){64, 0}), 0, -1, 0, -1, 0, -1, 0, -1));6415TEST_CONSTEXPR(match_v8di(_mm512_sra_epi64((__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){65, 0}), 0, -1, 0, -1, 0, -1, 0, -1));6416TEST_CONSTEXPR(match_v8di(_mm512_sra_epi64((__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){1, 1}), 0, -1, 2, -3, 4, -5, 6, -7));6417 6418__m512i test_mm512_mask_sra_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) {6419 // CHECK-LABEL: test_mm512_mask_sra_epi646420 // CHECK: @llvm.x86.avx512.psra.q.5126421 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6422 return _mm512_mask_sra_epi64(__W, __U, __A, __B); 6423}6424 6425__m512i test_mm512_maskz_sra_epi64(__mmask8 __U, __m512i __A, __m128i __B) {6426 // CHECK-LABEL: test_mm512_maskz_sra_epi646427 // CHECK: @llvm.x86.avx512.psra.q.5126428 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6429 return _mm512_maskz_sra_epi64(__U, __A, __B);6430}6431TEST_CONSTEXPR(match_v8di(_mm512_mask_sra_epi64((__m512i)(__v8di){99, 99, 99, 99, 99, 99, 99, 99}, 0x5A, (__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){1, 0}), 99, -1, 99, -3, 4, 99, 6, 99));6432TEST_CONSTEXPR(match_v8di(_mm512_maskz_sra_epi64(0xA5, (__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){1, 0}), 0, 0, 2, 0, 0, -5, 0, -7));6433 6434__m512i test_mm512_srav_epi32(__m512i __X, __m512i __Y) {6435 // CHECK-LABEL: test_mm512_srav_epi326436 // CHECK: @llvm.x86.avx512.psrav.d.5126437 return _mm512_srav_epi32(__X, __Y); 6438}6439TEST_CONSTEXPR(match_v16si(_mm512_srav_epi32((__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 0, -1, 1, -4));6440 6441__m512i test_mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {6442 // CHECK-LABEL: test_mm512_mask_srav_epi326443 // CHECK: @llvm.x86.avx512.psrav.d.5126444 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6445 return _mm512_mask_srav_epi32(__W, __U, __X, __Y); 6446}6447TEST_CONSTEXPR(match_v16si(_mm512_mask_srav_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0x912A, (__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 99, -1, 99, -1, 99, -1, 99, 99, 0, 99, 99, 99, 0, 99, 99, -4));6448 6449__m512i test_mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {6450 // CHECK-LABEL: test_mm512_maskz_srav_epi326451 // CHECK: @llvm.x86.avx512.psrav.d.5126452 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6453 return _mm512_maskz_srav_epi32(__U, __X, __Y); 6454}6455TEST_CONSTEXPR(match_v16si(_mm512_maskz_srav_epi32(0x3C8F, (__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 0, -1, 0, -1, 0, 0, 0, -1, 0, 0, 0, -1, 0, -1, 0, 0));6456 6457__m512i test_mm512_srav_epi64(__m512i __X, __m512i __Y) {6458 // CHECK-LABEL: test_mm512_srav_epi646459 // CHECK: @llvm.x86.avx512.psrav.q.5126460 return _mm512_srav_epi64(__X, __Y); 6461}6462TEST_CONSTEXPR(match_v8di(_mm512_srav_epi64((__m512i)(__v8di){ 16, -17, 18, -19, 20, 21, 22, 23}, (__m512i)(__v8di){ 1, 2, -3, -4, -5, 6, -7, -8}), 8, -5, 0, -1, 0, 0, 0, 0));6463 6464__m512i test_mm512_mask_srav_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) {6465 // CHECK-LABEL: test_mm512_mask_srav_epi646466 // CHECK: @llvm.x86.avx512.psrav.q.5126467 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6468 return _mm512_mask_srav_epi64(__W, __U, __X, __Y); 6469}6470TEST_CONSTEXPR(match_v8di(_mm512_mask_srav_epi64((__m512i)(__v8di){ 999, 999, 999, 999, 999, 999, 999, 999}, 0xE4, (__m512i)(__v8di){ 16, -17, 18, -19, 20, 21, 22, 23}, (__m512i)(__v8di){ 1, 2, -3, -4, -5, 6, -7, -8}), 999, 999, 0, 999, 999, 0, 0, 0));6471 6472__m512i test_mm512_maskz_srav_epi64(__mmask8 __U, __m512i __X, __m512i __Y) {6473 // CHECK-LABEL: test_mm512_maskz_srav_epi646474 // CHECK: @llvm.x86.avx512.psrav.q.5126475 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6476 return _mm512_maskz_srav_epi64(__U, __X, __Y); 6477}6478TEST_CONSTEXPR(match_v8di(_mm512_maskz_srav_epi64(0xE4, (__m512i)(__v8di){ 16, -17, 18, -19, 20, 21, 22, 23}, (__m512i)(__v8di){ 1, 2, -3, -4, -5, 6, -7, -8}), 0, 0, 0, 0, 0, 0, 0, 0));6479 6480__m512i test_mm512_srl_epi32(__m512i __A, __m128i __B) {6481 // CHECK-LABEL: test_mm512_srl_epi326482 // CHECK: @llvm.x86.avx512.psrl.d.5126483 return _mm512_srl_epi32(__A, __B);6484}6485TEST_CONSTEXPR(match_v16si(_mm512_srl_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){1, 0, 0, 0}), 0, 2147483647, 2, 2147483645, 4, 2147483643, 6, 2147483641, 8, 2147483639, 10, 2147483637, 12, 2147483635, 14, 2147483633));6486TEST_CONSTEXPR(match_v16si(_mm512_srl_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){32, 0, 0, 0}), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));6487TEST_CONSTEXPR(match_v16si(_mm512_srl_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){33, 0, 0, 0}), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));6488TEST_CONSTEXPR(match_v16si(_mm512_srl_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){0, 1, 0, 0}), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));6489TEST_CONSTEXPR(match_v16si(_mm512_srl_epi32((__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){1, 0, 1, 1}), 0, 2147483647, 2, 2147483645, 4, 2147483643, 6, 2147483641, 8, 2147483639, 10, 2147483637, 12, 2147483635, 14, 2147483633));6490 6491__m512i test_mm512_mask_srl_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) {6492 // CHECK-LABEL: test_mm512_mask_srl_epi326493 // CHECK: @llvm.x86.avx512.psrl.d.5126494 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6495 return _mm512_mask_srl_epi32(__W, __U, __A, __B); 6496}6497 6498__m512i test_mm512_maskz_srl_epi32(__mmask16 __U, __m512i __A, __m128i __B) {6499 // CHECK-LABEL: test_mm512_maskz_srl_epi326500 // CHECK: @llvm.x86.avx512.psrl.d.5126501 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6502 return _mm512_maskz_srl_epi32(__U, __A, __B);6503}6504TEST_CONSTEXPR(match_v16si(_mm512_mask_srl_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0x5A5A, (__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){1, 0, 0, 0}), 99, 2147483647, 99, 2147483645, 4, 99, 6, 99, 99, 2147483639, 99, 2147483637, 12, 99, 14, 99));6505TEST_CONSTEXPR(match_v16si(_mm512_maskz_srl_epi32(0xA5A5, (__m512i)(__v16si){0, -2, 4, -6, 8, -10, 12, -14, 16, -18, 20, -22, 24, -26, 28, -30}, (__m128i)(__v4si){1, 0, 0, 0}), 0, 0, 2, 0, 0, 2147483643, 0, 2147483641, 8, 0, 10, 0, 0, 2147483635, 0, 2147483633));6506 6507__m512i test_mm512_srl_epi64(__m512i __A, __m128i __B) {6508 // CHECK-LABEL: test_mm512_srl_epi646509 // CHECK: @llvm.x86.avx512.psrl.q.5126510 return _mm512_srl_epi64(__A, __B);6511}6512TEST_CONSTEXPR(match_v8di(_mm512_srl_epi64((__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){1, 0}), 0, 9223372036854775807, 2, 9223372036854775805, 4, 9223372036854775803, 6, 9223372036854775801));6513TEST_CONSTEXPR(match_v8di(_mm512_srl_epi64((__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){64, 0}), 0, 0, 0, 0, 0, 0, 0, 0));6514TEST_CONSTEXPR(match_v8di(_mm512_srl_epi64((__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){1, 1}), 0, 9223372036854775807, 2, 9223372036854775805, 4, 9223372036854775803, 6, 9223372036854775801));6515 6516__m512i test_mm512_mask_srl_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) {6517 // CHECK-LABEL: test_mm512_mask_srl_epi646518 // CHECK: @llvm.x86.avx512.psrl.q.5126519 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6520 return _mm512_mask_srl_epi64(__W, __U, __A, __B); 6521}6522 6523__m512i test_mm512_maskz_srl_epi64(__mmask8 __U, __m512i __A, __m128i __B) {6524 // CHECK-LABEL: test_mm512_maskz_srl_epi646525 // CHECK: @llvm.x86.avx512.psrl.q.5126526 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6527 return _mm512_maskz_srl_epi64(__U, __A, __B);6528}6529TEST_CONSTEXPR(match_v8di(_mm512_mask_srl_epi64((__m512i)(__v8di){99, 99, 99, 99, 99, 99, 99, 99}, 0x5A, (__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){1, 0}), 99, 9223372036854775807, 99, 9223372036854775805, 4, 99, 6, 99));6530TEST_CONSTEXPR(match_v8di(_mm512_maskz_srl_epi64(0xA5, (__m512i)(__v8di){0, -2, 4, -6, 8, -10, 12, -14}, (__m128i)(__v2di){1, 0}), 0, 0, 2, 0, 0, 9223372036854775803, 0, 9223372036854775801));6531 6532__m512i test_mm512_srlv_epi32(__m512i __X, __m512i __Y) {6533 // CHECK-LABEL: test_mm512_srlv_epi326534 // CHECK: @llvm.x86.avx512.psrlv.d.5126535 return _mm512_srlv_epi32(__X, __Y); 6536}6537TEST_CONSTEXPR(match_v16si(_mm512_srlv_epi32((__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 0, 1073741823, 0, 268435455, 0, 1, 0, 7, 0, 0, 0, 0, 0, 536870911, 1, 2147483644));6538 6539__m512i test_mm512_mask_srlv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {6540 // CHECK-LABEL: test_mm512_mask_srlv_epi326541 // CHECK: @llvm.x86.avx512.psrlv.d.5126542 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6543 return _mm512_mask_srlv_epi32(__W, __U, __X, __Y); 6544}6545TEST_CONSTEXPR(match_v16si(_mm512_mask_srlv_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0x912A, (__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 99, 1073741823, 99, 268435455, 99, 1, 99, 99, 0, 99, 99, 99, 0, 99, 99, 2147483644));6546 6547__m512i test_mm512_maskz_srlv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {6548 // CHECK-LABEL: test_mm512_maskz_srlv_epi326549 // CHECK: @llvm.x86.avx512.psrlv.d.5126550 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6551 return _mm512_maskz_srlv_epi32(__U, __X, __Y); 6552}6553TEST_CONSTEXPR(match_v16si(_mm512_maskz_srlv_epi32(0x3C8F, (__m512i)(__v16si){1, -2, 3, -4, 5, -6, 7, -8, 1, -2, 3, -4, 5, -6, 7, -8}, (__m512i)(__v16si){1, 2, 3, 4, -17, 31, 33, 29, 29, 33, 31, -17, 4, 3, 2, 1}), 0, 1073741823, 0, 268435455, 0, 0, 0, 7, 0, 0, 0, 0, 0, 536870911, 0, 0));6554 6555__m512i test_mm512_srlv_epi64(__m512i __X, __m512i __Y) {6556 // CHECK-LABEL: test_mm512_srlv_epi646557 // CHECK: @llvm.x86.avx512.psrlv.q.5126558 return _mm512_srlv_epi64(__X, __Y); 6559}6560TEST_CONSTEXPR(match_v8di(_mm512_srlv_epi64((__m512i)(__v8di){ 16, 17, -18, 19, -20, -21, 22, -23}, (__m512i)(__v8di){ 1, 2, 3, 4, -5, -6, 7, 8}), 8, 4, 2305843009213693949, 1, 0, 0, 0, 72057594037927935));6561 6562__m512i test_mm512_mask_srlv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) {6563 // CHECK-LABEL: test_mm512_mask_srlv_epi646564 // CHECK: @llvm.x86.avx512.psrlv.q.5126565 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6566 return _mm512_mask_srlv_epi64(__W, __U, __X, __Y); 6567}6568TEST_CONSTEXPR(match_v8di(_mm512_mask_srlv_epi64((__m512i)(__v8di){ 999, 999, 999, 999, 999, 999, 999, 999}, 0x28, (__m512i)(__v8di){ 16, 17, -18, 19, -20, -21, 22, -23}, (__m512i)(__v8di){ 1, 2, 3, 4, -5, -6, 7, 8}), 999, 999, 999, 1, 999, 0, 999, 999));6569 6570__m512i test_mm512_maskz_srlv_epi64(__mmask8 __U, __m512i __X, __m512i __Y) {6571 // CHECK-LABEL: test_mm512_maskz_srlv_epi646572 // CHECK: @llvm.x86.avx512.psrlv.q.5126573 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6574 return _mm512_maskz_srlv_epi64(__U, __X, __Y); 6575}6576TEST_CONSTEXPR(match_v8di(_mm512_maskz_srlv_epi64(0x28, (__m512i)(__v8di){ 16, 17, -18, 19, -20, -21, 22, -23}, (__m512i)(__v8di){ 1, 2, 3, 4, -5, -6, 7, 8}), 0, 0, 0, 1, 0, 0, 0, 0));6577 6578__m512i test_mm512_ternarylogic_epi32(__m512i __A, __m512i __B, __m512i __C) {6579 // CHECK-LABEL: test_mm512_ternarylogic_epi326580 // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)6581 return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);6582}6583TEST_CONSTEXPR(match_v16si(6584 _mm512_ternarylogic_epi32(6585 ((__m512i)((__v16si){6586 0x6AA79987, (int)0xBB91433A, 0x029A7245, (int)0xD1F6F86C,6587 (int)0xD340BBCD, (int)0xCD8778E7, 0x4C73A942, (int)0xDAEA58BA,6588 0x5E503A67, (int)0xEE897110, 0x3193CA54, 0x452EC40A,6589 (int)0x90E5E945, 0x6FACAA50, 0x29645F8B, 0x5F811CB96590 })),6591 ((__m512i)((__v16si){6592 0x1FCFF454, (int)0xDFC9E3B1, 0x6ED4E94B, 0x42D6CB5C,6593 (int)0x8FE46024, (int)0xA091250E, 0x2CA1C789, (int)0x9C9CEA0C,6594 (int)0x8D9FE5B9, 0x2FD2B7A4, 0x5ADAD121, (int)0xBCF74D7A,6595 (int)0xF543BBCF, (int)0xBB9D58E4, 0x175F0CD2, (int)0x87F26AEE6596 })),6597 ((__m512i)((__v16si){6598 (int)0xFA882692, (int)0xBC428D42, 0x6980A81F, (int)0x95C5FB98,6599 (int)0x8101E89A, 0x2AA4857E, 0x25ECE845, 0x34A9AF41,6600 (int)0xB80E3B0D, 0x13ED748B, 0x30A1F6D5, (int)0xD64A3CE0,6601 0x57708107, 0x527122DC, 0x06057C82, 0x7576714A6602 })),6603 (unsigned char)0x11), // ~A & ~C6604 0x00300929, 0x0034100C, (int)0x902B16A0, 0x28280423,6605 0x701A1741, 0x554A5A81, (int)0xD2121032, 0x434210B2,6606 0x42600042, (int)0xC0000850, (int)0x8504080A, 0x01008205,6607 0x088C4430, 0x04028503, (int)0xE8A0832D, 0x08098411));6608TEST_CONSTEXPR(match_v16si(6609 _mm512_ternarylogic_epi32(6610 ((__m512i)((__v16si){6611 (int)0xA3B1799D, (int)0x46685257, (int)0x392456DE, (int)0xBC8960A9,6612 (int)0x6C031199, (int)0x07A0CA6E, (int)0x37F8A88B, (int)0x8B8148F6,6613 (int)0x386ECBE0, (int)0x96DA1DAC, (int)0xCE4A2BBD, (int)0xB2B9437A,6614 (int)0x571AA876, (int)0x27CD8130, (int)0x562B0F79, (int)0x17BE31116615 })),6616 ((__m512i)((__v16si){6617 (int)0x18C26797, (int)0xD8F56413, (int)0x9A8DCA03, (int)0xCE9FF57F,6618 (int)0xBACFB3D0, (int)0x89463E85, (int)0x60E7A113, (int)0x8D5288F1,6619 (int)0xDC98D2C1, (int)0x93CD59BF, (int)0xB45ED1F0, (int)0x19DB3AD0,6620 (int)0x47294739, (int)0x5D65A441, (int)0x5EC42E08, (int)0xA5E5A5AB6621 })),6622 ((__m512i)((__v16si){6623 (int)0xBAA80DD4, (int)0x29D4BEEF, (int)0x6123FDF7, (int)0x8E944239,6624 (int)0xAF42E12F, (int)0xC6A7EE39, (int)0x50C187FC, (int)0x448AAA9E,6625 (int)0x508EBAD7, (int)0xA7CAD415, (int)0x757750A9, (int)0x43CF2FDE,6626 (int)0x95A76D79, (int)0x663F1C97, (int)0xFF5E9FF0, (int)0x827050A86627 })),6628 (unsigned char)0x38), // (C & ~B) | (~C & A & B)6629 (int)0xBB311C08, (int)0x0E9C3644, (int)0x21219CDD, (int)0x32140090,6630 (int)0xC640A009, (int)0x86A6E46B, (int)0x57190998, (int)0x0683C006,6631 (int)0x60E61921, (int)0x05124411, (int)0x7A147A0D, (int)0xA36269AA,6632 (int)0x1033ED4F, (int)0x62A80531, (int)0x086F0171, (int)0x925A10B8));6633TEST_CONSTEXPR(match_v16si(6634 _mm512_ternarylogic_epi32(6635 ((__m512i)((__v16si){6636 (int)0x3193CA54, (int)0x90E5E945, (int)0x29645F8B, (int)0x6ED4E94B,6637 (int)0x8D9FE5B9, (int)0x8101E89A, (int)0x25ECE845, (int)0xB80E3B0D,6638 (int)0x57708107, (int)0x06057C82, (int)0x56EAA301, (int)0xBE99854A,6639 (int)0x00E266D0, (int)0xDEEA959E, (int)0x2DCAABD5, (int)0x6A1ECCDA})),6640 ((__m512i)((__v16si){6641 (int)0x93FD7234, (int)0xBC90A6EC, (int)0xD3285151, (int)0xCE9FB6A8,6642 (int)0x3B788B66, (int)0xDF8960AD, (int)0x2F927291, (int)0x96AF0DEA,6643 (int)0xF56AE7EA, (int)0x2A04F77A, (int)0xD50B612B, (int)0x3AA725CB,6644 (int)0x8A04F74F, (int)0x282FE557, (int)0x52E1FBB0, (int)0x0CA02F4D})),6645 ((__m512i)((__v16si){6646 (int)0xB6307BAD, (int)0x141CB03E, (int)0xEBAA7701, (int)0xC9F0B072,6647 (int)0x5E2503DD, (int)0xC2E1DAC4, (int)0x0FC01B11, (int)0xA0485922,6648 (int)0x339BB47E, (int)0xB2D4F32A, (int)0x8E7AE9AF, (int)0x147DE9B0,6649 (int)0xF79FCAA0, (int)0x3B0B6398, (int)0x29DDF4C7, (int)0x49CDBEC7})),6650 (unsigned char)0xC3), // ~(B ^ C)6651 (int)0x5D91479F, (int)0xD38AB056, (int)0x05B3F125, (int)0x5FB4A01C,6652 (int)0x49189120, (int)0xA17777C8, (int)0xF581652B, (int)0xD15EC918,6653 (int)0x5DE59912, (int)0xD3FE7407, (int)0x7C1E3DD5, (int)0x7BC15F7E,6654 (int)0x75196E60, (int)0x093A8F36, (int)0x80D4AF9A, (int)0x99411C68));6655 6656__m512i test_mm512_mask_ternarylogic_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {6657 // CHECK-LABEL: test_mm512_mask_ternarylogic_epi326658 // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 204)6659 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6660 return _mm512_mask_ternarylogic_epi32(__A, __U, __B, __C, _MM_TERNLOG_B);6661}6662TEST_CONSTEXPR(match_v16si(6663 _mm512_mask_ternarylogic_epi32(6664 _mm512_setr_epi32(6665 (int)0xFFFFFFFF, 0x00000000, (int)0xDEADBEEF, (int)0xCAFEBABE, 0x12345678, (int)0x87654321,6666 (int)0xAAAAAAAA, 0x55555555, (int)0xF00DBEEF, (int)0xBAD2FEAF, 0x0112358D, (int)0xDEADF00D,6667 (int)0x8BADF00D, (int)0xBADDCAFE, (int)0xBAADF00D, (int)0xBAAAAAAD),6668 (__mmask16)0x9D71,6669 _mm512_setr_epi32(6670 0x11111111, 0x22222222, 0x33333333, 0x44444444, (int)0xABCDEF01, (int)0xFEDCBA98,6671 (int)0xCCCCCCCC, 0x33333333, 0x1337BEEF, 0x01010101, (int)0x81321345, (int)0xBAADF00D,6672 0x1BADB002, 0x5EE7C0DE, 0x12345678, 0x55555555),6673 _mm512_setr_epi32(6674 (int)0xF0F0F0F0, 0x0F0F0F0F, 0x1234ABCD, (int)0x9876FEDC, 0x00FF00FF, (int)0xFF00FF00,6675 (int)0xFF0000FF, 0x00FFFF00, 0x50D4CAFE, (int)0x8BADF00D, (int)0xABCDEFFF, (int)0xFEEDF00D,6676 (int)0xBEEFCAFE, (int)0xDEADC0DE, (int)0x1BADBEEF, 0x33333333),6677 (unsigned char)0xB1), // op: (~B & (A | ~C)) | (B & A & C)6678 (int)0xFEFEFEFE, 0x00000000, (int)0xDEADBEEF, (int)0xCAFEBABE, 0x54341078, (int)0x87234367,6679 (int)0xAA3333AA, 0x55555555, (int)0xFC0C8BEE, (int)0xBAD2FEAF, 0x5500258D, (int)0xDFBFFFFF,6680 (int)0xCABDC50D, (int)0xBADDCAFE, (int)0xBAADF00D, (int)0xBAAAAAA9));6681TEST_CONSTEXPR(match_v16si(6682 _mm512_mask_ternarylogic_epi32(6683 _mm512_setr_epi32(6684 0x0000FFFF, (int)0xFFFF0000, 0x01010101, (int)0xFF00FF00, (int)0xAAAAAAAA, 0x33333333,6685 (int)0xF0F0F0F0, 0x0F0F0F0F, 0x12345678, (int)0x87654321, 0x7FFFFFFF, (int)0xDEADBEEF,6686 (int)0xCAFEBABE, 0x01234567, (int)0xABCDEF01, (int)0xFEDCBA98),6687 (__mmask16)0x3C3C,6688 _mm512_setr_epi32(6689 0x1111EEEE, 0x2222DDDD, (int)0x80808080, 0x00FF00FF, 0x55555555, 0x00000000,6690 (int)0xCCCCCCCC, 0x33333333, 0x11111111, 0x22222222, (int)0x80000000, 0x12345678,6691 0x11223344, (int)0xFEDCBA98, (int)0xBAD0BAD0, (int)0xBEEFCAFE),6692 _mm512_setr_epi32(6693 0x12345678, (int)0x87654321, 0x7F7F7F7F, (int)0xFEDCBA98, (int)0xCCCCCCCC, (int)0xFFFFFFFF,6694 0x11111111, 0x22222222, (int)0xABABABAB, (int)0xCDCDCDCD, 0x00000001, (int)0xFACEB00C,6695 0x55667788, (int)0xABCDEF01, 0x12345678, (int)0xDEADBEEF),6696 (unsigned char)0xE8), // op: (A & B) | (B & C) | (C & A) (Majority)6697 0x0000FFFF, (int)0xFFFF0000, 0x01010101, (int)0xFEDCBA98, (int)0xCCCCCCCC, 0x33333333,6698 (int)0xF0F0F0F0, 0x0F0F0F0F, 0x12345678, (int)0x87654321, 0x00000001, (int)0xDAACB66C,6699 0x5166338C, (int)0xABCDEF01, (int)0xABCDEF01, (int)0xFEDCBA98));6700TEST_CONSTEXPR(match_v16si(6701 _mm512_mask_ternarylogic_epi32(6702 _mm512_setr_epi32(6703 (int)0xDEADBEEF, 0x01234567, (int)0xAAAAAAAA, 0x0F0F0F0F, (int)0xBAADF00D, 0x00000001,6704 (int)0x80000000, 0x7FFFFFFF, (int)0xCAFEBABE, 0x13579BDF, (int)0xABCDEF01, (int)0xCAFEBABE,6705 (int)0xDEADBEEF, (int)0xFF00FF00, (int)0xBEEFCAFE, 0x00000001),6706 (__mmask16)0xBEEF,6707 _mm512_setr_epi32(6708 (int)0xFACEB00C, (int)0x89ABCDEF, 0x55555555, (int)0xF0F0F0F0, 0x1337C0DE, 0x00000002,6709 0x40000000, (int)0xBFFFFFFF, 0x00000000, 0x2468ACE0, 0x10FEDCBA, 0x00000000,6710 (int)0xFEEDFACE, 0x00FF00FF, 0x12345678, 0x00000002),6711 _mm512_setr_epi32(6712 0x12345678, (int)0xFFFFFFFF, (int)0xCCCCCCCC, (int)0x88888888, (int)0xDEADC0DE, 0x00000004,6713 0x20000000, (int)0xDFFFFFFF, (int)0xFFFFFFFF, (int)0xFEDCBA98, 0x55555555, (int)0xFFFFFFFF,6714 (int)0x8BADF00D, (int)0xF0F0F0F0, (int)0xFACEB00C, 0x00000003),6715 (unsigned char)0x96), // op: A ^ B ^ C (XOR3)6716 (int)0x3657589B, 0x77777777, 0x33333333, 0x77777777, (int)0xBAADF00D, 0x00000007,6717 (int)0xE0000000, 0x1FFFFFFF, (int)0xCAFEBABE, (int)0xC9E38DA7, (int)0xEE6666EE, 0x35014541,6718 (int)0xABEDB42C, 0x0F0F0F0F, (int)0xBEEFCAFE, 0x00000000));6719 6720__m512i test_mm512_maskz_ternarylogic_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C) {6721 // CHECK-LABEL: test_mm512_maskz_ternarylogic_epi326722 // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 170)6723 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> zeroinitializer6724 return _mm512_maskz_ternarylogic_epi32(__U, __A, __B, __C, _MM_TERNLOG_C);6725}6726TEST_CONSTEXPR(match_v16si(6727 _mm512_maskz_ternarylogic_epi32(6728 (__mmask16)0x6498,6729 ((__m512i)((__v16si){6730 1393174638, 1243877629, -826208314, 1770837977,6731 -1678093555, -414088391, 1288769935, 703296098,6732 1428104678, 405688910, -167788555, 1965219804,6733 -1959018749, 514303227, 754191429, 579811517})),6734 ((__m512i)((__v16si){6735 -1301280384, -923736510, -797648805, 475853364,6736 1247377062, 213070102, 626020209, 2037794518,6737 122183669, 1712787569, -1042441569, -1416844145,6738 1374304252, -1323427639, 1432483217, 1621706359})),6739 ((__m512i)((__v16si){6740 234227517, -313293475, 1851213039, -300885844,6741 -1479339544, 575183087, -655840260, -1853668117,6742 433622095, 933629633, -1324904005, -68434060,6743 486070655, 226865941, -1461464269, 1471789621})),6744 (unsigned char)0xAB), // (~A & ~B) | (B & C)6745 0, 0, 0, -298592082,6746 -1479042568, 0, 0, -1752969749,6747 0, 0, -1157115461, 0,6748 0, 1304818453, -1427385541, 0));6749TEST_CONSTEXPR(match_v16si(6750 _mm512_maskz_ternarylogic_epi32(6751 (__mmask16)0xA593,6752 ((__m512i)((__v16si){6753 1789368711, -1148107974, 43676229, -772343700,6754 -750732339, -846759705, 1282648386, -622176070,6755 1582316135, -292982512, 831769172, 1160692746,6756 -1863980731, 1873586768, 694443915, 1602297017})),6757 ((__m512i)((__v16si){6758 533722196, -540417103, 1859447115, 1121373020,6759 -1880858588, -1601100530, 748799881, -1667438068,6760 -1918900807, 802338724, 1524289825, -1124643462,6761 -180110385, -1147315996, 392105170, -2014156050})),6762 ((__m512i)((__v16si){6763 -91740526, -1136489150, 1770039327, -1782187112,6764 -2130581350, 715425150, 636282949, 883535681,6765 -1207026931, 334328971, 815920853, -699777824,6766 1466990855, 1383146204, 101022850, 1970696522})),6767 (unsigned char)0x21), // (~B) & ~(A ^ C)6768 1611661482, 539234310, 0, 0,6769 538610824, 0, 0, 18874368,6770 270539268, 0, -1543175586, 0,6771 0, 1075980051, 0, 1342738432));6772TEST_CONSTEXPR(match_v16si(6773 _mm512_maskz_ternarylogic_epi32(6774 (__mmask16)0xC3A5,6775 ((__m512i)((__v16si){6776 0x00000000, -0x1, (int)0x80000000, 0x7FFFFFFF,6777 (int)0xAAAAAAAA, 0x55555555, 0x00000001, (int)0xFFFFFFFE,6778 0x0000FFFF, (int)0xFFFF0000, (int)0xDEADBEEF, (int)0xCAFEBABE,6779 0x01234567, (int)0x89ABCDEF, 0x13579BDF, 0x2468ACE0})),6780 ((__m512i)((__v16si){6781 0x2468ACE0, 0x13579BDF, (int)0x89ABCDEF, 0x01234567,6782 (int)0xCAFEBABE, (int)0xDEADBEEF, (int)0xFFFF0000, 0x0000FFFF,6783 (int)0xFFFFFFFE, 0x00000001, 0x55555555, (int)0xAAAAAAAA,6784 0x7FFFFFFF, (int)0x80000000, -0x1, 0x00000000})),6785 ((__m512i)((__v16si){6786 -0x1, 0x00000000, -0x1, 0x00000000,6787 -0x1, 0x00000000, -0x1, 0x00000000,6788 -0x1, 0x00000000, -0x1, 0x00000000,6789 -0x1, 0x00000000, -0x1, 0x00000000})),6790 (unsigned char)0xC9), // F = (A & B) | (~A & ~(B ^ C))6791 0x2468ACE0, 0x0, (int)0x89ABCDEF, 0x0,6792 0x0, 0x74071445, 0x0, 0x0000FFFE,6793 (int)0xFFFFFFFE, 0x0000FFFE, 0x0, 0x0,6794 0x0, 0x0, (int)0xFFFFFFFF, (int)0xDB97531F));6795 6796__m512i test_mm512_ternarylogic_epi64(__m512i __A, __m512i __B, __m512i __C) {6797 // CHECK-LABEL: test_mm512_ternarylogic_epi646798 // CHECK: @llvm.x86.avx512.pternlog.q.512({{.*}}, i32 192)6799 return _mm512_ternarylogic_epi64(__A, __B, __C, _MM_TERNLOG_A & _MM_TERNLOG_B);6800}6801TEST_CONSTEXPR(match_v8di(6802 _mm512_ternarylogic_epi64(6803 ((__m512i)((__v8di){0x1111, 0x2222, 0x3333, 0x4444, 0x5555, 0x6666, 0x7777, 0x8888})),6804 ((__m512i)((__v8di){0xAAAA, 0xBBBB, 0xCCCC, 0xDDDD, 0xEEEE, 0xFFFF, 0x1111, 0x2222})),6805 ((__m512i)((__v8di){-0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0})),6806 (unsigned char)0xD8), // C ? B : A6807 0xAAAA, 0x2222, 0xCCCC, 0x4444, 0xEEEE, 0x6666, 0x1111, 0x8888));6808TEST_CONSTEXPR(match_v8di(6809 _mm512_ternarylogic_epi64(6810 ((__m512i)((__v8di){-0x1, 0x0, -0x1, 0x0, 0xF0F0, 0xFF, -0x5555555555555556, 0x5555555555555555})),6811 ((__m512i)((__v8di){0x1234, 0xFFFF, 0xFF, 0xF0F, 0x3333, 0xFF00, -0x5555555555555556, -0x0F0F0F0F0F0F0F10})),6812 ((__m512i)((__v8di){0xFFFF, 0x1234, 0xF0F, 0xFF00, 0xF0F0, 0x3333, 0x5555555555555555, 0x0F0F0F0F0F0F0F0})),6813 (unsigned char)0x8F), // ~A | (B & C)6814 0x1234, -0x1, 0xF, -0x1, -0xC0C1, -0x100, 0x5555555555555555, -0x5505050505050506));6815TEST_CONSTEXPR(match_v8di(6816 _mm512_ternarylogic_epi64(6817 ((__m512i)((__v8di){0x7FFFFFFFFFFFFFFF, 0x0, 0x00FF00FF00FF00FF, 0x0F0F0F0F0F0F0F0F,6818 0x123456789ABCDEF0, 0x3333333333333333, 0x5555555555555555, 0x0123456789ABCDEF})),6819 ((__m512i)((__v8di){0x1111111111111111, 0x2222222222222222, 0xFFFFFFFF, -0x100000000,6820 0x0, -0x3333333333333334, -0x0F0F0F0F0F0F0F10, -0x123456789ABCDF0})),6821 ((__m512i)((__v8di){0x2222222222222222, 0x1111111111111111, -0x1000000000000, 0xFFFFFFFF,6822 -0x1, 0x0, 0x0F0F0F0F0F0F0F0F, 0x0})),6823 (unsigned char)0xE0), // A & (B | C)6824 0x3333333333333333, 0x0, 0x00FF000000FF00FF, 0x0F0F0F0F0F0F0F0F,6825 0x123456789ABCDEF0, 0x0, 0x5555555555555555, 0x0));6826 6827__m512i test_mm512_mask_ternarylogic_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C) {6828 // CHECK-LABEL: test_mm512_mask_ternarylogic_epi646829 // CHECK: @llvm.x86.avx512.pternlog.q.512({{.*}}, i32 238)6830 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}6831 return _mm512_mask_ternarylogic_epi64(__A, __U, __B, __C, _MM_TERNLOG_B | _MM_TERNLOG_C);6832}6833TEST_CONSTEXPR(match_v8di(6834 _mm512_mask_ternarylogic_epi64(6835 ((__m512i)((__v8di){0x0LL, 0x1LL, 0x2LL, 0x3LL, 0x4LL, 0x5LL, 0x6LL, 0x7LL})),6836 (__mmask8)0xFF,6837 ((__m512i)((__v8di){0x1LL, 0x1LL, 0x1LL, 0x1LL, 0x1LL, 0x1LL, 0x1LL, 0x1LL})),6838 ((__m512i)((__v8di){0x0LL, 0x0LL, 0x0LL, 0x0LL, 0x0LL, 0x0LL, 0x0LL, 0x0LL})),6839 (unsigned char)0x96),6840 0x1, 0x0, 0x3, 0x2, 0x5, 0x4, 0x7, 0x6));6841TEST_CONSTEXPR(match_v8di(6842 _mm512_mask_ternarylogic_epi64(6843 ((__m512i)((__v8di){6844 (long long)0x9FD641D41C6A70FEULL, (long long)0xB51D9082CF18D398ULL,6845 (long long)0x730E520285F4D01BULL, (long long)0x347E72CE341FD932ULL,6846 (long long)0x438F8D9BEA5D486FULL, (long long)0xFDB554A5DEEF750DULL,6847 (long long)0x0ABAA254BFFC2308ULL, (long long)0x825FE29BF1D51FC6ULL6848 })),6849 (__mmask8)0xE4,6850 ((__m512i)((__v8di){6851 (long long)0xC1779B12FA832A6EULL, (long long)0xCF6E876B587C4762ULL,6852 (long long)0x25DC09833D4ECA24ULL, (long long)0x34E55E25691BB80AULL,6853 (long long)0x9A02450CD8F20DD7ULL, (long long)0x78B9E240FB5B77A9ULL,6854 (long long)0xE1F37F76C1162596ULL, (long long)0xDCCB561738CE2941ULL6855 })),6856 ((__m512i)((__v8di){6857 (long long)0xD13840986BC8DC3CULL, (long long)0x34CDE7E8C960187EULL,6858 (long long)0x7EE068D9D111EEB8ULL, (long long)0xAD11149DE686B811ULL,6859 (long long)0x849F38BFD9AB0DFAULL, (long long)0x5C28948ED106227BULL,6860 (long long)0xFB1918D4A18E304DULL, (long long)0x4EDE6944F84AD59FULL6861 })),6862 (unsigned char)0x67),6863 (long long)0x9FD641D41C6A70FEULL, (long long)0xB51D9082CF18D398ULL,6864 (long long)0xDB3DE57EEE5F25DCULL, (long long)0x347E72CE341FD932ULL,6865 (long long)0x438F8D9BEA5D486FULL, (long long)0x26D37FDE2A5DDDD2ULL,6866 (long long)0x1EEE67AB6099DDFBULL, (long long)0xB3353F73C6A4FCFEULL));6867 6868__m512i test_mm512_maskz_ternarylogic_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C) {6869 // CHECK-LABEL: test_mm512_maskz_ternarylogic_epi646870 // CHECK: @llvm.x86.avx512.pternlog.q.512({{.*}}, i32 111)6871 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> zeroinitializer6872 return _mm512_maskz_ternarylogic_epi64(__U, __A, __B, __C, ~_MM_TERNLOG_A | (_MM_TERNLOG_B ^ _MM_TERNLOG_C));6873}6874TEST_CONSTEXPR(match_v8di(6875 _mm512_maskz_ternarylogic_epi64(6876 (__mmask8)0x6D,6877 ((__m512i)((__v8di){6878 (long long)0xFFFFFFFFFFFFFFFF, (long long)0x0000000000000000,6879 (long long)0x0000FFFF0000FFFF, (long long)0x5555555555555555,6880 (long long)0x0123456789ABCDEF, (long long)0x1122334455667788,6881 (long long)0x00000000FFFFFFFF, (long long)0x0F0F0F0F0F0F0F0F6882 })),6883 ((__m512i)((__v8di){6884 (long long)0x000000000000000B, (long long)0x000000000000000C,6885 (long long)0x00000000FFFF0000, (long long)0x3333333333333333,6886 (long long)0x0FEDCBA987654321, (long long)0x1111111111111111,6887 (long long)0x7FFFFFFFFFFFFFFF, (long long)0x22222222222222226888 })),6889 ((__m512i)((__v8di){6890 (long long)0x000000000000000C, (long long)0x000000000000000B,6891 (long long)0x00F0F0F0F0F0F0F0, (long long)0x5555555555555555,6892 (long long)0x0000000000000000, (long long)0x7FFFFFFFFFFFFFFF,6893 (long long)0x0000000000000001, (long long)0x22222222222222226894 })),6895 (unsigned char)0x89),6896 (long long)0x0000000000000008, (long long)0x0000000000000000,6897 (long long)0xFF0F0000F0F00000, (long long)0x9999999999999999,6898 (long long)0x0000000000000000, (long long)0x9111111111111111,6899 (long long)0x8000000000000001, (long long)0x0000000000000000));6900 6901TEST_CONSTEXPR(match_v8di(6902 _mm512_maskz_ternarylogic_epi64(6903 (__mmask8)0x6D,6904 ((__m512i)((__v8di){6905 (long long)0xFFFFFFFFFFFFFFFF, (long long)0x0000000000000000,6906 (long long)0x0000FFFF0000FFFF, (long long)0x5555555555555555,6907 (long long)0x0123456789ABCDEF, (long long)0x1122334455667788,6908 (long long)0x00000000FFFFFFFF, (long long)0x0F0F0F0F0F0F0F0F6909 })),6910 ((__m512i)((__v8di){6911 (long long)0x000000000000000B, (long long)0x000000000000000C,6912 (long long)0x00000000FFFF0000, (long long)0x3333333333333333,6913 (long long)0x0FEDCBA987654321, (long long)0x1111111111111111,6914 (long long)0x7FFFFFFFFFFFFFFF, (long long)0x22222222222222226915 })),6916 ((__m512i)((__v8di){6917 (long long)0x000000000000000C, (long long)0x000000000000000B,6918 (long long)0x00F0F0F0F0F0F0F0, (long long)0x5555555555555555,6919 (long long)0x0000000000000000, (long long)0x7FFFFFFFFFFFFFFF,6920 (long long)0x0000000000000001, (long long)0x22222222222222226921 })),6922 (unsigned char)0x29),6923 (long long)0x0000000000000004, (long long)0x0000000000000000,6924 (long long)0xFF0FF0F0F0F0F0F0, (long long)0xCCCCCCCCCCCCCCCC,6925 (long long)0x0000000000000000, (long long)0x8033225544776699,6926 (long long)0x8000000000000000, (long long)0x0000000000000000));6927 6928__m512 test_mm512_shuffle_f32x4(__m512 __A, __m512 __B) {6929 // CHECK-LABEL: test_mm512_shuffle_f32x46930 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>6931 return _mm512_shuffle_f32x4(__A, __B, 4); 6932}6933TEST_CONSTEXPR(match_m512(_mm512_shuffle_f32x4(((__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}), ((__m512){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0, 90.0, 100.0, 110.0, 120.0, 130.0, 140.0, 150.0, 160.0}), 0b11111111), 13.0f, 14.0f, 15.0f, 16.0f, 13.0f, 14.0f, 15.0f, 16.0f, 130.0, 140.0, 150.0, 160.0, 130.0, 140.0, 150.0, 160.0));6934 6935__m512 test_mm512_mask_shuffle_f32x4(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {6936 // CHECK-LABEL: test_mm512_mask_shuffle_f32x46937 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>6938 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}6939 return _mm512_mask_shuffle_f32x4(__W, __U, __A, __B, 4); 6940}6941TEST_CONSTEXPR(match_m512(_mm512_mask_shuffle_f32x4(((__m512){100.0f, 200.0f, 300.0f, 400.0f, 500.0f, 600.0f, 700.0f, 800.0f, 900.0f, 1000.0f, 1100.0f, 1200.0f, 1300.0f, 1400.0f, 1500.0f, 1600.0f}), 0b1111111111111110, ((__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}), ((__m512){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0, 90.0, 100.0, 110.0, 120.0, 130.0, 140.0, 150.0, 160.0}), 0b11111111), 100.0f, 14.0f, 15.0f, 16.0f, 13.0f, 14.0f, 15.0f, 16.0f, 130.0, 140.0, 150.0, 160.0, 130.0, 140.0, 150.0, 160.0));6942 6943__m512 test_mm512_maskz_shuffle_f32x4(__mmask16 __U, __m512 __A, __m512 __B) {6944 // CHECK-LABEL: test_mm512_maskz_shuffle_f32x46945 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>6946 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}6947 return _mm512_maskz_shuffle_f32x4(__U, __A, __B, 4); 6948}6949TEST_CONSTEXPR(match_m512(_mm512_maskz_shuffle_f32x4(0b1111111111110111, ((__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}), ((__m512){10.0, 20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0, 90.0, 100.0, 110.0, 120.0, 130.0, 140.0, 150.0, 160.0}), 0b11111111), 13.0f, 14.0f, 15.0f, 0.0f, 13.0f, 14.0f, 15.0f, 16.0f, 130.0, 140.0, 150.0, 160.0, 130.0, 140.0, 150.0, 160.0));6950 6951__m512d test_mm512_shuffle_f64x2(__m512d __A, __m512d __B) {6952 // CHECK-LABEL: test_mm512_shuffle_f64x26953 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>6954 return _mm512_shuffle_f64x2(__A, __B, 4); 6955}6956TEST_CONSTEXPR(match_m512d(_mm512_shuffle_f64x2(((__m512d){1.0,2.0,3.0,4.0,5.0,6.0,7.0,8.0}), ((__m512d){10.0,20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 0b10101100), 1.0, 2.0, 7.0, 8.0, 50.0, 60.0, 50.0, 60.0));6957 6958__m512d test_mm512_mask_shuffle_f64x2(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {6959 // CHECK-LABEL: test_mm512_mask_shuffle_f64x26960 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>6961 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}6962 return _mm512_mask_shuffle_f64x2(__W, __U, __A, __B, 4); 6963}6964TEST_CONSTEXPR(match_m512d(_mm512_mask_shuffle_f64x2(((__m512d){100.0, 200.0, 300.0, 400.0, 500.0, 600.0, 700.0, 800.0}), 0b11110000, ((__m512d){1.0,2.0,3.0,4.0,5.0,6.0,7.0,8.0}), ((__m512d){10.0,20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 0b10101100), 100.0, 200.0, 300.0, 400.0, 50.0, 60.0, 50.0, 60.0));6965 6966__m512d test_mm512_maskz_shuffle_f64x2(__mmask8 __U, __m512d __A, __m512d __B) {6967 // CHECK-LABEL: test_mm512_maskz_shuffle_f64x26968 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>6969 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}6970 return _mm512_maskz_shuffle_f64x2(__U, __A, __B, 4); 6971}6972TEST_CONSTEXPR(match_m512d(_mm512_maskz_shuffle_f64x2(0b11110100, ((__m512d){1.0,2.0,3.0,4.0,5.0,6.0,7.0,8.0}), ((__m512d){10.0,20.0, 30.0, 40.0, 50.0, 60.0, 70.0, 80.0}), 0b10101100), 0.0, 0.0, 7.0, 0.0, 50.0, 60.0, 50.0, 60.0));6973 6974__m512i test_mm512_shuffle_i32x4(__m512i __A, __m512i __B) {6975 // CHECK-LABEL: test_mm512_shuffle_i32x46976 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>6977 return _mm512_shuffle_i32x4(__A, __B, 4); 6978}6979TEST_CONSTEXPR(match_v16si(_mm512_shuffle_i32x4(((__m512i)(__v16si){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), ((__m512i)(__v16si){10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120, 130, 140, 150, 160}), 0), 1, 2, 3, 4, 1, 2, 3, 4, 10, 20, 30, 40, 10, 20, 30, 40));6980 6981 6982__m512i test_mm512_mask_shuffle_i32x4(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {6983 // CHECK-LABEL: test_mm512_mask_shuffle_i32x46984 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>6985 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6986 return _mm512_mask_shuffle_i32x4(__W, __U, __A, __B, 4); 6987}6988TEST_CONSTEXPR(match_v16si(_mm512_mask_shuffle_i32x4(((__m512i)(__v16si){100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600}), 0b1111111111111011, ((__m512i)(__v16si){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), ((__m512i)(__v16si){10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120, 130, 140, 150, 160}), 0), 1, 2, 300, 4, 1, 2, 3, 4, 10, 20, 30, 40, 10, 20, 30, 40));6989 6990__m512i test_mm512_maskz_shuffle_i32x4(__mmask16 __U, __m512i __A, __m512i __B) {6991 // CHECK-LABEL: test_mm512_maskz_shuffle_i32x46992 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>6993 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}6994 return _mm512_maskz_shuffle_i32x4(__U, __A, __B, 4); 6995}6996TEST_CONSTEXPR(match_v16si(_mm512_maskz_shuffle_i32x4(0b1011111111111111, ((__m512i)(__v16si){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), ((__m512i)(__v16si){10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120, 130, 140, 150, 160}), 0), 1, 2, 3, 4, 1, 2, 3, 4, 10, 20, 30, 40, 10, 20, 0, 40));6997 6998__m512i test_mm512_shuffle_i64x2(__m512i __A, __m512i __B) {6999 // CHECK-LABEL: test_mm512_shuffle_i64x27000 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>7001 return _mm512_shuffle_i64x2(__A, __B, 4); 7002}7003TEST_CONSTEXPR(match_m512i(_mm512_shuffle_i64x2(((__m512i){1, 2, 3, 4, 5, 6, 7, 8}), ((__m512i){10, 20, 30, 40, 50, 60, 70, 80}), 0b11000110), 5, 6, 3, 4, 10, 20, 70, 80));7004 7005__m512i test_mm512_mask_shuffle_i64x2(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {7006 // CHECK-LABEL: test_mm512_mask_shuffle_i64x27007 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>7008 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}7009 return _mm512_mask_shuffle_i64x2(__W, __U, __A, __B, 4); 7010}7011TEST_CONSTEXPR(match_m512i(_mm512_mask_shuffle_i64x2(((__m512i){100, 200, 300, 400, 500, 600, 700, 800}), 0b11111101, ((__m512i){1, 2, 3, 4, 5, 6, 7, 8}), ((__m512i){10, 20, 30, 40, 50, 60, 70, 80}), 0b11000110), 5, 200, 3, 4, 10, 20, 70, 80));7012 7013__m512i test_mm512_maskz_shuffle_i64x2(__mmask8 __U, __m512i __A, __m512i __B) {7014 // CHECK-LABEL: test_mm512_maskz_shuffle_i64x27015 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 8, i32 9>7016 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}7017 return _mm512_maskz_shuffle_i64x2(__U, __A, __B, 4); 7018}7019TEST_CONSTEXPR(match_m512i(_mm512_maskz_shuffle_i64x2(0b00111101, ((__m512i){1, 2, 3, 4, 5, 6, 7, 8}), ((__m512i){10, 20, 30, 40, 50, 60, 70, 80}), 0b11000110), 5, 0, 3, 4, 10, 20, 0, 0));7020 7021__m512d test_mm512_shuffle_pd(__m512d __M, __m512d __V) {7022 // CHECK-LABEL: test_mm512_shuffle_pd7023 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 3, i32 10, i32 4, i32 12, i32 6, i32 14>7024 return _mm512_shuffle_pd(__M, __V, 4); 7025}7026 7027__m512d test_mm512_mask_shuffle_pd(__m512d __W, __mmask8 __U, __m512d __M, __m512d __V) {7028 // CHECK-LABEL: test_mm512_mask_shuffle_pd7029 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 3, i32 10, i32 4, i32 12, i32 6, i32 14>7030 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}7031 return _mm512_mask_shuffle_pd(__W, __U, __M, __V, 4); 7032}7033 7034__m512d test_mm512_maskz_shuffle_pd(__mmask8 __U, __m512d __M, __m512d __V) {7035 // CHECK-LABEL: test_mm512_maskz_shuffle_pd7036 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 3, i32 10, i32 4, i32 12, i32 6, i32 14>7037 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}7038 return _mm512_maskz_shuffle_pd(__U, __M, __V, 4); 7039}7040 7041__m512 test_mm512_shuffle_ps(__m512 __M, __m512 __V) {7042 // CHECK-LABEL: test_mm512_shuffle_ps7043 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 16, i32 16, i32 4, i32 5, i32 20, i32 20, i32 8, i32 9, i32 24, i32 24, i32 12, i32 13, i32 28, i32 28>7044 return _mm512_shuffle_ps(__M, __V, 4); 7045}7046 7047__m512 test_mm512_mask_shuffle_ps(__m512 __W, __mmask16 __U, __m512 __M, __m512 __V) {7048 // CHECK-LABEL: test_mm512_mask_shuffle_ps7049 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 16, i32 16, i32 4, i32 5, i32 20, i32 20, i32 8, i32 9, i32 24, i32 24, i32 12, i32 13, i32 28, i32 28>7050 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}7051 return _mm512_mask_shuffle_ps(__W, __U, __M, __V, 4); 7052}7053 7054__m512 test_mm512_maskz_shuffle_ps(__mmask16 __U, __m512 __M, __m512 __V) {7055 // CHECK-LABEL: test_mm512_maskz_shuffle_ps7056 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 16, i32 16, i32 4, i32 5, i32 20, i32 20, i32 8, i32 9, i32 24, i32 24, i32 12, i32 13, i32 28, i32 28>7057 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}7058 return _mm512_maskz_shuffle_ps(__U, __M, __V, 4);7059}7060 7061TEST_CONSTEXPR((match_m512(_mm512_shuffle_ps(((__m512)(__v16sf){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}), ((__m512)(__v16sf){17.0f, 18.0f, 19.0f, 20.0f, 21.0f, 22.0f, 23.0f, 24.0f, 25.0f, 26.0f, 27.0f, 28.0f, 29.0f, 30.0f, 31.0f, 32.0f}), 4), 1.0f, 2.0f, 17.0f, 17.0f, 5.0f, 6.0f, 21.0f, 21.0f, 9.0f, 10.0f, 25.0f, 25.0f, 13.0f, 14.0f, 29.0f, 29.0f)));7062TEST_CONSTEXPR((match_m512d(_mm512_shuffle_pd(((__m512d)(__v8df){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}), ((__m512d)(__v8df){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}), 48), 1.0, 9.0, 3.0, 11.0, 6.0, 14.0, 7.0, 15.0)));7063TEST_CONSTEXPR((match_m512d(_mm512_maskz_shuffle_pd(0xFF, ((__m512d)(__v8df){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}), ((__m512d)(__v8df){9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0}), 48), 1.0, 9.0, 3.0, 11.0, 6.0, 14.0, 7.0, 15.0)));7064 7065__m128d test_mm_sqrt_round_sd(__m128d __A, __m128d __B) {7066 // CHECK-LABEL: test_mm_sqrt_round_sd7067 // CHECK: call {{.*}}<2 x double> @llvm.x86.avx512.mask.sqrt.sd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 -1, i32 11)7068 return _mm_sqrt_round_sd(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);7069}7070 7071__m128d test_mm_mask_sqrt_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){7072 // CHECK-LABEL: test_mm_mask_sqrt_sd7073 // CHECK: extractelement <2 x double> %{{.*}}, i64 07074 // CHECK-NEXT: call double @llvm.sqrt.f64(double %{{.*}})7075 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 07076 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>7077 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 07078 // CHECK-NEXT: select i1 {{.*}}, double {{.*}}, double {{.*}}7079 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double {{.*}}, i64 07080 return _mm_mask_sqrt_sd(__W,__U,__A,__B);7081}7082 7083__m128d test_mm_mask_sqrt_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){7084 // CHECK-LABEL: test_mm_mask_sqrt_round_sd7085 // CHECK: call {{.*}}<2 x double> @llvm.x86.avx512.mask.sqrt.sd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 %{{.*}}, i32 11)7086 return _mm_mask_sqrt_round_sd(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);7087}7088 7089__m128d test_mm_maskz_sqrt_sd(__mmask8 __U, __m128d __A, __m128d __B){7090 // CHECK-LABEL: test_mm_maskz_sqrt_sd7091 // CHECK: extractelement <2 x double> %{{.*}}, i64 07092 // CHECK-NEXT: call double @llvm.sqrt.f64(double %{{.*}})7093 // CHECK-NEXT: extractelement <2 x double> %{{.*}}, i64 07094 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>7095 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 07096 // CHECK-NEXT: select i1 {{.*}}, double {{.*}}, double {{.*}}7097 // CHECK-NEXT: insertelement <2 x double> %{{.*}}, double {{.*}}, i64 07098 return _mm_maskz_sqrt_sd(__U,__A,__B);7099}7100 7101__m128d test_mm_maskz_sqrt_round_sd(__mmask8 __U, __m128d __A, __m128d __B){7102 // CHECK-LABEL: test_mm_maskz_sqrt_round_sd7103 // CHECK: call {{.*}}<2 x double> @llvm.x86.avx512.mask.sqrt.sd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 %{{.*}}, i32 11)7104 return _mm_maskz_sqrt_round_sd(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);7105}7106 7107__m128 test_mm_sqrt_round_ss(__m128 __A, __m128 __B) {7108 // CHECK-LABEL: test_mm_sqrt_round_ss7109 // CHECK: call {{.*}}<4 x float> @llvm.x86.avx512.mask.sqrt.ss(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 -1, i32 11)7110 return _mm_sqrt_round_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);7111}7112 7113__m128 test_mm_mask_sqrt_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){7114 // CHECK-LABEL: test_mm_mask_sqrt_ss7115 // CHECK: extractelement <4 x float> %{{.*}}, i64 07116 // CHECK-NEXT: call float @llvm.sqrt.f32(float %{{.*}})7117 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 07118 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>7119 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 07120 // CHECK-NEXT: select i1 {{.*}}, float {{.*}}, float {{.*}}7121 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float {{.*}}, i64 07122 return _mm_mask_sqrt_ss(__W,__U,__A,__B);7123}7124 7125__m128 test_mm_mask_sqrt_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){7126 // CHECK-LABEL: test_mm_mask_sqrt_round_ss7127 // CHECK: call {{.*}}<4 x float> @llvm.x86.avx512.mask.sqrt.ss(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 {{.*}}, i32 11)7128 return _mm_mask_sqrt_round_ss(__W,__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);7129}7130 7131__m128 test_mm_maskz_sqrt_ss(__mmask8 __U, __m128 __A, __m128 __B){7132 // CHECK-LABEL: test_mm_maskz_sqrt_ss7133 // CHECK: extractelement <4 x float> %{{.*}}, i64 07134 // CHECK-NEXT: call float @llvm.sqrt.f32(float %{{.*}})7135 // CHECK-NEXT: extractelement <4 x float> %{{.*}}, i64 07136 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>7137 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 07138 // CHECK-NEXT: select i1 {{.*}}, float {{.*}}, float {{.*}}7139 // CHECK-NEXT: insertelement <4 x float> %{{.*}}, float {{.*}}, i64 07140 return _mm_maskz_sqrt_ss(__U,__A,__B);7141}7142 7143__m128 test_mm_maskz_sqrt_round_ss(__mmask8 __U, __m128 __A, __m128 __B){7144 // CHECK-LABEL: test_mm_maskz_sqrt_round_ss7145 // CHECK: call {{.*}}<4 x float> @llvm.x86.avx512.mask.sqrt.ss(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 {{.*}}, i32 11)7146 return _mm_maskz_sqrt_round_ss(__U,__A,__B,_MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);7147}7148 7149__m512 test_mm512_broadcast_f32x4(float const* __A) {7150 // CHECK-LABEL: test_mm512_broadcast_f32x47151 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7152 return _mm512_broadcast_f32x4(_mm_loadu_ps(__A)); 7153}7154TEST_CONSTEXPR(match_m512(_mm512_broadcast_f32x4((__m128)(__v4sf){1.0f, 2.0f, -3.0f, -4.0f}), 1.0f, 2.0f, -3.0f, -4.0f, 1.0f, 2.0f, -3.0f, -4.0f, 1.0f, 2.0f, -3.0f, -4.0f, 1.0f, 2.0f, -3.0f, -4.0f));7155 7156__m512 test_mm512_mask_broadcast_f32x4(__m512 __O, __mmask16 __M, float const* __A) {7157 // CHECK-LABEL: test_mm512_mask_broadcast_f32x47158 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7159 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}7160 return _mm512_mask_broadcast_f32x4(__O, __M, _mm_loadu_ps(__A)); 7161}7162 7163TEST_CONSTEXPR(match_m512(_mm512_mask_broadcast_f32x4(_mm512_setzero_ps(), 0xAAAA, (__m128)(__v4sf){1,2,3,4}), 0,2,0,4,0,2,0,4,0,2,0,4,0,2,0,4));7164 7165__m512 test_mm512_maskz_broadcast_f32x4(__mmask16 __M, float const* __A) {7166 // CHECK-LABEL: test_mm512_maskz_broadcast_f32x47167 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7168 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}7169 return _mm512_maskz_broadcast_f32x4(__M, _mm_loadu_ps(__A)); 7170}7171 7172TEST_CONSTEXPR(match_m512(_mm512_maskz_broadcast_f32x4(0xAAAA, (__m128)(__v4sf){1,2,3,4}), 0,2,0,4,0,2,0,4,0,2,0,4,0,2,0,4));7173 7174__m512d test_mm512_broadcast_f64x4(double const* __A) {7175 // CHECK-LABEL: test_mm512_broadcast_f64x47176 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7177 return _mm512_broadcast_f64x4(_mm256_loadu_pd(__A)); 7178}7179TEST_CONSTEXPR(match_m512d(_mm512_broadcast_f64x4((__m256d)(__v4df){1.0, 2.0, -3.0, -4.0}), 1.0, 2.0, -3.0, -4.0, 1.0, 2.0, -3.0, -4.0));7180 7181__m512d test_mm512_mask_broadcast_f64x4(__m512d __O, __mmask8 __M, double const* __A) {7182 // CHECK-LABEL: test_mm512_mask_broadcast_f64x47183 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7184 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}7185 return _mm512_mask_broadcast_f64x4(__O, __M, _mm256_loadu_pd(__A)); 7186}7187 7188__m512d test_mm512_maskz_broadcast_f64x4(__mmask8 __M, double const* __A) {7189 // CHECK-LABEL: test_mm512_maskz_broadcast_f64x47190 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7191 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}7192 return _mm512_maskz_broadcast_f64x4(__M, _mm256_loadu_pd(__A)); 7193}7194 7195__m512i test_mm512_broadcast_i32x4(__m128i const* __A) {7196 // CHECK-LABEL: test_mm512_broadcast_i32x47197 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7198 return _mm512_broadcast_i32x4(_mm_loadu_si128(__A)); 7199}7200TEST_CONSTEXPR(match_v16si(_mm512_broadcast_i32x4((__m128i)(__v4si){1, 2, -3, -4}), 1, 2, -3, -4, 1, 2, -3, -4, 1, 2, -3, -4, 1, 2, -3, -4));7201 7202__m512i test_mm512_mask_broadcast_i32x4(__m512i __O, __mmask16 __M, __m128i const* __A) {7203 // CHECK-LABEL: test_mm512_mask_broadcast_i32x47204 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7205 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}7206 return _mm512_mask_broadcast_i32x4(__O, __M, _mm_loadu_si128(__A)); 7207}7208 7209__m512i test_mm512_maskz_broadcast_i32x4(__mmask16 __M, __m128i const* __A) {7210 // CHECK-LABEL: test_mm512_maskz_broadcast_i32x47211 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7212 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}7213 return _mm512_maskz_broadcast_i32x4(__M, _mm_loadu_si128(__A)); 7214}7215 7216TEST_CONSTEXPR(match_v16si(_mm512_maskz_broadcast_i32x4(0xAAAA, (__m128i)(__v4si){0,1,2,3}), 0,1,0,3,0,1,0,3,0,1,0,3,0,1,0,3));7217 7218__m512i test_mm512_broadcast_i64x4(__m256i const* __A) {7219 // CHECK-LABEL: test_mm512_broadcast_i64x47220 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7221 return _mm512_broadcast_i64x4(_mm256_loadu_si256(__A)); 7222}7223TEST_CONSTEXPR(match_v8di(_mm512_broadcast_i64x4((__m256i)(__v4di){1, 2, -3, -4}), 1, 2, -3, -4, 1, 2, -3, -4));7224 7225__m512i test_mm512_mask_broadcast_i64x4(__m512i __O, __mmask8 __M, __m256i const* __A) {7226 // CHECK-LABEL: test_mm512_mask_broadcast_i64x47227 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7228 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}7229 return _mm512_mask_broadcast_i64x4(__O, __M, _mm256_loadu_si256(__A)); 7230}7231 7232__m512i test_mm512_maskz_broadcast_i64x4(__mmask8 __M, __m256i const* __A) {7233 // CHECK-LABEL: test_mm512_maskz_broadcast_i64x47234 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>7235 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}7236 return _mm512_maskz_broadcast_i64x4(__M, _mm256_loadu_si256(__A)); 7237}7238 7239__m512d test_mm512_broadcastsd_pd(__m128d __A) {7240 // CHECK-LABEL: test_mm512_broadcastsd_pd7241 // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <8 x i32> zeroinitializer7242 return _mm512_broadcastsd_pd(__A);7243}7244TEST_CONSTEXPR(match_m512d(_mm512_broadcastsd_pd((__m128d)(__v2df){1.0, 2.0}), 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0));7245 7246__m512d test_mm512_mask_broadcastsd_pd(__m512d __O, __mmask8 __M, __m128d __A) {7247 // CHECK-LABEL: test_mm512_mask_broadcastsd_pd7248 // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <8 x i32> zeroinitializer7249 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}7250 return _mm512_mask_broadcastsd_pd(__O, __M, __A);7251}7252 7253__m512d test_mm512_maskz_broadcastsd_pd(__mmask8 __M, __m128d __A) {7254 // CHECK-LABEL: test_mm512_maskz_broadcastsd_pd7255 // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <8 x i32> zeroinitializer7256 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}7257 return _mm512_maskz_broadcastsd_pd(__M, __A);7258}7259 7260__m512 test_mm512_broadcastss_ps(__m128 __A) {7261 // CHECK-LABEL: test_mm512_broadcastss_ps7262 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> zeroinitializer7263 return _mm512_broadcastss_ps(__A);7264}7265TEST_CONSTEXPR(match_m512(_mm512_broadcastss_ps((__m128)(__v4sf){1.0f, 2.0f, -3.0f, -4.0f}), 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f));7266 7267__m512 test_mm512_mask_broadcastss_ps(__m512 __O, __mmask16 __M, __m128 __A) {7268 // CHECK-LABEL: test_mm512_mask_broadcastss_ps7269 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> zeroinitializer7270 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}7271 return _mm512_mask_broadcastss_ps(__O, __M, __A);7272}7273 7274__m512 test_mm512_maskz_broadcastss_ps(__mmask16 __M, __m128 __A) {7275 // CHECK-LABEL: test_mm512_maskz_broadcastss_ps7276 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> zeroinitializer7277 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}7278 return _mm512_maskz_broadcastss_ps(__M, __A);7279}7280 7281__m512i test_mm512_broadcastd_epi32(__m128i __A) {7282 // CHECK-LABEL: test_mm512_broadcastd_epi327283 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> zeroinitializer7284 return _mm512_broadcastd_epi32(__A);7285}7286TEST_CONSTEXPR(match_v16si(_mm512_broadcastd_epi32((__m128i)(__v4si){-42, 0, 0, 0}), -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42, -42));7287 7288__m512i test_mm512_mask_broadcastd_epi32(__m512i __O, __mmask16 __M, __m128i __A) {7289 // CHECK-LABEL: test_mm512_mask_broadcastd_epi327290 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> zeroinitializer7291 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}7292 return _mm512_mask_broadcastd_epi32(__O, __M, __A);7293}7294 7295__m512i test_mm512_maskz_broadcastd_epi32(__mmask16 __M, __m128i __A) {7296 // CHECK-LABEL: test_mm512_maskz_broadcastd_epi327297 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <16 x i32> zeroinitializer7298 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}7299 return _mm512_maskz_broadcastd_epi32(__M, __A);7300}7301 7302__m512i test_mm512_broadcastq_epi64(__m128i __A) {7303 // CHECK-LABEL: test_mm512_broadcastq_epi647304 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <8 x i32> zeroinitializer7305 return _mm512_broadcastq_epi64(__A);7306}7307TEST_CONSTEXPR(match_v8di(_mm512_broadcastq_epi64((__m128i)(__v2di){-42, 0}), -42, -42, -42, -42, -42, -42, -42, -42));7308 7309__m512i test_mm512_mask_broadcastq_epi64(__m512i __O, __mmask8 __M, __m128i __A) {7310 // CHECK-LABEL: test_mm512_mask_broadcastq_epi647311 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <8 x i32> zeroinitializer7312 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}7313 return _mm512_mask_broadcastq_epi64(__O, __M, __A);7314}7315 7316__m512i test_mm512_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) {7317 // CHECK-LABEL: test_mm512_maskz_broadcastq_epi647318 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <8 x i32> zeroinitializer7319 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}7320 return _mm512_maskz_broadcastq_epi64(__M, __A);7321}7322 7323__m128i test_mm512_cvtsepi32_epi8(__m512i __A) {7324 // CHECK-LABEL: test_mm512_cvtsepi32_epi87325 // CHECK: @llvm.x86.avx512.mask.pmovs.db.5127326 return _mm512_cvtsepi32_epi8(__A); 7327}7328 7329__m128i test_mm512_mask_cvtsepi32_epi8(__m128i __O, __mmask16 __M, __m512i __A) {7330 // CHECK-LABEL: test_mm512_mask_cvtsepi32_epi87331 // CHECK: @llvm.x86.avx512.mask.pmovs.db.5127332 return _mm512_mask_cvtsepi32_epi8(__O, __M, __A); 7333}7334 7335__m128i test_mm512_maskz_cvtsepi32_epi8(__mmask16 __M, __m512i __A) {7336 // CHECK-LABEL: test_mm512_maskz_cvtsepi32_epi87337 // CHECK: @llvm.x86.avx512.mask.pmovs.db.5127338 return _mm512_maskz_cvtsepi32_epi8(__M, __A); 7339}7340 7341void test_mm512_mask_cvtsepi32_storeu_epi8(void * __P, __mmask16 __M, __m512i __A) {7342 // CHECK-LABEL: test_mm512_mask_cvtsepi32_storeu_epi87343 // CHECK: @llvm.x86.avx512.mask.pmovs.db.mem.5127344 return _mm512_mask_cvtsepi32_storeu_epi8(__P, __M, __A); 7345}7346 7347__m256i test_mm512_cvtsepi32_epi16(__m512i __A) {7348 // CHECK-LABEL: test_mm512_cvtsepi32_epi167349 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.5127350 return _mm512_cvtsepi32_epi16(__A); 7351}7352 7353__m256i test_mm512_mask_cvtsepi32_epi16(__m256i __O, __mmask16 __M, __m512i __A) {7354 // CHECK-LABEL: test_mm512_mask_cvtsepi32_epi167355 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.5127356 return _mm512_mask_cvtsepi32_epi16(__O, __M, __A); 7357}7358 7359__m256i test_mm512_maskz_cvtsepi32_epi16(__mmask16 __M, __m512i __A) {7360 // CHECK-LABEL: test_mm512_maskz_cvtsepi32_epi167361 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.5127362 return _mm512_maskz_cvtsepi32_epi16(__M, __A); 7363}7364 7365void test_mm512_mask_cvtsepi32_storeu_epi16(void *__P, __mmask16 __M, __m512i __A) {7366 // CHECK-LABEL: test_mm512_mask_cvtsepi32_storeu_epi167367 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.mem.5127368 return _mm512_mask_cvtsepi32_storeu_epi16(__P, __M, __A); 7369}7370 7371__m128i test_mm512_cvtsepi64_epi8(__m512i __A) {7372 // CHECK-LABEL: test_mm512_cvtsepi64_epi87373 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.5127374 return _mm512_cvtsepi64_epi8(__A); 7375}7376 7377__m128i test_mm512_mask_cvtsepi64_epi8(__m128i __O, __mmask8 __M, __m512i __A) {7378 // CHECK-LABEL: test_mm512_mask_cvtsepi64_epi87379 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.5127380 return _mm512_mask_cvtsepi64_epi8(__O, __M, __A); 7381}7382 7383__m128i test_mm512_maskz_cvtsepi64_epi8(__mmask8 __M, __m512i __A) {7384 // CHECK-LABEL: test_mm512_maskz_cvtsepi64_epi87385 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.5127386 return _mm512_maskz_cvtsepi64_epi8(__M, __A); 7387}7388 7389void test_mm512_mask_cvtsepi64_storeu_epi8(void * __P, __mmask8 __M, __m512i __A) {7390 // CHECK-LABEL: test_mm512_mask_cvtsepi64_storeu_epi87391 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.mem.5127392 return _mm512_mask_cvtsepi64_storeu_epi8(__P, __M, __A); 7393}7394 7395__m256i test_mm512_cvtsepi64_epi32(__m512i __A) {7396 // CHECK-LABEL: test_mm512_cvtsepi64_epi327397 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.5127398 return _mm512_cvtsepi64_epi32(__A); 7399}7400 7401__m256i test_mm512_mask_cvtsepi64_epi32(__m256i __O, __mmask8 __M, __m512i __A) {7402 // CHECK-LABEL: test_mm512_mask_cvtsepi64_epi327403 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.5127404 return _mm512_mask_cvtsepi64_epi32(__O, __M, __A); 7405}7406 7407__m256i test_mm512_maskz_cvtsepi64_epi32(__mmask8 __M, __m512i __A) {7408 // CHECK-LABEL: test_mm512_maskz_cvtsepi64_epi327409 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.5127410 return _mm512_maskz_cvtsepi64_epi32(__M, __A); 7411}7412 7413void test_mm512_mask_cvtsepi64_storeu_epi32(void *__P, __mmask8 __M, __m512i __A) {7414 // CHECK-LABEL: test_mm512_mask_cvtsepi64_storeu_epi327415 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.mem.5127416 return _mm512_mask_cvtsepi64_storeu_epi32(__P, __M, __A); 7417}7418 7419__m128i test_mm512_cvtsepi64_epi16(__m512i __A) {7420 // CHECK-LABEL: test_mm512_cvtsepi64_epi167421 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.5127422 return _mm512_cvtsepi64_epi16(__A); 7423}7424 7425__m128i test_mm512_mask_cvtsepi64_epi16(__m128i __O, __mmask8 __M, __m512i __A) {7426 // CHECK-LABEL: test_mm512_mask_cvtsepi64_epi167427 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.5127428 return _mm512_mask_cvtsepi64_epi16(__O, __M, __A); 7429}7430 7431__m128i test_mm512_maskz_cvtsepi64_epi16(__mmask8 __M, __m512i __A) {7432 // CHECK-LABEL: test_mm512_maskz_cvtsepi64_epi167433 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.5127434 return _mm512_maskz_cvtsepi64_epi16(__M, __A); 7435}7436 7437void test_mm512_mask_cvtsepi64_storeu_epi16(void * __P, __mmask8 __M, __m512i __A) {7438 // CHECK-LABEL: test_mm512_mask_cvtsepi64_storeu_epi167439 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.mem.5127440 return _mm512_mask_cvtsepi64_storeu_epi16(__P, __M, __A); 7441}7442 7443__m128i test_mm512_cvtusepi32_epi8(__m512i __A) {7444 // CHECK-LABEL: test_mm512_cvtusepi32_epi87445 // CHECK: @llvm.x86.avx512.mask.pmovus.db.5127446 return _mm512_cvtusepi32_epi8(__A); 7447}7448 7449__m128i test_mm512_mask_cvtusepi32_epi8(__m128i __O, __mmask16 __M, __m512i __A) {7450 // CHECK-LABEL: test_mm512_mask_cvtusepi32_epi87451 // CHECK: @llvm.x86.avx512.mask.pmovus.db.5127452 return _mm512_mask_cvtusepi32_epi8(__O, __M, __A); 7453}7454 7455__m128i test_mm512_maskz_cvtusepi32_epi8(__mmask16 __M, __m512i __A) {7456 // CHECK-LABEL: test_mm512_maskz_cvtusepi32_epi87457 // CHECK: @llvm.x86.avx512.mask.pmovus.db.5127458 return _mm512_maskz_cvtusepi32_epi8(__M, __A); 7459}7460 7461void test_mm512_mask_cvtusepi32_storeu_epi8(void * __P, __mmask16 __M, __m512i __A) {7462 // CHECK-LABEL: test_mm512_mask_cvtusepi32_storeu_epi87463 // CHECK: @llvm.x86.avx512.mask.pmovus.db.mem.5127464 return _mm512_mask_cvtusepi32_storeu_epi8(__P, __M, __A); 7465}7466 7467__m256i test_mm512_cvtusepi32_epi16(__m512i __A) {7468 // CHECK-LABEL: test_mm512_cvtusepi32_epi167469 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.5127470 return _mm512_cvtusepi32_epi16(__A); 7471}7472 7473__m256i test_mm512_mask_cvtusepi32_epi16(__m256i __O, __mmask16 __M, __m512i __A) {7474 // CHECK-LABEL: test_mm512_mask_cvtusepi32_epi167475 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.5127476 return _mm512_mask_cvtusepi32_epi16(__O, __M, __A); 7477}7478 7479__m256i test_mm512_maskz_cvtusepi32_epi16(__mmask16 __M, __m512i __A) {7480 // CHECK-LABEL: test_mm512_maskz_cvtusepi32_epi167481 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.5127482 return _mm512_maskz_cvtusepi32_epi16(__M, __A); 7483}7484 7485void test_mm512_mask_cvtusepi32_storeu_epi16(void *__P, __mmask16 __M, __m512i __A) {7486 // CHECK-LABEL: test_mm512_mask_cvtusepi32_storeu_epi167487 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.mem.5127488 return _mm512_mask_cvtusepi32_storeu_epi16(__P, __M, __A); 7489}7490 7491__m128i test_mm512_cvtusepi64_epi8(__m512i __A) {7492 // CHECK-LABEL: test_mm512_cvtusepi64_epi87493 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.5127494 return _mm512_cvtusepi64_epi8(__A); 7495}7496 7497__m128i test_mm512_mask_cvtusepi64_epi8(__m128i __O, __mmask8 __M, __m512i __A) {7498 // CHECK-LABEL: test_mm512_mask_cvtusepi64_epi87499 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.5127500 return _mm512_mask_cvtusepi64_epi8(__O, __M, __A); 7501}7502 7503__m128i test_mm512_maskz_cvtusepi64_epi8(__mmask8 __M, __m512i __A) {7504 // CHECK-LABEL: test_mm512_maskz_cvtusepi64_epi87505 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.5127506 return _mm512_maskz_cvtusepi64_epi8(__M, __A); 7507}7508 7509void test_mm512_mask_cvtusepi64_storeu_epi8(void * __P, __mmask8 __M, __m512i __A) {7510 // CHECK-LABEL: test_mm512_mask_cvtusepi64_storeu_epi87511 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.mem.5127512 return _mm512_mask_cvtusepi64_storeu_epi8(__P, __M, __A); 7513}7514 7515__m256i test_mm512_cvtusepi64_epi32(__m512i __A) {7516 // CHECK-LABEL: test_mm512_cvtusepi64_epi327517 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.5127518 return _mm512_cvtusepi64_epi32(__A); 7519}7520 7521__m256i test_mm512_mask_cvtusepi64_epi32(__m256i __O, __mmask8 __M, __m512i __A) {7522 // CHECK-LABEL: test_mm512_mask_cvtusepi64_epi327523 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.5127524 return _mm512_mask_cvtusepi64_epi32(__O, __M, __A); 7525}7526 7527__m256i test_mm512_maskz_cvtusepi64_epi32(__mmask8 __M, __m512i __A) {7528 // CHECK-LABEL: test_mm512_maskz_cvtusepi64_epi327529 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.5127530 return _mm512_maskz_cvtusepi64_epi32(__M, __A); 7531}7532 7533void test_mm512_mask_cvtusepi64_storeu_epi32(void* __P, __mmask8 __M, __m512i __A) {7534 // CHECK-LABEL: test_mm512_mask_cvtusepi64_storeu_epi327535 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.mem.5127536 return _mm512_mask_cvtusepi64_storeu_epi32(__P, __M, __A); 7537}7538 7539__m128i test_mm512_cvtusepi64_epi16(__m512i __A) {7540 // CHECK-LABEL: test_mm512_cvtusepi64_epi167541 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.5127542 return _mm512_cvtusepi64_epi16(__A); 7543}7544 7545__m128i test_mm512_mask_cvtusepi64_epi16(__m128i __O, __mmask8 __M, __m512i __A) {7546 // CHECK-LABEL: test_mm512_mask_cvtusepi64_epi167547 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.5127548 return _mm512_mask_cvtusepi64_epi16(__O, __M, __A); 7549}7550 7551__m128i test_mm512_maskz_cvtusepi64_epi16(__mmask8 __M, __m512i __A) {7552 // CHECK-LABEL: test_mm512_maskz_cvtusepi64_epi167553 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.5127554 return _mm512_maskz_cvtusepi64_epi16(__M, __A); 7555}7556 7557void test_mm512_mask_cvtusepi64_storeu_epi16(void *__P, __mmask8 __M, __m512i __A) {7558 // CHECK-LABEL: test_mm512_mask_cvtusepi64_storeu_epi167559 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.mem.5127560 return _mm512_mask_cvtusepi64_storeu_epi16(__P, __M, __A); 7561}7562 7563__m128i test_mm512_cvtepi32_epi8(__m512i __A) {7564 // CHECK-LABEL: test_mm512_cvtepi32_epi87565 // CHECK: trunc <16 x i32> %{{.*}} to <16 x i8>7566 return _mm512_cvtepi32_epi8(__A); 7567}7568 7569__m128i test_mm512_mask_cvtepi32_epi8(__m128i __O, __mmask16 __M, __m512i __A) {7570 // CHECK-LABEL: test_mm512_mask_cvtepi32_epi87571 // CHECK: @llvm.x86.avx512.mask.pmov.db.5127572 return _mm512_mask_cvtepi32_epi8(__O, __M, __A); 7573}7574 7575__m128i test_mm512_maskz_cvtepi32_epi8(__mmask16 __M, __m512i __A) {7576 // CHECK-LABEL: test_mm512_maskz_cvtepi32_epi87577 // CHECK: @llvm.x86.avx512.mask.pmov.db.5127578 return _mm512_maskz_cvtepi32_epi8(__M, __A); 7579}7580 7581void test_mm512_mask_cvtepi32_storeu_epi8(void * __P, __mmask16 __M, __m512i __A) {7582 // CHECK-LABEL: test_mm512_mask_cvtepi32_storeu_epi87583 // CHECK: @llvm.x86.avx512.mask.pmov.db.mem.5127584 return _mm512_mask_cvtepi32_storeu_epi8(__P, __M, __A); 7585}7586 7587__m256i test_mm512_cvtepi32_epi16(__m512i __A) {7588 // CHECK-LABEL: test_mm512_cvtepi32_epi167589 // CHECK: trunc <16 x i32> %{{.*}} to <16 x i16>7590 return _mm512_cvtepi32_epi16(__A); 7591}7592 7593__m256i test_mm512_mask_cvtepi32_epi16(__m256i __O, __mmask16 __M, __m512i __A) {7594 // CHECK-LABEL: test_mm512_mask_cvtepi32_epi167595 // CHECK: @llvm.x86.avx512.mask.pmov.dw.5127596 return _mm512_mask_cvtepi32_epi16(__O, __M, __A); 7597}7598 7599__m256i test_mm512_maskz_cvtepi32_epi16(__mmask16 __M, __m512i __A) {7600 // CHECK-LABEL: test_mm512_maskz_cvtepi32_epi167601 // CHECK: @llvm.x86.avx512.mask.pmov.dw.5127602 return _mm512_maskz_cvtepi32_epi16(__M, __A); 7603}7604 7605void test_mm512_mask_cvtepi32_storeu_epi16(void * __P, __mmask16 __M, __m512i __A) {7606 // CHECK-LABEL: test_mm512_mask_cvtepi32_storeu_epi167607 // CHECK: @llvm.x86.avx512.mask.pmov.dw.mem.5127608 return _mm512_mask_cvtepi32_storeu_epi16(__P, __M, __A); 7609}7610 7611__m128i test_mm512_cvtepi64_epi8(__m512i __A) {7612 // CHECK-LABEL: test_mm512_cvtepi64_epi87613 // CHECK: @llvm.x86.avx512.mask.pmov.qb.5127614 return _mm512_cvtepi64_epi8(__A); 7615}7616 7617__m128i test_mm512_mask_cvtepi64_epi8(__m128i __O, __mmask8 __M, __m512i __A) {7618 // CHECK-LABEL: test_mm512_mask_cvtepi64_epi87619 // CHECK: @llvm.x86.avx512.mask.pmov.qb.5127620 return _mm512_mask_cvtepi64_epi8(__O, __M, __A); 7621}7622 7623__m128i test_mm512_maskz_cvtepi64_epi8(__mmask8 __M, __m512i __A) {7624 // CHECK-LABEL: test_mm512_maskz_cvtepi64_epi87625 // CHECK: @llvm.x86.avx512.mask.pmov.qb.5127626 return _mm512_maskz_cvtepi64_epi8(__M, __A); 7627}7628 7629void test_mm512_mask_cvtepi64_storeu_epi8(void * __P, __mmask8 __M, __m512i __A) {7630 // CHECK-LABEL: test_mm512_mask_cvtepi64_storeu_epi87631 // CHECK: @llvm.x86.avx512.mask.pmov.qb.mem.5127632 return _mm512_mask_cvtepi64_storeu_epi8(__P, __M, __A); 7633}7634 7635__m256i test_mm512_cvtepi64_epi32(__m512i __A) {7636 // CHECK-LABEL: test_mm512_cvtepi64_epi327637 // CHECK: trunc <8 x i64> %{{.*}} to <8 x i32>7638 return _mm512_cvtepi64_epi32(__A); 7639}7640 7641__m256i test_mm512_mask_cvtepi64_epi32(__m256i __O, __mmask8 __M, __m512i __A) {7642 // CHECK-LABEL: test_mm512_mask_cvtepi64_epi327643 // CHECK: trunc <8 x i64> %{{.*}} to <8 x i32>7644 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}}7645 return _mm512_mask_cvtepi64_epi32(__O, __M, __A); 7646}7647 7648__m256i test_mm512_maskz_cvtepi64_epi32(__mmask8 __M, __m512i __A) {7649 // CHECK-LABEL: test_mm512_maskz_cvtepi64_epi327650 // CHECK: trunc <8 x i64> %{{.*}} to <8 x i32>7651 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}}7652 return _mm512_maskz_cvtepi64_epi32(__M, __A); 7653}7654 7655void test_mm512_mask_cvtepi64_storeu_epi32(void* __P, __mmask8 __M, __m512i __A) {7656 // CHECK-LABEL: test_mm512_mask_cvtepi64_storeu_epi327657 // CHECK: @llvm.x86.avx512.mask.pmov.qd.mem.5127658 return _mm512_mask_cvtepi64_storeu_epi32(__P, __M, __A); 7659}7660 7661__m128i test_mm512_cvtepi64_epi16(__m512i __A) {7662 // CHECK-LABEL: test_mm512_cvtepi64_epi167663 // CHECK: trunc <8 x i64> %{{.*}} to <8 x i16>7664 return _mm512_cvtepi64_epi16(__A); 7665}7666 7667__m128i test_mm512_mask_cvtepi64_epi16(__m128i __O, __mmask8 __M, __m512i __A) {7668 // CHECK-LABEL: test_mm512_mask_cvtepi64_epi167669 // CHECK: @llvm.x86.avx512.mask.pmov.qw.5127670 return _mm512_mask_cvtepi64_epi16(__O, __M, __A); 7671}7672 7673__m128i test_mm512_maskz_cvtepi64_epi16(__mmask8 __M, __m512i __A) {7674 // CHECK-LABEL: test_mm512_maskz_cvtepi64_epi167675 // CHECK: @llvm.x86.avx512.mask.pmov.qw.5127676 return _mm512_maskz_cvtepi64_epi16(__M, __A); 7677}7678 7679void test_mm512_mask_cvtepi64_storeu_epi16(void *__P, __mmask8 __M, __m512i __A) {7680 // CHECK-LABEL: test_mm512_mask_cvtepi64_storeu_epi167681 // CHECK: @llvm.x86.avx512.mask.pmov.qw.mem.5127682 return _mm512_mask_cvtepi64_storeu_epi16(__P, __M, __A); 7683}7684 7685__m128i test_mm512_extracti32x4_epi32(__m512i __A) {7686 // CHECK-LABEL: test_mm512_extracti32x4_epi327687 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> poison, <4 x i32> <i32 12, i32 13, i32 14, i32 15>7688 return _mm512_extracti32x4_epi32(__A, 3); 7689}7690TEST_CONSTEXPR(match_m128i(_mm512_extracti32x4_epi32(((__m512i)(__v16si){0,1,2,3, 4,5,6,7, 8,9,10,11, 12,13,14,15}), 3), 0x0000000D0000000CULL, 0x0000000F0000000EULL));7691 7692__m128i test_mm512_mask_extracti32x4_epi32(__m128i __W, __mmask8 __U, __m512i __A) {7693 // CHECK-LABEL: test_mm512_mask_extracti32x4_epi327694 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> poison, <4 x i32> <i32 12, i32 13, i32 14, i32 15>7695 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}}7696 return _mm512_mask_extracti32x4_epi32(__W, __U, __A, 3); 7697}7698TEST_CONSTEXPR(match_m128i(_mm512_mask_extracti32x4_epi32(((__m128i)(__v4si){100,101,102,103}), (__mmask8)0x5, ((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}), 3), 0x000000650000000CULL, 0x000000670000000EULL));7699 7700__m128i test_mm512_maskz_extracti32x4_epi32(__mmask8 __U, __m512i __A) {7701 // CHECK-LABEL: test_mm512_maskz_extracti32x4_epi327702 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> poison, <4 x i32> <i32 12, i32 13, i32 14, i32 15>7703 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}}7704 return _mm512_maskz_extracti32x4_epi32(__U, __A, 3); 7705}7706TEST_CONSTEXPR(match_m128i(_mm512_maskz_extracti32x4_epi32((__mmask8)0x3, ((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}), 3), 0x0000000D0000000CULL, 0x0000000000000000ULL));7707 7708__m256i test_mm512_extracti64x4_epi64(__m512i __A) {7709 // CHECK-LABEL: test_mm512_extracti64x4_epi647710 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7711 return _mm512_extracti64x4_epi64(__A, 1); 7712}7713TEST_CONSTEXPR(match_m256i(_mm512_extracti64x4_epi64(((__m512i)(__v8di){0,1,2,3,4,5,6,7}), 1), 4ULL, 5ULL, 6ULL, 7ULL));7714 7715__m256i test_mm512_mask_extracti64x4_epi64(__m256i __W, __mmask8 __U, __m512i __A) {7716 // CHECK-LABEL: test_mm512_mask_extracti64x4_epi647717 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7718 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}}7719 return _mm512_mask_extracti64x4_epi64(__W, __U, __A, 1); 7720}7721TEST_CONSTEXPR(match_m256i(_mm512_mask_extracti64x4_epi64(((__m256i)(__v4di){100ULL,101ULL,102ULL,103ULL}), (__mmask8)0x5, (((__m512i)(__v8di){0ULL,1ULL,2ULL,3ULL, 4ULL,5ULL,6ULL,7ULL})), 1), 4ULL, 101ULL, 6ULL, 103ULL));7722 7723__m256i test_mm512_maskz_extracti64x4_epi64(__mmask8 __U, __m512i __A) {7724 // CHECK-LABEL: test_mm512_maskz_extracti64x4_epi647725 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>7726 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}}7727 return _mm512_maskz_extracti64x4_epi64(__U, __A, 1); 7728}7729TEST_CONSTEXPR(match_m256i(_mm512_maskz_extracti64x4_epi64((__mmask8)0x3, (((__m512i)(__v8di){0ULL,1ULL,2ULL,3ULL, 4ULL,5ULL,6ULL,7ULL})), 1), 4ULL, 5ULL, 0ULL, 0ULL));7730__m512d test_mm512_insertf64x4(__m512d __A, __m256d __B) {7731 // CHECK-LABEL: test_mm512_insertf64x47732 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>7733 return _mm512_insertf64x4(__A, __B, 1);7734}7735TEST_CONSTEXPR(match_m512d(_mm512_insertf64x4(((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}), ((__m256d){10.0, 20.0, 30.0, 40.0}), 1), 1.0, 2.0, 3.0, 4.0, 10.0, 20.0, 30.0, 40.0));7736 7737__m512d test_mm512_mask_insertf64x4(__m512d __W, __mmask8 __U, __m512d __A, __m256d __B) {7738 // CHECK-LABEL: test_mm512_mask_insertf64x47739 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>7740 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}7741 return _mm512_mask_insertf64x4(__W, __U, __A, __B, 1); 7742}7743TEST_CONSTEXPR(match_m512d(_mm512_mask_insertf64x4(((__m512d){2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0}), (0x00C0), ((__m512d){2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0}), ((__m256d){10.0, 20.0, 30.0, 40.0}), 1), 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 30.0, 40.0));7744 7745__m512d test_mm512_maskz_insertf64x4(__mmask8 __U, __m512d __A, __m256d __B) {7746 // CHECK-LABEL: test_mm512_maskz_insertf64x47747 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>7748 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}7749 return _mm512_maskz_insertf64x4(__U, __A, __B, 1); 7750}7751TEST_CONSTEXPR(match_m512d(_mm512_maskz_insertf64x4((0x0030), ((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}), ((__m256d){10.0, 20.0, 30.0, 40.0}), 1), 0.0, 0.0, 0.0, 0.0, 10.0, 20.0, 0.0, 0.0));7752 7753__m512i test_mm512_inserti64x4(__m512i __A, __m256i __B) {7754 // CHECK-LABEL: test_mm512_inserti64x47755 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>7756 return _mm512_inserti64x4(__A, __B, 1); 7757}7758TEST_CONSTEXPR(match_m512i(_mm512_inserti64x4(((__m512i){1, 2, 3, 4, 5, 6, 7, 8}), ((__m256i){10, 20, 30, 40}), 1), 1, 2, 3, 4, 10, 20, 30, 40));7759 7760__m512i test_mm512_mask_inserti64x4(__m512i __W, __mmask8 __U, __m512i __A, __m256i __B) {7761 // CHECK-LABEL: test_mm512_mask_inserti64x47762 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>7763 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}7764 return _mm512_mask_inserti64x4(__W, __U, __A, __B, 1); 7765}7766TEST_CONSTEXPR(match_m512i(_mm512_mask_inserti64x4(((__m512i){2, 3, 4, 5, 6, 7, 8, 9}), (0x00C0), ((__m512i){2, 3, 4, 5, 6, 7, 8, 9}), ((__m256i){10, 20, 30, 40}), 1), 2, 3, 4, 5, 6, 7, 30, 40));7767 7768__m512i test_mm512_maskz_inserti64x4(__mmask8 __U, __m512i __A, __m256i __B) {7769 // CHECK-LABEL: test_mm512_maskz_inserti64x47770 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>7771 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}7772 return _mm512_maskz_inserti64x4(__U, __A, __B, 1); 7773}7774TEST_CONSTEXPR(match_m512i(_mm512_maskz_inserti64x4((0x0030), ((__m512i){1, 2, 3, 4, 5, 6, 7, 8}), ((__m256i){10, 20, 30, 40}), 1), 0, 0, 0, 0, 10, 20, 0, 0));7775 7776__m512 test_mm512_insertf32x4(__m512 __A, __m128 __B) {7777 // CHECK-LABEL: test_mm512_insertf32x47778 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>7779 return _mm512_insertf32x4(__A, __B, 1);7780}7781TEST_CONSTEXPR(match_m512(_mm512_insertf32x4(((__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}), ((__m128){20.0f, 30.0f, 40.0f, 50.0f}), 1), 1.0f, 2.0f, 3.0f, 4.0f, 20.0f, 30.0f, 40.0f, 50.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f));7782 7783__m512 test_mm512_mask_insertf32x4(__m512 __W, __mmask16 __U, __m512 __A, __m128 __B) {7784 // CHECK-LABEL: test_mm512_mask_insertf32x47785 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>7786 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}7787 return _mm512_mask_insertf32x4(__W, __U, __A, __B, 1); 7788}7789TEST_CONSTEXPR(match_m512(_mm512_mask_insertf32x4(((__m512){2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f, 17.0f}), (0x00F0), ((__m512){2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f, 17.0f}), ((__m128){20.0f, 30.0f, 40.0f, 50.0f}), 1), 2.0f, 3.0f, 4.0f, 5.0f, 20.0f, 30.0f, 40.0f, 50.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f, 17.0f));7790 7791__m512 test_mm512_maskz_insertf32x4(__mmask16 __U, __m512 __A, __m128 __B) {7792 // CHECK-LABEL: test_mm512_maskz_insertf32x47793 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>7794 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}7795 return _mm512_maskz_insertf32x4(__U, __A, __B, 1); 7796}7797TEST_CONSTEXPR(match_m512(_mm512_maskz_insertf32x4((0x0030), ((__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}), ((__m128){20.0f, 30.0f, 40.0f, 50.0f}), 1), 0.0f, 0.0f, 0.0f, 0.0f, 20.0f, 30.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f));7798 7799__m512i test_mm512_inserti32x4(__m512i __A, __m128i __B) {7800 // CHECK-LABEL: test_mm512_inserti32x47801 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>7802 return _mm512_inserti32x4(__A, __B, 1); 7803}7804TEST_CONSTEXPR(match_v16si(_mm512_inserti32x4(((__m512i)(__v16si){1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}), ((__m128i)(__v4si){20,30,40,50}), 1), 1, 2, 3, 4, 20, 30, 40, 50, 9, 10, 11, 12, 13, 14, 15, 16));7805 7806__m512i test_mm512_mask_inserti32x4(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) {7807 // CHECK-LABEL: test_mm512_mask_inserti32x47808 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>7809 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}7810 return _mm512_mask_inserti32x4(__W, __U, __A, __B, 1); 7811}7812TEST_CONSTEXPR(match_v16si(_mm512_mask_inserti32x4(((__m512i)(__v16si){2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17}), (0x00F0), ((__m512i)(__v16si){2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17}), ((__m128i)(__v4si){20,30,40,50}), 1), 2, 3, 4, 5, 20, 30, 40, 50, 10, 11, 12, 13, 14, 15, 16, 17));7813 7814__m512i test_mm512_maskz_inserti32x4(__mmask16 __U, __m512i __A, __m128i __B) {7815 // CHECK-LABEL: test_mm512_maskz_inserti32x47816 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>7817 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}7818 return _mm512_maskz_inserti32x4(__U, __A, __B, 1); 7819}7820TEST_CONSTEXPR(match_v16si(_mm512_maskz_inserti32x4((0x0030), ((__m512i)(__v16si){1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}), ((__m128i)(__v4si){20,30,40,50}), 1), 0, 0, 0, 0, 20, 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));7821 7822__m512d test_mm512_getmant_round_pd(__m512d __A) {7823 // CHECK-LABEL: test_mm512_getmant_round_pd7824 // CHECK: @llvm.x86.avx512.mask.getmant.pd.5127825 return _mm512_getmant_round_pd(__A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);7826}7827 7828__m512d test_mm512_mask_getmant_round_pd(__m512d __W, __mmask8 __U, __m512d __A) {7829 // CHECK-LABEL: test_mm512_mask_getmant_round_pd7830 // CHECK: @llvm.x86.avx512.mask.getmant.pd.5127831 return _mm512_mask_getmant_round_pd(__W, __U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);7832}7833 7834__m512d test_mm512_maskz_getmant_round_pd(__mmask8 __U, __m512d __A) {7835 // CHECK-LABEL: test_mm512_maskz_getmant_round_pd7836 // CHECK: @llvm.x86.avx512.mask.getmant.pd.5127837 return _mm512_maskz_getmant_round_pd(__U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);7838}7839 7840__m512d test_mm512_getmant_pd(__m512d __A) {7841 // CHECK-LABEL: test_mm512_getmant_pd7842 // CHECK: @llvm.x86.avx512.mask.getmant.pd.5127843 return _mm512_getmant_pd(__A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); 7844}7845 7846__m512d test_mm512_mask_getmant_pd(__m512d __W, __mmask8 __U, __m512d __A) {7847 // CHECK-LABEL: test_mm512_mask_getmant_pd7848 // CHECK: @llvm.x86.avx512.mask.getmant.pd.5127849 return _mm512_mask_getmant_pd(__W, __U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); 7850}7851 7852__m512d test_mm512_maskz_getmant_pd(__mmask8 __U, __m512d __A) {7853 // CHECK-LABEL: test_mm512_maskz_getmant_pd7854 // CHECK: @llvm.x86.avx512.mask.getmant.pd.5127855 return _mm512_maskz_getmant_pd(__U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); 7856}7857 7858__m512 test_mm512_getmant_round_ps(__m512 __A) {7859 // CHECK-LABEL: test_mm512_getmant_round_ps7860 // CHECK: @llvm.x86.avx512.mask.getmant.ps.5127861 return _mm512_getmant_round_ps(__A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);7862}7863 7864__m512 test_mm512_mask_getmant_round_ps(__m512 __W, __mmask16 __U, __m512 __A) {7865 // CHECK-LABEL: test_mm512_mask_getmant_round_ps7866 // CHECK: @llvm.x86.avx512.mask.getmant.ps.5127867 return _mm512_mask_getmant_round_ps(__W, __U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);7868}7869 7870__m512 test_mm512_maskz_getmant_round_ps(__mmask16 __U, __m512 __A) {7871 // CHECK-LABEL: test_mm512_maskz_getmant_round_ps7872 // CHECK: @llvm.x86.avx512.mask.getmant.ps.5127873 return _mm512_maskz_getmant_round_ps(__U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);7874}7875 7876__m512 test_mm512_getmant_ps(__m512 __A) {7877 // CHECK-LABEL: test_mm512_getmant_ps7878 // CHECK: @llvm.x86.avx512.mask.getmant.ps.5127879 return _mm512_getmant_ps(__A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); 7880}7881 7882__m512 test_mm512_mask_getmant_ps(__m512 __W, __mmask16 __U, __m512 __A) {7883 // CHECK-LABEL: test_mm512_mask_getmant_ps7884 // CHECK: @llvm.x86.avx512.mask.getmant.ps.5127885 return _mm512_mask_getmant_ps(__W, __U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); 7886}7887 7888__m512 test_mm512_maskz_getmant_ps(__mmask16 __U, __m512 __A) {7889 // CHECK-LABEL: test_mm512_maskz_getmant_ps7890 // CHECK: @llvm.x86.avx512.mask.getmant.ps.5127891 return _mm512_maskz_getmant_ps(__U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); 7892}7893 7894__m512d test_mm512_getexp_round_pd(__m512d __A) {7895 // CHECK-LABEL: test_mm512_getexp_round_pd7896 // CHECK: @llvm.x86.avx512.mask.getexp.pd.5127897 return _mm512_getexp_round_pd(__A, _MM_FROUND_NO_EXC);7898}7899 7900__m512d test_mm512_mask_getexp_round_pd(__m512d __W, __mmask8 __U, __m512d __A) {7901 // CHECK-LABEL: test_mm512_mask_getexp_round_pd7902 // CHECK: @llvm.x86.avx512.mask.getexp.pd.5127903 return _mm512_mask_getexp_round_pd(__W, __U, __A, _MM_FROUND_NO_EXC);7904}7905 7906__m512d test_mm512_maskz_getexp_round_pd(__mmask8 __U, __m512d __A) {7907 // CHECK-LABEL: test_mm512_maskz_getexp_round_pd7908 // CHECK: @llvm.x86.avx512.mask.getexp.pd.5127909 return _mm512_maskz_getexp_round_pd(__U, __A, _MM_FROUND_NO_EXC);7910}7911 7912__m512d test_mm512_getexp_pd(__m512d __A) {7913 // CHECK-LABEL: test_mm512_getexp_pd7914 // CHECK: @llvm.x86.avx512.mask.getexp.pd.5127915 return _mm512_getexp_pd(__A); 7916}7917 7918__m512d test_mm512_mask_getexp_pd(__m512d __W, __mmask8 __U, __m512d __A) {7919 // CHECK-LABEL: test_mm512_mask_getexp_pd7920 // CHECK: @llvm.x86.avx512.mask.getexp.pd.5127921 return _mm512_mask_getexp_pd(__W, __U, __A); 7922}7923 7924__m512d test_mm512_maskz_getexp_pd(__mmask8 __U, __m512d __A) {7925 // CHECK-LABEL: test_mm512_maskz_getexp_pd7926 // CHECK: @llvm.x86.avx512.mask.getexp.pd.5127927 return _mm512_maskz_getexp_pd(__U, __A); 7928}7929 7930__m512 test_mm512_getexp_round_ps(__m512 __A) {7931 // CHECK-LABEL: test_mm512_getexp_round_ps7932 // CHECK: @llvm.x86.avx512.mask.getexp.ps.5127933 return _mm512_getexp_round_ps(__A, _MM_FROUND_NO_EXC);7934}7935 7936__m512 test_mm512_mask_getexp_round_ps(__m512 __W, __mmask16 __U, __m512 __A) {7937 // CHECK-LABEL: test_mm512_mask_getexp_round_ps7938 // CHECK: @llvm.x86.avx512.mask.getexp.ps.5127939 return _mm512_mask_getexp_round_ps(__W, __U, __A, _MM_FROUND_NO_EXC);7940}7941 7942__m512 test_mm512_maskz_getexp_round_ps(__mmask16 __U, __m512 __A) {7943 // CHECK-LABEL: test_mm512_maskz_getexp_round_ps7944 // CHECK: @llvm.x86.avx512.mask.getexp.ps.5127945 return _mm512_maskz_getexp_round_ps(__U, __A, _MM_FROUND_NO_EXC);7946}7947 7948__m512 test_mm512_getexp_ps(__m512 __A) {7949 // CHECK-LABEL: test_mm512_getexp_ps7950 // CHECK: @llvm.x86.avx512.mask.getexp.ps.5127951 return _mm512_getexp_ps(__A); 7952}7953 7954__m512 test_mm512_mask_getexp_ps(__m512 __W, __mmask16 __U, __m512 __A) {7955 // CHECK-LABEL: test_mm512_mask_getexp_ps7956 // CHECK: @llvm.x86.avx512.mask.getexp.ps.5127957 return _mm512_mask_getexp_ps(__W, __U, __A); 7958}7959 7960__m512 test_mm512_maskz_getexp_ps(__mmask16 __U, __m512 __A) {7961 // CHECK-LABEL: test_mm512_maskz_getexp_ps7962 // CHECK: @llvm.x86.avx512.mask.getexp.ps.5127963 return _mm512_maskz_getexp_ps(__U, __A); 7964}7965 7966__m256 test_mm512_i64gather_ps(__m512i __index, void const *__addr) {7967 // CHECK-LABEL: test_mm512_i64gather_ps7968 // CHECK: @llvm.x86.avx512.mask.gather.qps.5127969 return _mm512_i64gather_ps(__index, __addr, 2); 7970}7971 7972__m256 test_mm512_mask_i64gather_ps(__m256 __v1_old, __mmask8 __mask, __m512i __index, void const *__addr) {7973 // CHECK-LABEL: test_mm512_mask_i64gather_ps7974 // CHECK: @llvm.x86.avx512.mask.gather.qps.5127975 return _mm512_mask_i64gather_ps(__v1_old, __mask, __index, __addr, 2); 7976}7977 7978__m256i test_mm512_i64gather_epi32(__m512i __index, void const *__addr) {7979 // CHECK-LABEL: test_mm512_i64gather_epi327980 // CHECK: @llvm.x86.avx512.mask.gather.qpi.5127981 return _mm512_i64gather_epi32(__index, __addr, 2); 7982}7983 7984__m256i test_mm512_mask_i64gather_epi32(__m256i __v1_old, __mmask8 __mask, __m512i __index, void const *__addr) {7985 // CHECK-LABEL: test_mm512_mask_i64gather_epi327986 // CHECK: @llvm.x86.avx512.mask.gather.qpi.5127987 return _mm512_mask_i64gather_epi32(__v1_old, __mask, __index, __addr, 2); 7988}7989 7990__m512d test_mm512_i64gather_pd(__m512i __index, void const *__addr) {7991 // CHECK-LABEL: test_mm512_i64gather_pd7992 // CHECK: @llvm.x86.avx512.mask.gather.qpd.5127993 return _mm512_i64gather_pd(__index, __addr, 2); 7994}7995 7996__m512d test_mm512_mask_i64gather_pd(__m512d __v1_old, __mmask8 __mask, __m512i __index, void const *__addr) {7997 // CHECK-LABEL: test_mm512_mask_i64gather_pd7998 // CHECK: @llvm.x86.avx512.mask.gather.qpd.5127999 return _mm512_mask_i64gather_pd(__v1_old, __mask, __index, __addr, 2); 8000}8001 8002__m512i test_mm512_i64gather_epi64(__m512i __index, void const *__addr) {8003 // CHECK-LABEL: test_mm512_i64gather_epi648004 // CHECK: @llvm.x86.avx512.mask.gather.qpq.5128005 return _mm512_i64gather_epi64(__index, __addr, 2); 8006}8007 8008__m512i test_mm512_mask_i64gather_epi64(__m512i __v1_old, __mmask8 __mask, __m512i __index, void const *__addr) {8009 // CHECK-LABEL: test_mm512_mask_i64gather_epi648010 // CHECK: @llvm.x86.avx512.mask.gather.qpq.5128011 return _mm512_mask_i64gather_epi64(__v1_old, __mask, __index, __addr, 2); 8012}8013 8014__m512 test_mm512_i32gather_ps(__m512i __index, void const *__addr) {8015 // CHECK-LABEL: test_mm512_i32gather_ps8016 // CHECK: @llvm.x86.avx512.mask.gather.dps.5128017 return _mm512_i32gather_ps(__index, __addr, 2); 8018}8019 8020__m512 test_mm512_mask_i32gather_ps(__m512 v1_old, __mmask16 __mask, __m512i __index, void const *__addr) {8021 // CHECK-LABEL: test_mm512_mask_i32gather_ps8022 // CHECK: @llvm.x86.avx512.mask.gather.dps.5128023 return _mm512_mask_i32gather_ps(v1_old, __mask, __index, __addr, 2); 8024}8025 8026__m512i test_mm512_i32gather_epi32(__m512i __index, void const *__addr) {8027 // CHECK-LABEL: test_mm512_i32gather_epi328028 // CHECK: @llvm.x86.avx512.mask.gather.dpi.5128029 return _mm512_i32gather_epi32(__index, __addr, 2); 8030}8031 8032__m512i test_mm512_mask_i32gather_epi32(__m512i __v1_old, __mmask16 __mask, __m512i __index, void const *__addr) {8033 // CHECK-LABEL: test_mm512_mask_i32gather_epi328034 // CHECK: @llvm.x86.avx512.mask.gather.dpi.5128035 return _mm512_mask_i32gather_epi32(__v1_old, __mask, __index, __addr, 2); 8036}8037 8038__m512d test_mm512_i32gather_pd(__m256i __index, void const *__addr) {8039 // CHECK-LABEL: test_mm512_i32gather_pd8040 // CHECK: @llvm.x86.avx512.mask.gather.dpd.5128041 return _mm512_i32gather_pd(__index, __addr, 2); 8042}8043 8044__m512d test_mm512_mask_i32gather_pd(__m512d __v1_old, __mmask8 __mask, __m256i __index, void const *__addr) {8045 // CHECK-LABEL: test_mm512_mask_i32gather_pd8046 // CHECK: @llvm.x86.avx512.mask.gather.dpd.5128047 return _mm512_mask_i32gather_pd(__v1_old, __mask, __index, __addr, 2); 8048}8049 8050__m512i test_mm512_i32gather_epi64(__m256i __index, void const *__addr) {8051 // CHECK-LABEL: test_mm512_i32gather_epi648052 // CHECK: @llvm.x86.avx512.mask.gather.dpq.5128053 return _mm512_i32gather_epi64(__index, __addr, 2); 8054}8055 8056__m512i test_mm512_mask_i32gather_epi64(__m512i __v1_old, __mmask8 __mask, __m256i __index, void const *__addr) {8057 // CHECK-LABEL: test_mm512_mask_i32gather_epi648058 // CHECK: @llvm.x86.avx512.mask.gather.dpq.5128059 return _mm512_mask_i32gather_epi64(__v1_old, __mask, __index, __addr, 2); 8060}8061 8062void test_mm512_i64scatter_ps(void *__addr, __m512i __index, __m256 __v1) {8063 // CHECK-LABEL: test_mm512_i64scatter_ps8064 // CHECK: @llvm.x86.avx512.mask.scatter.qps.5128065 return _mm512_i64scatter_ps(__addr, __index, __v1, 2); 8066}8067 8068void test_mm512_mask_i64scatter_ps(void *__addr, __mmask8 __mask, __m512i __index, __m256 __v1) {8069 // CHECK-LABEL: test_mm512_mask_i64scatter_ps8070 // CHECK: @llvm.x86.avx512.mask.scatter.qps.5128071 return _mm512_mask_i64scatter_ps(__addr, __mask, __index, __v1, 2); 8072}8073 8074void test_mm512_i64scatter_epi32(void *__addr, __m512i __index, __m256i __v1) {8075 // CHECK-LABEL: test_mm512_i64scatter_epi328076 // CHECK: @llvm.x86.avx512.mask.scatter.qpi.5128077 return _mm512_i64scatter_epi32(__addr, __index, __v1, 2); 8078}8079 8080void test_mm512_mask_i64scatter_epi32(void *__addr, __mmask8 __mask, __m512i __index, __m256i __v1) {8081 // CHECK-LABEL: test_mm512_mask_i64scatter_epi328082 // CHECK: @llvm.x86.avx512.mask.scatter.qpi.5128083 return _mm512_mask_i64scatter_epi32(__addr, __mask, __index, __v1, 2); 8084}8085 8086void test_mm512_i64scatter_pd(void *__addr, __m512i __index, __m512d __v1) {8087 // CHECK-LABEL: test_mm512_i64scatter_pd8088 // CHECK: @llvm.x86.avx512.mask.scatter.qpd.5128089 return _mm512_i64scatter_pd(__addr, __index, __v1, 2); 8090}8091 8092void test_mm512_mask_i64scatter_pd(void *__addr, __mmask8 __mask, __m512i __index, __m512d __v1) {8093 // CHECK-LABEL: test_mm512_mask_i64scatter_pd8094 // CHECK: @llvm.x86.avx512.mask.scatter.qpd.5128095 return _mm512_mask_i64scatter_pd(__addr, __mask, __index, __v1, 2); 8096}8097 8098void test_mm512_i64scatter_epi64(void *__addr, __m512i __index, __m512i __v1) {8099 // CHECK-LABEL: test_mm512_i64scatter_epi648100 // CHECK: @llvm.x86.avx512.mask.scatter.qpq.5128101 return _mm512_i64scatter_epi64(__addr, __index, __v1, 2); 8102}8103 8104void test_mm512_mask_i64scatter_epi64(void *__addr, __mmask8 __mask, __m512i __index, __m512i __v1) {8105 // CHECK-LABEL: test_mm512_mask_i64scatter_epi648106 // CHECK: @llvm.x86.avx512.mask.scatter.qpq.5128107 return _mm512_mask_i64scatter_epi64(__addr, __mask, __index, __v1, 2); 8108}8109 8110void test_mm512_i32scatter_ps(void *__addr, __m512i __index, __m512 __v1) {8111 // CHECK-LABEL: test_mm512_i32scatter_ps8112 // CHECK: @llvm.x86.avx512.mask.scatter.dps.5128113 return _mm512_i32scatter_ps(__addr, __index, __v1, 2); 8114}8115 8116void test_mm512_mask_i32scatter_ps(void *__addr, __mmask16 __mask, __m512i __index, __m512 __v1) {8117 // CHECK-LABEL: test_mm512_mask_i32scatter_ps8118 // CHECK: @llvm.x86.avx512.mask.scatter.dps.5128119 return _mm512_mask_i32scatter_ps(__addr, __mask, __index, __v1, 2); 8120}8121 8122void test_mm512_i32scatter_epi32(void *__addr, __m512i __index, __m512i __v1) {8123 // CHECK-LABEL: test_mm512_i32scatter_epi328124 // CHECK: @llvm.x86.avx512.mask.scatter.dpi.5128125 return _mm512_i32scatter_epi32(__addr, __index, __v1, 2); 8126}8127 8128void test_mm512_mask_i32scatter_epi32(void *__addr, __mmask16 __mask, __m512i __index, __m512i __v1) {8129 // CHECK-LABEL: test_mm512_mask_i32scatter_epi328130 // CHECK: @llvm.x86.avx512.mask.scatter.dpi.5128131 return _mm512_mask_i32scatter_epi32(__addr, __mask, __index, __v1, 2); 8132}8133 8134void test_mm512_i32scatter_pd(void *__addr, __m256i __index, __m512d __v1) {8135 // CHECK-LABEL: test_mm512_i32scatter_pd8136 // CHECK: @llvm.x86.avx512.mask.scatter.dpd.5128137 return _mm512_i32scatter_pd(__addr, __index, __v1, 2); 8138}8139 8140void test_mm512_mask_i32scatter_pd(void *__addr, __mmask8 __mask, __m256i __index, __m512d __v1) {8141 // CHECK-LABEL: test_mm512_mask_i32scatter_pd8142 // CHECK: @llvm.x86.avx512.mask.scatter.dpd.5128143 return _mm512_mask_i32scatter_pd(__addr, __mask, __index, __v1, 2); 8144}8145 8146void test_mm512_i32scatter_epi64(void *__addr, __m256i __index, __m512i __v1) {8147 // CHECK-LABEL: test_mm512_i32scatter_epi648148 // CHECK: @llvm.x86.avx512.mask.scatter.dpq.5128149 return _mm512_i32scatter_epi64(__addr, __index, __v1, 2); 8150}8151 8152void test_mm512_mask_i32scatter_epi64(void *__addr, __mmask8 __mask, __m256i __index, __m512i __v1) {8153 // CHECK-LABEL: test_mm512_mask_i32scatter_epi648154 // CHECK: @llvm.x86.avx512.mask.scatter.dpq.5128155 return _mm512_mask_i32scatter_epi64(__addr, __mask, __index, __v1, 2); 8156}8157 8158__m128d test_mm_mask_rsqrt14_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8159 // CHECK-LABEL: test_mm_mask_rsqrt14_sd8160 // CHECK: @llvm.x86.avx512.rsqrt14.sd8161 return _mm_mask_rsqrt14_sd(__W, __U, __A, __B);8162}8163 8164__m128d test_mm_maskz_rsqrt14_sd(__mmask8 __U, __m128d __A, __m128d __B){8165 // CHECK-LABEL: test_mm_maskz_rsqrt14_sd8166 // CHECK: @llvm.x86.avx512.rsqrt14.sd8167 return _mm_maskz_rsqrt14_sd(__U, __A, __B);8168}8169 8170__m128 test_mm_mask_rsqrt14_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8171 // CHECK-LABEL: test_mm_mask_rsqrt14_ss8172 // CHECK: @llvm.x86.avx512.rsqrt14.ss8173 return _mm_mask_rsqrt14_ss(__W, __U, __A, __B);8174}8175 8176__m128 test_mm_maskz_rsqrt14_ss(__mmask8 __U, __m128 __A, __m128 __B){8177 // CHECK-LABEL: test_mm_maskz_rsqrt14_ss8178 // CHECK: @llvm.x86.avx512.rsqrt14.ss8179 return _mm_maskz_rsqrt14_ss(__U, __A, __B);8180}8181 8182__m512d test_mm512_mask_rcp14_pd (__m512d __W, __mmask8 __U, __m512d __A)8183{8184 // CHECK-LABEL: test_mm512_mask_rcp14_pd 8185 // CHECK: @llvm.x86.avx512.rcp14.pd.5128186 return _mm512_mask_rcp14_pd (__W,__U,__A);8187}8188 8189__m512d test_mm512_maskz_rcp14_pd (__mmask8 __U, __m512d __A)8190{8191 // CHECK-LABEL: test_mm512_maskz_rcp14_pd 8192 // CHECK: @llvm.x86.avx512.rcp14.pd.5128193 return _mm512_maskz_rcp14_pd (__U,__A);8194}8195 8196__m512 test_mm512_mask_rcp14_ps (__m512 __W, __mmask16 __U, __m512 __A)8197{8198 // CHECK-LABEL: test_mm512_mask_rcp14_ps 8199 // CHECK: @llvm.x86.avx512.rcp14.ps.5128200 return _mm512_mask_rcp14_ps (__W,__U,__A);8201}8202 8203__m512 test_mm512_maskz_rcp14_ps (__mmask16 __U, __m512 __A)8204{8205 // CHECK-LABEL: test_mm512_maskz_rcp14_ps 8206 // CHECK: @llvm.x86.avx512.rcp14.ps.5128207 return _mm512_maskz_rcp14_ps (__U,__A);8208}8209 8210__m128d test_mm_mask_rcp14_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8211 // CHECK-LABEL: test_mm_mask_rcp14_sd8212 // CHECK: @llvm.x86.avx512.rcp14.sd8213 return _mm_mask_rcp14_sd(__W, __U, __A, __B);8214}8215 8216__m128d test_mm_maskz_rcp14_sd(__mmask8 __U, __m128d __A, __m128d __B){8217 // CHECK-LABEL: test_mm_maskz_rcp14_sd8218 // CHECK: @llvm.x86.avx512.rcp14.sd8219 return _mm_maskz_rcp14_sd(__U, __A, __B);8220}8221 8222__m128 test_mm_mask_rcp14_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8223 // CHECK-LABEL: test_mm_mask_rcp14_ss8224 // CHECK: @llvm.x86.avx512.rcp14.ss8225 return _mm_mask_rcp14_ss(__W, __U, __A, __B);8226}8227 8228__m128 test_mm_maskz_rcp14_ss(__mmask8 __U, __m128 __A, __m128 __B){8229 // CHECK-LABEL: test_mm_maskz_rcp14_ss8230 // CHECK: @llvm.x86.avx512.rcp14.ss8231 return _mm_maskz_rcp14_ss(__U, __A, __B);8232}8233 8234__m128d test_mm_mask_getexp_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8235 // CHECK-LABEL: test_mm_mask_getexp_sd8236 // CHECK: @llvm.x86.avx512.mask.getexp.sd8237 return _mm_mask_getexp_sd(__W, __U, __A, __B);8238}8239 8240__m128d test_mm_mask_getexp_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8241 // CHECK-LABEL: test_mm_mask_getexp_round_sd8242 // CHECK: @llvm.x86.avx512.mask.getexp.sd8243 return _mm_mask_getexp_round_sd(__W, __U, __A, __B, _MM_FROUND_NO_EXC);8244}8245 8246__m128d test_mm_maskz_getexp_sd(__mmask8 __U, __m128d __A, __m128d __B){8247 // CHECK-LABEL: test_mm_maskz_getexp_sd8248 // CHECK: @llvm.x86.avx512.mask.getexp.sd8249 return _mm_maskz_getexp_sd(__U, __A, __B);8250}8251 8252__m128d test_mm_maskz_getexp_round_sd(__mmask8 __U, __m128d __A, __m128d __B){8253 // CHECK-LABEL: test_mm_maskz_getexp_round_sd8254 // CHECK: @llvm.x86.avx512.mask.getexp.sd8255 return _mm_maskz_getexp_round_sd(__U, __A, __B, _MM_FROUND_NO_EXC);8256}8257 8258__m128 test_mm_mask_getexp_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8259 // CHECK-LABEL: test_mm_mask_getexp_ss8260 // CHECK: @llvm.x86.avx512.mask.getexp.ss8261 return _mm_mask_getexp_ss(__W, __U, __A, __B);8262}8263 8264__m128 test_mm_mask_getexp_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8265 // CHECK-LABEL: test_mm_mask_getexp_round_ss8266 // CHECK: @llvm.x86.avx512.mask.getexp.ss8267 return _mm_mask_getexp_round_ss(__W, __U, __A, __B, _MM_FROUND_NO_EXC);8268}8269 8270__m128 test_mm_maskz_getexp_ss(__mmask8 __U, __m128 __A, __m128 __B){8271 // CHECK-LABEL: test_mm_maskz_getexp_ss8272 // CHECK: @llvm.x86.avx512.mask.getexp.ss8273 return _mm_maskz_getexp_ss(__U, __A, __B);8274}8275 8276__m128 test_mm_maskz_getexp_round_ss(__mmask8 __U, __m128 __A, __m128 __B){8277 // CHECK-LABEL: test_mm_maskz_getexp_round_ss8278 // CHECK: @llvm.x86.avx512.mask.getexp.ss8279 return _mm_maskz_getexp_round_ss(__U, __A, __B, _MM_FROUND_NO_EXC);8280}8281 8282__m128d test_mm_mask_getmant_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8283 // CHECK-LABEL: test_mm_mask_getmant_sd8284 // CHECK: @llvm.x86.avx512.mask.getmant.sd8285 return _mm_mask_getmant_sd(__W, __U, __A, __B, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan);8286}8287 8288__m128d test_mm_mask_getmant_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8289 // CHECK-LABEL: test_mm_mask_getmant_round_sd8290 // CHECK: @llvm.x86.avx512.mask.getmant.sd8291 return _mm_mask_getmant_round_sd(__W, __U, __A, __B, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);8292}8293 8294__m128d test_mm_maskz_getmant_sd(__mmask8 __U, __m128d __A, __m128d __B){8295 // CHECK-LABEL: test_mm_maskz_getmant_sd8296 // CHECK: @llvm.x86.avx512.mask.getmant.sd8297 return _mm_maskz_getmant_sd(__U, __A, __B, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan);8298}8299 8300__m128d test_mm_maskz_getmant_round_sd(__mmask8 __U, __m128d __A, __m128d __B){8301 // CHECK-LABEL: test_mm_maskz_getmant_round_sd8302 // CHECK: @llvm.x86.avx512.mask.getmant.sd8303 return _mm_maskz_getmant_round_sd(__U, __A, __B, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);8304}8305 8306__m128 test_mm_mask_getmant_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8307 // CHECK-LABEL: test_mm_mask_getmant_ss8308 // CHECK: @llvm.x86.avx512.mask.getmant.ss8309 return _mm_mask_getmant_ss(__W, __U, __A, __B, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan);8310}8311 8312__m128 test_mm_mask_getmant_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8313 // CHECK-LABEL: test_mm_mask_getmant_round_ss8314 // CHECK: @llvm.x86.avx512.mask.getmant.ss8315 return _mm_mask_getmant_round_ss(__W, __U, __A, __B, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);8316}8317 8318__m128 test_mm_maskz_getmant_ss(__mmask8 __U, __m128 __A, __m128 __B){8319 // CHECK-LABEL: test_mm_maskz_getmant_ss8320 // CHECK: @llvm.x86.avx512.mask.getmant.ss8321 return _mm_maskz_getmant_ss(__U, __A, __B, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan);8322}8323 8324__m128 test_mm_maskz_getmant_round_ss(__mmask8 __U, __m128 __A, __m128 __B){8325 // CHECK-LABEL: test_mm_maskz_getmant_round_ss8326 // CHECK: @llvm.x86.avx512.mask.getmant.ss8327 return _mm_maskz_getmant_round_ss(__U, __A, __B, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);8328}8329 8330__m128 test_mm_mask_fmadd_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8331 // CHECK-LABEL: test_mm_mask_fmadd_ss8332 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08333 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08334 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08335 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8336 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8337 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08338 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[A]]8339 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08340 return _mm_mask_fmadd_ss(__W, __U, __A, __B);8341}8342 8343__m128 test_mm_fmadd_round_ss(__m128 __A, __m128 __B, __m128 __C){8344 // CHECK-LABEL: test_mm_fmadd_round_ss8345 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08346 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08347 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08348 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8349 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[FMA]], i64 08350 return _mm_fmadd_round_ss(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8351}8352 8353__m128 test_mm_mask_fmadd_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8354 // CHECK-LABEL: test_mm_mask_fmadd_round_ss8355 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08356 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08357 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08358 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8359 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8360 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08361 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[A]]8362 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08363 return _mm_mask_fmadd_round_ss(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8364}8365 8366__m128 test_mm_maskz_fmadd_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){8367 // CHECK-LABEL: test_mm_maskz_fmadd_ss8368 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08369 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08370 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08371 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8372 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8373 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08374 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float 0.000000e+008375 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08376 return _mm_maskz_fmadd_ss(__U, __A, __B, __C);8377}8378 8379__m128 test_mm_maskz_fmadd_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){8380 // CHECK-LABEL: test_mm_maskz_fmadd_round_ss8381 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08382 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08383 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08384 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8385 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8386 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08387 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float 0.000000e+008388 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08389 return _mm_maskz_fmadd_round_ss(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8390}8391 8392__m128 test_mm_mask3_fmadd_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){8393 // CHECK-LABEL: test_mm_mask3_fmadd_ss8394 // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 08395 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08396 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[ORIGC:%.+]], i64 08397 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8398 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8399 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08400 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[C]]8401 // CHECK-NEXT: insertelement <4 x float> [[ORIGC]], float [[SEL]], i64 08402 return _mm_mask3_fmadd_ss(__W, __X, __Y, __U);8403}8404 8405__m128 test_mm_mask3_fmadd_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){8406 // CHECK-LABEL: test_mm_mask3_fmadd_round_ss8407 // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 08408 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08409 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[ORIGC:%.+]], i64 08410 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8411 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8412 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08413 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[C]]8414 // CHECK-NEXT: insertelement <4 x float> [[ORIGC]], float [[SEL]], i64 08415 return _mm_mask3_fmadd_round_ss(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8416}8417 8418__m128 test_mm_mask_fmsub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8419 // CHECK-LABEL: test_mm_mask_fmsub_ss8420 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8421 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08422 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08423 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 08424 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8425 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8426 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08427 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[A]]8428 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08429 return _mm_mask_fmsub_ss(__W, __U, __A, __B);8430}8431 8432__m128 test_mm_fmsub_round_ss(__m128 __A, __m128 __B, __m128 __C){8433 // CHECK-LABEL: test_mm_fmsub_round_ss8434 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8435 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08436 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08437 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 08438 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8439 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[FMA]], i64 08440 return _mm_fmsub_round_ss(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8441}8442 8443__m128 test_mm_mask_fmsub_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8444 // CHECK-LABEL: test_mm_mask_fmsub_round_ss8445 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8446 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08447 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08448 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 08449 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8450 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8451 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08452 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[A]]8453 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08454 return _mm_mask_fmsub_round_ss(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8455}8456 8457__m128 test_mm_maskz_fmsub_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){8458 // CHECK-LABEL: test_mm_maskz_fmsub_ss8459 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8460 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08461 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08462 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 08463 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8464 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8465 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08466 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float 0.000000e+008467 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08468 return _mm_maskz_fmsub_ss(__U, __A, __B, __C);8469}8470 8471__m128 test_mm_maskz_fmsub_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){8472 // CHECK-LABEL: test_mm_maskz_fmsub_round_ss8473 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8474 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08475 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08476 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 08477 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8478 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8479 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08480 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float 0.000000e+008481 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08482 return _mm_maskz_fmsub_round_ss(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8483}8484 8485__m128 test_mm_mask3_fmsub_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){8486 // CHECK-LABEL: test_mm_mask3_fmsub_ss8487 // CHECK: [[NEG:%.+]] = fneg <4 x float> [[ORIGC:%.+]]8488 // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 08489 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08490 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 08491 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8492 // CHECK-NEXT: [[C2:%.+]] = extractelement <4 x float> [[ORIGC]], i64 08493 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8494 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08495 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[C2]]8496 // CHECK-NEXT: insertelement <4 x float> [[ORIGC]], float [[SEL]], i64 08497 return _mm_mask3_fmsub_ss(__W, __X, __Y, __U);8498}8499 8500__m128 test_mm_mask3_fmsub_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){8501 // CHECK-LABEL: test_mm_mask3_fmsub_round_ss8502 // CHECK: [[NEG:%.+]] = fneg <4 x float> [[ORIGC:%.+]]8503 // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 08504 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> %{{.*}}, i64 08505 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG]], i64 08506 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8507 // CHECK-NEXT: [[C2:%.+]] = extractelement <4 x float> [[ORIGC]], i64 08508 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8509 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08510 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[C2]]8511 // CHECK-NEXT: insertelement <4 x float> [[ORIGC]], float [[SEL]], i64 08512 return _mm_mask3_fmsub_round_ss(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8513}8514 8515__m128 test_mm_mask_fnmadd_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8516 // CHECK-LABEL: test_mm_mask_fnmadd_ss8517 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8518 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08519 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08520 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08521 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8522 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8523 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08524 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[A]]8525 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08526 return _mm_mask_fnmadd_ss(__W, __U, __A, __B);8527}8528 8529__m128 test_mm_fnmadd_round_ss(__m128 __A, __m128 __B, __m128 __C){8530 // CHECK-LABEL: test_mm_fnmadd_round_ss8531 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8532 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08533 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08534 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08535 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8536 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[FMA]], i64 08537 return _mm_fnmadd_round_ss(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8538}8539 8540__m128 test_mm_mask_fnmadd_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8541 // CHECK-LABEL: test_mm_mask_fnmadd_round_ss8542 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8543 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08544 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08545 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08546 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8547 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8548 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08549 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[A]]8550 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08551 return _mm_mask_fnmadd_round_ss(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8552}8553 8554__m128 test_mm_maskz_fnmadd_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){8555 // CHECK-LABEL: test_mm_maskz_fnmadd_ss8556 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8557 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08558 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08559 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08560 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8561 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8562 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08563 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float 0.000000e+008564 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08565 return _mm_maskz_fnmadd_ss(__U, __A, __B, __C);8566}8567 8568__m128 test_mm_maskz_fnmadd_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){8569 // CHECK-LABEL: test_mm_maskz_fnmadd_round_ss8570 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8571 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08572 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08573 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> %{{.*}}, i64 08574 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8575 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8576 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08577 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float 0.000000e+008578 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08579 return _mm_maskz_fnmadd_round_ss(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8580}8581 8582__m128 test_mm_mask3_fnmadd_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){8583 // CHECK-LABEL: test_mm_mask3_fnmadd_ss8584 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8585 // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 08586 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08587 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[ORIGC:%.+]], i64 08588 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8589 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8590 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08591 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[C]]8592 // CHECK-NEXT: insertelement <4 x float> [[ORIGC]], float [[SEL]], i64 08593 return _mm_mask3_fnmadd_ss(__W, __X, __Y, __U);8594}8595 8596__m128 test_mm_mask3_fnmadd_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){8597 // CHECK-LABEL: test_mm_mask3_fnmadd_round_ss8598 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8599 // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 08600 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08601 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[ORIGC:%.+]], i64 08602 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8603 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8604 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08605 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[C]]8606 // CHECK-NEXT: insertelement <4 x float> [[ORIGC]], float [[SEL]], i64 08607 return _mm_mask3_fnmadd_round_ss(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8608}8609 8610__m128 test_mm_mask_fnmsub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8611 // CHECK-LABEL: test_mm_mask_fnmsub_ss8612 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8613 // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}}8614 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08615 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08616 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 08617 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8618 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8619 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08620 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[A]]8621 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08622 return _mm_mask_fnmsub_ss(__W, __U, __A, __B);8623}8624 8625__m128 test_mm_fnmsub_round_ss(__m128 __A, __m128 __B, __m128 __C){8626 // CHECK-LABEL: test_mm_fnmsub_round_ss8627 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8628 // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}}8629 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08630 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08631 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 08632 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8633 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[FMA]], i64 08634 return _mm_fnmsub_round_ss(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8635}8636 8637__m128 test_mm_mask_fnmsub_round_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B){8638 // CHECK-LABEL: test_mm_mask_fnmsub_round_ss8639 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8640 // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}}8641 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08642 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08643 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 08644 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8645 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8646 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08647 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[A]]8648 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08649 return _mm_mask_fnmsub_round_ss(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8650}8651 8652__m128 test_mm_maskz_fnmsub_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){8653 // CHECK-LABEL: test_mm_maskz_fnmsub_ss8654 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8655 // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}}8656 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08657 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08658 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 08659 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8660 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8661 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08662 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float 0.000000e+008663 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08664 return _mm_maskz_fnmsub_ss(__U, __A, __B, __C);8665}8666 8667__m128 test_mm_maskz_fnmsub_round_ss(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C){8668 // CHECK-LABEL: test_mm_maskz_fnmsub_round_ss8669 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8670 // CHECK: [[NEG2:%.+]] = fneg <4 x float> %{{.*}}8671 // CHECK: [[A:%.+]] = extractelement <4 x float> [[ORIGA:%.+]], i64 08672 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08673 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 08674 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8675 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8676 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08677 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float 0.000000e+008678 // CHECK-NEXT: insertelement <4 x float> [[ORIGA]], float [[SEL]], i64 08679 return _mm_maskz_fnmsub_round_ss(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8680}8681 8682__m128 test_mm_mask3_fnmsub_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){8683 // CHECK-LABEL: test_mm_mask3_fnmsub_ss8684 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8685 // CHECK: [[NEG2:%.+]] = fneg <4 x float> [[ORIGC:%.+]]8686 // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 08687 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08688 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 08689 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.fma.f32(float [[A]], float [[B]], float [[C]])8690 // CHECK-NEXT: [[C2:%.+]] = extractelement <4 x float> [[ORIGC]], i64 08691 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8692 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08693 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[C2]]8694 // CHECK-NEXT: insertelement <4 x float> [[ORIGC]], float [[SEL]], i64 08695 return _mm_mask3_fnmsub_ss(__W, __X, __Y, __U);8696}8697 8698__m128 test_mm_mask3_fnmsub_round_ss(__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U){8699 // CHECK-LABEL: test_mm_mask3_fnmsub_round_ss8700 // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}}8701 // CHECK: [[NEG2:%.+]] = fneg <4 x float> [[ORIGC:%.+]]8702 // CHECK: [[A:%.+]] = extractelement <4 x float> %{{.*}}, i64 08703 // CHECK-NEXT: [[B:%.+]] = extractelement <4 x float> [[NEG]], i64 08704 // CHECK-NEXT: [[C:%.+]] = extractelement <4 x float> [[NEG2]], i64 08705 // CHECK-NEXT: [[FMA:%.+]] = call float @llvm.x86.avx512.vfmadd.f32(float [[A]], float [[B]], float [[C]], i32 11)8706 // CHECK-NEXT: [[C2:%.+]] = extractelement <4 x float> [[ORIGC]], i64 08707 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8708 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08709 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, float [[FMA]], float [[C2]]8710 // CHECK-NEXT: insertelement <4 x float> [[ORIGC]], float [[SEL]], i64 08711 return _mm_mask3_fnmsub_round_ss(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8712}8713 8714__m128d test_mm_mask_fmadd_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8715 // CHECK-LABEL: test_mm_mask_fmadd_sd8716 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08717 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08718 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08719 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8720 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8721 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08722 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[A]]8723 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08724 return _mm_mask_fmadd_sd(__W, __U, __A, __B);8725}8726 8727__m128d test_mm_fmadd_round_sd(__m128d __A, __m128d __B, __m128d __C){8728 // CHECK-LABEL: test_mm_fmadd_round_sd8729 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08730 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08731 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08732 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8733 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[FMA]], i64 08734 return _mm_fmadd_round_sd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8735}8736 8737__m128d test_mm_mask_fmadd_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8738 // CHECK-LABEL: test_mm_mask_fmadd_round_sd8739 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08740 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08741 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08742 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8743 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8744 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08745 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[A]]8746 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08747 return _mm_mask_fmadd_round_sd(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8748}8749 8750__m128d test_mm_maskz_fmadd_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){8751 // CHECK-LABEL: test_mm_maskz_fmadd_sd8752 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08753 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08754 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08755 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8756 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8757 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08758 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double 0.000000e+008759 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08760 return _mm_maskz_fmadd_sd(__U, __A, __B, __C);8761}8762 8763__m128d test_mm_maskz_fmadd_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){8764 // CHECK-LABEL: test_mm_maskz_fmadd_round_sd8765 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08766 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08767 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08768 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8769 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8770 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08771 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double 0.000000e+008772 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08773 return _mm_maskz_fmadd_round_sd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8774}8775 8776__m128d test_mm_mask3_fmadd_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){8777 // CHECK-LABEL: test_mm_mask3_fmadd_sd8778 // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 08779 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08780 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[ORIGC:%.+]], i64 08781 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8782 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8783 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08784 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[C]]8785 // CHECK-NEXT: insertelement <2 x double> [[ORIGC]], double [[SEL]], i64 08786 return _mm_mask3_fmadd_sd(__W, __X, __Y, __U);8787}8788 8789__m128d test_mm_mask3_fmadd_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){8790 // CHECK-LABEL: test_mm_mask3_fmadd_round_sd8791 // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 08792 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08793 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[ORIGC:%.+]], i64 08794 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8795 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8796 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08797 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[C]]8798 // CHECK-NEXT: insertelement <2 x double> [[ORIGC]], double [[SEL]], i64 08799 return _mm_mask3_fmadd_round_sd(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8800}8801 8802__m128d test_mm_mask_fmsub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8803 // CHECK-LABEL: test_mm_mask_fmsub_sd8804 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8805 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08806 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08807 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 08808 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8809 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8810 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08811 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[A]]8812 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08813 return _mm_mask_fmsub_sd(__W, __U, __A, __B);8814}8815 8816__m128d test_mm_fmsub_round_sd(__m128d __A, __m128d __B, __m128d __C){8817 // CHECK-LABEL: test_mm_fmsub_round_sd8818 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8819 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08820 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08821 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 08822 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8823 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[FMA]], i64 08824 return _mm_fmsub_round_sd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8825}8826 8827__m128d test_mm_mask_fmsub_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8828 // CHECK-LABEL: test_mm_mask_fmsub_round_sd8829 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8830 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08831 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08832 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 08833 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8834 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8835 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08836 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[A]]8837 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08838 return _mm_mask_fmsub_round_sd(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8839}8840 8841__m128d test_mm_maskz_fmsub_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){8842 // CHECK-LABEL: test_mm_maskz_fmsub_sd8843 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8844 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08845 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08846 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 08847 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8848 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8849 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08850 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double 0.000000e+008851 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08852 return _mm_maskz_fmsub_sd(__U, __A, __B, __C);8853}8854 8855__m128d test_mm_maskz_fmsub_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){8856 // CHECK-LABEL: test_mm_maskz_fmsub_round_sd8857 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8858 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08859 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08860 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 08861 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8862 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8863 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08864 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double 0.000000e+008865 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08866 return _mm_maskz_fmsub_round_sd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8867}8868 8869__m128d test_mm_mask3_fmsub_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){8870 // CHECK-LABEL: test_mm_mask3_fmsub_sd8871 // CHECK: [[NEG:%.+]] = fneg <2 x double> [[ORIGC:%.+]]8872 // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 08873 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08874 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 08875 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8876 // CHECK-NEXT: [[C2:%.+]] = extractelement <2 x double> [[ORIGC]], i64 08877 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8878 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08879 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[C2]]8880 // CHECK-NEXT: insertelement <2 x double> [[ORIGC]], double [[SEL]], i64 08881 return _mm_mask3_fmsub_sd(__W, __X, __Y, __U);8882}8883 8884__m128d test_mm_mask3_fmsub_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){8885 // CHECK-LABEL: test_mm_mask3_fmsub_round_sd8886 // CHECK: [[NEG:%.+]] = fneg <2 x double> [[ORIGC:%.+]]8887 // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 08888 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> %{{.*}}, i64 08889 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG]], i64 08890 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8891 // CHECK-NEXT: [[C2:%.+]] = extractelement <2 x double> [[ORIGC]], i64 08892 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8893 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08894 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[C2]]8895 // CHECK-NEXT: insertelement <2 x double> [[ORIGC]], double [[SEL]], i64 08896 return _mm_mask3_fmsub_round_sd(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8897}8898 8899__m128d test_mm_mask_fnmadd_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8900 // CHECK-LABEL: test_mm_mask_fnmadd_sd8901 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8902 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08903 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 08904 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08905 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8906 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8907 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08908 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[A]]8909 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08910 return _mm_mask_fnmadd_sd(__W, __U, __A, __B);8911}8912 8913__m128d test_mm_fnmadd_round_sd(__m128d __A, __m128d __B, __m128d __C){8914 // CHECK-LABEL: test_mm_fnmadd_round_sd8915 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8916 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08917 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 08918 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08919 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8920 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[FMA]], i64 08921 return _mm_fnmadd_round_sd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8922}8923 8924__m128d test_mm_mask_fnmadd_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8925 // CHECK-LABEL: test_mm_mask_fnmadd_round_sd8926 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8927 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08928 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 08929 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08930 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8931 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8932 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08933 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[A]]8934 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08935 return _mm_mask_fnmadd_round_sd(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8936}8937 8938__m128d test_mm_maskz_fnmadd_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){8939 // CHECK-LABEL: test_mm_maskz_fnmadd_sd8940 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8941 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08942 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 08943 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08944 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8945 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8946 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08947 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double 0.000000e+008948 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08949 return _mm_maskz_fnmadd_sd(__U, __A, __B, __C);8950}8951 8952__m128d test_mm_maskz_fnmadd_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){8953 // CHECK-LABEL: test_mm_maskz_fnmadd_round_sd8954 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8955 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.+]], i64 08956 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 08957 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> %{{.*}}, i64 08958 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8959 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8960 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08961 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double 0.000000e+008962 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 08963 return _mm_maskz_fnmadd_round_sd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8964}8965 8966__m128d test_mm_mask3_fnmadd_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){8967 // CHECK-LABEL: test_mm_mask3_fnmadd_sd8968 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8969 // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 08970 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 08971 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[ORIGC:%.+]], i64 08972 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])8973 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8974 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08975 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[C]]8976 // CHECK-NEXT: insertelement <2 x double> [[ORIGC]], double [[SEL]], i64 08977 return _mm_mask3_fnmadd_sd(__W, __X, __Y, __U);8978}8979 8980__m128d test_mm_mask3_fnmadd_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){8981 // CHECK-LABEL: test_mm_mask3_fnmadd_round_sd8982 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8983 // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 08984 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 08985 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[ORIGC:%.+]], i64 08986 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)8987 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>8988 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 08989 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[C]]8990 // CHECK-NEXT: insertelement <2 x double> [[ORIGC]], double [[SEL]], i64 08991 return _mm_mask3_fnmadd_round_sd(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);8992}8993 8994__m128d test_mm_mask_fnmsub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){8995 // CHECK-LABEL: test_mm_mask_fnmsub_sd8996 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}8997 // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}}8998 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 08999 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 09000 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 09001 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])9002 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>9003 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 09004 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[A]]9005 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 09006 return _mm_mask_fnmsub_sd(__W, __U, __A, __B);9007}9008 9009__m128d test_mm_fnmsub_round_sd(__m128d __A, __m128d __B, __m128d __C){9010 // CHECK-LABEL: test_mm_fnmsub_round_sd9011 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}9012 // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}}9013 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 09014 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 09015 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 09016 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)9017 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[FMA]], i64 09018 return _mm_fnmsub_round_sd(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);9019}9020 9021__m128d test_mm_mask_fnmsub_round_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B){9022 // CHECK-LABEL: test_mm_mask_fnmsub_round_sd9023 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}9024 // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}}9025 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 09026 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 09027 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 09028 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)9029 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>9030 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 09031 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[A]]9032 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 09033 return _mm_mask_fnmsub_round_sd(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);9034}9035 9036__m128d test_mm_maskz_fnmsub_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){9037 // CHECK-LABEL: test_mm_maskz_fnmsub_sd9038 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}9039 // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}}9040 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 09041 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 09042 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 09043 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])9044 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>9045 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 09046 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double 0.000000e+009047 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 09048 return _mm_maskz_fnmsub_sd(__U, __A, __B, __C);9049}9050 9051__m128d test_mm_maskz_fnmsub_round_sd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C){9052 // CHECK-LABEL: test_mm_maskz_fnmsub_round_sd9053 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}9054 // CHECK: [[NEG2:%.+]] = fneg <2 x double> %{{.*}}9055 // CHECK: [[A:%.+]] = extractelement <2 x double> [[ORIGA:%.]], i64 09056 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 09057 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 09058 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)9059 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>9060 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 09061 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double 0.000000e+009062 // CHECK-NEXT: insertelement <2 x double> [[ORIGA]], double [[SEL]], i64 09063 return _mm_maskz_fnmsub_round_sd(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);9064}9065 9066__m128d test_mm_mask3_fnmsub_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){9067 // CHECK-LABEL: test_mm_mask3_fnmsub_sd9068 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}9069 // CHECK: [[NEG2:%.+]] = fneg <2 x double> [[ORIGC:%.+]]9070 // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 09071 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 09072 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 09073 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.fma.f64(double [[A]], double [[B]], double [[C]])9074 // CHECK-NEXT: [[C2:%.+]] = extractelement <2 x double> [[ORIGC]], i64 09075 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>9076 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 09077 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[C2]]9078 // CHECK-NEXT: insertelement <2 x double> [[ORIGC]], double [[SEL]], i64 09079 return _mm_mask3_fnmsub_sd(__W, __X, __Y, __U);9080}9081 9082__m128d test_mm_mask3_fnmsub_round_sd(__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U){9083 // CHECK-LABEL: test_mm_mask3_fnmsub_round_sd9084 // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}}9085 // CHECK: [[NEG2:%.+]] = fneg <2 x double> [[ORIGC:%.+]]9086 // CHECK: [[A:%.+]] = extractelement <2 x double> %{{.*}}, i64 09087 // CHECK-NEXT: [[B:%.+]] = extractelement <2 x double> [[NEG]], i64 09088 // CHECK-NEXT: [[C:%.+]] = extractelement <2 x double> [[NEG2]], i64 09089 // CHECK-NEXT: [[FMA:%.+]] = call double @llvm.x86.avx512.vfmadd.f64(double [[A]], double [[B]], double [[C]], i32 11)9090 // CHECK-NEXT: [[C2:%.+]] = extractelement <2 x double> [[ORIGC]], i64 09091 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>9092 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 09093 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, double [[FMA]], double [[C2]]9094 // CHECK-NEXT: insertelement <2 x double> [[ORIGC]], double [[SEL]], i64 09095 return _mm_mask3_fnmsub_round_sd(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);9096}9097 9098__m512d test_mm512_permutex_pd(__m512d __X) {9099 // CHECK-LABEL: test_mm512_permutex_pd9100 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>9101 return _mm512_permutex_pd(__X, 0);9102}9103 9104__m512d test_mm512_mask_permutex_pd(__m512d __W, __mmask8 __U, __m512d __X) {9105 // CHECK-LABEL: test_mm512_mask_permutex_pd9106 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>9107 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9108 return _mm512_mask_permutex_pd(__W, __U, __X, 0);9109}9110 9111__m512d test_mm512_maskz_permutex_pd(__mmask8 __U, __m512d __X) {9112 // CHECK-LABEL: test_mm512_maskz_permutex_pd9113 // CHECK: shufflevector <8 x double> %{{.*}}, <8 x double> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>9114 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9115 return _mm512_maskz_permutex_pd(__U, __X, 0);9116}9117 9118__m512i test_mm512_permutex_epi64(__m512i __X) {9119 // CHECK-LABEL: test_mm512_permutex_epi649120 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>9121 return _mm512_permutex_epi64(__X, 0);9122}9123 9124__m512i test_mm512_mask_permutex_epi64(__m512i __W, __mmask8 __M, __m512i __X) {9125 // CHECK-LABEL: test_mm512_mask_permutex_epi649126 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>9127 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}9128 return _mm512_mask_permutex_epi64(__W, __M, __X, 0);9129}9130 9131__m512i test_mm512_maskz_permutex_epi64(__mmask8 __M, __m512i __X) {9132 // CHECK-LABEL: test_mm512_maskz_permutex_epi649133 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>9134 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}9135 return _mm512_maskz_permutex_epi64(__M, __X, 0);9136}9137 9138__m512d test_mm512_permutexvar_pd(__m512i __X, __m512d __Y) {9139 // CHECK-LABEL: test_mm512_permutexvar_pd9140 // CHECK: @llvm.x86.avx512.permvar.df.5129141 return _mm512_permutexvar_pd(__X, __Y);9142}9143 9144TEST_CONSTEXPR(match_m512d(_mm512_permutexvar_pd((__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}), 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0));9145TEST_CONSTEXPR(match_m512d(_mm512_permutexvar_pd((__m512i)(__v8di){0, 0, 0, 0, 0, 0, 0, 0}, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}), 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0));9146 9147__m512d test_mm512_mask_permutexvar_pd(__m512d __W, __mmask8 __U, __m512i __X, __m512d __Y) {9148 // CHECK-LABEL: test_mm512_mask_permutexvar_pd9149 // CHECK: @llvm.x86.avx512.permvar.df.5129150 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9151 return _mm512_mask_permutexvar_pd(__W, __U, __X, __Y);9152}9153 9154TEST_CONSTEXPR(match_m512d(_mm512_mask_permutexvar_pd((__m512d){9.0, 9.0, 9.0, 9.0, 9.0, 9.0, 9.0, 9.0}, 0xFF, (__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}), 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0));9155TEST_CONSTEXPR(match_m512d(_mm512_mask_permutexvar_pd((__m512d){9.0, 9.0, 9.0, 9.0, 9.0, 9.0, 9.0, 9.0}, 0xAA, (__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}), 9.0, 6.0, 9.0, 4.0, 9.0, 2.0, 9.0, 0.0));9156 9157__m512d test_mm512_maskz_permutexvar_pd(__mmask8 __U, __m512i __X, __m512d __Y) {9158 // CHECK-LABEL: test_mm512_maskz_permutexvar_pd9159 // CHECK: @llvm.x86.avx512.permvar.df.5129160 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9161 return _mm512_maskz_permutexvar_pd(__U, __X, __Y);9162}9163 9164TEST_CONSTEXPR(match_m512d(_mm512_maskz_permutexvar_pd(0xFF, (__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}), 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0));9165TEST_CONSTEXPR(match_m512d(_mm512_maskz_permutexvar_pd(0xAA, (__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512d){0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0}), 0.0, 6.0, 0.0, 4.0, 0.0, 2.0, 0.0, 0.0));9166 9167__m512i test_mm512_maskz_permutexvar_epi64(__mmask8 __M, __m512i __X, __m512i __Y) {9168 // CHECK-LABEL: test_mm512_maskz_permutexvar_epi649169 // CHECK: @llvm.x86.avx512.permvar.di.5129170 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}9171 return _mm512_maskz_permutexvar_epi64(__M, __X, __Y); 9172}9173 9174__m512i test_mm512_permutexvar_epi64(__m512i __X, __m512i __Y) {9175 // CHECK-LABEL: test_mm512_permutexvar_epi649176 // CHECK: @llvm.x86.avx512.permvar.di.5129177 return _mm512_permutexvar_epi64(__X, __Y);9178}9179 9180TEST_CONSTEXPR(match_v8di(_mm512_permutexvar_epi64((__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v8di){10, 11, 12, 13, 14, 15, 16, 17}), 17, 16, 15, 14, 13, 12, 11, 10));9181TEST_CONSTEXPR(match_v8di(_mm512_permutexvar_epi64((__m512i)(__v8di){0, 1, 2, 3, 4, 5, 6, 7}, (__m512i)(__v8di){100, 101, 102, 103, 104, 105, 106, 107}), 100, 101, 102, 103, 104, 105, 106, 107));9182 9183__m512i test_mm512_mask_permutexvar_epi64(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) {9184 // CHECK-LABEL: test_mm512_mask_permutexvar_epi649185 // CHECK: @llvm.x86.avx512.permvar.di.5129186 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}9187 return _mm512_mask_permutexvar_epi64(__W, __M, __X, __Y);9188}9189 9190TEST_CONSTEXPR(match_v8di(_mm512_mask_permutexvar_epi64((__m512i)(__v8di){99, 99, 99, 99, 99, 99, 99, 99}, 0xFF, (__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v8di){10, 11, 12, 13, 14, 15, 16, 17}), 17, 16, 15, 14, 13, 12, 11, 10));9191TEST_CONSTEXPR(match_v8di(_mm512_mask_permutexvar_epi64((__m512i)(__v8di){99, 99, 99, 99, 99, 99, 99, 99}, 0xAA, (__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v8di){10, 11, 12, 13, 14, 15, 16, 17}), 99, 16, 99, 14, 99, 12, 99, 10));9192 9193TEST_CONSTEXPR(match_v8di(_mm512_maskz_permutexvar_epi64(0xFF, (__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v8di){10, 11, 12, 13, 14, 15, 16, 17}), 17, 16, 15, 14, 13, 12, 11, 10));9194TEST_CONSTEXPR(match_v8di(_mm512_maskz_permutexvar_epi64(0xAA, (__m512i)(__v8di){7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v8di){10, 11, 12, 13, 14, 15, 16, 17}), 0, 16, 0, 14, 0, 12, 0, 10));9195 9196__m512 test_mm512_permutexvar_ps(__m512i __X, __m512 __Y) {9197 // CHECK-LABEL: test_mm512_permutexvar_ps9198 // CHECK: @llvm.x86.avx512.permvar.sf.5129199 return _mm512_permutexvar_ps(__X, __Y);9200}9201 9202TEST_CONSTEXPR(match_m512(_mm512_permutexvar_ps((__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512){0.0f, 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f}), 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f, 0.0f));9203TEST_CONSTEXPR(match_m512(_mm512_permutexvar_ps((__m512i)(__v16si){0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, (__m512){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f}), 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f));9204 9205__m512 test_mm512_mask_permutexvar_ps(__m512 __W, __mmask16 __U, __m512i __X, __m512 __Y) {9206 // CHECK-LABEL: test_mm512_mask_permutexvar_ps9207 // CHECK: @llvm.x86.avx512.permvar.sf.5129208 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}9209 return _mm512_mask_permutexvar_ps(__W, __U, __X, __Y);9210}9211 9212TEST_CONSTEXPR(match_m512(_mm512_mask_permutexvar_ps((__m512){99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f}, 0xFFFF, (__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512){0.0f, 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f}), 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f, 0.0f));9213TEST_CONSTEXPR(match_m512(_mm512_mask_permutexvar_ps((__m512){99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f, 99.0f}, 0xAAAA, (__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512){0.0f, 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f}), 99.0f, 14.0f, 99.0f, 12.0f, 99.0f, 10.0f, 99.0f, 8.0f, 99.0f, 6.0f, 99.0f, 4.0f, 99.0f, 2.0f, 99.0f, 0.0f));9214 9215__m512 test_mm512_maskz_permutexvar_ps(__mmask16 __U, __m512i __X, __m512 __Y) {9216 // CHECK-LABEL: test_mm512_maskz_permutexvar_ps9217 // CHECK: @llvm.x86.avx512.permvar.sf.5129218 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}9219 return _mm512_maskz_permutexvar_ps(__U, __X, __Y);9220}9221 9222TEST_CONSTEXPR(match_m512(_mm512_maskz_permutexvar_ps(0xFFFF, (__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512){0.0f, 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f}), 15.0f, 14.0f, 13.0f, 12.0f, 11.0f, 10.0f, 9.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f, 0.0f));9223TEST_CONSTEXPR(match_m512(_mm512_maskz_permutexvar_ps(0xAAAA, (__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512){0.0f, 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f}), 0.0f, 14.0f, 0.0f, 12.0f, 0.0f, 10.0f, 0.0f, 8.0f, 0.0f, 6.0f, 0.0f, 4.0f, 0.0f, 2.0f, 0.0f, 0.0f));9224 9225__m512i test_mm512_maskz_permutexvar_epi32(__mmask16 __M, __m512i __X, __m512i __Y) {9226 // CHECK-LABEL: test_mm512_maskz_permutexvar_epi329227 // CHECK: @llvm.x86.avx512.permvar.si.5129228 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}9229 return _mm512_maskz_permutexvar_epi32(__M, __X, __Y); 9230}9231 9232__m512i test_mm512_permutexvar_epi32(__m512i __X, __m512i __Y) {9233 // CHECK-LABEL: test_mm512_permutexvar_epi329234 // CHECK: @llvm.x86.avx512.permvar.si.5129235 return _mm512_permutexvar_epi32(__X, __Y);9236}9237 9238TEST_CONSTEXPR(match_v16si(_mm512_permutexvar_epi32((__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v16si){10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}), 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10));9239TEST_CONSTEXPR(match_v16si(_mm512_permutexvar_epi32((__m512i)(__v16si){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, (__m512i)(__v16si){100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115}), 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115));9240 9241__m512i test_mm512_mask_permutexvar_epi32(__m512i __W, __mmask16 __M, __m512i __X, __m512i __Y) {9242 // CHECK-LABEL: test_mm512_mask_permutexvar_epi329243 // CHECK: @llvm.x86.avx512.permvar.si.5129244 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}9245 return _mm512_mask_permutexvar_epi32(__W, __M, __X, __Y);9246}9247 9248TEST_CONSTEXPR(match_v16si(_mm512_mask_permutexvar_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0xFFFF, (__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v16si){10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}), 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10));9249TEST_CONSTEXPR(match_v16si(_mm512_mask_permutexvar_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, 0xAAAA, (__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v16si){10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}), 99, 24, 99, 22, 99, 20, 99, 18, 99, 16, 99, 14, 99, 12, 99, 10));9250 9251TEST_CONSTEXPR(match_v16si(_mm512_maskz_permutexvar_epi32(0xFFFF, (__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v16si){10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}), 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10));9252TEST_CONSTEXPR(match_v16si(_mm512_maskz_permutexvar_epi32(0xAAAA, (__m512i)(__v16si){15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0}, (__m512i)(__v16si){10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}), 0, 24, 0, 22, 0, 20, 0, 18, 0, 16, 0, 14, 0, 12, 0, 10));9253 9254__mmask16 test_mm512_kand(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9255 // CHECK-LABEL: test_mm512_kand9256 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9257 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9258 // CHECK: [[RES:%.*]] = and <16 x i1> [[LHS]], [[RHS]]9259 // CHECK: bitcast <16 x i1> {{.*}} to i169260 return _mm512_mask_cmpneq_epu32_mask(_mm512_kand(_mm512_cmpneq_epu32_mask(__A, __B),9261 _mm512_cmpneq_epu32_mask(__C, __D)),9262 __E, __F);9263}9264 9265TEST_CONSTEXPR(_mm512_kand(0xCC, 0xAA) == 0x88);9266TEST_CONSTEXPR(_mm512_kand(0x12345, 0xFFFF) == 0x2345);9267TEST_CONSTEXPR(_mm512_kand(0xABCD, 0x0000) == 0x0000);9268TEST_CONSTEXPR(_mm512_kand(0x5678, 0xFFFF) == 0x5678);9269TEST_CONSTEXPR(_mm512_kand(0xAAAA, 0x5555) == 0x0000);9270 9271__mmask16 test_mm512_kandn(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9272 // CHECK-LABEL: test_mm512_kandn9273 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9274 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9275 // CHECK: [[NOT:%.*]] = xor <16 x i1> [[LHS]], splat (i1 true)9276 // CHECK: [[RES:%.*]] = and <16 x i1> [[NOT]], [[RHS]]9277 // CHECK: bitcast <16 x i1> {{.*}} to i169278 return _mm512_mask_cmpneq_epu32_mask(_mm512_kandn(_mm512_cmpneq_epu32_mask(__A, __B),9279 _mm512_cmpneq_epu32_mask(__C, __D)),9280 __E, __F);9281}9282 9283TEST_CONSTEXPR(_mm512_kandn(0xCC, 0xAA) == 0x22);9284TEST_CONSTEXPR(_mm512_kandn(0x12345, 0xFFFF) == 0xDCBA);9285TEST_CONSTEXPR(_mm512_kandn(0x0000, 0xABCD) == 0xABCD);9286TEST_CONSTEXPR(_mm512_kandn(0xFFFF, 0x5678) == 0x0000);9287TEST_CONSTEXPR(_mm512_kandn(0xAAAA, 0xAAAA) == 0x0000);9288 9289__mmask16 test_mm512_kor(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9290 // CHECK-LABEL: test_mm512_kor9291 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9292 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9293 // CHECK: [[RES:%.*]] = or <16 x i1> [[LHS]], [[RHS]]9294 // CHECK: bitcast <16 x i1> {{.*}} to i169295 return _mm512_mask_cmpneq_epu32_mask(_mm512_kor(_mm512_cmpneq_epu32_mask(__A, __B),9296 _mm512_cmpneq_epu32_mask(__C, __D)),9297 __E, __F);9298}9299 9300TEST_CONSTEXPR(_mm512_kor(0xC1, 0xA8) == 0xE9);9301TEST_CONSTEXPR(_mm512_kor(0x12345, 0x12345) == 0x2345);9302TEST_CONSTEXPR(_mm512_kor(0xABCD, 0x0000) == 0xABCD);9303TEST_CONSTEXPR(_mm512_kor(0xABCD, 0xFFFF) == 0xFFFF);9304TEST_CONSTEXPR(_mm512_kor(0xAAAA, 0x5555) == 0xFFFF);9305 9306int test_mm512_kortestc(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {9307 // CHECK-LABEL: test_mm512_kortestc9308 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9309 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9310 // CHECK: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]9311 // CHECK: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i169312 // CHECK: [[CMP:%.*]] = icmp eq i16 [[CAST]], -19313 // CHECK: zext i1 [[CMP]] to i329314 return _mm512_kortestc(_mm512_cmpneq_epu32_mask(__A, __B),9315 _mm512_cmpneq_epu32_mask(__C, __D));9316}9317 9318TEST_CONSTEXPR(_mm512_kortestc(0x0000, 0x0000) == 0);9319TEST_CONSTEXPR(_mm512_kortestc(0x0000, 0x8000) == 0);9320TEST_CONSTEXPR(_mm512_kortestc(0x0123, 0xFEDC) == 1);9321 9322int test_mm512_kortestz(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {9323 // CHECK-LABEL: test_mm512_kortestz9324 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9325 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9326 // CHECK: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]9327 // CHECK: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i169328 // CHECK: [[CMP:%.*]] = icmp eq i16 [[CAST]], 09329 // CHECK: zext i1 [[CMP]] to i329330 return _mm512_kortestz(_mm512_cmpneq_epu32_mask(__A, __B),9331 _mm512_cmpneq_epu32_mask(__C, __D));9332}9333 9334TEST_CONSTEXPR(_mm512_kortestz(0x0000, 0x0000) == 1);9335TEST_CONSTEXPR(_mm512_kortestz(0x0000, 0x8000) == 0);9336TEST_CONSTEXPR(_mm512_kortestz(0x0123, 0xFEDC) == 0);9337 9338unsigned char test_kortestz_mask16_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {9339 // CHECK-LABEL: test_kortestz_mask16_u89340 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9341 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9342 // CHECK: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]9343 // CHECK: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i169344 // CHECK: [[CMP:%.*]] = icmp eq i16 [[CAST]], 09345 // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i329346 // CHECK: trunc i32 [[ZEXT]] to i89347 return _kortestz_mask16_u8(_mm512_cmpneq_epu32_mask(__A, __B),9348 _mm512_cmpneq_epu32_mask(__C, __D));9349}9350 9351TEST_CONSTEXPR(_kortestz_mask16_u8(0x0000, 0x0000) == 1);9352TEST_CONSTEXPR(_kortestz_mask16_u8(0x0000, 0x8000) == 0);9353TEST_CONSTEXPR(_kortestz_mask16_u8(0x0123, 0xFEDC) == 0);9354 9355unsigned char test_kortestc_mask16_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D) {9356 // CHECK-LABEL: test_kortestc_mask16_u89357 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9358 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9359 // CHECK: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]9360 // CHECK: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i169361 // CHECK: [[CMP:%.*]] = icmp eq i16 [[CAST]], -19362 // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i329363 // CHECK: trunc i32 [[ZEXT]] to i89364 return _kortestc_mask16_u8(_mm512_cmpneq_epu32_mask(__A, __B),9365 _mm512_cmpneq_epu32_mask(__C, __D));9366}9367 9368TEST_CONSTEXPR(_kortestc_mask16_u8(0x0000, 0x0000) == 0);9369TEST_CONSTEXPR(_kortestc_mask16_u8(0x0000, 0x8000) == 0);9370TEST_CONSTEXPR(_kortestc_mask16_u8(0x0123, 0xFEDC) == 1);9371 9372unsigned char test_kortest_mask16_u8(__m512i __A, __m512i __B, __m512i __C, __m512i __D, unsigned char *CF) {9373 // CHECK-LABEL: test_kortest_mask16_u89374 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9375 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9376 // CHECK: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]9377 // CHECK: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i169378 // CHECK: [[CMP:%.*]] = icmp eq i16 [[CAST]], -19379 // CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i329380 // CHECK: trunc i32 [[ZEXT]] to i89381 // CHECK: [[LHS2:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9382 // CHECK: [[RHS2:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9383 // CHECK: [[OR2:%.*]] = or <16 x i1> [[LHS2]], [[RHS2]]9384 // CHECK: [[CAST2:%.*]] = bitcast <16 x i1> [[OR2]] to i169385 // CHECK: [[CMP2:%.*]] = icmp eq i16 [[CAST2]], 09386 // CHECK: [[ZEXT2:%.*]] = zext i1 [[CMP2]] to i329387 // CHECK: trunc i32 [[ZEXT2]] to i89388 return _kortest_mask16_u8(_mm512_cmpneq_epu32_mask(__A, __B),9389 _mm512_cmpneq_epu32_mask(__C, __D), CF);9390}9391 9392// Test constexpr handling.9393#if defined(__cplusplus) && (__cplusplus >= 201103L)9394constexpr unsigned char9395test_kortest_mask16_u8(unsigned short A, unsigned short B) {9396 unsigned char all_ones{};9397 return (_kortest_mask16_u8(A, B, &all_ones) << 4) | all_ones;9398}9399 9400void _kortest_mask16_u8() {9401 constexpr unsigned short A1 = 0x0000;9402 constexpr unsigned short B1 = 0x0000;9403 constexpr unsigned char expected_result_1 = 0x10;9404 static_assert(test_kortest_mask16_u8(A1, B1) == expected_result_1);9405 constexpr unsigned short A2 = 0x0000;9406 constexpr unsigned short B2 = 0x8000;9407 constexpr unsigned char expected_result_2 = 0x00;9408 static_assert(test_kortest_mask16_u8(A2, B2) == expected_result_2);9409 constexpr unsigned short A3 = 0x0123;9410 constexpr unsigned short B3 = 0xFEDC;9411 constexpr unsigned char expected_result_3 = 0x01;9412 static_assert(test_kortest_mask16_u8(A3, B3) == expected_result_3);9413}9414#endif9415 9416__mmask16 test_mm512_kunpackb(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9417 // CHECK-LABEL: test_mm512_kunpackb9418 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9419 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9420 // CHECK: [[LHS2:%.*]] = shufflevector <16 x i1> [[LHS]], <16 x i1> [[LHS]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>9421 // CHECK: [[RHS2:%.*]] = shufflevector <16 x i1> [[RHS]], <16 x i1> [[RHS]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>9422 // CHECK: [[CONCAT:%.*]] = shufflevector <8 x i1> [[RHS2]], <8 x i1> [[LHS2]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>9423 // CHECK: bitcast <16 x i1> [[CONCAT]] to i169424 return _mm512_mask_cmpneq_epu32_mask(_mm512_kunpackb(_mm512_cmpneq_epu32_mask(__A, __B),9425 _mm512_cmpneq_epu32_mask(__C, __D)),9426 __E, __F);9427}9428 9429TEST_CONSTEXPR(_mm512_kunpackb(0xFF00, 0x00FF) == 0x00FF);9430TEST_CONSTEXPR(_mm512_kunpackb(0xABCD, 0x1234) == 0xCD34);9431TEST_CONSTEXPR(_mm512_kunpackb(0x00FF, 0xFF00) == 0xFF00);9432TEST_CONSTEXPR(_mm512_kunpackb(0xAAAA, 0x5555) == 0xAA55);9433TEST_CONSTEXPR(_mm512_kunpackb(0x1234, 0xABCD) == 0x34CD);9434 9435__mmask16 test_mm512_kxnor(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9436 // CHECK-LABEL: test_mm512_kxnor9437 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9438 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9439 // CHECK: [[NOT:%.*]] = xor <16 x i1> [[LHS]], splat (i1 true)9440 // CHECK: [[RES:%.*]] = xor <16 x i1> [[NOT]], [[RHS]]9441 // CHECK: bitcast <16 x i1> {{.*}} to i169442 return _mm512_mask_cmpneq_epu32_mask(_mm512_kxnor(_mm512_cmpneq_epu32_mask(__A, __B),9443 _mm512_cmpneq_epu32_mask(__C, __D)),9444 __E, __F);9445}9446 9447TEST_CONSTEXPR(_mm512_kxnor(0x00C5, 0xFFAF) == 0x95);9448TEST_CONSTEXPR(_mm512_kxnor(0x12345, 0xFFFF) == 0x2345);9449TEST_CONSTEXPR(_mm512_kxnor(0xABCD, 0x0000) == 0x5432);9450TEST_CONSTEXPR(_mm512_kxnor(0x5678, 0xFFFF) == 0x5678);9451TEST_CONSTEXPR(_mm512_kxnor(0xAAAA, 0x5555) == 0x0000);9452 9453__mmask16 test_mm512_kxor(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9454 // CHECK-LABEL: test_mm512_kxor9455 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9456 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9457 // CHECK: [[RES:%.*]] = xor <16 x i1> [[LHS]], [[RHS]]9458 // CHECK: bitcast <16 x i1> {{.*}} to i169459 return _mm512_mask_cmpneq_epu32_mask(_mm512_kxor(_mm512_cmpneq_epu32_mask(__A, __B),9460 _mm512_cmpneq_epu32_mask(__C, __D)),9461 __E, __F);9462}9463 9464TEST_CONSTEXPR(_mm512_kxor(0xC5, 0xAF) == 0x6A);9465TEST_CONSTEXPR(_mm512_kxor(0x12345, 0xFFFF) == 0xDCBA);9466TEST_CONSTEXPR(_mm512_kxor(0xABCD, 0x0000) == 0xABCD);9467TEST_CONSTEXPR(_mm512_kxor(0x5678, 0xFFFF) == 0xA987);9468TEST_CONSTEXPR(_mm512_kxor(0xAAAA, 0x5555) == 0xFFFF);9469 9470__mmask16 test_knot_mask16(__mmask16 a) {9471 // CHECK-LABEL: test_knot_mask169472 // CHECK: [[IN:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9473 // CHECK: [[NOT:%.*]] = xor <16 x i1> [[IN]], splat (i1 true)9474 // CHECK: bitcast <16 x i1> [[NOT]] to i169475 return _knot_mask16(a);9476}9477 9478TEST_CONSTEXPR(_knot_mask16(0) == 0xFFFF);9479TEST_CONSTEXPR(_knot_mask16(0x12345) == 0xDCBA);9480 9481__mmask16 test_kand_mask16(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9482 // CHECK-LABEL: test_kand_mask169483 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9484 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9485 // CHECK: [[RES:%.*]] = and <16 x i1> [[LHS]], [[RHS]]9486 // CHECK: bitcast <16 x i1> {{.*}} to i169487 return _mm512_mask_cmpneq_epu32_mask(_kand_mask16(_mm512_cmpneq_epu32_mask(__A, __B),9488 _mm512_cmpneq_epu32_mask(__C, __D)),9489 __E, __F);9490}9491 9492TEST_CONSTEXPR(_kand_mask16(0xCC, 0xAA) == 0x88);9493TEST_CONSTEXPR(_kand_mask16(0x12345, 0xFFFF) == 0x2345);9494TEST_CONSTEXPR(_kand_mask16(0xABCD, 0x0000) == 0x0000);9495TEST_CONSTEXPR(_kand_mask16(0x5678, 0xFFFF) == 0x5678);9496TEST_CONSTEXPR(_kand_mask16(0xAAAA, 0x5555) == 0x0000);9497 9498__mmask16 test_kandn_mask16(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9499 // CHECK-LABEL: test_kandn_mask169500 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9501 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9502 // CHECK: [[NOT:%.*]] = xor <16 x i1> [[LHS]], splat (i1 true)9503 // CHECK: [[RES:%.*]] = and <16 x i1> [[NOT]], [[RHS]]9504 // CHECK: bitcast <16 x i1> {{.*}} to i169505 return _mm512_mask_cmpneq_epu32_mask(_kandn_mask16(_mm512_cmpneq_epu32_mask(__A, __B),9506 _mm512_cmpneq_epu32_mask(__C, __D)),9507 __E, __F);9508}9509 9510TEST_CONSTEXPR(_kandn_mask16(0xCC, 0xAA) == 0x22);9511TEST_CONSTEXPR(_kandn_mask16(0x12345, 0xFFFF) == 0xDCBA);9512TEST_CONSTEXPR(_kandn_mask16(0x0000, 0xABCD) == 0xABCD);9513TEST_CONSTEXPR(_kandn_mask16(0xFFFF, 0x5678) == 0x0000);9514TEST_CONSTEXPR(_kandn_mask16(0xAAAA, 0xAAAA) == 0x0000);9515 9516__mmask16 test_kor_mask16(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9517 // CHECK-LABEL: test_kor_mask169518 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9519 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9520 // CHECK: [[RES:%.*]] = or <16 x i1> [[LHS]], [[RHS]]9521 // CHECK: bitcast <16 x i1> {{.*}} to i169522 return _mm512_mask_cmpneq_epu32_mask(_kor_mask16(_mm512_cmpneq_epu32_mask(__A, __B),9523 _mm512_cmpneq_epu32_mask(__C, __D)),9524 __E, __F);9525}9526 9527TEST_CONSTEXPR(_kor_mask16(0xC1, 0xA8) == 0xE9);9528TEST_CONSTEXPR(_kor_mask16(0x12345, 0x12345) == 0x2345);9529TEST_CONSTEXPR(_kor_mask16(0xABCD, 0x0000) == 0xABCD);9530TEST_CONSTEXPR(_kor_mask16(0xABCD, 0xFFFF) == 0xFFFF);9531TEST_CONSTEXPR(_kor_mask16(0xAAAA, 0x5555) == 0xFFFF);9532 9533__mmask16 test_kxnor_mask16(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9534 // CHECK-LABEL: test_kxnor_mask169535 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9536 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9537 // CHECK: [[NOT:%.*]] = xor <16 x i1> [[LHS]], splat (i1 true)9538 // CHECK: [[RES:%.*]] = xor <16 x i1> [[NOT]], [[RHS]]9539 // CHECK: bitcast <16 x i1> {{.*}} to i169540 return _mm512_mask_cmpneq_epu32_mask(_kxnor_mask16(_mm512_cmpneq_epu32_mask(__A, __B),9541 _mm512_cmpneq_epu32_mask(__C, __D)),9542 __E, __F);9543}9544 9545TEST_CONSTEXPR(_kxnor_mask16(0x00C5, 0xFFAF) == 0x95);9546TEST_CONSTEXPR(_kxnor_mask16(0x12345, 0xFFFF) == 0x2345);9547TEST_CONSTEXPR(_kxnor_mask16(0xABCD, 0x0000) == 0x5432);9548TEST_CONSTEXPR(_kxnor_mask16(0x5678, 0xFFFF) == 0x5678);9549TEST_CONSTEXPR(_kxnor_mask16(0xAAAA, 0x5555) == 0x0000);9550 9551__mmask16 test_kxor_mask16(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) {9552 // CHECK-LABEL: test_kxor_mask169553 // CHECK: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9554 // CHECK: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9555 // CHECK: [[RES:%.*]] = xor <16 x i1> [[LHS]], [[RHS]]9556 // CHECK: bitcast <16 x i1> {{.*}} to i169557 return _mm512_mask_cmpneq_epu32_mask(_kxor_mask16(_mm512_cmpneq_epu32_mask(__A, __B),9558 _mm512_cmpneq_epu32_mask(__C, __D)),9559 __E, __F);9560}9561 9562TEST_CONSTEXPR(_kxor_mask16(0xC5, 0xAF) == 0x6A);9563TEST_CONSTEXPR(_kxor_mask16(0x12345, 0xFFFF) == 0xDCBA);9564TEST_CONSTEXPR(_kxor_mask16(0xABCD, 0x0000) == 0xABCD);9565TEST_CONSTEXPR(_kxor_mask16(0x5678, 0xFFFF) == 0xA987);9566TEST_CONSTEXPR(_kxor_mask16(0xAAAA, 0x5555) == 0xFFFF);9567 9568__mmask16 test_kshiftli_mask16(__m512i A, __m512i B, __m512i C, __m512i D) {9569 // CHECK-LABEL: test_kshiftli_mask169570 // CHECK: [[VAL:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9571 // CHECK: [[RES:%.*]] = shufflevector <16 x i1> zeroinitializer, <16 x i1> [[VAL]], <16 x i32> <i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30>9572 // CHECK: bitcast <16 x i1> {{.*}} to i169573 return _mm512_mask_cmpneq_epu32_mask(_kshiftli_mask16(_mm512_cmpneq_epu32_mask(A, B), 1), C, D);9574}9575 9576__mmask16 test_kshiftri_mask16(__m512i A, __m512i B, __m512i C, __m512i D) {9577 // CHECK-LABEL: test_kshiftri_mask169578 // CHECK: [[VAL:%.*]] = bitcast i16 %{{.*}} to <16 x i1>9579 // CHECK: [[RES:%.*]] = shufflevector <16 x i1> [[VAL]], <16 x i1> zeroinitializer, <16 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16>9580 // CHECK: bitcast <16 x i1> {{.*}} to i169581 return _mm512_mask_cmpneq_epu32_mask(_kshiftri_mask16(_mm512_cmpneq_epu32_mask(A, B), 1), C, D);9582}9583 9584unsigned int test_cvtmask16_u32(__m512i A, __m512i B) {9585 // CHECK-LABEL: test_cvtmask16_u329586 // CHECK: bitcast <16 x i1> %{{.*}} to i169587 // CHECK: bitcast i16 %{{.*}} to <16 x i1>9588 // CHECK: zext i16 %{{.*}} to i329589 return _cvtmask16_u32(_mm512_cmpneq_epu32_mask(A, B));9590}9591 9592TEST_CONSTEXPR(_cvtmask16_u32((__mmask16)0xBEEF) == 0xBEEF);9593 9594__mmask16 test_cvtu32_mask16(__m512i A, __m512i B, unsigned int C) {9595 // CHECK-LABEL: test_cvtu32_mask169596 // CHECK: trunc i32 %{{.*}} to i169597 // CHECK: bitcast i16 %{{.*}} to <16 x i1>9598 return _mm512_mask_cmpneq_epu32_mask(_cvtu32_mask16(C), A, B);9599}9600 9601TEST_CONSTEXPR(_cvtu32_mask16(0xCAFE) == (__mmask16)0xCAFE);9602TEST_CONSTEXPR(_cvtu32_mask16(_cvtmask16_u32((__mmask16)0x1357)) == (__mmask16)0x1357);9603 9604__mmask16 test_load_mask16(__mmask16 *A, __m512i B, __m512i C) {9605 // CHECK-LABEL: test_load_mask169606 // CHECK: [[LOAD:%.*]] = load i16, ptr %{{.*}}{{$}}9607 // CHECK: bitcast i16 [[LOAD]] to <16 x i1>9608 return _mm512_mask_cmpneq_epu32_mask(_load_mask16(A), B, C);9609}9610 9611void test_store_mask16(__mmask16 *A, __m512i B, __m512i C) {9612 // CHECK-LABEL: test_store_mask169613 // CHECK: bitcast <16 x i1> %{{.*}} to i169614 // CHECK: store i16 %{{.*}}, ptr %{{.*}}9615 _store_mask16(A, _mm512_cmpneq_epu32_mask(B, C));9616}9617 9618void test_mm512_stream_si512(__m512i * __P, __m512i __A) {9619 // CHECK-LABEL: test_mm512_stream_si5129620 // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL:![0-9]+]]9621 _mm512_stream_si512(__P, __A); 9622}9623 9624void test_mm512_stream_si512_2(void * __P, __m512i __A) {9625 // CHECK-LABEL: test_mm512_stream_si5129626 // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]9627 _mm512_stream_si512(__P, __A); 9628}9629 9630__m512i test_mm512_stream_load_si512(void *__P) {9631 // CHECK-LABEL: test_mm512_stream_load_si5129632 // CHECK: load <8 x i64>, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]{{$}}9633 return _mm512_stream_load_si512(__P); 9634}9635 9636__m512i test_mm512_stream_load_si512_const(void const *__P) {9637 // CHECK-LABEL: test_mm512_stream_load_si512_const9638 // CHECK: load <8 x i64>, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]{{$}}9639 return _mm512_stream_load_si512(__P); 9640}9641 9642void test_mm512_stream_pd(double *__P, __m512d __A) {9643 // CHECK-LABEL: test_mm512_stream_pd9644 // CHECK: store <8 x double> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]9645 return _mm512_stream_pd(__P, __A); 9646}9647 9648void test_mm512_stream_pd_2(void *__P, __m512d __A) {9649 // CHECK-LABEL: test_mm512_stream_pd9650 // CHECK: store <8 x double> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]9651 return _mm512_stream_pd(__P, __A); 9652}9653 9654void test_mm512_stream_ps(float *__P, __m512 __A) {9655 // CHECK-LABEL: test_mm512_stream_ps9656 // CHECK: store <16 x float> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]9657 _mm512_stream_ps(__P, __A); 9658}9659 9660void test_mm512_stream_ps_2(void *__P, __m512 __A) {9661 // CHECK-LABEL: test_mm512_stream_ps9662 // CHECK: store <16 x float> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]9663 _mm512_stream_ps(__P, __A); 9664}9665__m512d test_mm512_mask_compress_pd(__m512d __W, __mmask8 __U, __m512d __A) {9666 // CHECK-LABEL: test_mm512_mask_compress_pd9667 // CHECK: @llvm.x86.avx512.mask.compress9668 return _mm512_mask_compress_pd(__W, __U, __A); 9669}9670 9671__m512d test_mm512_maskz_compress_pd(__mmask8 __U, __m512d __A) {9672 // CHECK-LABEL: test_mm512_maskz_compress_pd9673 // CHECK: @llvm.x86.avx512.mask.compress9674 return _mm512_maskz_compress_pd(__U, __A); 9675}9676 9677__m512i test_mm512_mask_compress_epi64(__m512i __W, __mmask8 __U, __m512i __A) {9678 // CHECK-LABEL: test_mm512_mask_compress_epi649679 // CHECK: @llvm.x86.avx512.mask.compress9680 return _mm512_mask_compress_epi64(__W, __U, __A); 9681}9682 9683__m512i test_mm512_maskz_compress_epi64(__mmask8 __U, __m512i __A) {9684 // CHECK-LABEL: test_mm512_maskz_compress_epi649685 // CHECK: @llvm.x86.avx512.mask.compress9686 return _mm512_maskz_compress_epi64(__U, __A); 9687}9688 9689__m512 test_mm512_mask_compress_ps(__m512 __W, __mmask16 __U, __m512 __A) {9690 // CHECK-LABEL: test_mm512_mask_compress_ps9691 // CHECK: @llvm.x86.avx512.mask.compress9692 return _mm512_mask_compress_ps(__W, __U, __A); 9693}9694 9695__m512 test_mm512_maskz_compress_ps(__mmask16 __U, __m512 __A) {9696 // CHECK-LABEL: test_mm512_maskz_compress_ps9697 // CHECK: @llvm.x86.avx512.mask.compress9698 return _mm512_maskz_compress_ps(__U, __A); 9699}9700 9701__m512i test_mm512_mask_compress_epi32(__m512i __W, __mmask16 __U, __m512i __A) {9702 // CHECK-LABEL: test_mm512_mask_compress_epi329703 // CHECK: @llvm.x86.avx512.mask.compress9704 return _mm512_mask_compress_epi32(__W, __U, __A); 9705}9706 9707__m512i test_mm512_maskz_compress_epi32(__mmask16 __U, __m512i __A) {9708 // CHECK-LABEL: test_mm512_maskz_compress_epi329709 // CHECK: @llvm.x86.avx512.mask.compress9710 return _mm512_maskz_compress_epi32(__U, __A); 9711}9712 9713__mmask8 test_mm_cmp_round_ss_mask(__m128 __X, __m128 __Y) {9714 // CHECK-LABEL: test_mm_cmp_round_ss_mask9715 // CHECK: @llvm.x86.avx512.mask.cmp9716 return _mm_cmp_round_ss_mask(__X, __Y, _CMP_NLT_US, _MM_FROUND_NO_EXC);9717}9718 9719__mmask8 test_mm_mask_cmp_round_ss_mask(__mmask8 __M, __m128 __X, __m128 __Y) {9720 // CHECK-LABEL: test_mm_mask_cmp_round_ss_mask9721 // CHECK: @llvm.x86.avx512.mask.cmp9722 return _mm_mask_cmp_round_ss_mask(__M, __X, __Y, _CMP_NLT_US, _MM_FROUND_NO_EXC);9723}9724 9725__mmask8 test_mm_cmp_ss_mask(__m128 __X, __m128 __Y) {9726 // CHECK-LABEL: test_mm_cmp_ss_mask9727 // CHECK: @llvm.x86.avx512.mask.cmp9728 return _mm_cmp_ss_mask(__X, __Y, _CMP_NLT_US);9729}9730 9731__mmask8 test_mm_mask_cmp_ss_mask(__mmask8 __M, __m128 __X, __m128 __Y) {9732 // CHECK-LABEL: test_mm_mask_cmp_ss_mask9733 // CHECK: @llvm.x86.avx512.mask.cmp9734 return _mm_mask_cmp_ss_mask(__M, __X, __Y, _CMP_NLT_US);9735}9736 9737__mmask8 test_mm_cmp_round_sd_mask(__m128d __X, __m128d __Y) {9738 // CHECK-LABEL: test_mm_cmp_round_sd_mask9739 // CHECK: @llvm.x86.avx512.mask.cmp9740 return _mm_cmp_round_sd_mask(__X, __Y, _CMP_NLT_US, _MM_FROUND_NO_EXC);9741}9742 9743__mmask8 test_mm_mask_cmp_round_sd_mask(__mmask8 __M, __m128d __X, __m128d __Y) {9744 // CHECK-LABEL: test_mm_mask_cmp_round_sd_mask9745 // CHECK: @llvm.x86.avx512.mask.cmp9746 return _mm_mask_cmp_round_sd_mask(__M, __X, __Y, _CMP_NLT_US, _MM_FROUND_NO_EXC);9747}9748 9749__mmask8 test_mm_cmp_sd_mask(__m128d __X, __m128d __Y) {9750 // CHECK-LABEL: test_mm_cmp_sd_mask9751 // CHECK: @llvm.x86.avx512.mask.cmp9752 return _mm_cmp_sd_mask(__X, __Y, _CMP_NLT_US);9753}9754 9755__mmask8 test_mm_mask_cmp_sd_mask(__mmask8 __M, __m128d __X, __m128d __Y) {9756 // CHECK-LABEL: test_mm_mask_cmp_sd_mask9757 // CHECK: @llvm.x86.avx512.mask.cmp9758 return _mm_mask_cmp_sd_mask(__M, __X, __Y, _CMP_NLT_US);9759}9760 9761__m512 test_mm512_movehdup_ps(__m512 __A) {9762 // CHECK-LABEL: test_mm512_movehdup_ps9763 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>9764 return _mm512_movehdup_ps(__A);9765}9766TEST_CONSTEXPR(match_m512(_mm512_movehdup_ps((__m512){+1.0f,-1.0f,+2.0f,-2.0f,+3.0f,-3.0f,+4.0f,-4.0f,+5.0f,-5.0f,+6.0f,-6.0f,+7.0f,-7.0f,+8.0f,-8.0f}), -1.0f, -1.0f, -2.0f, -2.0f, -3.0f, -3.0f, -4.0f, -4.0f, -5.0f, -5.0f, -6.0f, -6.0f, -7.0f, -7.0f, -8.0f, -8.0f));9767 9768__m512 test_mm512_mask_movehdup_ps(__m512 __W, __mmask16 __U, __m512 __A) {9769 // CHECK-LABEL: test_mm512_mask_movehdup_ps9770 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>9771 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}9772 return _mm512_mask_movehdup_ps(__W, __U, __A);9773}9774 9775__m512 test_mm512_maskz_movehdup_ps(__mmask16 __U, __m512 __A) {9776 // CHECK-LABEL: test_mm512_maskz_movehdup_ps9777 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>9778 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}9779 return _mm512_maskz_movehdup_ps(__U, __A);9780}9781 9782__m512 test_mm512_moveldup_ps(__m512 __A) {9783 // CHECK-LABEL: test_mm512_moveldup_ps9784 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>9785 return _mm512_moveldup_ps(__A);9786}9787TEST_CONSTEXPR(match_m512(_mm512_moveldup_ps((__m512){+1.0f,-1.0f,+2.0f,-2.0f,+3.0f,-3.0f,+4.0f,-4.0f,+5.0f,-5.0f,+6.0f,-6.0f,+7.0f,-7.0f,+8.0f,-8.0f}), +1.0f, +1.0f, +2.0f, +2.0f, +3.0f, +3.0f, +4.0f, +4.0f, +5.0f, +5.0f, +6.0f, +6.0f, +7.0f, +7.0f, +8.0f, +8.0f));9788 9789__m512 test_mm512_mask_moveldup_ps(__m512 __W, __mmask16 __U, __m512 __A) {9790 // CHECK-LABEL: test_mm512_mask_moveldup_ps9791 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>9792 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}9793 return _mm512_mask_moveldup_ps(__W, __U, __A);9794}9795 9796__m512 test_mm512_maskz_moveldup_ps(__mmask16 __U, __m512 __A) {9797 // CHECK-LABEL: test_mm512_maskz_moveldup_ps9798 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>9799 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}9800 return _mm512_maskz_moveldup_ps(__U, __A);9801}9802 9803__m512i test_mm512_shuffle_epi32(__m512i __A) {9804 // CHECK-LABEL: test_mm512_shuffle_epi329805 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4, i32 9, i32 8, i32 8, i32 8, i32 13, i32 12, i32 12, i32 12>9806 return _mm512_shuffle_epi32(__A, 1); 9807}9808TEST_CONSTEXPR(match_v16si(_mm512_shuffle_epi32((((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15})), 1), 1,0,0,0, 5,4,4,4, 9,8,8,8, 13,12,12,12));9809__m512i test_mm512_mask_shuffle_epi32(__m512i __W, __mmask16 __U, __m512i __A) {9810 // CHECK-LABEL: test_mm512_mask_shuffle_epi329811 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4, i32 9, i32 8, i32 8, i32 8, i32 13, i32 12, i32 12, i32 12>9812 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}9813 return _mm512_mask_shuffle_epi32(__W, __U, __A, 1); 9814}9815TEST_CONSTEXPR(match_v16si(_mm512_mask_shuffle_epi32(((__m512i)(__v16si){100,101,102,103,104,105,106,107,200,201,202,203,204,205,206,207}), 0xFFFFu, ((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}), 1), 1,0,0,0, 5,4,4,4, 9,8,8,8, 13,12,12,12));9816TEST_CONSTEXPR(match_v16si(_mm512_mask_shuffle_epi32(((__m512i)(__v16si){100,101,102,103,104,105,106,107,200,201,202,203,204,205,206,207}), 0x0000u, ((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}), 1), 100,101,102,103,104,105,106,107,200,201,202,203,204,205,206,207));9817TEST_CONSTEXPR(match_v16si(_mm512_mask_shuffle_epi32(((__m512i)(__v16si){100,101,102,103,104,105,106,107,200,201,202,203,204,205,206,207}), 0x00FFu, ((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}), 1), 1,0,0,0, 5,4,4,4, 200,201,202,203,204,205,206,207));9818__m512i test_mm512_maskz_shuffle_epi32(__mmask16 __U, __m512i __A) {9819 // CHECK-LABEL: test_mm512_maskz_shuffle_epi329820 // CHECK: shufflevector <16 x i32> %{{.*}}, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4, i32 9, i32 8, i32 8, i32 8, i32 13, i32 12, i32 12, i32 12>9821 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}9822 return _mm512_maskz_shuffle_epi32(__U, __A, 1); 9823}9824TEST_CONSTEXPR(match_v16si(_mm512_maskz_shuffle_epi32(0xFFFFu, ((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}), 1), 1,0,0,0, 5,4,4,4, 9,8,8,8, 13,12,12,12));9825TEST_CONSTEXPR(match_v16si(_mm512_maskz_shuffle_epi32(0x5555u, ((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}), 1), 1,0,0,0, 5,0,4,0, 9,0,8,0, 13,0,12,0));9826TEST_CONSTEXPR(match_v16si(_mm512_maskz_shuffle_epi32(0x8001u, ((__m512i)(__v16si){0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}), 1), 1,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,12));9827 9828__m512d test_mm512_mask_expand_pd(__m512d __W, __mmask8 __U, __m512d __A) {9829 // CHECK-LABEL: test_mm512_mask_expand_pd9830 // CHECK: @llvm.x86.avx512.mask.expand9831 return _mm512_mask_expand_pd(__W, __U, __A); 9832}9833 9834__m512d test_mm512_maskz_expand_pd(__mmask8 __U, __m512d __A) {9835 // CHECK-LABEL: test_mm512_maskz_expand_pd9836 // CHECK: @llvm.x86.avx512.mask.expand9837 return _mm512_maskz_expand_pd(__U, __A); 9838}9839 9840__m512i test_mm512_mask_expand_epi64(__m512i __W, __mmask8 __U, __m512i __A) {9841 // CHECK-LABEL: test_mm512_mask_expand_epi649842 // CHECK: @llvm.x86.avx512.mask.expand9843 return _mm512_mask_expand_epi64(__W, __U, __A); 9844}9845 9846__m512i test_mm512_maskz_expand_epi64(__mmask8 __U, __m512i __A) {9847 // CHECK-LABEL: test_mm512_maskz_expand_epi649848 // CHECK: @llvm.x86.avx512.mask.expand9849 return _mm512_maskz_expand_epi64(__U, __A); 9850}9851__m512i test_mm512_mask_expandloadu_epi64(__m512i __W, __mmask8 __U, void const *__P) {9852 // CHECK-LABEL: test_mm512_mask_expandloadu_epi649853 // CHECK: @llvm.masked.expandload.v8i64(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}})9854 return _mm512_mask_expandloadu_epi64(__W, __U, __P); 9855}9856 9857__m512i test_mm512_maskz_expandloadu_epi64(__mmask8 __U, void const *__P) {9858 // CHECK-LABEL: test_mm512_maskz_expandloadu_epi649859 // CHECK: @llvm.masked.expandload.v8i64(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}})9860 return _mm512_maskz_expandloadu_epi64(__U, __P); 9861}9862 9863__m512d test_mm512_mask_expandloadu_pd(__m512d __W, __mmask8 __U, void const *__P) {9864 // CHECK-LABEL: test_mm512_mask_expandloadu_pd9865 // CHECK: @llvm.masked.expandload.v8f64(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}})9866 return _mm512_mask_expandloadu_pd(__W, __U, __P); 9867}9868 9869__m512d test_mm512_maskz_expandloadu_pd(__mmask8 __U, void const *__P) {9870 // CHECK-LABEL: test_mm512_maskz_expandloadu_pd9871 // CHECK: @llvm.masked.expandload.v8f64(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}})9872 return _mm512_maskz_expandloadu_pd(__U, __P); 9873}9874 9875__m512i test_mm512_mask_expandloadu_epi32(__m512i __W, __mmask16 __U, void const *__P) {9876 // CHECK-LABEL: test_mm512_mask_expandloadu_epi329877 // CHECK: @llvm.masked.expandload.v16i32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}})9878 return _mm512_mask_expandloadu_epi32(__W, __U, __P); 9879}9880 9881__m512i test_mm512_maskz_expandloadu_epi32(__mmask16 __U, void const *__P) {9882 // CHECK-LABEL: test_mm512_maskz_expandloadu_epi329883 // CHECK: @llvm.masked.expandload.v16i32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}})9884 return _mm512_maskz_expandloadu_epi32(__U, __P); 9885}9886 9887__m512 test_mm512_mask_expandloadu_ps(__m512 __W, __mmask16 __U, void const *__P) {9888 // CHECK-LABEL: test_mm512_mask_expandloadu_ps9889 // CHECK: @llvm.masked.expandload.v16f32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}})9890 return _mm512_mask_expandloadu_ps(__W, __U, __P); 9891}9892 9893__m512 test_mm512_maskz_expandloadu_ps(__mmask16 __U, void const *__P) {9894 // CHECK-LABEL: test_mm512_maskz_expandloadu_ps9895 // CHECK: @llvm.masked.expandload.v16f32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}})9896 return _mm512_maskz_expandloadu_ps(__U, __P); 9897}9898 9899__m512 test_mm512_mask_expand_ps(__m512 __W, __mmask16 __U, __m512 __A) {9900 // CHECK-LABEL: test_mm512_mask_expand_ps9901 // CHECK: @llvm.x86.avx512.mask.expand9902 return _mm512_mask_expand_ps(__W, __U, __A); 9903}9904 9905__m512 test_mm512_maskz_expand_ps(__mmask16 __U, __m512 __A) {9906 // CHECK-LABEL: test_mm512_maskz_expand_ps9907 // CHECK: @llvm.x86.avx512.mask.expand9908 return _mm512_maskz_expand_ps(__U, __A); 9909}9910 9911__m512i test_mm512_mask_expand_epi32(__m512i __W, __mmask16 __U, __m512i __A) {9912 // CHECK-LABEL: test_mm512_mask_expand_epi329913 // CHECK: @llvm.x86.avx512.mask.expand9914 return _mm512_mask_expand_epi32(__W, __U, __A); 9915}9916 9917__m512i test_mm512_maskz_expand_epi32(__mmask16 __U, __m512i __A) {9918 // CHECK-LABEL: test_mm512_maskz_expand_epi329919 // CHECK: @llvm.x86.avx512.mask.expand9920 return _mm512_maskz_expand_epi32(__U, __A); 9921}9922__m512d test_mm512_cvt_roundps_pd(__m256 __A) {9923 // CHECK-LABEL: test_mm512_cvt_roundps_pd9924 // CHECK: @llvm.x86.avx512.mask.cvtps2pd.5129925 return _mm512_cvt_roundps_pd(__A, _MM_FROUND_NO_EXC);9926}9927 9928__m512d test_mm512_mask_cvt_roundps_pd(__m512d __W, __mmask8 __U, __m256 __A) {9929 // CHECK-LABEL: test_mm512_mask_cvt_roundps_pd9930 // CHECK: @llvm.x86.avx512.mask.cvtps2pd.5129931 return _mm512_mask_cvt_roundps_pd(__W, __U, __A, _MM_FROUND_NO_EXC);9932}9933 9934__m512d test_mm512_maskz_cvt_roundps_pd(__mmask8 __U, __m256 __A) {9935 // CHECK-LABEL: test_mm512_maskz_cvt_roundps_pd9936 // CHECK: @llvm.x86.avx512.mask.cvtps2pd.5129937 return _mm512_maskz_cvt_roundps_pd(__U, __A, _MM_FROUND_NO_EXC);9938}9939 9940__m512d test_mm512_cvtps_pd(__m256 __A) {9941 // CHECK-LABEL: test_mm512_cvtps_pd9942 // CHECK: fpext <8 x float> %{{.*}} to <8 x double>9943 return _mm512_cvtps_pd(__A); 9944}9945 9946TEST_CONSTEXPR(match_m512d(_mm512_cvtps_pd((__m256){0.0f, 1.0f, 2.0f, 4.0f, -8.0f, -16.0f, -32.0f, -64.0f}), 0.0, 1.0, 2.0, 4.0, -8.0, -16.0, -32.0, -64.0));9947 9948__m512d test_mm512_cvtpslo_pd(__m512 __A) {9949 // CHECK-LABEL: test_mm512_cvtpslo_pd9950 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>9951 // CHECK: fpext <8 x float> %{{.*}} to <8 x double>9952 return _mm512_cvtpslo_pd(__A);9953}9954 9955TEST_CONSTEXPR(match_m512d(_mm512_cvtpslo_pd((__m512){0.0f, 1.0f, 2.0f, 4.0f, -8.0f, -16.0f, -32.0f, -64.0f, -128.0f, -256.0f, -512.0f, -1024.0f, -2048.0f, -4096.0f, -8192.0f, -16384.0f}), 0.0, 1.0, 2.0, 4.0, -8.0, -16.0, -32.0, -64.0));9956 9957__m512d test_mm512_mask_cvtps_pd(__m512d __W, __mmask8 __U, __m256 __A) {9958 // CHECK-LABEL: test_mm512_mask_cvtps_pd9959 // CHECK: fpext <8 x float> %{{.*}} to <8 x double>9960 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9961 return _mm512_mask_cvtps_pd(__W, __U, __A); 9962}9963 9964TEST_CONSTEXPR(match_m512d(_mm512_mask_cvtps_pd(_mm512_set1_pd(-777.0), /*1010 1101=*/0xad, (__m256){0.0f, 1.0f, 2.0f, 4.0f, -8.0f, -16.0f, -32.0f, -64.0f}), 0.0, -777.0, 2.0, 4.0, -777.0, -16.0, -777.0, -64.0));9965 9966__m512d test_mm512_mask_cvtpslo_pd(__m512d __W, __mmask8 __U, __m512 __A) {9967 // CHECK-LABEL: test_mm512_mask_cvtpslo_pd9968 // CHECK: shufflevector <16 x float> %{{.*}}, <16 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>9969 // CHECK: fpext <8 x float> %{{.*}} to <8 x double>9970 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9971 return _mm512_mask_cvtpslo_pd(__W, __U, __A);9972}9973 9974TEST_CONSTEXPR(match_m512d(_mm512_mask_cvtpslo_pd(_mm512_set1_pd(-777.0), /*1010 1101=*/0xad, (__m512){0.0f, 1.0f, 2.0f, 4.0f, -8.0f, -16.0f, -32.0f, -64.0f, -128.0f, -256.0f, -512.0f, -1024.0f, -2048.0f, -4096.0f, -8192.0f, -16384.0f}), 0.0, -777.0, 2.0, 4.0, -777.0, -16.0, -777.0, -64.0));9975 9976 9977__m512d test_mm512_maskz_cvtps_pd(__mmask8 __U, __m256 __A) {9978 // CHECK-LABEL: test_mm512_maskz_cvtps_pd9979 // CHECK: fpext <8 x float> %{{.*}} to <8 x double>9980 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9981 return _mm512_maskz_cvtps_pd(__U, __A); 9982}9983 9984TEST_CONSTEXPR(match_m512d(_mm512_maskz_cvtps_pd(/*1010 1101=*/0xad, (__m256){0.0f, 1.0f, 2.0f, 4.0f, -8.0f, -16.0f, -32.0f, -64.0f}), 0.0, 0.0, 2.0, 4.0, 0.0, -16.0, 0.0, -64.0));9985 9986__m512d test_mm512_mask_mov_pd(__m512d __W, __mmask8 __U, __m512d __A) {9987 // CHECK-LABEL: test_mm512_mask_mov_pd9988 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9989 return _mm512_mask_mov_pd(__W, __U, __A); 9990}9991TEST_CONSTEXPR(match_m512d(_mm512_mask_mov_pd((__m512d){-8.0, -7.0, -6.0, -5.0, -4.0, -3.0, -2.0, -1.0}, 0xC3, (__m512d){+1.0, +2.0, +3.0, +4.0, +5.0, +6.0, +7.0, +8.0}), +1.0, +2.0, -6.0, -5.0, -4.0, -3.0, +7.0, +8.0));9992 9993__m512d test_mm512_maskz_mov_pd(__mmask8 __U, __m512d __A) {9994 // CHECK-LABEL: test_mm512_maskz_mov_pd9995 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}9996 return _mm512_maskz_mov_pd(__U, __A); 9997}9998TEST_CONSTEXPR(match_m512d(_mm512_maskz_mov_pd(0xC3, (__m512d){+1.0, +2.0, +3.0, +4.0, +5.0, +6.0, +7.0, +8.0}), +1.0, +2.0, +0.0, +0.0, +0.0, +0.0, +7.0, +8.0));9999 10000__m512 test_mm512_mask_mov_ps(__m512 __W, __mmask16 __U, __m512 __A) {10001 // CHECK-LABEL: test_mm512_mask_mov_ps10002 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10003 return _mm512_mask_mov_ps(__W, __U, __A); 10004}10005TEST_CONSTEXPR(match_m512(_mm512_mask_mov_ps((__m512){-16.0f, -15.0f, -14.0f, -13.0f, -12.0f, -11.0f, -10.0f, -9.0f, -8.0f, -7.0f, -6.0f, -5.0f, -4.0f, -3.0f, -2.0f, -1.0f}, 0x0FF0, (__m512){+1.0f, +2.0f, +3.0f, +4.0f, +5.0f, +6.0f, +7.0f, +8.0f, +9.0f, +10.0f, +11.0f, +12.0f, +13.0f, +14.0f, +15.0f, +16.0f}), -16.0f, -15.0f, -14.0f, -13.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, -4.0f, -3.0f, -2.0f, -1.0f));10006 10007__m512 test_mm512_maskz_mov_ps(__mmask16 __U, __m512 __A) {10008 // CHECK-LABEL: test_mm512_maskz_mov_ps10009 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10010 return _mm512_maskz_mov_ps(__U, __A); 10011}10012TEST_CONSTEXPR(match_m512(_mm512_maskz_mov_ps(0xF3F3, (__m512){+1.0f, +2.0f, +3.0f, +4.0f, +5.0f, +6.0f, +7.0f, +8.0f, +9.0f, +10.0f, +11.0f, +12.0f, +13.0f, +14.0f, +15.0f, +16.0f}), +1.0f, +2.0f, 0.0f, 0.0f, +5.0f, +6.0f, +7.0f, +8.0f, +9.0f, +10.0f, 0.0f, 0.0f, +13.0f, +14.0f, +15.0f, +16.0f));10013 10014void test_mm512_mask_compressstoreu_pd(void *__P, __mmask8 __U, __m512d __A) {10015 // CHECK-LABEL: test_mm512_mask_compressstoreu_pd10016 // CHECK: @llvm.masked.compressstore.v8f64(<8 x double> %{{.*}}, ptr %{{.*}}, <8 x i1> %{{.*}})10017 return _mm512_mask_compressstoreu_pd(__P, __U, __A); 10018}10019 10020void test_mm512_mask_compressstoreu_epi64(void *__P, __mmask8 __U, __m512i __A) {10021 // CHECK-LABEL: test_mm512_mask_compressstoreu_epi6410022 // CHECK: @llvm.masked.compressstore.v8i64(<8 x i64> %{{.*}}, ptr %{{.*}}, <8 x i1> %{{.*}})10023 return _mm512_mask_compressstoreu_epi64(__P, __U, __A); 10024}10025 10026void test_mm512_mask_compressstoreu_ps(void *__P, __mmask16 __U, __m512 __A) {10027 // CHECK-LABEL: test_mm512_mask_compressstoreu_ps10028 // CHECK: @llvm.masked.compressstore.v16f32(<16 x float> %{{.*}}, ptr %{{.*}}, <16 x i1> %{{.*}})10029 return _mm512_mask_compressstoreu_ps(__P, __U, __A); 10030}10031 10032void test_mm512_mask_compressstoreu_epi32(void *__P, __mmask16 __U, __m512i __A) {10033 // CHECK-LABEL: test_mm512_mask_compressstoreu_epi3210034 // CHECK: @llvm.masked.compressstore.v16i32(<16 x i32> %{{.*}}, ptr %{{.*}}, <16 x i1> %{{.*}})10035 return _mm512_mask_compressstoreu_epi32(__P, __U, __A); 10036}10037 10038__m256i test_mm512_cvtt_roundpd_epu32(__m512d __A) {10039 // CHECK-LABEL: test_mm512_cvtt_roundpd_epu3210040 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.51210041 return _mm512_cvtt_roundpd_epu32(__A, _MM_FROUND_NO_EXC);10042}10043 10044__m256i test_mm512_mask_cvtt_roundpd_epu32(__m256i __W, __mmask8 __U, __m512d __A) {10045 // CHECK-LABEL: test_mm512_mask_cvtt_roundpd_epu3210046 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.51210047 return _mm512_mask_cvtt_roundpd_epu32(__W, __U, __A, _MM_FROUND_NO_EXC);10048}10049 10050__m256i test_mm512_maskz_cvtt_roundpd_epu32(__mmask8 __U, __m512d __A) {10051 // CHECK-LABEL: test_mm512_maskz_cvtt_roundpd_epu3210052 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.51210053 return _mm512_maskz_cvtt_roundpd_epu32(__U, __A, _MM_FROUND_NO_EXC);10054}10055 10056__m256i test_mm512_cvttpd_epu32(__m512d __A) {10057 // CHECK-LABEL: test_mm512_cvttpd_epu3210058 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.51210059 return _mm512_cvttpd_epu32(__A); 10060}10061 10062__m256i test_mm512_mask_cvttpd_epu32(__m256i __W, __mmask8 __U, __m512d __A) {10063 // CHECK-LABEL: test_mm512_mask_cvttpd_epu3210064 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.51210065 return _mm512_mask_cvttpd_epu32(__W, __U, __A); 10066}10067 10068__m256i test_mm512_maskz_cvttpd_epu32(__mmask8 __U, __m512d __A) {10069 // CHECK-LABEL: test_mm512_maskz_cvttpd_epu3210070 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.51210071 return _mm512_maskz_cvttpd_epu32(__U, __A); 10072}10073 10074__m512 test_mm512_castpd_ps (__m512d __A)10075{10076 // CHECK-LABEL: test_mm512_castpd_ps 10077 // CHECK: bitcast <8 x double> %{{.}} to <16 x float>10078 return _mm512_castpd_ps (__A);10079}10080 10081__m512d test_mm512_castps_pd (__m512 __A)10082{10083 // CHECK-LABEL: test_mm512_castps_pd 10084 // CHECK: bitcast <16 x float> %{{.}} to <8 x double>10085 return _mm512_castps_pd (__A);10086}10087 10088__m512i test_mm512_castpd_si512 (__m512d __A)10089{10090 // CHECK-LABEL: test_mm512_castpd_si512 10091 // CHECK: bitcast <8 x double> %{{.}} to <8 x i64>10092 return _mm512_castpd_si512 (__A);10093}10094 10095__m512 test_mm512_castps128_ps512(__m128 __A) {10096 // CHECK-LABEL: test_mm512_castps128_ps51210097 // CHECK: [[B:%.*]] = freeze <8 x float> poison10098 // CHECK: store <8 x float> [[B]], ptr [[BA:%.*]]10099 // CHECK: [[A:%.*]] = freeze <4 x float> poison 10100 // CHECK: [[SV:%.*]] = shufflevector <4 x float> %{{.*}}, <4 x float> [[A]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10101 // CHECK: [[C:%.*]] = load <8 x float>, ptr [[BA]]10102 // CHECK: shufflevector <8 x float> [[SV]], <8 x float> [[C]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10103 return _mm512_castps128_ps512(__A); 10104}10105 10106__m512d test_mm512_castpd128_pd512(__m128d __A) {10107 // CHECK-LABEL: test_mm512_castpd128_pd51210108 // CHECK: [[B:%.*]] = freeze <4 x double> poison10109 // CHECK: store <4 x double> [[B]], ptr [[BA:%.*]]10110 // CHECK: [[A:%.*]] = freeze <2 x double> poison 10111 // CHECK: [[SV:%.*]] = shufflevector <2 x double> %{{.*}}, <2 x double> [[A]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10112 // CHECK: [[C:%.*]] = load <4 x double>, ptr [[BA]]10113 // CHECK: shufflevector <4 x double> [[SV]], <4 x double> [[C]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10114 return _mm512_castpd128_pd512(__A); 10115}10116 10117__m512i test_mm512_set1_epi8(char d)10118{10119 // CHECK-LABEL: test_mm512_set1_epi810120 // CHECK: insertelement <64 x i8> {{.*}}, i32 010121 // CHECK: insertelement <64 x i8> {{.*}}, i32 110122 // CHECK: insertelement <64 x i8> {{.*}}, i32 210123 // CHECK: insertelement <64 x i8> {{.*}}, i32 310124 // CHECK: insertelement <64 x i8> {{.*}}, i32 410125 // CHECK: insertelement <64 x i8> {{.*}}, i32 510126 // CHECK: insertelement <64 x i8> {{.*}}, i32 610127 // CHECK: insertelement <64 x i8> {{.*}}, i32 710128 // CHECK: insertelement <64 x i8> {{.*}}, i32 6310129 return _mm512_set1_epi8(d);10130}10131TEST_CONSTEXPR(match_v64qi(_mm512_set1_epi8(127), 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127));10132 10133__m512i test_mm512_set1_epi16(short d)10134{10135 // CHECK-LABEL: test_mm512_set1_epi1610136 // CHECK: insertelement <32 x i16> {{.*}}, i32 010137 // CHECK: insertelement <32 x i16> {{.*}}, i32 110138 // CHECK: insertelement <32 x i16> {{.*}}, i32 210139 // CHECK: insertelement <32 x i16> {{.*}}, i32 310140 // CHECK: insertelement <32 x i16> {{.*}}, i32 410141 // CHECK: insertelement <32 x i16> {{.*}}, i32 510142 // CHECK: insertelement <32 x i16> {{.*}}, i32 610143 // CHECK: insertelement <32 x i16> {{.*}}, i32 710144 // CHECK: insertelement <32 x i16> {{.*}}, i32 3110145 return _mm512_set1_epi16(d);10146}10147TEST_CONSTEXPR(match_v32hi(_mm512_set1_epi16(-511), -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511));10148 10149__m512i test_mm512_set1_epi32(int d)10150{10151 // CHECK-LABEL: test_mm512_set1_epi3210152 // CHECK: insertelement <16 x i32> {{.*}}, i32 010153 // CHECK: insertelement <16 x i32> {{.*}}, i32 110154 // CHECK: insertelement <16 x i32> {{.*}}, i32 210155 // CHECK: insertelement <16 x i32> {{.*}}, i32 310156 // CHECK: insertelement <16 x i32> {{.*}}, i32 410157 // CHECK: insertelement <16 x i32> {{.*}}, i32 510158 // CHECK: insertelement <16 x i32> {{.*}}, i32 610159 // CHECK: insertelement <16 x i32> {{.*}}, i32 1510160 return _mm512_set1_epi32(d);10161}10162TEST_CONSTEXPR(match_v16si(_mm512_set1_epi32(99), 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99));10163 10164__m512i test_mm512_set1_epi64(long long d)10165{10166 // CHECK-LABEL: test_mm512_set1_epi6410167 // CHECK: insertelement <8 x i64> {{.*}}, i32 010168 // CHECK: insertelement <8 x i64> {{.*}}, i32 110169 // CHECK: insertelement <8 x i64> {{.*}}, i32 210170 // CHECK: insertelement <8 x i64> {{.*}}, i32 310171 // CHECK: insertelement <8 x i64> {{.*}}, i32 410172 // CHECK: insertelement <8 x i64> {{.*}}, i32 510173 // CHECK: insertelement <8 x i64> {{.*}}, i32 610174 // CHECK: insertelement <8 x i64> {{.*}}, i32 710175 return _mm512_set1_epi64(d);10176}10177TEST_CONSTEXPR(match_v8di(_mm512_set1_epi64(-42), -42, -42, -42, -42, -42, -42, -42, -42));10178 10179__m512i test_mm512_set4_epi32 (int __A, int __B, int __C, int __D)10180{10181 // CHECK-LABEL: test_mm512_set4_epi32 10182 // CHECK: insertelement <16 x i32> {{.*}}, i32 1510183 return _mm512_set4_epi32 (__A,__B,__C,__D);10184}10185TEST_CONSTEXPR(match_v16si(_mm512_set4_epi32(10, 20, 30, 40), 40, 30, 20, 10, 40, 30, 20, 10, 40, 30, 20, 10, 40, 30, 20, 10));10186 10187__m512i test_mm512_set4_epi64 (long long __A, long long __B, long long __C, long long __D)10188{10189 // CHECK-LABEL: test_mm512_set4_epi64 10190 // CHECK: insertelement <8 x i64> {{.*}}, i32 710191 return _mm512_set4_epi64 (__A,__B,__C,__D);10192}10193TEST_CONSTEXPR(match_v8di(_mm512_set4_epi64(1, -3, 5, -7), -7, 5, -3, 1, -7, 5, -3, 1));10194 10195__m512d test_mm512_set4_pd (double __A, double __B, double __C, double __D)10196{10197 // CHECK-LABEL: test_mm512_set4_pd 10198 // CHECK: insertelement <8 x double> {{.*}}, i32 710199 return _mm512_set4_pd (__A,__B,__C,__D);10200}10201TEST_CONSTEXPR(match_m512d(_mm512_set4_pd(10.0, 20.0, 30.0, 40.0), 40.0, 30.0, 20.0, 10.0, 40.0, 30.0, 20.0, 10.0));10202 10203__m512 test_mm512_set4_ps (float __A, float __B, float __C, float __D)10204{10205 // CHECK-LABEL: test_mm512_set4_ps 10206 // CHECK: insertelement <16 x float> {{.*}}, i32 1510207 return _mm512_set4_ps (__A,__B,__C,__D);10208}10209TEST_CONSTEXPR(match_m512(_mm512_set4_ps(1.1f, 2.2f, 3.3f, 4.4f), 4.4f, 3.3f, 2.2f, 1.1f, 4.4f, 3.3f, 2.2f, 1.1f, 4.4f, 3.3f, 2.2f, 1.1f, 4.4f, 3.3f, 2.2f, 1.1f));10210 10211__m512i test_mm512_setr4_epi32(int e0, int e1, int e2, int e3)10212{10213 // CHECK-LABEL: test_mm512_setr4_epi3210214 // CHECK: insertelement <16 x i32> {{.*}}, i32 1510215 return _mm512_setr4_epi32(e0, e1, e2, e3);10216}10217 10218 __m512i test_mm512_setr4_epi64(long long e0, long long e1, long long e2, long long e3)10219{10220 // CHECK-LABEL: test_mm512_setr4_epi6410221 // CHECK: insertelement <8 x i64> {{.*}}, i32 710222 return _mm512_setr4_epi64(e0, e1, e2, e3);10223}10224 10225__m512d test_mm512_setr4_pd(double e0, double e1, double e2, double e3)10226{10227 // CHECK-LABEL: test_mm512_setr4_pd10228 // CHECK: insertelement <8 x double> {{.*}}, i32 710229 return _mm512_setr4_pd(e0,e1,e2,e3);10230}10231 10232 __m512 test_mm512_setr4_ps(float e0, float e1, float e2, float e3)10233{10234 // CHECK-LABEL: test_mm512_setr4_ps10235 // CHECK: insertelement <16 x float> {{.*}}, i32 1510236 return _mm512_setr4_ps(e0,e1,e2,e3);10237}10238 10239__m512d test_mm512_castpd256_pd512(__m256d a)10240{10241 // CHECK-LABEL: test_mm512_castpd256_pd51210242 // CHECK: [[A:%.*]] = freeze <4 x double> poison 10243 // CHECK: shufflevector <4 x double> %{{.}}, <4 x double> [[A]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10244 return _mm512_castpd256_pd512(a);10245}10246 10247__m256d test_mm512_castpd512_pd256 (__m512d __A)10248{10249 // CHECK-LABEL: test_mm512_castpd512_pd256 10250 // CHECK: shufflevector <8 x double> %{{.}}, <8 x double> %{{.}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>10251 return _mm512_castpd512_pd256 (__A);10252}10253 10254__m256 test_mm512_castps512_ps256 (__m512 __A)10255{10256 // CHECK-LABEL: test_mm512_castps512_ps256 10257 // CHECK: shufflevector <16 x float> %{{.}}, <16 x float> %{{.}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10258 return _mm512_castps512_ps256 (__A);10259}10260 10261TEST_CONSTEXPR(match_m256(_mm512_castps512_ps256((__m512){0.0f, 1.0f, 2.0f, 4.0f, -8.0f, -16.0f, -32.0f, -64.0f, -128.0f, -256.0f, -512.0f, -1024.0f, -2048.0f, -4096.0f, -8192.0f, -16384.0f}), 0.0f, 1.0f, 2.0f, 4.0f, -8.0f, -16.0f, -32.0f, -64.0f));10262 10263__m512i test_mm512_castps_si512 (__m512 __A)10264{10265 // CHECK-LABEL: test_mm512_castps_si512 10266 // CHECK: bitcast <16 x float> %{{.}} to <8 x i64>10267 return _mm512_castps_si512 (__A);10268}10269__m512i test_mm512_castsi128_si512(__m128i __A) {10270 // CHECK-LABEL: test_mm512_castsi128_si51210271 // CHECK: [[B:%.*]] = freeze <4 x i64> poison10272 // CHECK: store <4 x i64> [[B]], ptr [[BA:%.*]]10273 // CHECK: [[A:%.*]] = freeze <2 x i64> poison 10274 // CHECK: [[SV:%.*]] = shufflevector <2 x i64> %{{.*}}, <2 x i64> [[A]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>10275 // CHECK: [[C:%.*]] = load <4 x i64>, ptr [[BA]]10276 // CHECK: shufflevector <4 x i64> [[SV]], <4 x i64> [[C]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10277 return _mm512_castsi128_si512(__A); 10278}10279 10280__m512i test_mm512_castsi256_si512(__m256i __A) {10281 // CHECK-LABEL: test_mm512_castsi256_si51210282 // CHECK: [[A:%.*]] = freeze <4 x i64> poison 10283 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> [[A]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>10284 return _mm512_castsi256_si512(__A); 10285}10286 10287__m512 test_mm512_castsi512_ps (__m512i __A)10288{10289 // CHECK-LABEL: test_mm512_castsi512_ps 10290 // CHECK: bitcast <8 x i64> %{{.}} to <16 x float>10291 return _mm512_castsi512_ps (__A);10292}10293 10294__m512d test_mm512_castsi512_pd (__m512i __A)10295{10296 // CHECK-LABEL: test_mm512_castsi512_pd 10297 // CHECK: bitcast <8 x i64> %{{.}} to <8 x double>10298 return _mm512_castsi512_pd (__A);10299}10300 10301__m128i test_mm512_castsi512_si128 (__m512i __A)10302{10303 // CHECK-LABEL: test_mm512_castsi512_si128 10304 // CHECK: shufflevector <8 x i64> %{{.}}, <8 x i64> %{{.}}, <2 x i32> <i32 0, i32 1>10305 return _mm512_castsi512_si128 (__A);10306}10307 10308__m256i test_mm512_castsi512_si256 (__m512i __A)10309{10310 // CHECK-LABEL: test_mm512_castsi512_si256 10311 // CHECK: shufflevector <8 x i64> %{{.}}, <8 x i64> %{{.}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>10312 return _mm512_castsi512_si256 (__A);10313}10314 10315TEST_CONSTEXPR(match_v8si(_mm512_castsi512_si256((__m512i)(__v16si){0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384}), 0, 1, 2, 4, 8, 16, 32, 64));10316 10317__m128 test_mm_cvt_roundsd_ss(__m128 __A, __m128d __B) {10318 // CHECK-LABEL: test_mm_cvt_roundsd_ss10319 // CHECK: @llvm.x86.avx512.mask.cvtsd2ss.round10320 return _mm_cvt_roundsd_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10321}10322 10323__m128 test_mm_mask_cvt_roundsd_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128d __B) {10324 // CHECK-LABEL: test_mm_mask_cvt_roundsd_ss10325 // CHECK: @llvm.x86.avx512.mask.cvtsd2ss.round10326 return _mm_mask_cvt_roundsd_ss(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10327}10328 10329__m128 test_mm_maskz_cvt_roundsd_ss(__mmask8 __U, __m128 __A, __m128d __B) {10330 // CHECK-LABEL: test_mm_maskz_cvt_roundsd_ss10331 // CHECK: @llvm.x86.avx512.mask.cvtsd2ss.round10332 return _mm_maskz_cvt_roundsd_ss(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10333}10334 10335#ifdef __x86_64__10336__m128d test_mm_cvt_roundi64_sd(__m128d __A, long long __B) {10337 // CHECK-LABEL: test_mm_cvt_roundi64_sd10338 // CHECK: @llvm.x86.avx512.cvtsi2sd6410339 return _mm_cvt_roundi64_sd(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10340}10341 10342__m128d test_mm_cvt_roundsi64_sd(__m128d __A, long long __B) {10343 // CHECK-LABEL: test_mm_cvt_roundsi64_sd10344 // CHECK: @llvm.x86.avx512.cvtsi2sd6410345 return _mm_cvt_roundsi64_sd(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10346}10347#endif10348 10349__m128 test_mm_cvt_roundsi32_ss(__m128 __A, int __B) {10350 // CHECK-LABEL: test_mm_cvt_roundsi32_ss10351 // CHECK: @llvm.x86.avx512.cvtsi2ss3210352 return _mm_cvt_roundsi32_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10353}10354 10355__m128 test_mm_cvt_roundi32_ss(__m128 __A, int __B) {10356 // CHECK-LABEL: test_mm_cvt_roundi32_ss10357 // CHECK: @llvm.x86.avx512.cvtsi2ss3210358 return _mm_cvt_roundi32_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10359}10360 10361#ifdef __x86_64__10362__m128 test_mm_cvt_roundsi64_ss(__m128 __A, long long __B) {10363 // CHECK-LABEL: test_mm_cvt_roundsi64_ss10364 // CHECK: @llvm.x86.avx512.cvtsi2ss6410365 return _mm_cvt_roundsi64_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10366}10367 10368__m128 test_mm_cvt_roundi64_ss(__m128 __A, long long __B) {10369 // CHECK-LABEL: test_mm_cvt_roundi64_ss10370 // CHECK: @llvm.x86.avx512.cvtsi2ss6410371 return _mm_cvt_roundi64_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10372}10373#endif10374 10375__m128d test_mm_cvt_roundss_sd(__m128d __A, __m128 __B) {10376 // CHECK-LABEL: test_mm_cvt_roundss_sd10377 // CHECK: @llvm.x86.avx512.mask.cvtss2sd.round10378 return _mm_cvt_roundss_sd(__A, __B, _MM_FROUND_NO_EXC);10379}10380 10381__m128d test_mm_mask_cvt_roundss_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128 __B) {10382 // CHECK-LABEL: test_mm_mask_cvt_roundss_sd10383 // CHECK: @llvm.x86.avx512.mask.cvtss2sd.round10384 return _mm_mask_cvt_roundss_sd(__W, __U, __A, __B, _MM_FROUND_NO_EXC);10385}10386 10387__m128d test_mm_maskz_cvt_roundss_sd( __mmask8 __U, __m128d __A, __m128 __B) {10388 // CHECK-LABEL: test_mm_maskz_cvt_roundss_sd10389 // CHECK: @llvm.x86.avx512.mask.cvtss2sd.round10390 return _mm_maskz_cvt_roundss_sd( __U, __A, __B, _MM_FROUND_NO_EXC);10391}10392 10393__m128d test_mm_cvtu32_sd(__m128d __A, unsigned __B) {10394 // CHECK-LABEL: test_mm_cvtu32_sd10395 // CHECK: uitofp i32 %{{.*}} to double10396 // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 010397 return _mm_cvtu32_sd(__A, __B); 10398}10399 10400#ifdef __x86_64__10401__m128d test_mm_cvt_roundu64_sd(__m128d __A, unsigned long long __B) {10402 // CHECK-LABEL: test_mm_cvt_roundu64_sd10403 // CHECK: @llvm.x86.avx512.cvtusi642sd10404 return _mm_cvt_roundu64_sd(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10405}10406 10407__m128d test_mm_cvtu64_sd(__m128d __A, unsigned long long __B) {10408 // CHECK-LABEL: test_mm_cvtu64_sd10409 // CHECK: uitofp i64 %{{.*}} to double10410 // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 010411 return _mm_cvtu64_sd(__A, __B); 10412}10413#endif10414 10415__m128 test_mm_cvt_roundu32_ss(__m128 __A, unsigned __B) {10416 // CHECK-LABEL: test_mm_cvt_roundu32_ss10417 // CHECK: @llvm.x86.avx512.cvtusi2ss10418 return _mm_cvt_roundu32_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10419}10420 10421__m128 test_mm_cvtu32_ss(__m128 __A, unsigned __B) {10422 // CHECK-LABEL: test_mm_cvtu32_ss10423 // CHECK: uitofp i32 %{{.*}} to float10424 // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 010425 return _mm_cvtu32_ss(__A, __B); 10426}10427 10428#ifdef __x86_64__10429__m128 test_mm_cvt_roundu64_ss(__m128 __A, unsigned long long __B) {10430 // CHECK-LABEL: test_mm_cvt_roundu64_ss10431 // CHECK: @llvm.x86.avx512.cvtusi642ss10432 return _mm_cvt_roundu64_ss(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);10433}10434 10435__m128 test_mm_cvtu64_ss(__m128 __A, unsigned long long __B) {10436 // CHECK-LABEL: test_mm_cvtu64_ss10437 // CHECK: uitofp i64 %{{.*}} to float10438 // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 010439 return _mm_cvtu64_ss(__A, __B); 10440}10441#endif10442 10443__m512i test_mm512_mask_cvttps_epu32 (__m512i __W, __mmask16 __U, __m512 __A)10444{10445 // CHECK-LABEL: test_mm512_mask_cvttps_epu32 10446 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.51210447 return _mm512_mask_cvttps_epu32 (__W,__U,__A);10448}10449 10450__m512i test_mm512_maskz_cvttps_epu32 (__mmask16 __U, __m512 __A)10451{10452 // CHECK-LABEL: test_mm512_maskz_cvttps_epu32 10453 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.51210454 return _mm512_maskz_cvttps_epu32 (__U,__A);10455}10456 10457__m512 test_mm512_cvtepu32_ps (__m512i __A)10458{10459 // CHECK-LABEL: test_mm512_cvtepu32_ps 10460 // CHECK: uitofp <16 x i32> %{{.*}} to <16 x float>10461 return _mm512_cvtepu32_ps (__A);10462}10463 10464TEST_CONSTEXPR(match_m512(_mm512_cvtepu32_ps((__m512i)(__v16su){0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384}), 0.0f, 1.0f, 2.0f, 4.0f, 8.0f, 16.0f, 32.0f, 64.0f, 128.0f, 256.0f, 512.0f, 1024.0f, 2048.0f, 4096.0f, 8192.0f, 16384.0f));10465 10466__m512 test_mm512_mask_cvtepu32_ps (__m512 __W, __mmask16 __U, __m512i __A)10467{10468 // CHECK-LABEL: test_mm512_mask_cvtepu32_ps 10469 // CHECK: uitofp <16 x i32> %{{.*}} to <16 x float>10470 // CHECK: select <16 x i1> {{.*}}, <16 x float> {{.*}}, <16 x float> {{.*}}10471 return _mm512_mask_cvtepu32_ps (__W,__U,__A);10472}10473 10474TEST_CONSTEXPR(match_m512(_mm512_mask_cvtepu32_ps(_mm512_set1_ps(-777.0f), /*1010 1100 1010 1101=*/0xacad, (__m512i)(__v16su){0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384}), 0.0f, -777.0f, 2.0f, 4.0f, -777.0f, 16.0f, -777.0f, 64.0f, -777.0f, -777.0f, 512.0f, 1024.0f, -777.0f, 4096.0f, -777.0f, 16384.0f));10475 10476__m512 test_mm512_maskz_cvtepu32_ps (__mmask16 __U, __m512i __A)10477{10478 // CHECK-LABEL: test_mm512_maskz_cvtepu32_ps 10479 // CHECK: uitofp <16 x i32> %{{.*}} to <16 x float>10480 // CHECK: select <16 x i1> {{.*}}, <16 x float> {{.*}}, <16 x float> {{.*}}10481 return _mm512_maskz_cvtepu32_ps (__U,__A);10482}10483 10484TEST_CONSTEXPR(match_m512(_mm512_maskz_cvtepu32_ps(/*1010 1100 1010 1101=*/0xacad, (__m512i)(__v16su){0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384}), 0.0f, 0.0f, 2.0f, 4.0f, 0.0f, 16.0f, 0.0f, 64.0f, 0.0f, 0.0f, 512.0f, 1024.0f, 0.0f, 4096.0f, 0.0f, 16384.0f));10485 10486__m512d test_mm512_cvtepi32_pd (__m256i __A)10487{10488 // CHECK-LABEL: test_mm512_cvtepi32_pd10489 // CHECK: sitofp <8 x i32> %{{.*}} to <8 x double>10490 return _mm512_cvtepi32_pd (__A);10491}10492 10493TEST_CONSTEXPR(match_m512d(_mm512_cvtepi32_pd((__m256i)(__v8si){-8, -4, -2, -1, 0, 1, 2, 4}), -8.0, -4.0, -2.0, -1.0, 0.0, 1.0, 2.0, 4.0));10494 10495__m512d test_mm512_mask_cvtepi32_pd (__m512d __W, __mmask8 __U, __m256i __A)10496{10497 // CHECK-LABEL: test_mm512_mask_cvtepi32_pd10498 // CHECK: sitofp <8 x i32> %{{.*}} to <8 x double>10499 // CHECK: select <8 x i1> {{.*}}, <8 x double> {{.*}}, <8 x double> {{.*}}10500 return _mm512_mask_cvtepi32_pd (__W,__U,__A);10501}10502 10503TEST_CONSTEXPR(match_m512d(_mm512_mask_cvtepi32_pd(_mm512_set1_pd(-777.0), /*0101 1100=*/0x5c, (__m256i)(__v8si){-8, -4, -2, -1, 0, 1, 2, 4}), -777.0, -777.0, -2.0, -1.0, 0.0, -777.0, 2.0, -777.0));10504 10505__m512d test_mm512_maskz_cvtepi32_pd (__mmask8 __U, __m256i __A)10506{10507 // CHECK-LABEL: test_mm512_maskz_cvtepi32_pd10508 // CHECK: sitofp <8 x i32> %{{.*}} to <8 x double>10509 // CHECK: select <8 x i1> {{.*}}, <8 x double> {{.*}}, <8 x double> {{.*}}10510 return _mm512_maskz_cvtepi32_pd (__U,__A);10511}10512 10513TEST_CONSTEXPR(match_m512d(_mm512_maskz_cvtepi32_pd(/*0101 1100=*/0x5c, (__m256i)(__v8si){-8, -4, -2, -1, 0, 1, 2, 4}), 0.0, 0.0, -2.0, -1.0, 0.0, 0.0, 2.0, 0.0));10514 10515__m512d test_mm512_cvtepi32lo_pd (__m512i __A)10516{10517 // CHECK-LABEL: test_mm512_cvtepi32lo_pd10518 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>10519 // CHECK: sitofp <8 x i32> %{{.*}} to <8 x double>10520 return _mm512_cvtepi32lo_pd (__A);10521}10522 10523TEST_CONSTEXPR(match_m512d(_mm512_cvtepi32lo_pd((__m512i)(__v16si){-128, -64, -32, -16, -8, -4, -2, -1, 0, 1, 2, 4, 8, 16, 32, 64}), -128.0, -64.0, -32.0, -16.0, -8.0, -4.0, -2.0, -1.0));10524 10525__m512d test_mm512_mask_cvtepi32lo_pd (__m512d __W, __mmask8 __U, __m512i __A)10526{10527 // CHECK-LABEL: test_mm512_mask_cvtepi32lo_pd10528 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>10529 // CHECK: sitofp <8 x i32> %{{.*}} to <8 x double>10530 // CHECK: select <8 x i1> {{.*}}, <8 x double> {{.*}}, <8 x double> {{.*}}10531 return _mm512_mask_cvtepi32lo_pd (__W, __U, __A);10532}10533 10534TEST_CONSTEXPR(match_m512d(_mm512_mask_cvtepi32lo_pd(_mm512_set1_pd(-777.0), /*1010 1101=*/0xad, (__m512i)(__v16si){-128, -64, -32, -16, -8, -4, -2, -1, 0, 1, 2, 4, 8, 16, 32, 64}), -128.0, -777.0, -32.0, -16.0, -777.0, -4.0, -777.0, -1.0));10535 10536__m512 test_mm512_cvtepi32_ps (__m512i __A)10537{10538 // CHECK-LABEL: test_mm512_cvtepi32_ps 10539 // CHECK: sitofp <16 x i32> %{{.*}} to <16 x float>10540 return _mm512_cvtepi32_ps (__A);10541}10542 10543TEST_CONSTEXPR(match_m512(_mm512_cvtepi32_ps((__m512i)(__v16si){-128, -64, -32, -16, -8, -4, -2, -1, 0, 1, 2, 4, 8, 16, 32, 64}), -128.0f, -64.0f, -32.0f, -16.0f, -8.0f, -4.0f, -2.0f, -1.0f, 0.0f, 1.0f, 2.0f, 4.0f, 8.0f, 16.0f, 32.0f, 64.0f));10544 10545__m512 test_mm512_mask_cvtepi32_ps (__m512 __W, __mmask16 __U, __m512i __A)10546{10547 // CHECK-LABEL: test_mm512_mask_cvtepi32_ps 10548 // CHECK: sitofp <16 x i32> %{{.*}} to <16 x float>10549 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10550 return _mm512_mask_cvtepi32_ps (__W,__U,__A);10551}10552 10553TEST_CONSTEXPR(match_m512(_mm512_mask_cvtepi32_ps(_mm512_set1_ps(-777.0f), /*1010 1100 1010 1101=*/0xacad, (__m512i)(__v16si){-128, -64, -32, -16, -8, -4, -2, -1, 0, 1, 2, 4, 8, 16, 32, 64}), -128.0f, -777.0f, -32.0f, -16.0f, -777.0f, -4.0f, -777.0f, -1.0f, -777.0f, -777.0f, 2.0f, 4.0f, -777.0f, 16.0f, -777.0f, 64.0f));10554 10555__m512 test_mm512_maskz_cvtepi32_ps (__mmask16 __U, __m512i __A)10556{10557 // CHECK-LABEL: test_mm512_maskz_cvtepi32_ps 10558 // CHECK: sitofp <16 x i32> %{{.*}} to <16 x float>10559 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10560 return _mm512_maskz_cvtepi32_ps (__U,__A);10561}10562 10563TEST_CONSTEXPR(match_m512(_mm512_maskz_cvtepi32_ps(/*1010 1100 1010 1101=*/0xacad, (__m512i)(__v16si){-128, -64, -32, -16, -8, -4, -2, -1, 0, 1, 2, 4, 8, 16, 32, 64}), -128.0f, 0.0f, -32.0f, -16.0f, 0.0f, -4.0f, 0.0f, -1.0f, 0.0f, 0.0f, 2.0f, 4.0f, 0.0f, 16.0f, 0.0f, 64.0f));10564 10565__m512d test_mm512_cvtepu32_pd(__m256i __A)10566{10567 // CHECK-LABEL: test_mm512_cvtepu32_pd10568 // CHECK: uitofp <8 x i32> %{{.*}} to <8 x double>10569 return _mm512_cvtepu32_pd(__A);10570}10571 10572TEST_CONSTEXPR(match_m512d(_mm512_cvtepu32_pd((__m256i)(__v8su){0, 1, 2, 4, 8, 16, 32, 64}), 0.0, 1.0, 2.0, 4.0, 8.0, 16.0, 32.0, 64.0));10573 10574__m512d test_mm512_mask_cvtepu32_pd (__m512d __W, __mmask8 __U, __m256i __A)10575{10576 // CHECK-LABEL: test_mm512_mask_cvtepu32_pd10577 // CHECK: uitofp <8 x i32> %{{.*}} to <8 x double>10578 // CHECK: select <8 x i1> {{.*}}, <8 x double> {{.*}}, <8 x double> {{.*}}10579 return _mm512_mask_cvtepu32_pd (__W,__U,__A);10580}10581 10582TEST_CONSTEXPR(match_m512d(_mm512_mask_cvtepu32_pd(_mm512_set1_pd(-777.0), /*0101 1100=*/0x5c, (__m256i)(__v8su){0, 1, 2, 4, 8, 16, 32, 64}), -777.0, -777.0, 2.0, 4.0, 8.0, -777.0, 32.0, -777.0));10583 10584__m512d test_mm512_maskz_cvtepu32_pd (__mmask8 __U, __m256i __A)10585{10586 // CHECK-LABEL: test_mm512_maskz_cvtepu32_pd10587 // CHECK: uitofp <8 x i32> %{{.*}} to <8 x double>10588 // CHECK: select <8 x i1> {{.*}}, <8 x double> {{.*}}, <8 x double> {{.*}}10589 return _mm512_maskz_cvtepu32_pd (__U,__A);10590}10591 10592TEST_CONSTEXPR(match_m512d(_mm512_maskz_cvtepu32_pd(/*0101 1100=*/0x5c, (__m256i)(__v8su){0, 1, 2, 4, 8, 16, 32, 64}), 0.0, 0.0, 2.0, 4.0, 8.0, 0.0, 32.0, 0.0));10593 10594__m512d test_mm512_cvtepu32lo_pd (__m512i __A)10595{10596 // CHECK-LABEL: test_mm512_cvtepu32lo_pd10597 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>10598 // CHECK: uitofp <8 x i32> %{{.*}} to <8 x double>10599 return _mm512_cvtepu32lo_pd (__A);10600}10601 10602TEST_CONSTEXPR(match_m512d(_mm512_cvtepu32lo_pd((__m512i)(__v16su){0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384}), 0.0, 1.0, 2.0, 4.0, 8.0, 16.0, 32.0, 64.0));10603 10604 10605__m512d test_mm512_mask_cvtepu32lo_pd (__m512d __W, __mmask8 __U, __m512i __A)10606{10607 // CHECK-LABEL: test_mm512_mask_cvtepu32lo_pd10608 // CHECK: shufflevector <8 x i64> %{{.*}}, <8 x i64> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>10609 // CHECK: uitofp <8 x i32> %{{.*}} to <8 x double>10610 // CHECK: select <8 x i1> {{.*}}, <8 x double> {{.*}}, <8 x double> {{.*}}10611 return _mm512_mask_cvtepu32lo_pd (__W, __U, __A);10612}10613 10614TEST_CONSTEXPR(match_m512d(_mm512_mask_cvtepu32lo_pd(_mm512_set1_pd(-777.0), /*1010 1101=*/0xad, (__m512i)(__v16su){0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384}), 0.0, -777.0, 2.0, 4.0, -777.0, 16.0, -777.0, 64.0));10615 10616__m256 test_mm512_cvtpd_ps (__m512d __A)10617{10618 // CHECK-LABEL: test_mm512_cvtpd_ps 10619 // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.51210620 return _mm512_cvtpd_ps (__A);10621}10622 10623__m256 test_mm512_mask_cvtpd_ps (__m256 __W, __mmask8 __U, __m512d __A)10624{10625 // CHECK-LABEL: test_mm512_mask_cvtpd_ps 10626 // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.51210627 return _mm512_mask_cvtpd_ps (__W,__U,__A);10628}10629 10630__m512 test_mm512_cvtpd_pslo(__m512d __A)10631{10632 // CHECK-LABEL: test_mm512_cvtpd_pslo10633 // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.51210634 // CHECK: zeroinitializer10635 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10636 return _mm512_cvtpd_pslo(__A);10637}10638 10639__m512 test_mm512_mask_cvtpd_pslo(__m512 __W, __mmask8 __U, __m512d __A) {10640 // CHECK-LABEL: test_mm512_mask_cvtpd_pslo10641 // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.51210642 // CHECK: zeroinitializer10643 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>10644 return _mm512_mask_cvtpd_pslo(__W, __U, __A);10645}10646 10647__m256 test_mm512_maskz_cvtpd_ps (__mmask8 __U, __m512d __A)10648{10649 // CHECK-LABEL: test_mm512_maskz_cvtpd_ps 10650 // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.51210651 return _mm512_maskz_cvtpd_ps (__U,__A);10652}10653 10654__m512 test_mm512_cvtph_ps (__m256i __A)10655{10656 // CHECK-LABEL: test_mm512_cvtph_ps 10657 // CHECK: bitcast <4 x i64> %{{.*}} to <16 x i16>10658 // CHECK: bitcast <16 x i16> %{{.*}} to <16 x half>10659 // CHECK: fpext <16 x half> %{{.*}} to <16 x float>10660 return _mm512_cvtph_ps (__A);10661}10662 10663__m512 test_mm512_mask_cvtph_ps (__m512 __W, __mmask16 __U, __m256i __A)10664{10665 // CHECK-LABEL: test_mm512_mask_cvtph_ps 10666 // CHECK: bitcast <4 x i64> %{{.*}} to <16 x i16>10667 // CHECK: bitcast <16 x i16> %{{.*}} to <16 x half>10668 // CHECK: fpext <16 x half> %{{.*}} to <16 x float>10669 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10670 return _mm512_mask_cvtph_ps (__W,__U,__A);10671}10672 10673__m512 test_mm512_maskz_cvtph_ps (__mmask16 __U, __m256i __A)10674{10675 // CHECK-LABEL: test_mm512_maskz_cvtph_ps 10676 // CHECK: bitcast <4 x i64> %{{.*}} to <16 x i16>10677 // CHECK: bitcast <16 x i16> %{{.*}} to <16 x half>10678 // CHECK: fpext <16 x half> %{{.*}} to <16 x float>10679 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10680 return _mm512_maskz_cvtph_ps (__U,__A);10681}10682 10683__m256i test_mm512_mask_cvttpd_epi32 (__m256i __W, __mmask8 __U, __m512d __A)10684{10685 // CHECK-LABEL: test_mm512_mask_cvttpd_epi32 10686 // CHECK: @llvm.x86.avx512.mask.cvttpd2dq.51210687 return _mm512_mask_cvttpd_epi32 (__W,__U,__A);10688}10689 10690__m256i test_mm512_maskz_cvttpd_epi32 (__mmask8 __U, __m512d __A)10691{10692 // CHECK-LABEL: test_mm512_maskz_cvttpd_epi32 10693 // CHECK: @llvm.x86.avx512.mask.cvttpd2dq.51210694 return _mm512_maskz_cvttpd_epi32 (__U,__A);10695}10696 10697__m512i test_mm512_mask_cvttps_epi32 (__m512i __W, __mmask16 __U, __m512 __A)10698{10699 // CHECK-LABEL: test_mm512_mask_cvttps_epi32 10700 // CHECK: @llvm.x86.avx512.mask.cvttps2dq.51210701 return _mm512_mask_cvttps_epi32 (__W,__U,__A);10702}10703 10704__m512i test_mm512_maskz_cvttps_epi32 (__mmask16 __U, __m512 __A)10705{10706 // CHECK-LABEL: test_mm512_maskz_cvttps_epi32 10707 // CHECK: @llvm.x86.avx512.mask.cvttps2dq.51210708 return _mm512_maskz_cvttps_epi32 (__U,__A);10709}10710 10711__m512i test_mm512_cvtps_epi32 (__m512 __A)10712{10713 // CHECK-LABEL: test_mm512_cvtps_epi32 10714 // CHECK: @llvm.x86.avx512.mask.cvtps2dq.51210715 return _mm512_cvtps_epi32 (__A);10716}10717 10718__m512i test_mm512_mask_cvtps_epi32 (__m512i __W, __mmask16 __U, __m512 __A)10719{10720 // CHECK-LABEL: test_mm512_mask_cvtps_epi32 10721 // CHECK: @llvm.x86.avx512.mask.cvtps2dq.51210722 return _mm512_mask_cvtps_epi32 (__W,__U,__A);10723}10724 10725__m512i test_mm512_maskz_cvtps_epi32 (__mmask16 __U, __m512 __A)10726{10727 // CHECK-LABEL: test_mm512_maskz_cvtps_epi32 10728 // CHECK: @llvm.x86.avx512.mask.cvtps2dq.51210729 return _mm512_maskz_cvtps_epi32 (__U,__A);10730}10731 10732__m256i test_mm512_cvtpd_epi32 (__m512d __A)10733{10734 // CHECK-LABEL: test_mm512_cvtpd_epi32 10735 // CHECK: @llvm.x86.avx512.mask.cvtpd2dq.51210736 return _mm512_cvtpd_epi32 (__A);10737}10738 10739__m256i test_mm512_mask_cvtpd_epi32 (__m256i __W, __mmask8 __U, __m512d __A)10740{10741 // CHECK-LABEL: test_mm512_mask_cvtpd_epi32 10742 // CHECK: @llvm.x86.avx512.mask.cvtpd2dq.51210743 return _mm512_mask_cvtpd_epi32 (__W,__U,__A);10744}10745 10746__m256i test_mm512_maskz_cvtpd_epi32 (__mmask8 __U, __m512d __A)10747{10748 // CHECK-LABEL: test_mm512_maskz_cvtpd_epi32 10749 // CHECK: @llvm.x86.avx512.mask.cvtpd2dq.51210750 return _mm512_maskz_cvtpd_epi32 (__U,__A);10751}10752 10753__m256i test_mm512_cvtpd_epu32 (__m512d __A)10754{10755 // CHECK-LABEL: test_mm512_cvtpd_epu32 10756 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.51210757 return _mm512_cvtpd_epu32 (__A);10758}10759 10760__m256i test_mm512_mask_cvtpd_epu32 (__m256i __W, __mmask8 __U, __m512d __A)10761{10762 // CHECK-LABEL: test_mm512_mask_cvtpd_epu32 10763 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.51210764 return _mm512_mask_cvtpd_epu32 (__W,__U,__A);10765}10766 10767__m256i test_mm512_maskz_cvtpd_epu32 (__mmask8 __U, __m512d __A)10768{10769 // CHECK-LABEL: test_mm512_maskz_cvtpd_epu32 10770 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.51210771 return _mm512_maskz_cvtpd_epu32 (__U,__A);10772}10773 10774__m256i test_mm512_mask_cvtps_ph(__m256i src, __mmask16 k, __m512 a) 10775{10776 // CHECK-LABEL: test_mm512_mask_cvtps_ph10777 // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.51210778 return _mm512_mask_cvtps_ph(src, k, a,_MM_FROUND_TO_ZERO);10779}10780 10781__m256i test_mm512_maskz_cvtps_ph (__mmask16 k, __m512 a) 10782{10783 // CHECK-LABEL: test_mm512_maskz_cvtps_ph10784 // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.51210785 return _mm512_maskz_cvtps_ph( k, a,_MM_FROUND_TO_ZERO);10786}10787 10788__m512i test_mm512_cvtps_epu32 ( __m512 __A) 10789{10790 // CHECK-LABEL: test_mm512_cvtps_epu3210791 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.51210792 return _mm512_cvtps_epu32(__A);10793}10794 10795__m512i test_mm512_mask_cvtps_epu32 (__m512i __W, __mmask16 __U, __m512 __A)10796{10797 // CHECK-LABEL: test_mm512_mask_cvtps_epu3210798 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.51210799 return _mm512_mask_cvtps_epu32( __W, __U, __A);10800}10801__m512i test_mm512_maskz_cvtps_epu32 (__mmask16 __U, __m512 __A)10802{10803 // CHECK-LABEL: test_mm512_maskz_cvtps_epu3210804 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.51210805 return _mm512_maskz_cvtps_epu32( __U, __A);10806}10807 10808double test_mm512_cvtsd_f64(__m512d A) {10809 // CHECK-LABEL: test_mm512_cvtsd_f6410810 // CHECK: extractelement <8 x double> %{{.*}}, i32 010811 return _mm512_cvtsd_f64(A);10812}10813 10814float test_mm512_cvtss_f32(__m512 A) {10815 // CHECK-LABEL: test_mm512_cvtss_f3210816 // CHECK: extractelement <16 x float> %{{.*}}, i32 010817 return _mm512_cvtss_f32(A);10818}10819 10820__m512d test_mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)10821{10822 // CHECK-LABEL: test_mm512_mask_max_pd 10823 // CHECK: @llvm.x86.avx512.max.pd.51210824 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}10825 return _mm512_mask_max_pd (__W,__U,__A,__B);10826}10827 10828__m512d test_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B)10829{10830 // CHECK-LABEL: test_mm512_maskz_max_pd 10831 // CHECK: @llvm.x86.avx512.max.pd.51210832 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}10833 return _mm512_maskz_max_pd (__U,__A,__B);10834}10835 10836__m512 test_mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)10837{10838 // CHECK-LABEL: test_mm512_mask_max_ps 10839 // CHECK: @llvm.x86.avx512.max.ps.51210840 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10841 return _mm512_mask_max_ps (__W,__U,__A,__B);10842}10843 10844__m512d test_mm512_mask_max_round_pd(__m512d __W,__mmask8 __U,__m512d __A,__m512d __B)10845{10846 // CHECK-LABEL: test_mm512_mask_max_round_pd10847 // CHECK: @llvm.x86.avx512.max.pd.51210848 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}10849 return _mm512_mask_max_round_pd(__W,__U,__A,__B,_MM_FROUND_NO_EXC);10850}10851 10852__m512d test_mm512_maskz_max_round_pd(__mmask8 __U,__m512d __A,__m512d __B)10853{10854 // CHECK-LABEL: test_mm512_maskz_max_round_pd10855 // CHECK: @llvm.x86.avx512.max.pd.51210856 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}10857 return _mm512_maskz_max_round_pd(__U,__A,__B,_MM_FROUND_NO_EXC);10858}10859 10860__m512d test_mm512_max_round_pd(__m512d __A,__m512d __B)10861{10862 // CHECK-LABEL: test_mm512_max_round_pd10863 // CHECK: @llvm.x86.avx512.max.pd.51210864 return _mm512_max_round_pd(__A,__B,_MM_FROUND_NO_EXC);10865}10866 10867__m512 test_mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B)10868{10869 // CHECK-LABEL: test_mm512_maskz_max_ps 10870 // CHECK: @llvm.x86.avx512.max.ps.51210871 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10872 return _mm512_maskz_max_ps (__U,__A,__B);10873}10874 10875__m512 test_mm512_mask_max_round_ps(__m512 __W,__mmask16 __U,__m512 __A,__m512 __B)10876{10877 // CHECK-LABEL: test_mm512_mask_max_round_ps10878 // CHECK: @llvm.x86.avx512.max.ps.51210879 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10880 return _mm512_mask_max_round_ps(__W,__U,__A,__B,_MM_FROUND_NO_EXC);10881}10882 10883__m512 test_mm512_maskz_max_round_ps(__mmask16 __U,__m512 __A,__m512 __B)10884{10885 // CHECK-LABEL: test_mm512_maskz_max_round_ps10886 // CHECK: @llvm.x86.avx512.max.ps.51210887 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10888 return _mm512_maskz_max_round_ps(__U,__A,__B,_MM_FROUND_NO_EXC);10889}10890 10891__m512 test_mm512_max_round_ps(__m512 __A,__m512 __B)10892{10893 // CHECK-LABEL: test_mm512_max_round_ps10894 // CHECK: @llvm.x86.avx512.max.ps.51210895 return _mm512_max_round_ps(__A,__B,_MM_FROUND_NO_EXC);10896}10897 10898__m512d test_mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)10899{10900 // CHECK-LABEL: test_mm512_mask_min_pd 10901 // CHECK: @llvm.x86.avx512.min.pd.51210902 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}10903 return _mm512_mask_min_pd (__W,__U,__A,__B);10904}10905 10906__m512d test_mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B)10907{10908 // CHECK-LABEL: test_mm512_maskz_min_pd 10909 // CHECK: @llvm.x86.avx512.min.pd.51210910 return _mm512_maskz_min_pd (__U,__A,__B);10911}10912 10913__m512d test_mm512_mask_min_round_pd(__m512d __W,__mmask8 __U,__m512d __A,__m512d __B)10914{10915 // CHECK-LABEL: test_mm512_mask_min_round_pd10916 // CHECK: @llvm.x86.avx512.min.pd.51210917 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}10918 return _mm512_mask_min_round_pd(__W,__U,__A,__B,_MM_FROUND_NO_EXC);10919}10920 10921__m512d test_mm512_maskz_min_round_pd(__mmask8 __U,__m512d __A,__m512d __B)10922{10923 // CHECK-LABEL: test_mm512_maskz_min_round_pd10924 // CHECK: @llvm.x86.avx512.min.pd.51210925 // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}10926 return _mm512_maskz_min_round_pd(__U,__A,__B,_MM_FROUND_NO_EXC);10927}10928 10929__m512d test_mm512_min_round_pd( __m512d __A,__m512d __B)10930{10931 // CHECK-LABEL: test_mm512_min_round_pd10932 // CHECK: @llvm.x86.avx512.min.pd.51210933 return _mm512_min_round_pd(__A,__B,_MM_FROUND_NO_EXC);10934}10935 10936__m512 test_mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)10937{10938 // CHECK-LABEL: test_mm512_mask_min_ps 10939 // CHECK: @llvm.x86.avx512.min.ps.51210940 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10941 return _mm512_mask_min_ps (__W,__U,__A,__B);10942}10943 10944__m512 test_mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B)10945{10946 // CHECK-LABEL: test_mm512_maskz_min_ps 10947 // CHECK: @llvm.x86.avx512.min.ps.51210948 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10949 return _mm512_maskz_min_ps (__U,__A,__B);10950}10951 10952__m512 test_mm512_mask_min_round_ps(__m512 __W,__mmask16 __U,__m512 __A,__m512 __B)10953{10954 // CHECK-LABEL: test_mm512_mask_min_round_ps10955 // CHECK: @llvm.x86.avx512.min.ps.51210956 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10957 return _mm512_mask_min_round_ps(__W,__U,__A,__B,_MM_FROUND_NO_EXC);10958}10959 10960__m512 test_mm512_maskz_min_round_ps(__mmask16 __U,__m512 __A,__m512 __B)10961{10962 // CHECK-LABEL: test_mm512_maskz_min_round_ps10963 // CHECK: @llvm.x86.avx512.min.ps.51210964 // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}10965 return _mm512_maskz_min_round_ps(__U,__A,__B,_MM_FROUND_NO_EXC);10966}10967 10968__m512 test_mm512_min_round_ps(__m512 __A,__m512 __B)10969{10970 // CHECK-LABEL: test_mm512_min_round_ps10971 // CHECK: @llvm.x86.avx512.min.ps.51210972 return _mm512_min_round_ps(__A,__B,_MM_FROUND_NO_EXC);10973}10974 10975__m512 test_mm512_mask_floor_ps (__m512 __W, __mmask16 __U, __m512 __A)10976{10977 // CHECK-LABEL: test_mm512_mask_floor_ps 10978 // CHECK: @llvm.x86.avx512.mask.rndscale.ps.51210979 return _mm512_mask_floor_ps (__W,__U,__A);10980}10981 10982__m512d test_mm512_mask_floor_pd (__m512d __W, __mmask8 __U, __m512d __A)10983{10984 // CHECK-LABEL: test_mm512_mask_floor_pd 10985 // CHECK: @llvm.x86.avx512.mask.rndscale.pd.51210986 return _mm512_mask_floor_pd (__W,__U,__A);10987}10988 10989__m512 test_mm512_mask_ceil_ps (__m512 __W, __mmask16 __U, __m512 __A)10990{10991 // CHECK-LABEL: test_mm512_mask_ceil_ps 10992 // CHECK: @llvm.x86.avx512.mask.rndscale.ps.51210993 return _mm512_mask_ceil_ps (__W,__U,__A);10994}10995 10996__m512d test_mm512_mask_ceil_pd (__m512d __W, __mmask8 __U, __m512d __A)10997{10998 // CHECK-LABEL: test_mm512_mask_ceil_pd 10999 // CHECK: @llvm.x86.avx512.mask.rndscale.pd.51211000 return _mm512_mask_ceil_pd (__W,__U,__A);11001}11002 11003__m512 test_mm512_mask_roundscale_ps(__m512 __W, __mmask16 __U, __m512 __A) 11004{11005 // CHECK-LABEL: test_mm512_mask_roundscale_ps11006 // CHECK: @llvm.x86.avx512.mask.rndscale.ps.51211007 return _mm512_mask_roundscale_ps(__W,__U,__A, 1);11008}11009 11010__m512 test_mm512_maskz_roundscale_ps(__mmask16 __U, __m512 __A) 11011{11012 // CHECK-LABEL: test_mm512_maskz_roundscale_ps11013 // CHECK: @llvm.x86.avx512.mask.rndscale.ps.51211014 return _mm512_maskz_roundscale_ps(__U,__A, 1);11015}11016 11017__m512 test_mm512_mask_roundscale_round_ps(__m512 __A,__mmask16 __U,__m512 __C)11018{11019 // CHECK-LABEL: test_mm512_mask_roundscale_round_ps11020 // CHECK: @llvm.x86.avx512.mask.rndscale.ps.51211021 return _mm512_mask_roundscale_round_ps(__A,__U,__C,_MM_FROUND_TO_ZERO,_MM_FROUND_NO_EXC);11022}11023 11024__m512 test_mm512_maskz_roundscale_round_ps(__m512 __A,__mmask16 __U) 11025{11026 // CHECK-LABEL: test_mm512_maskz_roundscale_round_ps11027 // CHECK: @llvm.x86.avx512.mask.rndscale.ps.51211028 return _mm512_maskz_roundscale_round_ps(__U,__A,_MM_FROUND_TO_ZERO,_MM_FROUND_NO_EXC);11029}11030 11031__m512 test_mm512_roundscale_round_ps(__m512 __A)11032{11033 // CHECK-LABEL: test_mm512_roundscale_round_ps11034 // CHECK: @llvm.x86.avx512.mask.rndscale.ps.51211035 return _mm512_roundscale_round_ps(__A,_MM_FROUND_TO_ZERO,_MM_FROUND_NO_EXC);11036}11037 11038__m512d test_mm512_mask_roundscale_pd(__m512d __W, __mmask8 __U, __m512d __A) 11039{11040 // CHECK-LABEL: test_mm512_mask_roundscale_pd11041 // CHECK: @llvm.x86.avx512.mask.rndscale.pd.51211042 return _mm512_mask_roundscale_pd(__W,__U,__A, 1);11043}11044 11045__m512d test_mm512_maskz_roundscale_pd(__mmask8 __U, __m512d __A) 11046{11047 // CHECK-LABEL: test_mm512_maskz_roundscale_pd11048 // CHECK: @llvm.x86.avx512.mask.rndscale.pd.51211049 return _mm512_maskz_roundscale_pd(__U,__A, 1);11050}11051 11052__m512d test_mm512_mask_roundscale_round_pd(__m512d __A,__mmask8 __U,__m512d __C)11053{11054 // CHECK-LABEL: test_mm512_mask_roundscale_round_pd11055 // CHECK: @llvm.x86.avx512.mask.rndscale.pd.51211056 return _mm512_mask_roundscale_round_pd(__A,__U,__C,_MM_FROUND_TO_ZERO,_MM_FROUND_NO_EXC);11057}11058 11059__m512d test_mm512_maskz_roundscale_round_pd(__m512d __A,__mmask8 __U)11060{11061 // CHECK-LABEL: test_mm512_maskz_roundscale_round_pd11062 // CHECK: @llvm.x86.avx512.mask.rndscale.pd.51211063 return _mm512_maskz_roundscale_round_pd(__U,__A,_MM_FROUND_TO_ZERO,_MM_FROUND_NO_EXC);11064}11065 11066__m512d test_mm512_roundscale_round_pd(__m512d __A)11067{11068 // CHECK-LABEL: test_mm512_roundscale_round_pd11069 // CHECK: @llvm.x86.avx512.mask.rndscale.pd.51211070 return _mm512_roundscale_round_pd(__A,_MM_FROUND_TO_ZERO,_MM_FROUND_NO_EXC);11071}11072 11073__m512i test_mm512_max_epi32 (__m512i __A, __m512i __B)11074{11075 // CHECK-LABEL: test_mm512_max_epi32 11076 // CHECK: call <16 x i32> @llvm.smax.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11077 return _mm512_max_epi32 (__A,__B);11078}11079 11080TEST_CONSTEXPR(match_v16si(_mm512_max_epi32((__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16}), +1, +2, +3, +4, +5, +6, +7, +8, +9, +10, +11, +12, +13, +14, +15, +16));11081 11082__m512i test_mm512_mask_max_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)11083{11084 // CHECK-LABEL: test_mm512_mask_max_epi32 11085 // CHECK: call <16 x i32> @llvm.smax.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11086 // CHECK: select <16 x i1> {{.*}}, <16 x i32> {{.*}}, <16 x i32> {{.*}}11087 return _mm512_mask_max_epi32 (__W,__M,__A,__B);11088}11089 11090TEST_CONSTEXPR(match_v16si(_mm512_mask_max_epi32((__m512i)(__v16si){-100, +200, -300, +400, -500, +600, -700, +800, -900, +1000, -1100, +1200, -1300, +1400, -1500, +1600}, 0x00FF, (__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16}), +1, +2, +3, +4, +5, +6, +7, +8, -900, +1000, -1100, +1200, -1300, +1400, -1500, +1600));11091 11092__m512i test_mm512_maskz_max_epi32 (__mmask16 __M, __m512i __A, __m512i __B)11093{11094 // CHECK-LABEL: test_mm512_maskz_max_epi32 11095 // CHECK: call <16 x i32> @llvm.smax.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11096 // CHECK: select <16 x i1> {{.*}}, <16 x i32> {{.*}}, <16 x i32> {{.*}}11097 return _mm512_maskz_max_epi32 (__M,__A,__B);11098}11099 11100TEST_CONSTEXPR(match_v16si(_mm512_maskz_max_epi32(0x00FF, (__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16}), +1, +2, +3, +4, +5, +6, +7, +8, 0, 0, 0, 0, 0, 0, 0, 0));11101 11102__m512i test_mm512_max_epi64 (__m512i __A, __m512i __B)11103{11104 // CHECK-LABEL: test_mm512_max_epi64 11105 // CHECK: call {{.*}}<8 x i64> @llvm.smax.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11106 return _mm512_max_epi64 (__A,__B);11107}11108 11109TEST_CONSTEXPR(match_v8di(_mm512_max_epi64((__m512i)(__v8di){+1, -2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7, +8}), +1, +2, +3, +4, +5, +6, +7, +8));11110 11111__m512i test_mm512_mask_max_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)11112{11113 // CHECK-LABEL: test_mm512_mask_max_epi64 11114 // CHECK: call {{.*}}<8 x i64> @llvm.smax.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11115 // CHECK: select <8 x i1> {{.*}}, <8 x i64> {{.*}}, <8 x i64> {{.*}}11116 return _mm512_mask_max_epi64 (__W,__M,__A,__B);11117}11118 11119TEST_CONSTEXPR(match_v8di(_mm512_mask_max_epi64((__m512i)(__v8di){-100, +200, -300, +400, -500, +600, -700, +800}, 0x0F, (__m512i)(__v8di){+1, -2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7, +8}), +1, +2, +3, +4, -500, +600, -700, +800));11120 11121__m512i test_mm512_maskz_max_epi64 (__mmask8 __M, __m512i __A, __m512i __B)11122{11123 // CHECK-LABEL: test_mm512_maskz_max_epi64 11124 // CHECK: call {{.*}}<8 x i64> @llvm.smax.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11125 // CHECK: select <8 x i1> {{.*}}, <8 x i64> {{.*}}, <8 x i64> {{.*}}11126 return _mm512_maskz_max_epi64 (__M,__A,__B);11127}11128 11129TEST_CONSTEXPR(match_v8di(_mm512_maskz_max_epi64(0x0F, (__m512i)(__v8di){+1, -2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7, +8}), +1, +2, +3, +4, 0, 0, 0, 0));11130 11131__m512i test_mm512_max_epu64 (__m512i __A, __m512i __B)11132{11133 // CHECK-LABEL: test_mm512_max_epu64 11134 // CHECK: call {{.*}}<8 x i64> @llvm.umax.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11135 return _mm512_max_epu64 (__A,__B);11136}11137 11138TEST_CONSTEXPR(match_m512i(_mm512_max_epu64((__m512i)(__v8du){1, 2, 3, 4, 8, 7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 4, 3, 3, 4, 8, 7, 7, 8));11139 11140__m512i test_mm512_mask_max_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)11141{11142 // CHECK-LABEL: test_mm512_mask_max_epu64 11143 // CHECK: call {{.*}}<8 x i64> @llvm.umax.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11144 // CHECK: select <8 x i1> {{.*}}, <8 x i64> {{.*}}, <8 x i64> {{.*}}11145 return _mm512_mask_max_epu64 (__W,__M,__A,__B);11146}11147 11148TEST_CONSTEXPR(match_m512i(_mm512_mask_max_epu64((__m512i)(__v8du){100, 200, 300, 400, 500, 600, 700, 800}, 0x0F, (__m512i)(__v8du){1, 2, 3, 4, 8, 7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 4, 3, 3, 4, 500, 600, 700, 800));11149 11150__m512i test_mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B)11151{11152 // CHECK-LABEL: test_mm512_maskz_max_epu64 11153 // CHECK: call {{.*}}<8 x i64> @llvm.umax.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11154 // CHECK: select <8 x i1> {{.*}}, <8 x i64> {{.*}}, <8 x i64> {{.*}}11155 return _mm512_maskz_max_epu64 (__M,__A,__B);11156}11157 11158TEST_CONSTEXPR(match_m512i(_mm512_maskz_max_epu64(0x0F, (__m512i)(__v8du){1, 2, 3, 4, 8, 7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 4, 3, 3, 4, 0, 0, 0, 0));11159 11160__m512i test_mm512_max_epu32 (__m512i __A, __m512i __B)11161{11162 // CHECK-LABEL: test_mm512_max_epu32 11163 // CHECK: call <16 x i32> @llvm.umax.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11164 return _mm512_max_epu32 (__A,__B);11165}11166 11167TEST_CONSTEXPR(match_v16su(_mm512_max_epu32((__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, (__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16));11168 11169__m512i test_mm512_mask_max_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)11170{11171 // CHECK-LABEL: test_mm512_mask_max_epu32 11172 // CHECK: call <16 x i32> @llvm.umax.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11173 // CHECK: select <16 x i1> {{.*}}, <16 x i32> {{.*}}, <16 x i32> {{.*}}11174 return _mm512_mask_max_epu32 (__W,__M,__A,__B);11175}11176 11177TEST_CONSTEXPR(match_v16su(_mm512_mask_max_epu32((__m512i)(__v16su){100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600}, 0x00FF, (__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, (__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 1, 2, 3, 4, 5, 6, 7, 8, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600));11178 11179__m512i test_mm512_maskz_max_epu32 (__mmask16 __M, __m512i __A, __m512i __B)11180{11181 // CHECK-LABEL: test_mm512_maskz_max_epu32 11182 // CHECK: call <16 x i32> @llvm.umax.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11183 // CHECK: select <16 x i1> {{.*}}, <16 x i32> {{.*}}, <16 x i32> {{.*}}11184 return _mm512_maskz_max_epu32 (__M,__A,__B);11185}11186 11187TEST_CONSTEXPR(match_v16su(_mm512_maskz_max_epu32(0x00FF, (__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, (__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 1, 2, 3, 4, 5, 6, 7, 8, 0, 0, 0, 0, 0, 0, 0, 0));11188 11189__m512i test_mm512_min_epi32 (__m512i __A, __m512i __B)11190{11191 // CHECK-LABEL: test_mm512_min_epi32 11192 // CHECK: call <16 x i32> @llvm.smin.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11193 return _mm512_min_epi32 (__A,__B);11194}11195 11196TEST_CONSTEXPR(match_v16si(_mm512_min_epi32((__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16}), -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15, -16));11197 11198__m512i test_mm512_mask_min_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)11199{11200 // CHECK-LABEL: test_mm512_mask_min_epi32 11201 // CHECK: call <16 x i32> @llvm.smin.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11202 // CHECK: select <16 x i1> {{.*}}, <16 x i32> {{.*}}, <16 x i32> {{.*}}11203 return _mm512_mask_min_epi32 (__W,__M,__A,__B);11204}11205 11206TEST_CONSTEXPR(match_v16si(_mm512_mask_min_epi32((__m512i)(__v16si){-100, +200, -300, +400, -500, +600, -700, +800, -900, +1000, -1100, +1200, -1300, +1400, -1500, +1600}, 0x00FF, (__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16}), -1, -2, -3, -4, -5, -6, -7, -8, -900, +1000, -1100, +1200, -1300, +1400, -1500, +1600));11207 11208__m512i test_mm512_maskz_min_epi32 (__mmask16 __M, __m512i __A, __m512i __B)11209{11210 // CHECK-LABEL: test_mm512_maskz_min_epi32 11211 // CHECK: call <16 x i32> @llvm.smin.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11212 // CHECK: select <16 x i1> {{.*}}, <16 x i32> {{.*}}, <16 x i32> {{.*}}11213 return _mm512_maskz_min_epi32 (__M,__A,__B);11214}11215 11216TEST_CONSTEXPR(match_v16si(_mm512_maskz_min_epi32(0x00FF, (__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16}), -1, -2, -3, -4, -5, -6, -7, -8, 0, 0, 0, 0, 0, 0, 0, 0));11217 11218__m512i test_mm512_min_epu32 (__m512i __A, __m512i __B)11219{11220 // CHECK-LABEL: test_mm512_min_epu32 11221 // CHECK: call <16 x i32> @llvm.umin.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11222 return _mm512_min_epu32 (__A,__B);11223}11224 11225TEST_CONSTEXPR(match_v16su(_mm512_min_epu32((__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, (__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15));11226 11227__m512i test_mm512_mask_min_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)11228{11229 // CHECK-LABEL: test_mm512_mask_min_epu32 11230 // CHECK: call <16 x i32> @llvm.umin.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11231 // CHECK: select <16 x i1> {{.*}}, <16 x i32> {{.*}}, <16 x i32> {{.*}}11232 return _mm512_mask_min_epu32 (__W,__M,__A,__B);11233}11234 11235TEST_CONSTEXPR(match_v16su(_mm512_mask_min_epu32((__m512i)(__v16su){100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600}, 0x00FF, (__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, (__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 0, 1, 2, 3, 4, 5, 6, 7, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600));11236 11237__m512i test_mm512_maskz_min_epu32 (__mmask16 __M, __m512i __A, __m512i __B)11238{11239 // CHECK-LABEL: test_mm512_maskz_min_epu32 11240 // CHECK: call <16 x i32> @llvm.umin.v16i32(<16 x i32> %{{.*}}, <16 x i32> %{{.*}})11241 // CHECK: select <16 x i1> {{.*}}, <16 x i32> {{.*}}, <16 x i32> {{.*}}11242 return _mm512_maskz_min_epu32 (__M,__A,__B);11243}11244 11245TEST_CONSTEXPR(match_v16su(_mm512_maskz_min_epu32(0x00FF, (__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, (__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 0, 1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0));11246 11247__m512i test_mm512_min_epi64 (__m512i __A, __m512i __B)11248{11249 // CHECK-LABEL: test_mm512_min_epi64 11250 // CHECK: call {{.*}}<8 x i64> @llvm.smin.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11251 return _mm512_min_epi64 (__A,__B);11252}11253 11254TEST_CONSTEXPR(match_v8di(_mm512_min_epi64((__m512i)(__v8di){+1, -2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7, +8}), -1, -2, -3, -4, -5, -6, -7, -8));11255 11256__m512i test_mm512_mask_min_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)11257{11258 // CHECK-LABEL: test_mm512_mask_min_epi64 11259 // CHECK: call {{.*}}<8 x i64> @llvm.smin.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11260 // CHECK: select <8 x i1> {{.*}}, <8 x i64> {{.*}}, <8 x i64> {{.*}}11261 return _mm512_mask_min_epi64 (__W,__M,__A,__B);11262}11263 11264TEST_CONSTEXPR(match_v8di(_mm512_mask_min_epi64((__m512i)(__v8di){-100, +200, -300, +400, -500, +600, -700, +800}, 0x0F, (__m512i)(__v8di){+1, -2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7, +8}), -1, -2, -3, -4, -500, +600, -700, +800));11265 11266__m512i test_mm512_maskz_min_epi64 (__mmask8 __M, __m512i __A, __m512i __B)11267{11268 // CHECK-LABEL: test_mm512_maskz_min_epi64 11269 // CHECK: call {{.*}}<8 x i64> @llvm.smin.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11270 // CHECK: select <8 x i1> {{.*}}, <8 x i64> {{.*}}, <8 x i64> {{.*}}11271 return _mm512_maskz_min_epi64 (__M,__A,__B);11272}11273 11274TEST_CONSTEXPR(match_v8di(_mm512_maskz_min_epi64(0x0F, (__m512i)(__v8di){+1, -2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7, +8}), -1, -2, -3, -4, 0, 0, 0, 0));11275 11276__m512i test_mm512_min_epu64 (__m512i __A, __m512i __B)11277{11278 // CHECK-LABEL: test_mm512_min_epu64 11279 // CHECK: call {{.*}}<8 x i64> @llvm.umin.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11280 return _mm512_min_epu64 (__A,__B);11281}11282 11283TEST_CONSTEXPR(match_m512i(_mm512_min_epu64((__m512i)(__v8du){1, 2, 3, 4, 8, 7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 1, 2, 2, 1, 5, 6, 6, 5));11284 11285__m512i test_mm512_mask_min_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)11286{11287 // CHECK-LABEL: test_mm512_mask_min_epu64 11288 // CHECK: call {{.*}}<8 x i64> @llvm.umin.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11289 // CHECK: select <8 x i1> {{.*}}, <8 x i64> {{.*}}, <8 x i64> {{.*}}11290 return _mm512_mask_min_epu64 (__W,__M,__A,__B);11291}11292 11293TEST_CONSTEXPR(match_m512i(_mm512_mask_min_epu64((__m512i)(__v8du){100, 200, 300, 400, 500, 600, 700, 800}, 0x0F, (__m512i)(__v8du){1, 2, 3, 4, 8, 7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 1, 2, 2, 1, 500, 600, 700, 800));11294 11295__m512i test_mm512_maskz_min_epu64 (__mmask8 __M, __m512i __A, __m512i __B)11296{11297 // CHECK-LABEL: test_mm512_maskz_min_epu64 11298 // CHECK: call {{.*}}<8 x i64> @llvm.umin.v8i64(<8 x i64> %{{.*}}, <8 x i64> %{{.*}})11299 // CHECK: select <8 x i1> {{.*}}, <8 x i64> {{.*}}, <8 x i64> {{.*}}11300 return _mm512_maskz_min_epu64 (__M,__A,__B);11301}11302 11303TEST_CONSTEXPR(match_m512i(_mm512_maskz_min_epu64(0x0F, (__m512i)(__v8du){1, 2, 3, 4, 8, 7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 1, 2, 2, 1, 0, 0, 0, 0));11304 11305__m512i test_mm512_mask_set1_epi32 (__m512i __O, __mmask16 __M, int __A)11306{11307 // CHECK-LABEL: test_mm512_mask_set1_epi3211308 // CHECK: insertelement <16 x i32> poison, i32 %{{.*}}, i32 011309 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 111310 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 211311 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 311312 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 411313 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 511314 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 611315 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 711316 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 811317 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 911318 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1011319 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1111320 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1211321 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1311322 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1411323 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1511324 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}11325 return _mm512_mask_set1_epi32 ( __O, __M, __A);11326}11327 11328TEST_CONSTEXPR(match_v16si(_mm512_mask_set1_epi32(_mm512_setzero_si512(), 0xAAAA, 13), 0,13,0,13,0,13,0,13,0,13,0,13,0,13,0,13));11329 11330__m512i test_mm512_maskz_set1_epi32(__mmask16 __M, int __A)11331{ 11332 // CHECK-LABEL: test_mm512_maskz_set1_epi3211333 // CHECK: insertelement <16 x i32> poison, i32 %{{.*}}, i32 011334 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 111335 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 211336 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 311337 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 411338 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 511339 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 611340 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 711341 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 811342 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 911343 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1011344 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1111345 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1211346 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1311347 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1411348 // CHECK: insertelement <16 x i32> %{{.*}}, i32 %{{.*}}, i32 1511349 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}11350 return _mm512_maskz_set1_epi32(__M, __A);11351}11352 11353TEST_CONSTEXPR(match_v16si(_mm512_maskz_set1_epi32(0xAAAA, 19), 0,19,0,19,0,19,0,19,0,19,0,19,0,19,0,19));11354 11355 11356__m512i test_mm512_set_epi8(char e63, char e62, char e61, char e60, char e59,11357 char e58, char e57, char e56, char e55, char e54, char e53, char e52,11358 char e51, char e50, char e49, char e48, char e47, char e46, char e45,11359 char e44, char e43, char e42, char e41, char e40, char e39, char e38,11360 char e37, char e36, char e35, char e34, char e33, char e32, char e31,11361 char e30, char e29, char e28, char e27, char e26, char e25, char e24,11362 char e23, char e22, char e21, char e20, char e19, char e18, char e17,11363 char e16, char e15, char e14, char e13, char e12, char e11, char e10,11364 char e9, char e8, char e7, char e6, char e5, char e4, char e3, char e2,11365 char e1, char e0) {11366 11367 //CHECK-LABEL: test_mm512_set_epi811368 //CHECK: load i8, ptr %{{.*}}, align 111369 //CHECK: load i8, ptr %{{.*}}, align 111370 //CHECK: load i8, ptr %{{.*}}, align 111371 //CHECK: load i8, ptr %{{.*}}, align 111372 //CHECK: load i8, ptr %{{.*}}, align 111373 //CHECK: load i8, ptr %{{.*}}, align 111374 //CHECK: load i8, ptr %{{.*}}, align 111375 //CHECK: load i8, ptr %{{.*}}, align 111376 //CHECK: load i8, ptr %{{.*}}, align 111377 //CHECK: load i8, ptr %{{.*}}, align 111378 //CHECK: load i8, ptr %{{.*}}, align 111379 //CHECK: load i8, ptr %{{.*}}, align 111380 //CHECK: load i8, ptr %{{.*}}, align 111381 //CHECK: load i8, ptr %{{.*}}, align 111382 //CHECK: load i8, ptr %{{.*}}, align 111383 //CHECK: load i8, ptr %{{.*}}, align 111384 //CHECK: load i8, ptr %{{.*}}, align 111385 //CHECK: load i8, ptr %{{.*}}, align 111386 //CHECK: load i8, ptr %{{.*}}, align 111387 //CHECK: load i8, ptr %{{.*}}, align 111388 //CHECK: load i8, ptr %{{.*}}, align 111389 //CHECK: load i8, ptr %{{.*}}, align 111390 //CHECK: load i8, ptr %{{.*}}, align 111391 //CHECK: load i8, ptr %{{.*}}, align 111392 //CHECK: load i8, ptr %{{.*}}, align 111393 //CHECK: load i8, ptr %{{.*}}, align 111394 //CHECK: load i8, ptr %{{.*}}, align 111395 //CHECK: load i8, ptr %{{.*}}, align 111396 //CHECK: load i8, ptr %{{.*}}, align 111397 //CHECK: load i8, ptr %{{.*}}, align 111398 //CHECK: load i8, ptr %{{.*}}, align 111399 //CHECK: load i8, ptr %{{.*}}, align 111400 //CHECK: load i8, ptr %{{.*}}, align 111401 //CHECK: load i8, ptr %{{.*}}, align 111402 //CHECK: load i8, ptr %{{.*}}, align 111403 //CHECK: load i8, ptr %{{.*}}, align 111404 //CHECK: load i8, ptr %{{.*}}, align 111405 //CHECK: load i8, ptr %{{.*}}, align 111406 //CHECK: load i8, ptr %{{.*}}, align 111407 //CHECK: load i8, ptr %{{.*}}, align 111408 //CHECK: load i8, ptr %{{.*}}, align 111409 //CHECK: load i8, ptr %{{.*}}, align 111410 //CHECK: load i8, ptr %{{.*}}, align 111411 //CHECK: load i8, ptr %{{.*}}, align 111412 //CHECK: load i8, ptr %{{.*}}, align 111413 //CHECK: load i8, ptr %{{.*}}, align 111414 //CHECK: load i8, ptr %{{.*}}, align 111415 //CHECK: load i8, ptr %{{.*}}, align 111416 //CHECK: load i8, ptr %{{.*}}, align 111417 //CHECK: load i8, ptr %{{.*}}, align 111418 //CHECK: load i8, ptr %{{.*}}, align 111419 //CHECK: load i8, ptr %{{.*}}, align 111420 //CHECK: load i8, ptr %{{.*}}, align 111421 //CHECK: load i8, ptr %{{.*}}, align 111422 //CHECK: load i8, ptr %{{.*}}, align 111423 //CHECK: load i8, ptr %{{.*}}, align 111424 //CHECK: load i8, ptr %{{.*}}, align 111425 //CHECK: load i8, ptr %{{.*}}, align 111426 //CHECK: load i8, ptr %{{.*}}, align 111427 //CHECK: load i8, ptr %{{.*}}, align 111428 //CHECK: load i8, ptr %{{.*}}, align 111429 //CHECK: load i8, ptr %{{.*}}, align 111430 //CHECK: load i8, ptr %{{.*}}, align 111431 //CHECK: load i8, ptr %{{.*}}, align 111432 return _mm512_set_epi8(e63, e62, e61, e60, e59, e58, e57, e56, e55, e54,11433 e53, e52, e51, e50, e49, e48,e47, e46, e45, e44, e43, e42, e41, e40,11434 e39, e38, e37, e36, e35, e34, e33, e32,e31, e30, e29, e28, e27, e26,11435 e25, e24, e23, e22, e21, e20, e19, e18, e17, e16, e15, e14, e13, e12,11436 e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0);11437}11438TEST_CONSTEXPR(match_v64qi(_mm512_set_epi8(63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, 50, 49, 48,11439 47, 46, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 11440 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16,11441 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,11442 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63));11443 11444__m512i test_mm512_set_epi16(short e31, short e30, short e29, short e28,11445 short e27, short e26, short e25, short e24, short e23, short e22,11446 short e21, short e20, short e19, short e18, short e17,11447 short e16, short e15, short e14, short e13, short e12,11448 short e11, short e10, short e9, short e8, short e7,11449 short e6, short e5, short e4, short e3, short e2, short e1, short e0) {11450 //CHECK-LABEL: test_mm512_set_epi1611451 //CHECK: insertelement{{.*}}i32 011452 //CHECK: insertelement{{.*}}i32 111453 //CHECK: insertelement{{.*}}i32 211454 //CHECK: insertelement{{.*}}i32 311455 //CHECK: insertelement{{.*}}i32 411456 //CHECK: insertelement{{.*}}i32 511457 //CHECK: insertelement{{.*}}i32 611458 //CHECK: insertelement{{.*}}i32 711459 //CHECK: insertelement{{.*}}i32 811460 //CHECK: insertelement{{.*}}i32 911461 //CHECK: insertelement{{.*}}i32 1011462 //CHECK: insertelement{{.*}}i32 1111463 //CHECK: insertelement{{.*}}i32 1211464 //CHECK: insertelement{{.*}}i32 1311465 //CHECK: insertelement{{.*}}i32 1411466 //CHECK: insertelement{{.*}}i32 1511467 //CHECK: insertelement{{.*}}i32 1611468 //CHECK: insertelement{{.*}}i32 1711469 //CHECK: insertelement{{.*}}i32 1811470 //CHECK: insertelement{{.*}}i32 1911471 //CHECK: insertelement{{.*}}i32 2011472 //CHECK: insertelement{{.*}}i32 2111473 //CHECK: insertelement{{.*}}i32 2211474 //CHECK: insertelement{{.*}}i32 2311475 //CHECK: insertelement{{.*}}i32 2411476 //CHECK: insertelement{{.*}}i32 2511477 //CHECK: insertelement{{.*}}i32 2611478 //CHECK: insertelement{{.*}}i32 2711479 //CHECK: insertelement{{.*}}i32 2811480 //CHECK: insertelement{{.*}}i32 2911481 //CHECK: insertelement{{.*}}i32 3011482 //CHECK: insertelement{{.*}}i32 3111483 return _mm512_set_epi16(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22,11484 e21, e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, e9, e8, e7,11485 e6, e5, e4, e3, e2, e1, e0);11486}11487TEST_CONSTEXPR(match_v32hi(_mm512_set_epi16(-31, 30, -29, 28, -27, 26, -25, 24, -23, 22, -21, 20, -19, 18, -17, 16, -15, 14, -13, 12, -11, 10, -9, 8, -7, 6, -5, 4, -3, 2, -1, 0), 0, -1, 2, -3, 4, -5, 6, -7, 8, -9, 10, -11, 12, -13, 14, -15, 16, -17, 18, -19, 20, -21, 22, -23, 24, -25, 26, -27, 28, -29, 30, -31));11488 11489__m512i test_mm512_set_epi32 (int __A, int __B, int __C, int __D,11490 int __E, int __F, int __G, int __H,11491 int __I, int __J, int __K, int __L,11492 int __M, int __N, int __O, int __P)11493{11494 //CHECK-LABEL: test_mm512_set_epi3211495 //CHECK: insertelement{{.*}}i32 011496 //CHECK: insertelement{{.*}}i32 111497 //CHECK: insertelement{{.*}}i32 211498 //CHECK: insertelement{{.*}}i32 311499 //CHECK: insertelement{{.*}}i32 411500 //CHECK: insertelement{{.*}}i32 511501 //CHECK: insertelement{{.*}}i32 611502 //CHECK: insertelement{{.*}}i32 711503 //CHECK: insertelement{{.*}}i32 811504 //CHECK: insertelement{{.*}}i32 911505 //CHECK: insertelement{{.*}}i32 1011506 //CHECK: insertelement{{.*}}i32 1111507 //CHECK: insertelement{{.*}}i32 1211508 //CHECK: insertelement{{.*}}i32 1311509 //CHECK: insertelement{{.*}}i32 1411510 //CHECK: insertelement{{.*}}i32 1511511 return _mm512_set_epi32( __A, __B, __C, __D,__E, __F, __G, __H,11512 __I, __J, __K, __L,__M, __N, __O, __P);11513}11514TEST_CONSTEXPR(match_v16si(_mm512_set_epi32(-15, -14, -13, -12, -11, -10, -9, -8, -7, -6, -5, -4, -3, -2, -1, 0), 0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15));11515 11516__m512i test_mm512_setr_epi32 (int __A, int __B, int __C, int __D,11517 int __E, int __F, int __G, int __H,11518 int __I, int __J, int __K, int __L,11519 int __M, int __N, int __O, int __P)11520{11521 //CHECK-LABEL: test_mm512_setr_epi3211522 //CHECK: load{{.*}}%{{.*}}, align 411523 //CHECK: load{{.*}}%{{.*}}, align 411524 //CHECK: load{{.*}}%{{.*}}, align 411525 //CHECK: load{{.*}}%{{.*}}, align 411526 //CHECK: load{{.*}}%{{.*}}, align 411527 //CHECK: load{{.*}}%{{.*}}, align 411528 //CHECK: load{{.*}}%{{.*}}, align 411529 //CHECK: load{{.*}}%{{.*}}, align 411530 //CHECK: load{{.*}}%{{.*}}, align 411531 //CHECK: load{{.*}}%{{.*}}, align 411532 //CHECK: load{{.*}}%{{.*}}, align 411533 //CHECK: load{{.*}}%{{.*}}, align 411534 //CHECK: load{{.*}}%{{.*}}, align 411535 //CHECK: load{{.*}}%{{.*}}, align 411536 //CHECK: load{{.*}}%{{.*}}, align 411537 //CHECK: load{{.*}}%{{.*}}, align 411538 //CHECK: insertelement{{.*}}i32 011539 //CHECK: insertelement{{.*}}i32 111540 //CHECK: insertelement{{.*}}i32 211541 //CHECK: insertelement{{.*}}i32 311542 //CHECK: insertelement{{.*}}i32 411543 //CHECK: insertelement{{.*}}i32 511544 //CHECK: insertelement{{.*}}i32 611545 //CHECK: insertelement{{.*}}i32 711546 //CHECK: insertelement{{.*}}i32 811547 //CHECK: insertelement{{.*}}i32 911548 //CHECK: insertelement{{.*}}i32 1011549 //CHECK: insertelement{{.*}}i32 1111550 //CHECK: insertelement{{.*}}i32 1211551 //CHECK: insertelement{{.*}}i32 1311552 //CHECK: insertelement{{.*}}i32 1411553 //CHECK: insertelement{{.*}}i32 1511554 return _mm512_setr_epi32( __A, __B, __C, __D,__E, __F, __G, __H,11555 __I, __J, __K, __L,__M, __N, __O, __P);11556}11557TEST_CONSTEXPR(match_v16si(_mm512_setr_epi32(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15));11558 11559__m512i test_mm512_mask_set1_epi64 (__m512i __O, __mmask8 __M, long long __A)11560{11561 // CHECK-LABEL: test_mm512_mask_set1_epi6411562 // CHECK: insertelement <8 x i64> poison, i64 %{{.*}}, i32 011563 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 111564 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 211565 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 311566 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 411567 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 511568 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 611569 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 711570 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}11571 return _mm512_mask_set1_epi64 (__O, __M, __A);11572}11573 11574TEST_CONSTEXPR(match_v8di(_mm512_mask_set1_epi64(_mm512_setzero_si512(), 0xAA, 21), 0,21,0,21,0,21,0,21));11575 11576__m512i test_mm512_maskz_set1_epi64 (__mmask8 __M, long long __A)11577{11578 // CHECK-LABEL: test_mm512_maskz_set1_epi6411579 // CHECK: insertelement <8 x i64> poison, i64 %{{.*}}, i32 011580 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 111581 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 211582 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 311583 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 411584 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 511585 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 611586 // CHECK: insertelement <8 x i64> %{{.*}}, i64 %{{.*}}, i32 711587 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}11588 return _mm512_maskz_set1_epi64 (__M, __A);11589}11590 11591TEST_CONSTEXPR(match_v8di(_mm512_maskz_set1_epi64(0xAA, 23), 0, 23, 0, 23, 0, 23, 0, 23));11592 11593 11594__m512i test_mm512_set_epi64 (long long __A, long long __B, long long __C,11595 long long __D, long long __E, long long __F,11596 long long __G, long long __H)11597{11598 //CHECK-LABEL: test_mm512_set_epi6411599 //CHECK: insertelement{{.*}}i32 011600 //CHECK: insertelement{{.*}}i32 111601 //CHECK: insertelement{{.*}}i32 211602 //CHECK: insertelement{{.*}}i32 311603 //CHECK: insertelement{{.*}}i32 411604 //CHECK: insertelement{{.*}}i32 511605 //CHECK: insertelement{{.*}}i32 611606 //CHECK: insertelement{{.*}}i32 711607 return _mm512_set_epi64(__A, __B, __C, __D, __E, __F, __G, __H );11608}11609TEST_CONSTEXPR(match_v8di(_mm512_set_epi64(-15, 13, -11, 9, -7, 5, -3, 1), 1, -3, 5, -7, 9, -11, 13, -15));11610 11611__m512i test_mm512_setr_epi64 (long long __A, long long __B, long long __C,11612 long long __D, long long __E, long long __F,11613 long long __G, long long __H)11614{11615 //CHECK-LABEL: test_mm512_setr_epi6411616 //CHECK: load{{.*}}%{{.*}}, align 811617 //CHECK: load{{.*}}%{{.*}}, align 811618 //CHECK: load{{.*}}%{{.*}}, align 811619 //CHECK: load{{.*}}%{{.*}}, align 811620 //CHECK: load{{.*}}%{{.*}}, align 811621 //CHECK: load{{.*}}%{{.*}}, align 811622 //CHECK: load{{.*}}%{{.*}}, align 811623 //CHECK: load{{.*}}%{{.*}}, align 811624 //CHECK: insertelement{{.*}}i32 011625 //CHECK: insertelement{{.*}}i32 111626 //CHECK: insertelement{{.*}}i32 211627 //CHECK: insertelement{{.*}}i32 311628 //CHECK: insertelement{{.*}}i32 411629 //CHECK: insertelement{{.*}}i32 511630 //CHECK: insertelement{{.*}}i32 611631 //CHECK: insertelement{{.*}}i32 711632 return _mm512_setr_epi64(__A, __B, __C, __D, __E, __F, __G, __H );11633}11634TEST_CONSTEXPR(match_v8di(_mm512_setr_epi64(-1, 3, -5, 7, -9, 11, -13, 15), -1, 3, -5, 7, -9, 11, -13, 15));11635 11636__m512d test_mm512_set_pd (double __A, double __B, double __C, double __D,11637 double __E, double __F, double __G, double __H)11638{11639 //CHECK-LABEL: test_mm512_set_pd11640 //CHECK: insertelement{{.*}}i32 011641 //CHECK: insertelement{{.*}}i32 111642 //CHECK: insertelement{{.*}}i32 211643 //CHECK: insertelement{{.*}}i32 311644 //CHECK: insertelement{{.*}}i32 411645 //CHECK: insertelement{{.*}}i32 511646 //CHECK: insertelement{{.*}}i32 611647 //CHECK: insertelement{{.*}}i32 711648 return _mm512_set_pd( __A, __B, __C, __D, __E, __F, __G, __H);11649}11650TEST_CONSTEXPR(match_m512d(_mm512_set_pd(20.0, 40.0, 60.0, 80.0, 100.0, 120.0, 140.0, 160.0), 160.0, 140.0, 120.0, 100.0, 80.0, 60.0, 40.0, 20.0));11651 11652__m512d test_mm512_setr_pd (double __A, double __B, double __C, double __D,11653 double __E, double __F, double __G, double __H)11654{11655 //CHECK-LABEL: test_mm512_setr_pd11656 //CHECK: load{{.*}}%{{.*}}, align 811657 //CHECK: load{{.*}}%{{.*}}, align 811658 //CHECK: load{{.*}}%{{.*}}, align 811659 //CHECK: load{{.*}}%{{.*}}, align 811660 //CHECK: load{{.*}}%{{.*}}, align 811661 //CHECK: load{{.*}}%{{.*}}, align 811662 //CHECK: load{{.*}}%{{.*}}, align 811663 //CHECK: load{{.*}}%{{.*}}, align 811664 //CHECK: insertelement{{.*}}i32 011665 //CHECK: insertelement{{.*}}i32 111666 //CHECK: insertelement{{.*}}i32 211667 //CHECK: insertelement{{.*}}i32 311668 //CHECK: insertelement{{.*}}i32 411669 //CHECK: insertelement{{.*}}i32 511670 //CHECK: insertelement{{.*}}i32 611671 //CHECK: insertelement{{.*}}i32 711672 return _mm512_setr_pd( __A, __B, __C, __D, __E, __F, __G, __H);11673}11674TEST_CONSTEXPR(match_m512d(_mm512_setr_pd(-20.0, 40.0, -60.0, 80.0, -100.0, 120.0, -140.0, 160.0), -20.0, 40.0, -60.0, 80.0, -100.0, 120.0, -140.0, 160.0));11675 11676__m512 test_mm512_set_ps (float __A, float __B, float __C, float __D,11677 float __E, float __F, float __G, float __H,11678 float __I, float __J, float __K, float __L,11679 float __M, float __N, float __O, float __P)11680{11681 //CHECK-LABEL: test_mm512_set_ps11682 //CHECK: insertelement{{.*}}i32 011683 //CHECK: insertelement{{.*}}i32 111684 //CHECK: insertelement{{.*}}i32 211685 //CHECK: insertelement{{.*}}i32 311686 //CHECK: insertelement{{.*}}i32 411687 //CHECK: insertelement{{.*}}i32 511688 //CHECK: insertelement{{.*}}i32 611689 //CHECK: insertelement{{.*}}i32 711690 //CHECK: insertelement{{.*}}i32 811691 //CHECK: insertelement{{.*}}i32 911692 //CHECK: insertelement{{.*}}i32 1011693 //CHECK: insertelement{{.*}}i32 1111694 //CHECK: insertelement{{.*}}i32 1211695 //CHECK: insertelement{{.*}}i32 1311696 //CHECK: insertelement{{.*}}i32 1411697 //CHECK: insertelement{{.*}}i32 1511698 return _mm512_set_ps( __A, __B, __C, __D, __E, __F, __G, __H,11699 __I, __J, __K, __L, __M, __N, __O, __P);11700}11701TEST_CONSTEXPR(match_m512(_mm512_set_ps(-16.0f, 15.0f, -14.0f, 13.0f, -12.0f, 11.0f, -10.0f, 9.0f, -8.0f, 7.0f, -6.0f, 5.0f, -4.0f, 3.0f, -2.0f, 1.0f), 1.0f, -2.0f, 3.0f, -4.0f, 5.0f, -6.0f, 7.0f, -8.0f, 9.0f, -10.0f, 11.0f, -12.0f, 13.0f, -14.0f, 15.0f, -16.0f));11702 11703TEST_CONSTEXPR(match_v8di(_mm512_abs_epi64((__m512i)(__v8di){-1, 2, 2, 2, 2, 2, 2, 2}), 1, 2, 2, 2, 2, 2, 2, 2));11704 11705__m512i test_mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A)11706{11707 // CHECK-LABEL: test_mm512_mask_abs_epi64 11708 // CHECK: [[ABS:%.*]] = call {{.*}}<8 x i64> @llvm.abs.v8i64(<8 x i64> %{{.*}}, i1 false)11709 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> [[ABS]], <8 x i64> %{{.*}}11710 return _mm512_mask_abs_epi64 (__W,__U,__A);11711}11712TEST_CONSTEXPR(match_v8di(_mm512_mask_abs_epi64((__m512i)(__v8di){99, 99, 99, 99, 99, 99, 99, 99}, (__mmask8)0x01, (__m512i)(__v8di){-1, 2, 2, 2, 2, 2, 2, 2}), 1, 99, 99, 99, 99, 99, 99, 99));11713 11714__m512i test_mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A)11715{11716 // CHECK-LABEL: test_mm512_maskz_abs_epi64 11717 // CHECK: [[ABS:%.*]] = call {{.*}}<8 x i64> @llvm.abs.v8i64(<8 x i64> %{{.*}}, i1 false)11718 // CHECK: select <8 x i1> %{{.*}}, <8 x i64> [[ABS]], <8 x i64> %{{.*}}11719 return _mm512_maskz_abs_epi64 (__U,__A);11720}11721TEST_CONSTEXPR(match_v8di(_mm512_maskz_abs_epi64((__mmask8)0x01, (__m512i)(__v8di){-1, 2, 2, 2, 2, 2, 2, 2}), 1, 0, 0, 0, 0, 0, 0, 0));11722 11723TEST_CONSTEXPR(match_v16si(_mm512_abs_epi32((__m512i)(__v16si){-1, 2, 2, 2, 2, 2, 2, 2, -1, 2, 2, 2, 2, 2, 2, 2}), 1, 2, 2, 2, 2, 2, 2, 2, 1, 2, 2, 2, 2, 2, 2, 2));11724 11725__m512i test_mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A)11726{11727 // CHECK-LABEL: test_mm512_mask_abs_epi3211728 // CHECK: [[ABS:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> %{{.*}}, i1 false)11729 // CHECK: [[TMP:%.*]] = bitcast <16 x i32> [[ABS]] to <8 x i64>11730 // CHECK: [[ABS:%.*]] = bitcast <8 x i64> [[TMP]] to <16 x i32>11731 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> [[ABS]], <16 x i32> %{{.*}}11732 return _mm512_mask_abs_epi32 (__W,__U,__A);11733}11734TEST_CONSTEXPR(match_v16si(_mm512_mask_abs_epi32((__m512i)(__v16si){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, (__mmask16)0x0001, (__m512i)(__v16si){-1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}), 1, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99));11735 11736__m512i test_mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A)11737{11738 // CHECK-LABEL: test_mm512_maskz_abs_epi3211739 // CHECK: [[ABS:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> %{{.*}}, i1 false)11740 // CHECK: [[TMP:%.*]] = bitcast <16 x i32> [[ABS]] to <8 x i64>11741 // CHECK: [[ABS:%.*]] = bitcast <8 x i64> [[TMP]] to <16 x i32>11742 // CHECK: select <16 x i1> %{{.*}}, <16 x i32> [[ABS]], <16 x i32> %{{.*}}11743 return _mm512_maskz_abs_epi32 (__U,__A);11744}11745TEST_CONSTEXPR(match_v16si(_mm512_maskz_abs_epi32((__mmask16)0x0001, (__m512i)(__v16si){-1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}), 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));11746 11747__m512 test_mm512_setr_ps (float __A, float __B, float __C, float __D,11748 float __E, float __F, float __G, float __H,11749 float __I, float __J, float __K, float __L,11750 float __M, float __N, float __O, float __P)11751{11752 //CHECK-LABEL: test_mm512_setr_ps11753 //CHECK: load{{.*}}%{{.*}}, align 411754 //CHECK: load{{.*}}%{{.*}}, align 411755 //CHECK: load{{.*}}%{{.*}}, align 411756 //CHECK: load{{.*}}%{{.*}}, align 411757 //CHECK: load{{.*}}%{{.*}}, align 411758 //CHECK: load{{.*}}%{{.*}}, align 411759 //CHECK: load{{.*}}%{{.*}}, align 411760 //CHECK: load{{.*}}%{{.*}}, align 411761 //CHECK: load{{.*}}%{{.*}}, align 411762 //CHECK: load{{.*}}%{{.*}}, align 411763 //CHECK: load{{.*}}%{{.*}}, align 411764 //CHECK: load{{.*}}%{{.*}}, align 411765 //CHECK: load{{.*}}%{{.*}}, align 411766 //CHECK: load{{.*}}%{{.*}}, align 411767 //CHECK: load{{.*}}%{{.*}}, align 411768 //CHECK: load{{.*}}%{{.*}}, align 411769 //CHECK: insertelement{{.*}}i32 011770 //CHECK: insertelement{{.*}}i32 111771 //CHECK: insertelement{{.*}}i32 211772 //CHECK: insertelement{{.*}}i32 311773 //CHECK: insertelement{{.*}}i32 411774 //CHECK: insertelement{{.*}}i32 511775 //CHECK: insertelement{{.*}}i32 611776 //CHECK: insertelement{{.*}}i32 711777 //CHECK: insertelement{{.*}}i32 811778 //CHECK: insertelement{{.*}}i32 911779 //CHECK: insertelement{{.*}}i32 1011780 //CHECK: insertelement{{.*}}i32 1111781 //CHECK: insertelement{{.*}}i32 1211782 //CHECK: insertelement{{.*}}i32 1311783 //CHECK: insertelement{{.*}}i32 1411784 //CHECK: insertelement{{.*}}i32 1511785 return _mm512_setr_ps( __A, __B, __C, __D, __E, __F, __G, __H,11786 __I, __J, __K, __L, __M, __N, __O, __P);11787}11788TEST_CONSTEXPR(match_m512(_mm512_setr_ps(-1.0f, 2.0f, -3.0f, 4.0f, -5.0f, 6.0f, -7.0f, 8.0f, -9.0f, 10.0f, -11.0f, 12.0f, -13.0f, 14.0f, -15.0f, 16.0f), -1.0f, 2.0f, -3.0f, 4.0f, -5.0f, 6.0f, -7.0f, 8.0f, -9.0f, 10.0f, -11.0f, 12.0f, -13.0f, 14.0f, -15.0f, 16.0f));11789 11790int test_mm_cvtss_i32(__m128 A) {11791 // CHECK-LABEL: test_mm_cvtss_i3211792 // CHECK: call {{.*}}i32 @llvm.x86.sse.cvtss2si(<4 x float> %{{.*}})11793 return _mm_cvtss_i32(A);11794}11795 11796#ifdef __x86_64__11797long long test_mm_cvtss_i64(__m128 A) {11798 // CHECK-LABEL: test_mm_cvtss_i6411799 // CHECK: call {{.*}}i64 @llvm.x86.sse.cvtss2si64(<4 x float> %{{.*}})11800 return _mm_cvtss_i64(A);11801}11802#endif11803 11804__m128d test_mm_cvti32_sd(__m128d A, int B) {11805 // CHECK-LABEL: test_mm_cvti32_sd11806 // CHECK: sitofp i32 %{{.*}} to double11807 // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 011808 return _mm_cvti32_sd(A, B);11809}11810 11811#ifdef __x86_64__11812__m128d test_mm_cvti64_sd(__m128d A, long long B) {11813 // CHECK-LABEL: test_mm_cvti64_sd11814 // CHECK: sitofp i64 %{{.*}} to double11815 // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 011816 return _mm_cvti64_sd(A, B);11817}11818#endif11819 11820__m128 test_mm_cvti32_ss(__m128 A, int B) {11821 // CHECK-LABEL: test_mm_cvti32_ss11822 // CHECK: sitofp i32 %{{.*}} to float11823 // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 011824 return _mm_cvti32_ss(A, B);11825}11826 11827#ifdef __x86_64__11828__m128 test_mm_cvti64_ss(__m128 A, long long B) {11829 // CHECK-LABEL: test_mm_cvti64_ss11830 // CHECK: sitofp i64 %{{.*}} to float11831 // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 011832 return _mm_cvti64_ss(A, B);11833}11834#endif11835 11836int test_mm_cvtsd_i32(__m128d A) {11837 // CHECK-LABEL: test_mm_cvtsd_i3211838 // CHECK: call {{.*}}i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %{{.*}})11839 return _mm_cvtsd_i32(A);11840}11841 11842#ifdef __x86_64__11843long long test_mm_cvtsd_i64(__m128d A) {11844 // CHECK-LABEL: test_mm_cvtsd_i6411845 // CHECK: call {{.*}}i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %{{.*}})11846 return _mm_cvtsd_i64(A);11847}11848#endif11849 11850__m128d test_mm_mask_cvtss_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128 __B) {11851 // CHECK-LABEL: test_mm_mask_cvtss_sd11852 // CHECK: @llvm.x86.avx512.mask.cvtss2sd.round11853 return _mm_mask_cvtss_sd(__W, __U, __A, __B); 11854}11855 11856__m128d test_mm_maskz_cvtss_sd( __mmask8 __U, __m128d __A, __m128 __B) {11857 // CHECK-LABEL: test_mm_maskz_cvtss_sd11858 // CHECK: @llvm.x86.avx512.mask.cvtss2sd.round11859 return _mm_maskz_cvtss_sd( __U, __A, __B); 11860}11861 11862__m128 test_mm_mask_cvtsd_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128d __B) {11863 // CHECK-LABEL: test_mm_mask_cvtsd_ss11864 // CHECK: @llvm.x86.avx512.mask.cvtsd2ss.round11865 return _mm_mask_cvtsd_ss(__W, __U, __A, __B); 11866}11867 11868__m128 test_mm_maskz_cvtsd_ss(__mmask8 __U, __m128 __A, __m128d __B) {11869 // CHECK-LABEL: test_mm_maskz_cvtsd_ss11870 // CHECK: @llvm.x86.avx512.mask.cvtsd2ss.round11871 return _mm_maskz_cvtsd_ss(__U, __A, __B); 11872}11873 11874__m512i test_mm512_setzero_epi32(void)11875{11876 // CHECK-LABEL: test_mm512_setzero_epi3211877 // CHECK: zeroinitializer11878 return _mm512_setzero_epi32();11879}11880TEST_CONSTEXPR(match_m512i(_mm512_setzero_epi32(), 0, 0, 0, 0, 0, 0, 0, 0));11881 11882__m512 test_mm512_setzero(void)11883{11884 // CHECK-LABEL: test_mm512_setzero11885 // CHECK: zeroinitializer11886 return _mm512_setzero();11887}11888TEST_CONSTEXPR(match_m512(_mm512_setzero(), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f));11889 11890__m512i test_mm512_setzero_si512(void)11891{11892 // CHECK-LABEL: test_mm512_setzero_si51211893 // CHECK: zeroinitializer11894 return _mm512_setzero_si512();11895}11896TEST_CONSTEXPR(match_m512i(_mm512_setzero_si512(), 0, 0, 0, 0, 0, 0, 0, 0));11897 11898__m512 test_mm512_setzero_ps(void)11899{11900 // CHECK-LABEL: test_mm512_setzero_ps11901 // CHECK: zeroinitializer11902 return _mm512_setzero_ps();11903}11904TEST_CONSTEXPR(match_m512(_mm512_setzero_ps(), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f));11905 11906__m512d test_mm512_setzero_pd(void)11907{11908 // CHECK-LABEL: test_mm512_setzero_pd11909 // CHECK: zeroinitializer11910 return _mm512_setzero_pd();11911}11912TEST_CONSTEXPR(match_m512d(_mm512_setzero_pd(), 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0));11913 11914__mmask16 test_mm512_int2mask(int __a)11915{11916 // CHECK-LABEL: test_mm512_int2mask11917 // CHECK: trunc i32 %{{.*}} to i1611918 return _mm512_int2mask(__a);11919}11920 11921TEST_CONSTEXPR(_mm512_int2mask((int)0xDEADBEEF) == 0xBEEF);11922 11923int test_mm512_mask2int(__mmask16 __a)11924{11925 // CHECK-LABEL: test_mm512_mask2int11926 // CHECK: zext i16 %{{.*}} to i3211927 return _mm512_mask2int(__a);11928}11929 11930TEST_CONSTEXPR(_mm512_mask2int(0x8000) == 0x00008000);11931 11932__m128 test_mm_mask_move_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)11933{11934 // CHECK-LABEL: test_mm_mask_move_ss11935 // CHECK: [[EXT:%.*]] = extractelement <4 x float> %{{.*}}, i32 011936 // CHECK: insertelement <4 x float> %{{.*}}, float [[EXT]], i32 011937 // CHECK: [[A:%.*]] = extractelement <4 x float> [[VEC:%.*]], i64 011938 // CHECK-NEXT: [[B:%.*]] = extractelement <4 x float> %{{.*}}, i64 011939 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>11940 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 011941 // CHECK-NEXT: [[SEL:%.*]] = select i1 %{{.*}}, float [[A]], float [[B]]11942 // CHECK-NEXT: insertelement <4 x float> [[VEC]], float [[SEL]], i64 011943 return _mm_mask_move_ss ( __W, __U, __A, __B);11944}11945TEST_CONSTEXPR(match_m128(_mm_mask_move_ss((__m128)(__v4sf){1.0f,2.0f,3.0f,4.0f}, (__mmask8)0x01, (__m128)(__v4sf){100.0f,200.0f,300.0f,400.0f}, (__m128)(__v4sf){9.0f,10.0f,11.0f,12.0f}), 9.0f,2.0f,3.0f,4.0f));11946 11947__m128 test_mm_maskz_move_ss (__mmask8 __U, __m128 __A, __m128 __B)11948{11949 // CHECK-LABEL: test_mm_maskz_move_ss11950 // CHECK: [[EXT:%.*]] = extractelement <4 x float> %{{.*}}, i32 011951 // CHECK: insertelement <4 x float> %{{.*}}, float [[EXT]], i32 011952 // CHECK: [[A:%.*]] = extractelement <4 x float> [[VEC:%.*]], i64 011953 // CHECK-NEXT: [[B:%.*]] = extractelement <4 x float> %{{.*}}, i64 011954 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>11955 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 011956 // CHECK-NEXT: [[SEL:%.*]] = select i1 %{{.*}}, float [[A]], float [[B]]11957 // CHECK-NEXT: insertelement <4 x float> [[VEC]], float [[SEL]], i64 011958 return _mm_maskz_move_ss (__U, __A, __B);11959}11960TEST_CONSTEXPR(match_m128(_mm_maskz_move_ss((__mmask8)0x01, (__m128)(__v4sf){0.0f,0.0f,0.0f,0.0f}, (__m128)(__v4sf){9.0f,10.0f,11.0f,12.0f}), 9.0f,0.0f,0.0f,0.0f));11961 11962__m128d test_mm_mask_move_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)11963{11964 // CHECK-LABEL: test_mm_mask_move_sd11965 // CHECK: [[EXT:%.*]] = extractelement <2 x double> %{{.*}}, i32 011966 // CHECK: insertelement <2 x double> %{{.*}}, double [[EXT]], i32 011967 // CHECK: [[A:%.*]] = extractelement <2 x double> [[VEC:%.*]], i64 011968 // CHECK-NEXT: [[B:%.*]] = extractelement <2 x double> %{{.*}}, i64 011969 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>11970 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 011971 // CHECK-NEXT: [[SEL:%.*]] = select i1 %{{.*}}, double [[A]], double [[B]]11972 // CHECK-NEXT: insertelement <2 x double> [[VEC]], double [[SEL]], i64 011973 return _mm_mask_move_sd ( __W, __U, __A, __B);11974}11975TEST_CONSTEXPR(match_m128d(_mm_mask_move_sd((__m128d)(__v2df){1.0,2.0}, (__mmask8)0x01, (__m128d)(__v2df){100.0,200.0}, (__m128d)(__v2df){9.0,10.0}), 9.0,2.0));11976 11977__m128d test_mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B)11978{11979 // CHECK-LABEL: test_mm_maskz_move_sd11980 // CHECK: [[EXT:%.*]] = extractelement <2 x double> %{{.*}}, i32 011981 // CHECK: insertelement <2 x double> %{{.*}}, double [[EXT]], i32 011982 // CHECK: [[A:%.*]] = extractelement <2 x double> [[VEC:%.*]], i64 011983 // CHECK-NEXT: [[B:%.*]] = extractelement <2 x double> %{{.*}}, i64 011984 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>11985 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 011986 // CHECK-NEXT: [[SEL:%.*]] = select i1 %13, double [[A]], double [[B]]11987 // CHECK-NEXT: insertelement <2 x double> [[VEC]], double [[SEL]], i64 011988 return _mm_maskz_move_sd (__U, __A, __B);11989}11990TEST_CONSTEXPR(match_m128d(_mm_maskz_move_sd((__mmask8)0x01, (__m128d)(__v2df){0.0,0.0}, (__m128d)(__v2df){9.0,10.0}), 9.0,0.0));11991 11992void test_mm_mask_store_ss(float * __P, __mmask8 __U, __m128 __A)11993{11994 // CHECK-LABEL: test_mm_mask_store_ss11995 // CHECK: call void @llvm.masked.store.v4f32.p0(<4 x float> %{{.*}}, ptr align 1 %{{.*}}, <4 x i1> %{{.*}})11996 _mm_mask_store_ss(__P, __U, __A);11997}11998 11999void test_mm_mask_store_sd(double * __P, __mmask8 __U, __m128d __A)12000{12001 // CHECK-LABEL: test_mm_mask_store_sd12002 // CHECK: call void @llvm.masked.store.v2f64.p0(<2 x double> %{{.*}}, ptr align 1 %{{.*}}, <2 x i1> %{{.*}})12003 _mm_mask_store_sd(__P, __U, __A);12004}12005 12006__m128 test_mm_mask_load_ss(__m128 __A, __mmask8 __U, const float* __W)12007{12008 // CHECK-LABEL: test_mm_mask_load_ss12009 // CHECK: call {{.*}}<4 x float> @llvm.masked.load.v4f32.p0(ptr align 1 %{{.*}}, <4 x i1> %{{.*}}, <4 x float> %{{.*}})12010 return _mm_mask_load_ss(__A, __U, __W);12011}12012 12013__m128 test_mm_maskz_load_ss (__mmask8 __U, const float * __W)12014{12015 // CHECK-LABEL: test_mm_maskz_load_ss12016 // CHECK: call {{.*}}<4 x float> @llvm.masked.load.v4f32.p0(ptr align 1 %{{.*}}, <4 x i1> %{{.*}}, <4 x float> %{{.*}})12017 return _mm_maskz_load_ss (__U, __W);12018}12019 12020__m128d test_mm_mask_load_sd (__m128d __A, __mmask8 __U, const double * __W)12021{12022 // CHECK-LABEL: test_mm_mask_load_sd12023 // CHECK: call {{.*}}<2 x double> @llvm.masked.load.v2f64.p0(ptr align 1 %{{.*}}, <2 x i1> %{{.*}}, <2 x double> %{{.*}})12024 return _mm_mask_load_sd (__A, __U, __W);12025}12026 12027__m128d test_mm_maskz_load_sd (__mmask8 __U, const double * __W)12028{12029 // CHECK-LABEL: test_mm_maskz_load_sd12030 // CHECK: call {{.*}}<2 x double> @llvm.masked.load.v2f64.p0(ptr align 1 %{{.*}}, <2 x i1> %{{.*}}, <2 x double> %{{.*}})12031 return _mm_maskz_load_sd (__U, __W);12032}12033 12034__m512d test_mm512_abs_pd(__m512d a){12035 // CHECK-LABEL: test_mm512_abs_pd12036 // CHECK: and <8 x i64> 12037 return _mm512_abs_pd(a);12038}12039TEST_CONSTEXPR(match_m512d(_mm512_abs_pd((__m512d){-1.0, 2.0, -3.0, 4.0, -5.0, 6.0, -7.0, 8.0}), 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0));12040 12041__m512d test_mm512_mask_abs_pd (__m512d __W, __mmask8 __U, __m512d __A){12042 // CHECK-LABEL: test_mm512_mask_abs_pd 12043 // CHECK: %[[AND_RES:.*]] = and <8 x i64>12044 // CHECK: %[[MASK:.*]] = bitcast i8 %{{.*}} to <8 x i1>12045 // CHECK: select <8 x i1> %[[MASK]], <8 x i64> %[[AND_RES]], <8 x i64> %{{.*}}12046 return _mm512_mask_abs_pd (__W,__U,__A);12047}12048TEST_CONSTEXPR(match_m512d(_mm512_mask_abs_pd((__m512d){99.0, 99.0, 99.0, 99.0, 99.0, 99.0, 99.0, 99.0}, (__mmask8)0x01, (__m512d){-1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0}), 1.0, 99.0, 99.0, 99.0, 99.0, 99.0, 99.0, 99.0));12049 12050__m512 test_mm512_abs_ps(__m512 a){12051 // CHECK-LABEL: test_mm512_abs_ps12052 // CHECK: and <16 x i32> 12053 return _mm512_abs_ps(a);12054}12055TEST_CONSTEXPR(match_m512(_mm512_abs_ps((__m512){-1.0f, 2.0f, -3.0f, 4.0f, -5.0f, 6.0f, -7.0f, 8.0f, -9.0f, 10.0f, -11.0f, 12.0f, -13.0f, 14.0f, -15.0f, -16.0f}), 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, 13.0f, 14.0f, 15.0f, 16.0f));12056 12057__m512 test_mm512_mask_abs_ps(__m512 __W, __mmask16 __U, __m512 __A){12058 // CHECK-LABEL: test_mm512_mask_abs_ps12059 // CHECK: and <16 x i32> 12060 // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>12061 // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}12062 return _mm512_mask_abs_ps( __W, __U, __A);12063}12064TEST_CONSTEXPR(match_m512(_mm512_mask_abs_ps((__m512){99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, (__mmask16)0x0001, (__m512){-1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}), 1, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99));12065 12066__m512d test_mm512_zextpd128_pd512(__m128d A) {12067 // CHECK-LABEL: test_mm512_zextpd128_pd51212068 // CHECK: store <2 x double> zeroinitializer12069 // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>12070 return _mm512_zextpd128_pd512(A);12071}12072TEST_CONSTEXPR(match_m512d(_mm512_zextpd128_pd512((__m128d){+99.0, -1.0}), +99.0, -1.0, +0.0, +0.0, 0.0, 0.0, 0.0, 0.0));12073 12074__m512d test_mm512_zextpd256_pd512(__m256d A) {12075 // CHECK-LABEL: test_mm512_zextpd256_pd51212076 // CHECK: store <4 x double> zeroinitializer12077 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>12078 return _mm512_zextpd256_pd512(A);12079}12080TEST_CONSTEXPR(match_m512d(_mm512_zextpd256_pd512((__m256d){1.0, 2.0, 3.0, 4.0}), 1.0, 2.0, 3.0, 4.0, 0.0, 0.0, 0.0, 0.0));12081 12082__m512 test_mm512_zextps128_ps512(__m128 A) {12083 // CHECK-LABEL: test_mm512_zextps128_ps51212084 // CHECK: store <4 x float> zeroinitializer12085 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>12086 return _mm512_zextps128_ps512(A);12087}12088TEST_CONSTEXPR(match_m512(_mm512_zextps128_ps512((__m128){1.0f, 2.0f, 3.0f, 4.0f}), 1.0f, 2.0f, 3.0f, 4.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f));12089 12090__m512 test_mm512_zextps256_ps512(__m256 A) {12091 // CHECK-LABEL: test_mm512_zextps256_ps51212092 // CHECK: store <8 x float> zeroinitializer12093 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>12094 return _mm512_zextps256_ps512(A);12095}12096TEST_CONSTEXPR(match_m512(_mm512_zextps256_ps512((__m256){1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}), 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f));12097 12098__m512i test_mm512_zextsi128_si512(__m128i A) {12099 // CHECK-LABEL: test_mm512_zextsi128_si51212100 // CHECK: store <2 x i64> zeroinitializer12101 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>12102 return _mm512_zextsi128_si512(A);12103}12104TEST_CONSTEXPR(match_m512i(_mm512_zextsi128_si512((__m128i){1, 2}), 1, 2, 0, 0, 0, 0, 0, 0));12105 12106__m512i test_mm512_zextsi256_si512(__m256i A) {12107 // CHECK-LABEL: test_mm512_zextsi256_si51212108 // CHECK: store <4 x i64> zeroinitializer12109 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>12110 return _mm512_zextsi256_si512(A);12111}12112TEST_CONSTEXPR(match_m512i(_mm512_zextsi256_si512((__m256i){1, 2, 3, 4}), 1, 2, 3, 4, 0, 0, 0, 0));12113 12114__m512d test_mm512_i32logather_pd(__m512i __index, void const *__addr) {12115 // CHECK-LABEL: test_mm512_i32logather_pd12116 // CHECK: @llvm.x86.avx512.mask.gather.dpd.51212117 return _mm512_i32logather_pd(__index, __addr, 2);12118}12119 12120__m512d test_mm512_mask_i32logather_pd(__m512d __v1_old, __mmask8 __mask, __m512i __index, void const *__addr) {12121 // CHECK-LABEL: test_mm512_mask_i32logather_pd12122 // CHECK: @llvm.x86.avx512.mask.gather.dpd.51212123 return _mm512_mask_i32logather_pd(__v1_old, __mask, __index, __addr, 2);12124}12125 12126void test_mm512_i32loscatter_pd(void *__addr, __m512i __index, __m512d __v1) {12127 // CHECK-LABEL: test_mm512_i32loscatter_pd12128 // CHECK: @llvm.x86.avx512.mask.scatter.dpd.51212129 return _mm512_i32loscatter_pd(__addr, __index, __v1, 2);12130}12131 12132void test_mm512_mask_i32loscatter_pd(void *__addr, __mmask8 __mask, __m512i __index, __m512d __v1) {12133 // CHECK-LABEL: test_mm512_mask_i32loscatter_pd12134 // CHECK: @llvm.x86.avx512.mask.scatter.dpd.51212135 return _mm512_mask_i32loscatter_pd(__addr, __mask, __index, __v1, 2);12136}12137 12138__m512i test_mm512_i32logather_epi64(__m512i __index, void const *__addr) {12139 // CHECK-LABEL: test_mm512_i32logather_epi6412140 // CHECK: @llvm.x86.avx512.mask.gather.dpq.51212141 return _mm512_i32logather_epi64(__index, __addr, 2);12142}12143 12144__m512i test_mm512_mask_i32logather_epi64(__m512i __v1_old, __mmask8 __mask, __m512i __index, void const *__addr) {12145 // CHECK-LABEL: test_mm512_mask_i32logather_epi6412146 // CHECK: @llvm.x86.avx512.mask.gather.dpq.51212147 return _mm512_mask_i32logather_epi64(__v1_old, __mask, __index, __addr, 2);12148}12149 12150void test_mm512_i32loscatter_epi64(void *__addr, __m512i __index, __m512i __v1) {12151 // CHECK-LABEL: test_mm512_i32loscatter_epi6412152 // CHECK: @llvm.x86.avx512.mask.scatter.dpq.51212153 _mm512_i32loscatter_epi64(__addr, __index, __v1, 2);12154}12155 12156void test_mm512_mask_i32loscatter_epi64(void *__addr, __mmask8 __mask, __m512i __index, __m512i __v1) {12157 // CHECK-LABEL: test_mm512_mask_i32loscatter_epi6412158 // CHECK: @llvm.x86.avx512.mask.scatter.dpq.51212159 _mm512_mask_i32loscatter_epi64(__addr, __mask, __index, __v1, 2);12160}12161 12162 12163TEST_CONSTEXPR(match_m512d(12164 _mm512_permutex2var_pd((__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0},12165 (__m512i)(__v8di){0, 15, 16, 23, 1, 17, 2, 18},12166 (__m512d){101.0, 102.0, 103.0, 104.0, 105.0, 106.0, 107.0, 108.0}),12167 1.0, 108.0, 1.0, 8.0, 2.0, 2.0, 3.0, 3.0));12168TEST_CONSTEXPR(match_m512d(12169 _mm512_mask_permutex2var_pd((__m512d){-1.0, -2.0, -3.0, -4.0, -5.0, -6.0, -7.0, -8.0},12170 0xAA,12171 (__m512i)(__v8di){0, 15, 16, 23, 1, 17, 2, 18},12172 (__m512d){101.0, 102.0, 103.0, 104.0, 105.0, 106.0, 107.0, 108.0}),12173 -1.0, 108.0, -3.0, -8.0, -5.0, -2.0, -7.0, -3.0));12174TEST_CONSTEXPR(match_m512d(12175 _mm512_maskz_permutex2var_pd(0x55, (__m512d){1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0},12176 (__m512i)(__v8di){0, 15, 16, 23, 1, 17, 2, 18},12177 (__m512d){101.0, 102.0, 103.0, 104.0, 105.0, 106.0, 107.0, 108.0}),12178 1.0, 0.0, 1.0, 0.0, 2.0, 0.0, 3.0, 0.0));12179 12180TEST_CONSTEXPR(match_m512(12181 _mm512_permutex2var_ps((__m512){1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f,12182 9.f, 10.f, 11.f, 12.f, 13.f, 14.f, 15.f, 16.f},12183 (__m512i)(__v16si){0, 15, 16, 31, 1, 17, 2, 18,12184 3, 19, 4, 20, 5, 21, 6, 22},12185 (__m512){101.f, 102.f, 103.f, 104.f, 105.f, 106.f, 107.f, 108.f,12186 109.f, 110.f, 111.f, 112.f, 113.f, 114.f, 115.f, 116.f}),12187 1.f, 16.f, 101.f, 116.f, 2.f, 102.f, 3.f, 103.f,12188 4.f, 104.f, 5.f, 105.f, 6.f, 106.f, 7.f, 107.f));12189TEST_CONSTEXPR(match_m512(12190 _mm512_mask_permutex2var_ps((__m512){-1.f, -2.f, -3.f, -4.f, -5.f, -6.f, -7.f, -8.f,12191 -9.f, -10.f, -11.f, -12.f, -13.f, -14.f, -15.f, -16.f},12192 0xAAAA,12193 (__m512i)(__v16si){0, 15, 16, 31, 1, 17, 2, 18,12194 3, 19, 4, 20, 5, 21, 6, 22},12195 (__m512){101.f, 102.f, 103.f, 104.f, 105.f, 106.f, 107.f, 108.f,12196 109.f, 110.f, 111.f, 112.f, 113.f, 114.f, 115.f, 116.f}),12197 -1.f, -16.f, -3.f, 116.f, -5.f, 102.f, -7.f, 103.f,12198 -9.f, 104.f, -11.f, 105.f, -13.f, 106.f, -15.f, 107.f));12199 12200TEST_CONSTEXPR(match_v16si(12201 _mm512_permutex2var_epi32((__m512i)(__v16si){1, 2, 3, 4, 5, 6, 7, 8,12202 9, 10, 11, 12, 13, 14, 15, 16},12203 (__m512i)(__v16si){0, 15, 16, 31, 1, 17, 2, 18,12204 3, 19, 4, 20, 5, 21, 6, 22},12205 (__m512i)(__v16si){101, 102, 103, 104, 105, 106, 107, 108,12206 109, 110, 111, 112, 113, 114, 115, 116}),12207 1, 16, 101, 116, 2, 102, 3, 103,12208 4, 104, 5, 105, 6, 106, 7, 107));12209TEST_CONSTEXPR(match_v16si(12210 _mm512_maskz_permutex2var_epi32(0x5555,12211 (__m512i)(__v16si){1, 2, 3, 4, 5, 6, 7, 8,12212 9, 10, 11, 12, 13, 14, 15, 16},12213 (__m512i)(__v16si){0, 15, 16, 31, 1, 17, 2, 18,12214 3, 19, 4, 20, 5, 21, 6, 22},12215 (__m512i)(__v16si){101, 102, 103, 104, 105, 106, 107, 108,12216 109, 110, 111, 112, 113, 114, 115, 116}),12217 1, 0, 101, 0, 2, 0, 3, 0,12218 4, 0, 5, 0, 6, 0, 7, 0));12219 12220TEST_CONSTEXPR(match_v8di(12221 _mm512_permutex2var_epi64((__m512i)(__v8di){1, 2, 3, 4, 5, 6, 7, 8},12222 (__m512i)(__v8di){0, 15, 16, 23, 1, 17, 2, 18},12223 (__m512i)(__v8di){101, 102, 103, 104, 105, 106, 107, 108}),12224 1, 108, 1, 8, 2, 2, 3, 3));12225TEST_CONSTEXPR(match_v8di(12226 _mm512_mask_permutex2var_epi64((__m512i)(__v8di){-1, -2, -3, -4, -5, -6, -7, -8},12227 0xAA,12228 (__m512i)(__v8di){0, 15, 16, 23, 1, 17, 2, 18},12229 (__m512i)(__v8di){101, 102, 103, 104, 105, 106, 107, 108}),12230 -1, 108, -3, -8, -5, -2, -7, -3));12231