4687 lines · c
1// RUN: %clang_cc1 -x c -ffreestanding -flax-vector-conversions=none %s -triple=x86_64-unknown-unknown -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK,X642// RUN: %clang_cc1 -x c -ffreestanding -flax-vector-conversions=none %s -triple=i686-unknown-unknown -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK3// RUN: %clang_cc1 -x c++ -ffreestanding -flax-vector-conversions=none %s -triple=x86_64-unknown-unknown -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK,X644// RUN: %clang_cc1 -x c++ -ffreestanding -flax-vector-conversions=none %s -triple=i686-unknown-unknown -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK5 6// RUN: %clang_cc1 -x c -ffreestanding -flax-vector-conversions=none %s -triple=x86_64-unknown-unknown -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s --check-prefixes=CHECK,X647// RUN: %clang_cc1 -x c -ffreestanding -flax-vector-conversions=none %s -triple=i686-unknown-unknown -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s --check-prefixes=CHECK8// RUN: %clang_cc1 -x c++ -ffreestanding -flax-vector-conversions=none %s -triple=x86_64-unknown-unknown -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s --check-prefixes=CHECK,X649// RUN: %clang_cc1 -x c++ -ffreestanding -flax-vector-conversions=none %s -triple=i686-unknown-unknown -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror -fexperimental-new-constant-interpreter | FileCheck %s --check-prefixes=CHECK10 11 12#include <immintrin.h>13#include "builtin_test_helpers.h"14 15_Float16 test_mm512_cvtsh_h(__m512h __A) {16 // CHECK-LABEL: test_mm512_cvtsh_h17 // CHECK: extractelement <32 x half> %{{.*}}, i32 018 return _mm512_cvtsh_h(__A);19}20TEST_CONSTEXPR(_mm512_cvtsh_h((__m512h){-32.0, 31.0, -30.0, 29.0, -28.0, 27.0, -26.0, 25.0, -24.0, 23.0, -22.0, 21.0, -20.0, 19.0, -18.0, 17.0, -16.0, 15.0, -14.0, 13.0, -12.0, 11.0, -10.0, 9.0, -8.0, 7.0, -6.0, 5.0, -4.0, 3.0, -2.0, 1.0}) == -32.0);21 22__m128h test_mm_setzero_ph(void) {23 // CHECK-LABEL: test_mm_setzero_ph24 // CHECK: zeroinitializer25 return _mm_setzero_ph();26}27TEST_CONSTEXPR(match_m128h(_mm_setzero_ph(), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f));28 29__m256h test_mm256_setzero_ph(void) {30 // CHECK-LABEL: test_mm256_setzero_ph31 // CHECK: zeroinitializer32 return _mm256_setzero_ph();33}34TEST_CONSTEXPR(match_m256h(_mm256_setzero_ph(), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f));35 36__m256h test_mm256_undefined_ph(void) {37 // CHECK-LABEL: test_mm256_undefined_ph38 // CHECK: ret <16 x half> zeroinitializer39 return _mm256_undefined_ph();40}41 42__m512h test_mm512_setzero_ph(void) {43 // CHECK-LABEL: test_mm512_setzero_ph44 // CHECK: zeroinitializer45 return _mm512_setzero_ph();46}47TEST_CONSTEXPR(match_m512h(_mm512_setzero_ph(), +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f, +0.0f));48 49__m128h test_mm_undefined_ph(void) {50 // CHECK-LABEL: test_mm_undefined_ph51 // CHECK: ret <8 x half> zeroinitializer52 return _mm_undefined_ph();53}54 55__m512h test_mm512_undefined_ph(void) {56 // CHECK-LABEL: test_mm512_undefined_ph57 // CHECK: ret <32 x half> zeroinitializer58 return _mm512_undefined_ph();59}60 61__m512h test_mm512_set1_ph(_Float16 h) {62 // CHECK-LABEL: test_mm512_set1_ph63 // CHECK: insertelement <32 x half> {{.*}}, i32 064 // CHECK: insertelement <32 x half> {{.*}}, i32 165 // CHECK: insertelement <32 x half> {{.*}}, i32 266 // CHECK: insertelement <32 x half> {{.*}}, i32 367 // CHECK: insertelement <32 x half> {{.*}}, i32 468 // CHECK: insertelement <32 x half> {{.*}}, i32 569 // CHECK: insertelement <32 x half> {{.*}}, i32 670 // CHECK: insertelement <32 x half> {{.*}}, i32 771 // CHECK: insertelement <32 x half> {{.*}}, i32 872 // CHECK: insertelement <32 x half> {{.*}}, i32 973 // CHECK: insertelement <32 x half> {{.*}}, i32 1074 // CHECK: insertelement <32 x half> {{.*}}, i32 1175 // CHECK: insertelement <32 x half> {{.*}}, i32 1276 // CHECK: insertelement <32 x half> {{.*}}, i32 1377 // CHECK: insertelement <32 x half> {{.*}}, i32 1478 // CHECK: insertelement <32 x half> {{.*}}, i32 1579 // CHECK: insertelement <32 x half> {{.*}}, i32 1680 // CHECK: insertelement <32 x half> {{.*}}, i32 1781 // CHECK: insertelement <32 x half> {{.*}}, i32 1882 // CHECK: insertelement <32 x half> {{.*}}, i32 1983 // CHECK: insertelement <32 x half> {{.*}}, i32 2084 // CHECK: insertelement <32 x half> {{.*}}, i32 2185 // CHECK: insertelement <32 x half> {{.*}}, i32 2286 // CHECK: insertelement <32 x half> {{.*}}, i32 2387 // CHECK: insertelement <32 x half> {{.*}}, i32 2488 // CHECK: insertelement <32 x half> {{.*}}, i32 2589 // CHECK: insertelement <32 x half> {{.*}}, i32 2690 // CHECK: insertelement <32 x half> {{.*}}, i32 2791 // CHECK: insertelement <32 x half> {{.*}}, i32 2892 // CHECK: insertelement <32 x half> {{.*}}, i32 2993 // CHECK: insertelement <32 x half> {{.*}}, i32 3094 // CHECK: insertelement <32 x half> {{.*}}, i32 3195 return _mm512_set1_ph(h);96}97TEST_CONSTEXPR(match_m512h(_mm512_set1_ph(-101.0f), -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f, -101.0f));98 99__m512h test_mm512_set1_pch(_Float16 _Complex h) {100 // CHECK-LABEL: test_mm512_set1_pch101 // CHECK: insertelement <16 x float> {{.*}}, i32 0102 // CHECK: insertelement <16 x float> {{.*}}, i32 1103 // CHECK: insertelement <16 x float> {{.*}}, i32 2104 // CHECK: insertelement <16 x float> {{.*}}, i32 3105 // CHECK: insertelement <16 x float> {{.*}}, i32 4106 // CHECK: insertelement <16 x float> {{.*}}, i32 5107 // CHECK: insertelement <16 x float> {{.*}}, i32 6108 // CHECK: insertelement <16 x float> {{.*}}, i32 7109 // CHECK: insertelement <16 x float> {{.*}}, i32 8110 // CHECK: insertelement <16 x float> {{.*}}, i32 9111 // CHECK: insertelement <16 x float> {{.*}}, i32 10112 // CHECK: insertelement <16 x float> {{.*}}, i32 11113 // CHECK: insertelement <16 x float> {{.*}}, i32 12114 // CHECK: insertelement <16 x float> {{.*}}, i32 13115 // CHECK: insertelement <16 x float> {{.*}}, i32 14116 // CHECK: insertelement <16 x float> {{.*}}, i32 15117 // CHECK: bitcast <16 x float>{{.*}} to <32 x half>118 return _mm512_set1_pch(h);119}120TEST_CONSTEXPR(match_m512h(_mm512_set1_pch(1.0), 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0, 1.0, 0.0));121 122__m512h test_mm512_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,123 _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8,124 _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12,125 _Float16 __h13, _Float16 __h14, _Float16 __h15, _Float16 __h16,126 _Float16 __h17, _Float16 __h18, _Float16 __h19, _Float16 __h20,127 _Float16 __h21, _Float16 __h22, _Float16 __h23, _Float16 __h24,128 _Float16 __h25, _Float16 __h26, _Float16 __h27, _Float16 __h28,129 _Float16 __h29, _Float16 __h30, _Float16 __h31, _Float16 __h32) {130 // CHECK-LABEL: test_mm512_set_ph131 // CHECK: insertelement <32 x half> {{.*}}, i32 0132 // CHECK: insertelement <32 x half> {{.*}}, i32 1133 // CHECK: insertelement <32 x half> {{.*}}, i32 2134 // CHECK: insertelement <32 x half> {{.*}}, i32 3135 // CHECK: insertelement <32 x half> {{.*}}, i32 4136 // CHECK: insertelement <32 x half> {{.*}}, i32 5137 // CHECK: insertelement <32 x half> {{.*}}, i32 6138 // CHECK: insertelement <32 x half> {{.*}}, i32 7139 // CHECK: insertelement <32 x half> {{.*}}, i32 8140 // CHECK: insertelement <32 x half> {{.*}}, i32 9141 // CHECK: insertelement <32 x half> {{.*}}, i32 10142 // CHECK: insertelement <32 x half> {{.*}}, i32 11143 // CHECK: insertelement <32 x half> {{.*}}, i32 12144 // CHECK: insertelement <32 x half> {{.*}}, i32 13145 // CHECK: insertelement <32 x half> {{.*}}, i32 14146 // CHECK: insertelement <32 x half> {{.*}}, i32 15147 // CHECK: insertelement <32 x half> {{.*}}, i32 16148 // CHECK: insertelement <32 x half> {{.*}}, i32 17149 // CHECK: insertelement <32 x half> {{.*}}, i32 18150 // CHECK: insertelement <32 x half> {{.*}}, i32 19151 // CHECK: insertelement <32 x half> {{.*}}, i32 20152 // CHECK: insertelement <32 x half> {{.*}}, i32 21153 // CHECK: insertelement <32 x half> {{.*}}, i32 22154 // CHECK: insertelement <32 x half> {{.*}}, i32 23155 // CHECK: insertelement <32 x half> {{.*}}, i32 24156 // CHECK: insertelement <32 x half> {{.*}}, i32 25157 // CHECK: insertelement <32 x half> {{.*}}, i32 26158 // CHECK: insertelement <32 x half> {{.*}}, i32 27159 // CHECK: insertelement <32 x half> {{.*}}, i32 28160 // CHECK: insertelement <32 x half> {{.*}}, i32 29161 // CHECK: insertelement <32 x half> {{.*}}, i32 30162 // CHECK: insertelement <32 x half> {{.*}}, i32 31163 return _mm512_set_ph(__h1, __h2, __h3, __h4, __h5, __h6, __h7, __h8,164 __h9, __h10, __h11, __h12, __h13, __h14, __h15, __h16,165 __h17, __h18, __h19, __h20, __h21, __h22, __h23, __h24,166 __h25, __h26, __h27, __h28, __h29, __h30, __h31, __h32);167}168TEST_CONSTEXPR(match_m512h(_mm512_set_ph(32.0f, -31.0f, 30.0f, -29.0f, 28.0f, -27.0f, 26.0f, -25.0f,169 24.0f, -23.0f, 22.0f, -21.0f, 20.0f, -19.0f, 18.0f, -17.0f,170 16.0f, -15.0f, 14.0f, -13.0f, 12.0f, -11.0f, 10.0f, -9.0f,171 8.0f, -7.0f, 6.0f, -5.0f, 4.0f, -3.0f, 2.0f, -1.0f), -1.0f, 2.0f, -3.0f, 4.0f, -5.0f, 6.0f, -7.0f, 8.0f,172 -9.0f, 10.0f, -11.0f, 12.0f, -13.0f, 14.0f, -15.0f, 16.0f,173 -17.0f, 18.0f, -19.0f, 20.0f, -21.0f, 22.0f, -23.0f, 24.0f,174 -25.0f, 26.0f, -27.0f, 28.0f, -29.0f, 30.0f, -31.0f, 32.0f));175 176__m512h test_mm512_setr_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,177 _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8,178 _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12,179 _Float16 __h13, _Float16 __h14, _Float16 __h15, _Float16 __h16,180 _Float16 __h17, _Float16 __h18, _Float16 __h19, _Float16 __h20,181 _Float16 __h21, _Float16 __h22, _Float16 __h23, _Float16 __h24,182 _Float16 __h25, _Float16 __h26, _Float16 __h27, _Float16 __h28,183 _Float16 __h29, _Float16 __h30, _Float16 __h31, _Float16 __h32) {184 // CHECK-LABEL: test_mm512_setr_ph185 // CHECK: insertelement <32 x half> {{.*}}, i32 0186 // CHECK: insertelement <32 x half> {{.*}}, i32 1187 // CHECK: insertelement <32 x half> {{.*}}, i32 2188 // CHECK: insertelement <32 x half> {{.*}}, i32 3189 // CHECK: insertelement <32 x half> {{.*}}, i32 4190 // CHECK: insertelement <32 x half> {{.*}}, i32 5191 // CHECK: insertelement <32 x half> {{.*}}, i32 6192 // CHECK: insertelement <32 x half> {{.*}}, i32 7193 // CHECK: insertelement <32 x half> {{.*}}, i32 8194 // CHECK: insertelement <32 x half> {{.*}}, i32 9195 // CHECK: insertelement <32 x half> {{.*}}, i32 10196 // CHECK: insertelement <32 x half> {{.*}}, i32 11197 // CHECK: insertelement <32 x half> {{.*}}, i32 12198 // CHECK: insertelement <32 x half> {{.*}}, i32 13199 // CHECK: insertelement <32 x half> {{.*}}, i32 14200 // CHECK: insertelement <32 x half> {{.*}}, i32 15201 // CHECK: insertelement <32 x half> {{.*}}, i32 16202 // CHECK: insertelement <32 x half> {{.*}}, i32 17203 // CHECK: insertelement <32 x half> {{.*}}, i32 18204 // CHECK: insertelement <32 x half> {{.*}}, i32 19205 // CHECK: insertelement <32 x half> {{.*}}, i32 20206 // CHECK: insertelement <32 x half> {{.*}}, i32 21207 // CHECK: insertelement <32 x half> {{.*}}, i32 22208 // CHECK: insertelement <32 x half> {{.*}}, i32 23209 // CHECK: insertelement <32 x half> {{.*}}, i32 24210 // CHECK: insertelement <32 x half> {{.*}}, i32 25211 // CHECK: insertelement <32 x half> {{.*}}, i32 26212 // CHECK: insertelement <32 x half> {{.*}}, i32 27213 // CHECK: insertelement <32 x half> {{.*}}, i32 28214 // CHECK: insertelement <32 x half> {{.*}}, i32 29215 // CHECK: insertelement <32 x half> {{.*}}, i32 30216 // CHECK: insertelement <32 x half> {{.*}}, i32 31217 return _mm512_setr_ph(__h1, __h2, __h3, __h4, __h5, __h6, __h7, __h8,218 __h9, __h10, __h11, __h12, __h13, __h14, __h15, __h16,219 __h17, __h18, __h19, __h20, __h21, __h22, __h23, __h24,220 __h25, __h26, __h27, __h28, __h29, __h30, __h31, __h32);221}222TEST_CONSTEXPR(match_m512h(_mm512_setr_ph(1.0f, -3.0f, 5.0f, -7.0f, 9.0f, -11.0f, 13.0f, -15.0f,223 17.0f, -19.0f, 21.0f, -23.0f, 25.0f, -27.0f, 29.0f, -31.0f,224 33.0f, -35.0f, 37.0f, -39.0f, 41.0f, -43.0f, 45.0f, -47.0f,225 49.0f, -51.0f, 53.0f, -55.0f, 57.0f, -59.0f, 61.0f, -63.0f),226 1.0f, -3.0f, 5.0f, -7.0f, 9.0f, -11.0f, 13.0f, -15.0f,227 17.0f, -19.0f, 21.0f, -23.0f, 25.0f, -27.0f, 29.0f, -31.0f,228 33.0f, -35.0f, 37.0f, -39.0f, 41.0f, -43.0f, 45.0f, -47.0f,229 49.0f, -51.0f, 53.0f, -55.0f, 57.0f, -59.0f, 61.0f, -63.0f));230 231__m128 test_mm_castph_ps(__m128h A) {232 // CHECK-LABEL: test_mm_castph_ps233 // CHECK: bitcast <8 x half> %{{.*}} to <4 x float>234 return _mm_castph_ps(A);235}236 237__m256 test_mm256_castph_ps(__m256h A) {238 // CHECK-LABEL: test_mm256_castph_ps239 // CHECK: bitcast <16 x half> %{{.*}} to <8 x float>240 return _mm256_castph_ps(A);241}242 243__m512 test_mm512_castph_ps(__m512h A) {244 // CHECK-LABEL: test_mm512_castph_ps245 // CHECK: bitcast <32 x half> %{{.*}} to <16 x float>246 return _mm512_castph_ps(A);247}248 249__m128d test_mm_castph_pd(__m128h A) {250 // CHECK-LABEL: test_mm_castph_pd251 // CHECK: bitcast <8 x half> %{{.*}} to <2 x double>252 return _mm_castph_pd(A);253}254 255__m256d test_mm256_castph_pd(__m256h A) {256 // CHECK-LABEL: test_mm256_castph_pd257 // CHECK: bitcast <16 x half> %{{.*}} to <4 x double>258 return _mm256_castph_pd(A);259}260 261__m512d test_mm512_castph_pd(__m512h A) {262 // CHECK-LABEL: test_mm512_castph_pd263 // CHECK: bitcast <32 x half> %{{.*}} to <8 x double>264 return _mm512_castph_pd(A);265}266 267__m128i test_mm_castph_si128(__m128h A) {268 // CHECK-LABEL: test_mm_castph_si128269 // CHECK: bitcast <8 x half> %{{.*}} to <2 x i64>270 return _mm_castph_si128(A);271}272 273__m256i test_mm256_castph_si256(__m256h A) {274 // CHECK-LABEL: test_mm256_castph_si256275 // CHECK: bitcast <16 x half> %{{.*}} to <4 x i64>276 return _mm256_castph_si256(A);277}278 279__m512i test_mm512_castph_si512(__m512h A) {280 // CHECK-LABEL: test_mm512_castph_si512281 // CHECK: bitcast <32 x half> %{{.*}} to <8 x i64>282 return _mm512_castph_si512(A);283}284 285__m128h test_mm_castps_ph(__m128 A) {286 // CHECK-LABEL: test_mm_castps_ph287 // CHECK: bitcast <4 x float> %{{.*}} to <8 x half>288 return _mm_castps_ph(A);289}290 291__m256h test_mm256_castps_ph(__m256 A) {292 // CHECK-LABEL: test_mm256_castps_ph293 // CHECK: bitcast <8 x float> %{{.*}} to <16 x half>294 return _mm256_castps_ph(A);295}296 297__m512h test_mm512_castps_ph(__m512 A) {298 // CHECK-LABEL: test_mm512_castps_ph299 // CHECK: bitcast <16 x float> %{{.*}} to <32 x half>300 return _mm512_castps_ph(A);301}302 303__m128h test_mm_castpd_ph(__m128d A) {304 // CHECK-LABEL: test_mm_castpd_ph305 // CHECK: bitcast <2 x double> %{{.*}} to <8 x half>306 return _mm_castpd_ph(A);307}308 309__m256h test_mm256_castpd_ph(__m256d A) {310 // CHECK-LABEL: test_mm256_castpd_ph311 // CHECK: bitcast <4 x double> %{{.*}} to <16 x half>312 return _mm256_castpd_ph(A);313}314 315__m512h test_mm512_castpd_ph(__m512d A) {316 // CHECK-LABEL: test_mm512_castpd_ph317 // CHECK: bitcast <8 x double> %{{.*}} to <32 x half>318 return _mm512_castpd_ph(A);319}320 321__m128h test_mm_castsi128_ph(__m128i A) {322 // CHECK-LABEL: test_mm_castsi128_ph323 // CHECK: bitcast <2 x i64> %{{.*}} to <8 x half>324 return _mm_castsi128_ph(A);325}326 327__m256h test_mm256_castsi256_ph(__m256i A) {328 // CHECK-LABEL: test_mm256_castsi256_ph329 // CHECK: bitcast <4 x i64> %{{.*}} to <16 x half>330 return _mm256_castsi256_ph(A);331}332 333__m512h test_mm512_castsi512_ph(__m512i A) {334 // CHECK-LABEL: test_mm512_castsi512_ph335 // CHECK: bitcast <8 x i64> %{{.*}} to <32 x half>336 return _mm512_castsi512_ph(A);337}338 339__m128h test_mm256_castph256_ph128(__m256h __a) {340 // CHECK-LABEL: test_mm256_castph256_ph128341 // CHECK: shufflevector <16 x half> %{{.*}}, <16 x half> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>342 return _mm256_castph256_ph128(__a);343}344TEST_CONSTEXPR(match_m128h(_mm256_castph256_ph128((__m256h){-1.0, 2.0, -3.0, 4.0, -5.0, 6.0, -7.0, 8.0, -9.0, 10.0, -11.0, 12.0, -13.0, 14.0, -15.0, -16.0}), -1.0, 2.0, -3.0, 4.0, -5.0, 6.0, -7.0, 8.0));345 346__m128h test_mm512_castph512_ph128(__m512h __a) {347 // CHECK-LABEL: test_mm512_castph512_ph128348 // CHECK: shufflevector <32 x half> %{{.*}}, <32 x half> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>349 return _mm512_castph512_ph128(__a);350}351TEST_CONSTEXPR(match_m128h(_mm512_castph512_ph128((__m512h){0.0, -1.0, 2.0, -3.0, 4.0, -5.0, 6.0, -7.0, 8.0, -9.0, 10.0, -11.0, 12.0, -13.0, 14.0, -15.0, -16.0, -17.0, 18.0, -19.0, 20.0, -21.0, 22.0, -23.0, 24.0, -25.0, 26.0, -27.0, 28.0, -29.0, 30.0, -31.0}), 0.0, -1.0, 2.0, -3.0, 4.0, -5.0, 6.0, -7.0));352 353__m256h test_mm512_castph512_ph256(__m512h __a) {354 // CHECK-LABEL: test_mm512_castph512_ph256355 // CHECK: shufflevector <32 x half> %{{.*}}, <32 x half> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>356 return _mm512_castph512_ph256(__a);357}358TEST_CONSTEXPR(match_m256h(_mm512_castph512_ph256((__m512h){-1.0, 2.0, -3.0, 4.0, -5.0, 6.0, -7.0, 8.0, -9.0, 10.0, -11.0, 12.0, -13.0, 14.0, -15.0, -16.0, -17.0, 18.0, -19.0, 20.0, -21.0, 22.0, -23.0, 24.0, -25.0, 26.0, -27.0, 28.0, -29.0, 30.0, -31.0, 32.0}), -1.0, 2.0, -3.0, 4.0, -5.0, 6.0, -7.0, 8.0, -9.0, 10.0, -11.0, 12.0, -13.0, 14.0, -15.0, -16.0));359 360__m256h test_mm256_castph128_ph256(__m128h __a) {361 // CHECK-LABEL: test_mm256_castph128_ph256362 // CHECK: [[A:%.*]] = freeze <8 x half> poison 363 // CHECK: shufflevector <8 x half> %{{.*}}, <8 x half> [[A]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>364 return _mm256_castph128_ph256(__a);365}366 367__m512h test_mm512_castph128_ph512(__m128h __a) {368 // CHECK-LABEL: test_mm512_castph128_ph512369 // CHECK: [[B:%.*]] = freeze <16 x half> poison370 // CHECK: store <16 x half> [[B]], ptr [[BA:%.*]]371 // CHECK: [[A:%.*]] = freeze <8 x half> poison372 // CHECK: [[SV:%.*]] = shufflevector <8 x half> %{{.*}}, <8 x half> [[A]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>373 // CHECK: [[C:%.*]] = load <16 x half>, ptr [[BA]]374 // CHECK: shufflevector <16 x half> [[SV]], <16 x half> [[C]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>375 return _mm512_castph128_ph512(__a);376}377 378__m512h test_mm512_castph256_ph512(__m256h __a) {379 // CHECK-LABEL: test_mm512_castph256_ph512380 // CHECK: [[A:%.*]] = freeze <16 x half> poison 381 // CHECK: shufflevector <16 x half> %{{.*}}, <16 x half> [[A]], <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>382 return _mm512_castph256_ph512(__a);383}384 385__m256h test_mm256_zextph128_ph256(__m128h __a) {386 // CHECK-LABEL: test_mm256_zextph128_ph256387 // CHECK: shufflevector <8 x half> %{{.*}}, <8 x half> {{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>388 return _mm256_zextph128_ph256(__a);389}390TEST_CONSTEXPR(match_m256h(_mm256_zextph128_ph256((__m128h){1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16}), 1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16));391 392__m512h test_mm512_zextph128_ph512(__m128h __a) {393 // CHECK-LABEL: test_mm512_zextph128_ph512394 // CHECK: shufflevector <8 x half> %{{.*}}, <8 x half> {{.*}}, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>395 return _mm512_zextph128_ph512(__a);396}397TEST_CONSTEXPR(match_m512h(_mm512_zextph128_ph512((__m128h){1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16}), 1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16));398 399__m512h test_mm512_zextph256_ph512(__m256h __a) {400 // CHECK-LABEL: test_mm512_zextph256_ph512401 // CHECK: shufflevector <16 x half> %{{.*}}, <16 x half> {{.*}}, <32 x i32>402 return _mm512_zextph256_ph512(__a);403}404TEST_CONSTEXPR(match_m512h(_mm512_zextph256_ph512((__m256h){1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16, 9.0f16, 10.0f16, 11.0f16, 12.0f16, 13.0f16, 14.0f16, 15.0f16, 16.0f16}), 1.0f16, 2.0f16, 3.0f16, 4.0f16, 5.0f16, 6.0f16, 7.0f16, 8.0f16, 9.0f16, 10.0f16, 11.0f16, 12.0f16, 13.0f16, 14.0f16, 15.0f16, 16.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16, 0.0f16));405 406int test_mm_comi_round_sh(__m128h __A, __m128h __B) {407 // CHECK-LABEL: test_mm_comi_round_sh408 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 0, i32 8)409 return _mm_comi_round_sh(__A, __B, 0, _MM_FROUND_NO_EXC);410}411 412int test_mm_comi_sh(__m128h __A, __m128h __B) {413 // CHECK-LABEL: test_mm_comi_sh414 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 0, i32 4)415 return _mm_comi_sh(__A, __B, 0);416}417 418int test_mm_comieq_sh(__m128h __A, __m128h __B) {419 // CHECK-LABEL: test_mm_comieq_sh420 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 16, i32 4)421 return _mm_comieq_sh(__A, __B);422}423 424int test_mm_comilt_sh(__m128h __A, __m128h __B) {425 // CHECK-LABEL: test_mm_comilt_sh426 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 1, i32 4)427 return _mm_comilt_sh(__A, __B);428}429 430int test_mm_comile_sh(__m128h __A, __m128h __B) {431 // CHECK-LABEL: test_mm_comile_sh432 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 2, i32 4)433 return _mm_comile_sh(__A, __B);434}435 436int test_mm_comigt_sh(__m128h __A, __m128h __B) {437 // CHECK-LABEL: test_mm_comigt_sh438 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 14, i32 4)439 return _mm_comigt_sh(__A, __B);440}441 442int test_mm_comige_sh(__m128h __A, __m128h __B) {443 // CHECK-LABEL: test_mm_comige_sh444 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 13, i32 4)445 return _mm_comige_sh(__A, __B);446}447 448int test_mm_comineq_sh(__m128h __A, __m128h __B) {449 // CHECK-LABEL: test_mm_comineq_sh450 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 20, i32 4)451 return _mm_comineq_sh(__A, __B);452}453 454int test_mm_ucomieq_sh(__m128h __A, __m128h __B) {455 // CHECK-LABEL: test_mm_ucomieq_sh456 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 0, i32 4)457 return _mm_ucomieq_sh(__A, __B);458}459 460int test_mm_ucomilt_sh(__m128h __A, __m128h __B) {461 // CHECK-LABEL: test_mm_ucomilt_sh462 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 17, i32 4)463 return _mm_ucomilt_sh(__A, __B);464}465 466int test_mm_ucomile_sh(__m128h __A, __m128h __B) {467 // CHECK-LABEL: test_mm_ucomile_sh468 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 18, i32 4)469 return _mm_ucomile_sh(__A, __B);470}471 472int test_mm_ucomigt_sh(__m128h __A, __m128h __B) {473 // CHECK-LABEL: test_mm_ucomigt_sh474 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 30, i32 4)475 return _mm_ucomigt_sh(__A, __B);476}477 478int test_mm_ucomige_sh(__m128h __A, __m128h __B) {479 // CHECK-LABEL: test_mm_ucomige_sh480 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 29, i32 4)481 return _mm_ucomige_sh(__A, __B);482}483 484int test_mm_ucomineq_sh(__m128h __A, __m128h __B) {485 // CHECK-LABEL: test_mm_ucomineq_sh486 // CHECK: @llvm.x86.avx512fp16.vcomi.sh(<8 x half> %{{.}}, <8 x half> %{{.}}, i32 4, i32 4)487 return _mm_ucomineq_sh(__A, __B);488}489 490__m512h test_mm512_add_ph(__m512h __A, __m512h __B) {491 // CHECK-LABEL: test_mm512_add_ph492 // CHECK: %{{.*}} = fadd <32 x half> %{{.*}}, %{{.*}}493 return _mm512_add_ph(__A, __B);494}495 496__m512h test_mm512_mask_add_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {497 // CHECK-LABEL: test_mm512_mask_add_ph498 // CHECK: %{{.*}} = fadd <32 x half> %{{.*}}, %{{.*}}499 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}500 return (__m512h)_mm512_mask_add_ph(__W, __U, __A, __B);501}502 503__m512h test_mm512_maskz_add_ph(__mmask32 __U, __m512h __A, __m512h __B) {504 // CHECK-LABEL: test_mm512_maskz_add_ph505 // CHECK: %{{.*}} = fadd <32 x half> %{{.*}}, %{{.*}}506 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}507 return _mm512_maskz_add_ph(__U, __A, __B);508}509 510__m512h test_mm512_add_round_ph(__m512h __A, __m512h __B) {511 // CHECK-LABEL: test_mm512_add_round_ph512 // CHECK: @llvm.x86.avx512fp16.add.ph.512513 return _mm512_add_round_ph(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);514}515__m512h test_mm512_mask_add_round_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {516 // CHECK-LABEL: test_mm512_mask_add_round_ph517 // CHECK: @llvm.x86.avx512fp16.add.ph.512518 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}519 return _mm512_mask_add_round_ph(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);520}521__m512h test_mm512_maskz_add_round_ph(__mmask32 __U, __m512h __A, __m512h __B) {522 // CHECK-LABEL: test_mm512_maskz_add_round_ph523 // CHECK: @llvm.x86.avx512fp16.add.ph.512524 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}525 return _mm512_maskz_add_round_ph(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);526}527 528__m512h test_mm512_sub_ph(__m512h __A, __m512h __B) {529 // CHECK-LABEL: test_mm512_sub_ph530 // CHECK: %{{.*}} = fsub <32 x half> %{{.*}}, %{{.*}}531 return _mm512_sub_ph(__A, __B);532}533 534__m512h test_mm512_mask_sub_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {535 // CHECK-LABEL: test_mm512_mask_sub_ph536 // CHECK: %{{.*}} = fsub <32 x half> %{{.*}}, %{{.*}}537 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}538 return (__m512h)_mm512_mask_sub_ph(__W, __U, __A, __B);539}540 541__m512h test_mm512_maskz_sub_ph(__mmask32 __U, __m512h __A, __m512h __B) {542 // CHECK-LABEL: test_mm512_maskz_sub_ph543 // CHECK: %{{.*}} = fsub <32 x half> %{{.*}}, %{{.*}}544 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}545 return _mm512_maskz_sub_ph(__U, __A, __B);546}547 548__m512h test_mm512_sub_round_ph(__m512h __A, __m512h __B) {549 // CHECK-LABEL: test_mm512_sub_round_ph550 // CHECK: @llvm.x86.avx512fp16.sub.ph.512551 return _mm512_sub_round_ph(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);552}553__m512h test_mm512_mask_sub_round_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {554 // CHECK-LABEL: test_mm512_mask_sub_round_ph555 // CHECK: @llvm.x86.avx512fp16.sub.ph.512556 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}557 return _mm512_mask_sub_round_ph(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);558}559__m512h test_mm512_maskz_sub_round_ph(__mmask32 __U, __m512h __A, __m512h __B) {560 // CHECK-LABEL: test_mm512_maskz_sub_round_ph561 // CHECK: @llvm.x86.avx512fp16.sub.ph.512562 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}563 return _mm512_maskz_sub_round_ph(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);564}565 566__m512h test_mm512_mul_ph(__m512h __A, __m512h __B) {567 // CHECK-LABEL: test_mm512_mul_ph568 // CHECK: %{{.*}} = fmul <32 x half> %{{.*}}, %{{.*}}569 return _mm512_mul_ph(__A, __B);570}571 572__m512h test_mm512_mask_mul_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {573 // CHECK-LABEL: test_mm512_mask_mul_ph574 // CHECK: %{{.*}} = fmul <32 x half> %{{.*}}, %{{.*}}575 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}576 return (__m512h)_mm512_mask_mul_ph(__W, __U, __A, __B);577}578 579__m512h test_mm512_maskz_mul_ph(__mmask32 __U, __m512h __A, __m512h __B) {580 // CHECK-LABEL: test_mm512_maskz_mul_ph581 // CHECK: %{{.*}} = fmul <32 x half> %{{.*}}, %{{.*}}582 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}583 return _mm512_maskz_mul_ph(__U, __A, __B);584}585 586__m512h test_mm512_mul_round_ph(__m512h __A, __m512h __B) {587 // CHECK-LABEL: test_mm512_mul_round_ph588 // CHECK: @llvm.x86.avx512fp16.mul.ph.512589 return _mm512_mul_round_ph(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);590}591__m512h test_mm512_mask_mul_round_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {592 // CHECK-LABEL: test_mm512_mask_mul_round_ph593 // CHECK: @llvm.x86.avx512fp16.mul.ph.512594 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}595 return _mm512_mask_mul_round_ph(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);596}597__m512h test_mm512_maskz_mul_round_ph(__mmask32 __U, __m512h __A, __m512h __B) {598 // CHECK-LABEL: test_mm512_maskz_mul_round_ph599 // CHECK: @llvm.x86.avx512fp16.mul.ph.512600 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}601 return _mm512_maskz_mul_round_ph(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);602}603 604__m512h test_mm512_div_ph(__m512h __A, __m512h __B) {605 // CHECK-LABEL: test_mm512_div_ph606 // CHECK: %{{.*}} = fdiv <32 x half> %{{.*}}, %{{.*}}607 return _mm512_div_ph(__A, __B);608}609 610__m512h test_mm512_mask_div_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {611 // CHECK-LABEL: test_mm512_mask_div_ph612 // CHECK: %{{.*}} = fdiv <32 x half> %{{.*}}, %{{.*}}613 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}614 return (__m512h)_mm512_mask_div_ph(__W, __U, __A, __B);615}616 617__m512h test_mm512_maskz_div_ph(__mmask32 __U, __m512h __A, __m512h __B) {618 // CHECK-LABEL: test_mm512_maskz_div_ph619 // CHECK: %{{.*}} = fdiv <32 x half> %{{.*}}, %{{.*}}620 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}621 return _mm512_maskz_div_ph(__U, __A, __B);622}623 624__m512h test_mm512_div_round_ph(__m512h __A, __m512h __B) {625 // CHECK-LABEL: test_mm512_div_round_ph626 // CHECK: @llvm.x86.avx512fp16.div.ph.512627 return _mm512_div_round_ph(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);628}629__m512h test_mm512_mask_div_round_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {630 // CHECK-LABEL: test_mm512_mask_div_round_ph631 // CHECK: @llvm.x86.avx512fp16.div.ph.512632 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}633 return _mm512_mask_div_round_ph(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);634}635__m512h test_mm512_maskz_div_round_ph(__mmask32 __U, __m512h __A, __m512h __B) {636 // CHECK-LABEL: test_mm512_maskz_div_round_ph637 // CHECK: @llvm.x86.avx512fp16.div.ph.512638 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}639 return _mm512_maskz_div_round_ph(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);640}641 642__m512h test_mm512_min_ph(__m512h __A, __m512h __B) {643 // CHECK-LABEL: test_mm512_min_ph644 // CHECK: @llvm.x86.avx512fp16.min.ph.512645 return _mm512_min_ph(__A, __B);646}647 648__m512h test_mm512_mask_min_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {649 // CHECK-LABEL: test_mm512_mask_min_ph650 // CHECK: @llvm.x86.avx512fp16.min.ph.512651 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}652 return (__m512h)_mm512_mask_min_ph(__W, __U, __A, __B);653}654 655__m512h test_mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) {656 // CHECK-LABEL: test_mm512_maskz_min_ph657 // CHECK: @llvm.x86.avx512fp16.min.ph.512658 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}659 return _mm512_maskz_min_ph(__U, __A, __B);660}661 662__m512h test_mm512_min_round_ph(__m512h __A, __m512h __B) {663 // CHECK-LABEL: test_mm512_min_round_ph664 // CHECK: @llvm.x86.avx512fp16.min.ph.512665 return _mm512_min_round_ph(__A, __B, _MM_FROUND_NO_EXC);666}667__m512h test_mm512_mask_min_round_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {668 // CHECK-LABEL: test_mm512_mask_min_round_ph669 // CHECK: @llvm.x86.avx512fp16.min.ph.512670 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}671 return _mm512_mask_min_round_ph(__W, __U, __A, __B, _MM_FROUND_NO_EXC);672}673__m512h test_mm512_maskz_min_round_ph(__mmask32 __U, __m512h __A, __m512h __B) {674 // CHECK-LABEL: test_mm512_maskz_min_round_ph675 // CHECK: @llvm.x86.avx512fp16.min.ph.512676 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}677 return _mm512_maskz_min_round_ph(__U, __A, __B, _MM_FROUND_NO_EXC);678}679 680__m512h test_mm512_max_ph(__m512h __A, __m512h __B) {681 // CHECK-LABEL: test_mm512_max_ph682 // CHECK: @llvm.x86.avx512fp16.max.ph.512683 684 return _mm512_max_ph(__A, __B);685}686 687__m512h test_mm512_mask_max_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {688 // CHECK-LABEL: test_mm512_mask_max_ph689 // CHECK: @llvm.x86.avx512fp16.max.ph.512690 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}691 return (__m512h)_mm512_mask_max_ph(__W, __U, __A, __B);692}693 694__m512h test_mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) {695 // CHECK-LABEL: test_mm512_maskz_max_ph696 // CHECK: @llvm.x86.avx512fp16.max.ph.512697 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}698 return _mm512_maskz_max_ph(__U, __A, __B);699}700 701__m512h test_mm512_max_round_ph(__m512h __A, __m512h __B) {702 // CHECK-LABEL: test_mm512_max_round_ph703 // CHECK: @llvm.x86.avx512fp16.max.ph.512704 return _mm512_max_round_ph(__A, __B, _MM_FROUND_NO_EXC);705}706 707__m512h test_mm512_mask_max_round_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {708 // CHECK-LABEL: test_mm512_mask_max_round_ph709 // CHECK: @llvm.x86.avx512fp16.max.ph.512710 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}711 return _mm512_mask_max_round_ph(__W, __U, __A, __B, _MM_FROUND_NO_EXC);712}713 714__m512h test_mm512_maskz_max_round_ph(__mmask32 __U, __m512h __A, __m512h __B) {715 // CHECK-LABEL: test_mm512_maskz_max_round_ph716 // CHECK: @llvm.x86.avx512fp16.max.ph.512717 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}718 return _mm512_maskz_max_round_ph(__U, __A, __B, _MM_FROUND_NO_EXC);719}720 721__m512h test_mm512_abs_ph(__m512h a) {722 // CHECK-LABEL: test_mm512_abs_ph723 // CHECK: and <16 x i32>724 return _mm512_abs_ph(a);725}726TEST_CONSTEXPR(match_m512h(_mm512_abs_ph((__m512h){-1.0, 2.0, -3.0, 4.0, -5.0, 6.0, -7.0, 8.0, -9.0, 10.0, -11.0, 12.0, -13.0, 14.0, -15.0, -16.0, -17.0, 18.0, -19.0, 20.0, -21.0, 22.0, -23.0, 24.0, -25.0, 26.0, -27.0, 28.0, -29.0, 30.0, -31.0, 32.0}), 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0, 25.0, 26.0, 27.0, 28.0, 29.0, 30.0, 31.0, 32.0));727 728__m512h test_mm512_conj_pch(__m512h __A) {729 // CHECK-LABEL: test_mm512_conj_pch730 // CHECK: %{{.*}} = bitcast <32 x half> %{{.*}} to <8 x i64>731 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <16 x i32>732 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <16 x i32>733 // CHECK: %{{.*}} = xor <16 x i32> %{{.*}}, %{{.*}}734 // CHECK: %{{.*}} = bitcast <16 x i32> %{{.*}} to <8 x i64>735 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <32 x half>736 return _mm512_conj_pch(__A);737}738 739__m512h test_mm512_mask_conj_pch(__m512h __W, __mmask32 __U, __m512h __A) {740 // CHECK-LABEL: test_mm512_mask_conj_pch741 // CHECK: %{{.*}} = trunc i32 %{{.*}} to i16742 // CHECK: %{{.*}} = bitcast <32 x half> %{{.*}} to <8 x i64>743 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <16 x i32>744 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <16 x i32>745 // CHECK: %{{.*}} = xor <16 x i32> %{{.*}}, %{{.*}}746 // CHECK: %{{.*}} = bitcast <16 x i32> %{{.*}} to <8 x i64>747 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <32 x half>748 // CHECK: %{{.*}} = bitcast <32 x half> %{{.*}} to <16 x float>749 // CHECK: %{{.*}} = bitcast i16 %{{.*}} to <16 x i1>750 // CHECK: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}751 // CHECK: %{{.*}} = bitcast <16 x float> %{{.*}} to <32 x half>752 return _mm512_mask_conj_pch(__W, __U, __A);753}754 755__m512h test_mm512_maskz_conj_pch(__mmask32 __U, __m512h __A) {756 // CHECK-LABEL: test_mm512_maskz_conj_pch757 // CHECK: %{{.*}} = trunc i32 %{{.*}} to i16758 // CHECK: %{{.*}} = bitcast <32 x half> %{{.*}} to <8 x i64>759 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <16 x i32>760 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <16 x i32>761 // CHECK: %{{.*}} = xor <16 x i32> %{{.*}}, %{{.*}}762 // CHECK: %{{.*}} = bitcast <16 x i32> %{{.*}} to <8 x i64>763 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <32 x half>764 // CHECK: %{{.*}} = bitcast i16 %{{.*}} to <16 x i1>765 // CHECK: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}766 // CHECK: %{{.*}} = bitcast <16 x float> %{{.*}} to <32 x half>767 return _mm512_maskz_conj_pch(__U, __A);768}769 770__m128h test_mm_add_round_sh(__m128h __A, __m128h __B) {771 // CHECK-LABEL: test_mm_add_round_sh772 // CHECK: @llvm.x86.avx512fp16.mask.add.sh.round773 return _mm_add_round_sh(__A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);774}775__m128h test_mm_mask_add_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {776 // CHECK-LABEL: test_mm_mask_add_round_sh777 // CHECK: @llvm.x86.avx512fp16.mask.add.sh.round778 return _mm_mask_add_round_sh(__W, __U, __A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);779}780__m128h test_mm_maskz_add_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {781 // CHECK-LABEL: test_mm_maskz_add_round_sh782 // CHECK: @llvm.x86.avx512fp16.mask.add.sh.round783 return _mm_maskz_add_round_sh(__U, __A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);784}785__m128h test_mm_mask_add_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {786 // CHECK-LABEL: test_mm_mask_add_sh787 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0788 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0789 // CHECK: %{{.*}} = fadd half %{{.*}}, %{{.*}}790 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0791 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0792 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0793 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>794 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 0795 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}796 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 0797 return _mm_mask_add_sh(__W, __U, __A, __B);798}799TEST_CONSTEXPR(match_m128h(_mm_mask_add_sh((__m128h)(__v8hf){1.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f},(__mmask8)0x01,(__m128h)(__v8hf){10.0f,20.0f,30.0f,40.0f,50.0f,60.0f,70.0f,80.0f},(__m128h)(__v8hf){100.0f,200.0f,300.0f,400.0f,500.0f,600.0f,700.0f,800.0f}),110.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f));800 801__m128h test_mm_maskz_add_sh(__mmask8 __U, __m128h __A, __m128h __B) {802 // CHECK-LABEL: test_mm_maskz_add_sh803 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0804 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0805 // CHECK: %{{.*}} = fadd half %{{.*}}, %{{.*}}806 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0807 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0808 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0809 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>810 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 0811 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}812 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 0813 return _mm_maskz_add_sh(__U, __A, __B);814}815TEST_CONSTEXPR(match_m128h(_mm_maskz_add_sh((__mmask8)0x01,(__m128h)(__v8hf){10.0f,20.0f,30.0f,40.0f,50.0f,60.0f,70.0f,80.0f},(__m128h)(__v8hf){100.0f,200.0f,300.0f,400.0f,500.0f,600.0f,700.0f,800.0f}),110.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f));816 817__m128h test_mm_add_sh(__m128h __A, __m128h __B) {818 // CHECK-LABEL: test_mm_add_sh819 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0820 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0821 // CHECK: %{{.*}} = fadd half %{{.*}}, %{{.*}}822 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0823 return _mm_add_sh(__A, __B);824}825 826__m128h test_mm_sub_round_sh(__m128h __A, __m128h __B) {827 // CHECK-LABEL: test_mm_sub_round_sh828 // CHECK: @llvm.x86.avx512fp16.mask.sub.sh.round829 return _mm_sub_round_sh(__A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);830}831__m128h test_mm_mask_sub_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {832 // CHECK-LABEL: test_mm_mask_sub_round_sh833 // CHECK: @llvm.x86.avx512fp16.mask.sub.sh.round834 return _mm_mask_sub_round_sh(__W, __U, __A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);835}836__m128h test_mm_maskz_sub_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {837 // CHECK-LABEL: test_mm_maskz_sub_round_sh838 // CHECK: @llvm.x86.avx512fp16.mask.sub.sh.round839 return _mm_maskz_sub_round_sh(__U, __A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);840}841__m128h test_mm_mask_sub_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {842 // CHECK-LABEL: test_mm_mask_sub_sh843 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0844 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0845 // CHECK: %{{.*}} = fsub half %{{.*}}, %{{.*}}846 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0847 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0848 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0849 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>850 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 0851 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}852 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 0853 return _mm_mask_sub_sh(__W, __U, __A, __B);854}855TEST_CONSTEXPR(match_m128h(_mm_mask_sub_sh((__m128h)(__v8hf){1.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f},(__mmask8)0x01,(__m128h)(__v8hf){20.0f,21.0f,22.0f,23.0f,24.0f,25.0f,26.0f,27.0f},(__m128h)(__v8hf){5.0f,6.0f,7.0f,8.0f,9.0f,10.0f,11.0f,12.0f}),15.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f));856 857__m128h test_mm_maskz_sub_sh(__mmask8 __U, __m128h __A, __m128h __B) {858 // CHECK-LABEL: test_mm_maskz_sub_sh859 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0860 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0861 // CHECK: %{{.*}} = fsub half %{{.*}}, %{{.*}}862 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0863 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0864 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0865 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>866 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 0867 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}868 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 0869 return _mm_maskz_sub_sh(__U, __A, __B);870}871TEST_CONSTEXPR(match_m128h(_mm_maskz_sub_sh((__mmask8)0x01,(__m128h)(__v8hf){20.0f,21.0f,22.0f,23.0f,24.0f,25.0f,26.0f,27.0f},(__m128h)(__v8hf){5.0f,6.0f,7.0f,8.0f,9.0f,10.0f,11.0f,12.0f}),15.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f));872 873__m128h test_mm_sub_sh(__m128h __A, __m128h __B) {874 // CHECK-LABEL: test_mm_sub_sh875 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0876 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0877 // CHECK: %{{.*}} = fsub half %{{.*}}, %{{.*}}878 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0879 return _mm_sub_sh(__A, __B);880}881 882__m128h test_mm_mul_round_sh(__m128h __A, __m128h __B) {883 // CHECK-LABEL: test_mm_mul_round_sh884 // CHECK: @llvm.x86.avx512fp16.mask.mul.sh.round885 return _mm_mul_round_sh(__A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);886}887__m128h test_mm_mask_mul_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {888 // CHECK-LABEL: test_mm_mask_mul_round_sh889 // CHECK: @llvm.x86.avx512fp16.mask.mul.sh.round890 return _mm_mask_mul_round_sh(__W, __U, __A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);891}892__m128h test_mm_maskz_mul_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {893 // CHECK-LABEL: test_mm_maskz_mul_round_sh894 // CHECK: @llvm.x86.avx512fp16.mask.mul.sh.round895 return _mm_maskz_mul_round_sh(__U, __A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);896}897__m128h test_mm_mask_mul_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {898 // CHECK-LABEL: test_mm_mask_mul_sh899 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0900 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0901 // CHECK: %{{.*}} = fmul half %{{.*}}, %{{.*}}902 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0903 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0904 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0905 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>906 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 0907 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}908 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 0909 return _mm_mask_mul_sh(__W, __U, __A, __B);910}911TEST_CONSTEXPR(match_m128h(_mm_mask_mul_sh((__m128h)(__v8hf){1.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f},(__mmask8)0x01,(__m128h)(__v8hf){3.0f,4.0f,5.0f,6.0f,7.0f,8.0f,9.0f,10.0f},(__m128h)(__v8hf){4.0f,5.0f,6.0f,7.0f,8.0f,9.0f,10.0f,11.0f}),12.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f));912 913__m128h test_mm_maskz_mul_sh(__mmask8 __U, __m128h __A, __m128h __B) {914 // CHECK-LABEL: test_mm_maskz_mul_sh915 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0916 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0917 // CHECK: %{{.*}} = fmul half %{{.*}}, %{{.*}}918 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0919 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0920 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0921 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>922 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 0923 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}924 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 0925 return _mm_maskz_mul_sh(__U, __A, __B);926}927TEST_CONSTEXPR(match_m128h(_mm_maskz_mul_sh((__mmask8)0x01,(__m128h)(__v8hf){3.0f,4.0f,5.0f,6.0f,7.0f,8.0f,9.0f,10.0f},(__m128h)(__v8hf){4.0f,5.0f,6.0f,7.0f,8.0f,9.0f,10.0f,11.0f}),12.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f));928 929__m128h test_mm_mul_sh(__m128h __A, __m128h __B) {930 // CHECK-LABEL: test_mm_mul_sh931 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0932 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0933 // CHECK: %{{.*}} = fmul half %{{.*}}, %{{.*}}934 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0935 return _mm_mul_sh(__A, __B);936}937 938__m128h test_mm_div_round_sh(__m128h __A, __m128h __B) {939 // CHECK-LABEL: test_mm_div_round_sh940 // CHECK: @llvm.x86.avx512fp16.mask.div.sh.round941 return _mm_div_round_sh(__A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);942}943__m128h test_mm_mask_div_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {944 // CHECK-LABEL: test_mm_mask_div_round_sh945 // CHECK: @llvm.x86.avx512fp16.mask.div.sh.round946 return _mm_mask_div_round_sh(__W, __U, __A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);947}948__m128h test_mm_maskz_div_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {949 // CHECK-LABEL: test_mm_maskz_div_round_sh950 // CHECK: @llvm.x86.avx512fp16.mask.div.sh.round951 return _mm_maskz_div_round_sh(__U, __A, __B, _MM_FROUND_NO_EXC | _MM_FROUND_TO_ZERO);952}953__m128h test_mm_mask_div_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {954 // CHECK-LABEL: test_mm_mask_div_sh955 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0956 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0957 // CHECK: %{{.*}} = fdiv half %{{.*}}, %{{.*}}958 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0959 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0960 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0961 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>962 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 0963 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}964 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 0965 return _mm_mask_div_sh(__W, __U, __A, __B);966}967TEST_CONSTEXPR(match_m128h(_mm_mask_div_sh((__m128h)(__v8hf){1.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f},(__mmask8)0x01,(__m128h)(__v8hf){8.0f,9.0f,10.0f,11.0f,12.0f,13.0f,14.0f,15.0f},(__m128h)(__v8hf){4.0f,3.0f,2.0f,1.0f,2.0f,3.0f,4.0f,5.0f}),2.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f));968 969__m128h test_mm_maskz_div_sh(__mmask8 __U, __m128h __A, __m128h __B) {970 // CHECK-LABEL: test_mm_maskz_div_sh971 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0972 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0973 // CHECK: %{{.*}} = fdiv half %{{.*}}, %{{.*}}974 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0975 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0976 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 0977 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>978 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 0979 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}980 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 0981 return _mm_maskz_div_sh(__U, __A, __B);982}983TEST_CONSTEXPR(match_m128h(_mm_maskz_div_sh((__mmask8)0x01,(__m128h)(__v8hf){8.0f,9.0f,10.0f,11.0f,12.0f,13.0f,14.0f,15.0f},(__m128h)(__v8hf){4.0f,3.0f,2.0f,1.0f,2.0f,3.0f,4.0f,5.0f}),2.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f));984 985__m128h test_mm_div_sh(__m128h __A, __m128h __B) {986 // CHECK-LABEL: test_mm_div_sh987 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0988 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i32 0989 // CHECK: %{{.*}} = fdiv half %{{.*}}, %{{.*}}990 // CHECK: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 0991 return _mm_div_sh(__A, __B);992}993 994__m128h test_mm_min_round_sh(__m128h __A, __m128h __B) {995 // CHECK-LABEL: test_mm_min_round_sh996 // CHECK: @llvm.x86.avx512fp16.mask.min.sh.round997 return _mm_min_round_sh(__A, __B, 0x08);998}999__m128h test_mm_mask_min_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1000 // CHECK-LABEL: test_mm_mask_min_round_sh1001 // CHECK: @llvm.x86.avx512fp16.mask.min.sh.round1002 return _mm_mask_min_round_sh(__W, __U, __A, __B, 0x08);1003}1004__m128h test_mm_maskz_min_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {1005 // CHECK-LABEL: test_mm_maskz_min_round_sh1006 // CHECK: @llvm.x86.avx512fp16.mask.min.sh.round1007 return _mm_maskz_min_round_sh(__U, __A, __B, 0x08);1008}1009__m128h test_mm_mask_min_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1010 // CHECK-LABEL: test_mm_mask_min_sh1011 // CHECK: @llvm.x86.avx512fp16.mask.min.sh.round1012 return _mm_mask_min_sh(__W, __U, __A, __B);1013}1014__m128h test_mm_maskz_min_sh(__mmask8 __U, __m128h __A, __m128h __B) {1015 // CHECK-LABEL: test_mm_maskz_min_sh1016 // CHECK: @llvm.x86.avx512fp16.mask.min.sh.round1017 return _mm_maskz_min_sh(__U, __A, __B);1018}1019 1020__m128h test_mm_min_sh(__m128h __A, __m128h __B) {1021 // CHECK-LABEL: test_mm_min_sh1022 // CHECK: @llvm.x86.avx512fp16.mask.min.sh.round1023 return _mm_min_sh(__A, __B);1024}1025 1026__m128h test_mm_max_round_sh(__m128h __A, __m128h __B) {1027 // CHECK-LABEL: test_mm_max_round_sh1028 // CHECK: @llvm.x86.avx512fp16.mask.max.sh.round1029 return _mm_max_round_sh(__A, __B, 0x08);1030}1031__m128h test_mm_mask_max_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1032 // CHECK-LABEL: test_mm_mask_max_round_sh1033 // CHECK: @llvm.x86.avx512fp16.mask.max.sh.round1034 return _mm_mask_max_round_sh(__W, __U, __A, __B, 0x08);1035}1036__m128h test_mm_maskz_max_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {1037 // CHECK-LABEL: test_mm_maskz_max_round_sh1038 // CHECK: @llvm.x86.avx512fp16.mask.max.sh.round1039 return _mm_maskz_max_round_sh(__U, __A, __B, 0x08);1040}1041__m128h test_mm_mask_max_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1042 // CHECK-LABEL: test_mm_mask_max_sh1043 // CHECK: @llvm.x86.avx512fp16.mask.max.sh.round1044 return _mm_mask_max_sh(__W, __U, __A, __B);1045}1046__m128h test_mm_maskz_max_sh(__mmask8 __U, __m128h __A, __m128h __B) {1047 // CHECK-LABEL: test_mm_maskz_max_sh1048 // CHECK: @llvm.x86.avx512fp16.mask.max.sh.round1049 return _mm_maskz_max_sh(__U, __A, __B);1050}1051 1052__m128h test_mm_max_sh(__m128h __A, __m128h __B) {1053 // CHECK-LABEL: test_mm_max_sh1054 // CHECK: @llvm.x86.avx512fp16.mask.max.sh.round1055 return _mm_max_sh(__A, __B);1056}1057__mmask32 test_mm512_cmp_round_ph_mask(__m512h a, __m512h b) {1058 // CHECK-LABEL: test_mm512_cmp_round_ph_mask1059 // CHECK: fcmp oeq <32 x half> %{{.*}}, %{{.*}}1060 return _mm512_cmp_round_ph_mask(a, b, 0, _MM_FROUND_NO_EXC);1061}1062 1063__mmask32 test_mm512_mask_cmp_round_ph_mask(__mmask32 m, __m512h a, __m512h b) {1064 // CHECK-LABEL: test_mm512_mask_cmp_round_ph_mask1065 // CHECK: [[CMP:%.*]] = fcmp oeq <32 x half> %{{.*}}, %{{.*}}1066 // CHECK: and <32 x i1> [[CMP]], {{.*}}1067 return _mm512_mask_cmp_round_ph_mask(m, a, b, 0, _MM_FROUND_NO_EXC);1068}1069 1070__mmask32 test_mm512_cmp_ph_mask_eq_oq(__m512h a, __m512h b) {1071 // CHECK-LABEL: test_mm512_cmp_ph_mask_eq_oq1072 // CHECK: fcmp oeq <32 x half> %{{.*}}, %{{.*}}1073 return _mm512_cmp_ph_mask(a, b, _CMP_EQ_OQ);1074}1075 1076__mmask32 test_mm512_cmp_ph_mask_lt_os(__m512h a, __m512h b) {1077 // CHECK-LABEL: test_mm512_cmp_ph_mask_lt_os1078 // CHECK: fcmp olt <32 x half> %{{.*}}, %{{.*}}1079 return _mm512_cmp_ph_mask(a, b, _CMP_LT_OS);1080}1081 1082__mmask32 test_mm512_cmp_ph_mask_le_os(__m512h a, __m512h b) {1083 // CHECK-LABEL: test_mm512_cmp_ph_mask_le_os1084 // CHECK: fcmp ole <32 x half> %{{.*}}, %{{.*}}1085 return _mm512_cmp_ph_mask(a, b, _CMP_LE_OS);1086}1087 1088__mmask32 test_mm512_cmp_ph_mask_unord_q(__m512h a, __m512h b) {1089 // CHECK-LABEL: test_mm512_cmp_ph_mask_unord_q1090 // CHECK: fcmp uno <32 x half> %{{.*}}, %{{.*}}1091 return _mm512_cmp_ph_mask(a, b, _CMP_UNORD_Q);1092}1093 1094__mmask32 test_mm512_cmp_ph_mask_neq_uq(__m512h a, __m512h b) {1095 // CHECK-LABEL: test_mm512_cmp_ph_mask_neq_uq1096 // CHECK: fcmp une <32 x half> %{{.*}}, %{{.*}}1097 return _mm512_cmp_ph_mask(a, b, _CMP_NEQ_UQ);1098}1099 1100__mmask32 test_mm512_cmp_ph_mask_nlt_us(__m512h a, __m512h b) {1101 // CHECK-LABEL: test_mm512_cmp_ph_mask_nlt_us1102 // CHECK: fcmp uge <32 x half> %{{.*}}, %{{.*}}1103 return _mm512_cmp_ph_mask(a, b, _CMP_NLT_US);1104}1105 1106__mmask32 test_mm512_cmp_ph_mask_nle_us(__m512h a, __m512h b) {1107 // CHECK-LABEL: test_mm512_cmp_ph_mask_nle_us1108 // CHECK: fcmp ugt <32 x half> %{{.*}}, %{{.*}}1109 return _mm512_cmp_ph_mask(a, b, _CMP_NLE_US);1110}1111 1112__mmask32 test_mm512_cmp_ph_mask_ord_q(__m512h a, __m512h b) {1113 // CHECK-LABEL: test_mm512_cmp_ph_mask_ord_q1114 // CHECK: fcmp ord <32 x half> %{{.*}}, %{{.*}}1115 return _mm512_cmp_ph_mask(a, b, _CMP_ORD_Q);1116}1117 1118__mmask32 test_mm512_cmp_ph_mask_eq_uq(__m512h a, __m512h b) {1119 // CHECK-LABEL: test_mm512_cmp_ph_mask_eq_uq1120 // CHECK: fcmp ueq <32 x half> %{{.*}}, %{{.*}}1121 return _mm512_cmp_ph_mask(a, b, _CMP_EQ_UQ);1122}1123 1124__mmask32 test_mm512_cmp_ph_mask_nge_us(__m512h a, __m512h b) {1125 // CHECK-LABEL: test_mm512_cmp_ph_mask_nge_us1126 // CHECK: fcmp ult <32 x half> %{{.*}}, %{{.*}}1127 return _mm512_cmp_ph_mask(a, b, _CMP_NGE_US);1128}1129 1130__mmask32 test_mm512_cmp_ph_mask_ngt_us(__m512h a, __m512h b) {1131 // CHECK-LABEL: test_mm512_cmp_ph_mask_ngt_us1132 // CHECK: fcmp ule <32 x half> %{{.*}}, %{{.*}}1133 return _mm512_cmp_ph_mask(a, b, _CMP_NGT_US);1134}1135 1136__mmask32 test_mm512_cmp_ph_mask_false_oq(__m512h a, __m512h b) {1137 // CHECK-LABEL: test_mm512_cmp_ph_mask_false_oq1138 // CHECK: fcmp false <32 x half> %{{.*}}, %{{.*}}1139 return _mm512_cmp_ph_mask(a, b, _CMP_FALSE_OQ);1140}1141 1142__mmask32 test_mm512_cmp_ph_mask_neq_oq(__m512h a, __m512h b) {1143 // CHECK-LABEL: test_mm512_cmp_ph_mask_neq_oq1144 // CHECK: fcmp one <32 x half> %{{.*}}, %{{.*}}1145 return _mm512_cmp_ph_mask(a, b, _CMP_NEQ_OQ);1146}1147 1148__mmask32 test_mm512_cmp_ph_mask_ge_os(__m512h a, __m512h b) {1149 // CHECK-LABEL: test_mm512_cmp_ph_mask_ge_os1150 // CHECK: fcmp oge <32 x half> %{{.*}}, %{{.*}}1151 return _mm512_cmp_ph_mask(a, b, _CMP_GE_OS);1152}1153 1154__mmask32 test_mm512_cmp_ph_mask_gt_os(__m512h a, __m512h b) {1155 // CHECK-LABEL: test_mm512_cmp_ph_mask_gt_os1156 // CHECK: fcmp ogt <32 x half> %{{.*}}, %{{.*}}1157 return _mm512_cmp_ph_mask(a, b, _CMP_GT_OS);1158}1159 1160__mmask32 test_mm512_cmp_ph_mask_true_uq(__m512h a, __m512h b) {1161 // CHECK-LABEL: test_mm512_cmp_ph_mask_true_uq1162 // CHECK: fcmp true <32 x half> %{{.*}}, %{{.*}}1163 return _mm512_cmp_ph_mask(a, b, _CMP_TRUE_UQ);1164}1165 1166__mmask32 test_mm512_cmp_ph_mask_eq_os(__m512h a, __m512h b) {1167 // CHECK-LABEL: test_mm512_cmp_ph_mask_eq_os1168 // CHECK: fcmp oeq <32 x half> %{{.*}}, %{{.*}}1169 return _mm512_cmp_ph_mask(a, b, _CMP_EQ_OS);1170}1171 1172__mmask32 test_mm512_cmp_ph_mask_lt_oq(__m512h a, __m512h b) {1173 // CHECK-LABEL: test_mm512_cmp_ph_mask_lt_oq1174 // CHECK: fcmp olt <32 x half> %{{.*}}, %{{.*}}1175 return _mm512_cmp_ph_mask(a, b, _CMP_LT_OQ);1176}1177 1178__mmask32 test_mm512_cmp_ph_mask_le_oq(__m512h a, __m512h b) {1179 // CHECK-LABEL: test_mm512_cmp_ph_mask_le_oq1180 // CHECK: fcmp ole <32 x half> %{{.*}}, %{{.*}}1181 return _mm512_cmp_ph_mask(a, b, _CMP_LE_OQ);1182}1183 1184__mmask32 test_mm512_cmp_ph_mask_unord_s(__m512h a, __m512h b) {1185 // CHECK-LABEL: test_mm512_cmp_ph_mask_unord_s1186 // CHECK: fcmp uno <32 x half> %{{.*}}, %{{.*}}1187 return _mm512_cmp_ph_mask(a, b, _CMP_UNORD_S);1188}1189 1190__mmask32 test_mm512_cmp_ph_mask_neq_us(__m512h a, __m512h b) {1191 // CHECK-LABEL: test_mm512_cmp_ph_mask_neq_us1192 // CHECK: fcmp une <32 x half> %{{.*}}, %{{.*}}1193 return _mm512_cmp_ph_mask(a, b, _CMP_NEQ_US);1194}1195 1196__mmask32 test_mm512_cmp_ph_mask_nlt_uq(__m512h a, __m512h b) {1197 // CHECK-LABEL: test_mm512_cmp_ph_mask_nlt_uq1198 // CHECK: fcmp uge <32 x half> %{{.*}}, %{{.*}}1199 return _mm512_cmp_ph_mask(a, b, _CMP_NLT_UQ);1200}1201 1202__mmask32 test_mm512_cmp_ph_mask_nle_uq(__m512h a, __m512h b) {1203 // CHECK-LABEL: test_mm512_cmp_ph_mask_nle_uq1204 // CHECK: fcmp ugt <32 x half> %{{.*}}, %{{.*}}1205 return _mm512_cmp_ph_mask(a, b, _CMP_NLE_UQ);1206}1207 1208__mmask32 test_mm512_cmp_ph_mask_ord_s(__m512h a, __m512h b) {1209 // CHECK-LABEL: test_mm512_cmp_ph_mask_ord_s1210 // CHECK: fcmp ord <32 x half> %{{.*}}, %{{.*}}1211 return _mm512_cmp_ph_mask(a, b, _CMP_ORD_S);1212}1213 1214__mmask32 test_mm512_cmp_ph_mask_eq_us(__m512h a, __m512h b) {1215 // CHECK-LABEL: test_mm512_cmp_ph_mask_eq_us1216 // CHECK: fcmp ueq <32 x half> %{{.*}}, %{{.*}}1217 return _mm512_cmp_ph_mask(a, b, _CMP_EQ_US);1218}1219 1220__mmask32 test_mm512_cmp_ph_mask_nge_uq(__m512h a, __m512h b) {1221 // CHECK-LABEL: test_mm512_cmp_ph_mask_nge_uq1222 // CHECK: fcmp ult <32 x half> %{{.*}}, %{{.*}}1223 return _mm512_cmp_ph_mask(a, b, _CMP_NGE_UQ);1224}1225 1226__mmask32 test_mm512_cmp_ph_mask_ngt_uq(__m512h a, __m512h b) {1227 // CHECK-LABEL: test_mm512_cmp_ph_mask_ngt_uq1228 // CHECK: fcmp ule <32 x half> %{{.*}}, %{{.*}}1229 return _mm512_cmp_ph_mask(a, b, _CMP_NGT_UQ);1230}1231 1232__mmask32 test_mm512_cmp_ph_mask_false_os(__m512h a, __m512h b) {1233 // CHECK-LABEL: test_mm512_cmp_ph_mask_false_os1234 // CHECK: fcmp false <32 x half> %{{.*}}, %{{.*}}1235 return _mm512_cmp_ph_mask(a, b, _CMP_FALSE_OS);1236}1237 1238__mmask32 test_mm512_cmp_ph_mask_neq_os(__m512h a, __m512h b) {1239 // CHECK-LABEL: test_mm512_cmp_ph_mask_neq_os1240 // CHECK: fcmp one <32 x half> %{{.*}}, %{{.*}}1241 return _mm512_cmp_ph_mask(a, b, _CMP_NEQ_OS);1242}1243 1244__mmask32 test_mm512_cmp_ph_mask_ge_oq(__m512h a, __m512h b) {1245 // CHECK-LABEL: test_mm512_cmp_ph_mask_ge_oq1246 // CHECK: fcmp oge <32 x half> %{{.*}}, %{{.*}}1247 return _mm512_cmp_ph_mask(a, b, _CMP_GE_OQ);1248}1249 1250__mmask32 test_mm512_cmp_ph_mask_gt_oq(__m512h a, __m512h b) {1251 // CHECK-LABEL: test_mm512_cmp_ph_mask_gt_oq1252 // CHECK: fcmp ogt <32 x half> %{{.*}}, %{{.*}}1253 return _mm512_cmp_ph_mask(a, b, _CMP_GT_OQ);1254}1255 1256__mmask32 test_mm512_cmp_ph_mask_true_us(__m512h a, __m512h b) {1257 // CHECK-LABEL: test_mm512_cmp_ph_mask_true_us1258 // CHECK: fcmp true <32 x half> %{{.*}}, %{{.*}}1259 return _mm512_cmp_ph_mask(a, b, _CMP_TRUE_US);1260}1261 1262__mmask32 test_mm512_mask_cmp_ph_mask_eq_oq(__mmask32 m, __m512h a, __m512h b) {1263 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_eq_oq1264 // CHECK: [[CMP:%.*]] = fcmp oeq <32 x half> %{{.*}}, %{{.*}}1265 // CHECK: and <32 x i1> [[CMP]], {{.*}}1266 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_EQ_OQ);1267}1268 1269__mmask32 test_mm512_mask_cmp_ph_mask_lt_os(__mmask32 m, __m512h a, __m512h b) {1270 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_lt_os1271 // CHECK: [[CMP:%.*]] = fcmp olt <32 x half> %{{.*}}, %{{.*}}1272 // CHECK: and <32 x i1> [[CMP]], {{.*}}1273 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_LT_OS);1274}1275 1276__mmask32 test_mm512_mask_cmp_ph_mask_le_os(__mmask32 m, __m512h a, __m512h b) {1277 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_le_os1278 // CHECK: [[CMP:%.*]] = fcmp ole <32 x half> %{{.*}}, %{{.*}}1279 // CHECK: and <32 x i1> [[CMP]], {{.*}}1280 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_LE_OS);1281}1282 1283__mmask32 test_mm512_mask_cmp_ph_mask_unord_q(__mmask32 m, __m512h a, __m512h b) {1284 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_unord_q1285 // CHECK: [[CMP:%.*]] = fcmp uno <32 x half> %{{.*}}, %{{.*}}1286 // CHECK: and <32 x i1> [[CMP]], {{.*}}1287 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_UNORD_Q);1288}1289 1290__mmask32 test_mm512_mask_cmp_ph_mask_neq_uq(__mmask32 m, __m512h a, __m512h b) {1291 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_neq_uq1292 // CHECK: [[CMP:%.*]] = fcmp une <32 x half> %{{.*}}, %{{.*}}1293 // CHECK: and <32 x i1> [[CMP]], {{.*}}1294 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NEQ_UQ);1295}1296 1297__mmask32 test_mm512_mask_cmp_ph_mask_nlt_us(__mmask32 m, __m512h a, __m512h b) {1298 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_nlt_us1299 // CHECK: [[CMP:%.*]] = fcmp uge <32 x half> %{{.*}}, %{{.*}}1300 // CHECK: and <32 x i1> [[CMP]], {{.*}}1301 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NLT_US);1302}1303 1304__mmask32 test_mm512_mask_cmp_ph_mask_nle_us(__mmask32 m, __m512h a, __m512h b) {1305 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_nle_us1306 // CHECK: [[CMP:%.*]] = fcmp ugt <32 x half> %{{.*}}, %{{.*}}1307 // CHECK: and <32 x i1> [[CMP]], {{.*}}1308 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NLE_US);1309}1310 1311__mmask32 test_mm512_mask_cmp_ph_mask_ord_q(__mmask32 m, __m512h a, __m512h b) {1312 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_ord_q1313 // CHECK: [[CMP:%.*]] = fcmp ord <32 x half> %{{.*}}, %{{.*}}1314 // CHECK: and <32 x i1> [[CMP]], {{.*}}1315 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_ORD_Q);1316}1317 1318__mmask32 test_mm512_mask_cmp_ph_mask_eq_uq(__mmask32 m, __m512h a, __m512h b) {1319 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_eq_uq1320 // CHECK: [[CMP:%.*]] = fcmp ueq <32 x half> %{{.*}}, %{{.*}}1321 // CHECK: and <32 x i1> [[CMP]], {{.*}}1322 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_EQ_UQ);1323}1324 1325__mmask32 test_mm512_mask_cmp_ph_mask_nge_us(__mmask32 m, __m512h a, __m512h b) {1326 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_nge_us1327 // CHECK: [[CMP:%.*]] = fcmp ult <32 x half> %{{.*}}, %{{.*}}1328 // CHECK: and <32 x i1> [[CMP]], {{.*}}1329 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NGE_US);1330}1331 1332__mmask32 test_mm512_mask_cmp_ph_mask_ngt_us(__mmask32 m, __m512h a, __m512h b) {1333 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_ngt_us1334 // CHECK: [[CMP:%.*]] = fcmp ule <32 x half> %{{.*}}, %{{.*}}1335 // CHECK: and <32 x i1> [[CMP]], {{.*}}1336 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NGT_US);1337}1338 1339__mmask32 test_mm512_mask_cmp_ph_mask_false_oq(__mmask32 m, __m512h a, __m512h b) {1340 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_false_oq1341 // CHECK: [[CMP:%.*]] = fcmp false <32 x half> %{{.*}}, %{{.*}}1342 // CHECK: and <32 x i1> [[CMP]], {{.*}}1343 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_FALSE_OQ);1344}1345 1346__mmask32 test_mm512_mask_cmp_ph_mask_neq_oq(__mmask32 m, __m512h a, __m512h b) {1347 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_neq_oq1348 // CHECK: [[CMP:%.*]] = fcmp one <32 x half> %{{.*}}, %{{.*}}1349 // CHECK: and <32 x i1> [[CMP]], {{.*}}1350 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NEQ_OQ);1351}1352 1353__mmask32 test_mm512_mask_cmp_ph_mask_ge_os(__mmask32 m, __m512h a, __m512h b) {1354 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_ge_os1355 // CHECK: [[CMP:%.*]] = fcmp oge <32 x half> %{{.*}}, %{{.*}}1356 // CHECK: and <32 x i1> [[CMP]], {{.*}}1357 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_GE_OS);1358}1359 1360__mmask32 test_mm512_mask_cmp_ph_mask_gt_os(__mmask32 m, __m512h a, __m512h b) {1361 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_gt_os1362 // CHECK: [[CMP:%.*]] = fcmp ogt <32 x half> %{{.*}}, %{{.*}}1363 // CHECK: and <32 x i1> [[CMP]], {{.*}}1364 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_GT_OS);1365}1366 1367__mmask32 test_mm512_mask_cmp_ph_mask_true_uq(__mmask32 m, __m512h a, __m512h b) {1368 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_true_uq1369 // CHECK: [[CMP:%.*]] = fcmp true <32 x half> %{{.*}}, %{{.*}}1370 // CHECK: and <32 x i1> [[CMP]], {{.*}}1371 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_TRUE_UQ);1372}1373 1374__mmask32 test_mm512_mask_cmp_ph_mask_eq_os(__mmask32 m, __m512h a, __m512h b) {1375 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_eq_os1376 // CHECK: [[CMP:%.*]] = fcmp oeq <32 x half> %{{.*}}, %{{.*}}1377 // CHECK: and <32 x i1> [[CMP]], {{.*}}1378 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_EQ_OS);1379}1380 1381__mmask32 test_mm512_mask_cmp_ph_mask_lt_oq(__mmask32 m, __m512h a, __m512h b) {1382 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_lt_oq1383 // CHECK: [[CMP:%.*]] = fcmp olt <32 x half> %{{.*}}, %{{.*}}1384 // CHECK: and <32 x i1> [[CMP]], {{.*}}1385 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_LT_OQ);1386}1387 1388__mmask32 test_mm512_mask_cmp_ph_mask_le_oq(__mmask32 m, __m512h a, __m512h b) {1389 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_le_oq1390 // CHECK: [[CMP:%.*]] = fcmp ole <32 x half> %{{.*}}, %{{.*}}1391 // CHECK: and <32 x i1> [[CMP]], {{.*}}1392 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_LE_OQ);1393}1394 1395__mmask32 test_mm512_mask_cmp_ph_mask_unord_s(__mmask32 m, __m512h a, __m512h b) {1396 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_unord_s1397 // CHECK: [[CMP:%.*]] = fcmp uno <32 x half> %{{.*}}, %{{.*}}1398 // CHECK: and <32 x i1> [[CMP]], {{.*}}1399 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_UNORD_S);1400}1401 1402__mmask32 test_mm512_mask_cmp_ph_mask_neq_us(__mmask32 m, __m512h a, __m512h b) {1403 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_neq_us1404 // CHECK: [[CMP:%.*]] = fcmp une <32 x half> %{{.*}}, %{{.*}}1405 // CHECK: and <32 x i1> [[CMP]], {{.*}}1406 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NEQ_US);1407}1408 1409__mmask32 test_mm512_mask_cmp_ph_mask_nlt_uq(__mmask32 m, __m512h a, __m512h b) {1410 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_nlt_uq1411 // CHECK: [[CMP:%.*]] = fcmp uge <32 x half> %{{.*}}, %{{.*}}1412 // CHECK: and <32 x i1> [[CMP]], {{.*}}1413 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NLT_UQ);1414}1415 1416__mmask32 test_mm512_mask_cmp_ph_mask_nle_uq(__mmask32 m, __m512h a, __m512h b) {1417 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_nle_uq1418 // CHECK: [[CMP:%.*]] = fcmp ugt <32 x half> %{{.*}}, %{{.*}}1419 // CHECK: and <32 x i1> [[CMP]], {{.*}}1420 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NLE_UQ);1421}1422 1423__mmask32 test_mm512_mask_cmp_ph_mask_ord_s(__mmask32 m, __m512h a, __m512h b) {1424 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_ord_s1425 // CHECK: [[CMP:%.*]] = fcmp ord <32 x half> %{{.*}}, %{{.*}}1426 // CHECK: and <32 x i1> [[CMP]], {{.*}}1427 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_ORD_S);1428}1429 1430__mmask32 test_mm512_mask_cmp_ph_mask_eq_us(__mmask32 m, __m512h a, __m512h b) {1431 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_eq_us1432 // CHECK: [[CMP:%.*]] = fcmp ueq <32 x half> %{{.*}}, %{{.*}}1433 // CHECK: and <32 x i1> [[CMP]], {{.*}}1434 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_EQ_US);1435}1436 1437__mmask32 test_mm512_mask_cmp_ph_mask_nge_uq(__mmask32 m, __m512h a, __m512h b) {1438 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_nge_uq1439 // CHECK: [[CMP:%.*]] = fcmp ult <32 x half> %{{.*}}, %{{.*}}1440 // CHECK: and <32 x i1> [[CMP]], {{.*}}1441 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NGE_UQ);1442}1443 1444__mmask32 test_mm512_mask_cmp_ph_mask_ngt_uq(__mmask32 m, __m512h a, __m512h b) {1445 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_ngt_uq1446 // CHECK: [[CMP:%.*]] = fcmp ule <32 x half> %{{.*}}, %{{.*}}1447 // CHECK: and <32 x i1> [[CMP]], {{.*}}1448 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NGT_UQ);1449}1450 1451__mmask32 test_mm512_mask_cmp_ph_mask_false_os(__mmask32 m, __m512h a, __m512h b) {1452 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_false_os1453 // CHECK: [[CMP:%.*]] = fcmp false <32 x half> %{{.*}}, %{{.*}}1454 // CHECK: and <32 x i1> [[CMP]], {{.*}}1455 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_FALSE_OS);1456}1457 1458__mmask32 test_mm512_mask_cmp_ph_mask_neq_os(__mmask32 m, __m512h a, __m512h b) {1459 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_neq_os1460 // CHECK: [[CMP:%.*]] = fcmp one <32 x half> %{{.*}}, %{{.*}}1461 // CHECK: and <32 x i1> [[CMP]], {{.*}}1462 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_NEQ_OS);1463}1464 1465__mmask32 test_mm512_mask_cmp_ph_mask_ge_oq(__mmask32 m, __m512h a, __m512h b) {1466 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_ge_oq1467 // CHECK: [[CMP:%.*]] = fcmp oge <32 x half> %{{.*}}, %{{.*}}1468 // CHECK: and <32 x i1> [[CMP]], {{.*}}1469 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_GE_OQ);1470}1471 1472__mmask32 test_mm512_mask_cmp_ph_mask_gt_oq(__mmask32 m, __m512h a, __m512h b) {1473 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_gt_oq1474 // CHECK: [[CMP:%.*]] = fcmp ogt <32 x half> %{{.*}}, %{{.*}}1475 // CHECK: and <32 x i1> [[CMP]], {{.*}}1476 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_GT_OQ);1477}1478 1479__mmask32 test_mm512_mask_cmp_ph_mask_true_us(__mmask32 m, __m512h a, __m512h b) {1480 // CHECK-LABEL: test_mm512_mask_cmp_ph_mask_true_us1481 // CHECK: [[CMP:%.*]] = fcmp true <32 x half> %{{.*}}, %{{.*}}1482 // CHECK: and <32 x i1> [[CMP]], {{.*}}1483 return _mm512_mask_cmp_ph_mask(m, a, b, _CMP_TRUE_US);1484}1485 1486__mmask8 test_mm_cmp_round_sh_mask(__m128h __X, __m128h __Y) {1487 // CHECK-LABEL: test_mm_cmp_round_sh_mask1488 // CHECK: @llvm.x86.avx512fp16.mask.cmp.sh1489 return _mm_cmp_round_sh_mask(__X, __Y, _CMP_NLT_US, _MM_FROUND_NO_EXC);1490}1491 1492__mmask8 test_mm_mask_cmp_round_sh_mask(__mmask8 __M, __m128h __X, __m128h __Y) {1493 // CHECK-LABEL: test_mm_mask_cmp_round_sh_mask1494 // CHECK: @llvm.x86.avx512fp16.mask.cmp.sh1495 return _mm_mask_cmp_round_sh_mask(__M, __X, __Y, _CMP_NLT_US, _MM_FROUND_NO_EXC);1496}1497 1498__mmask8 test_mm_cmp_sh_mask(__m128h __X, __m128h __Y) {1499 // CHECK-LABEL: test_mm_cmp_sh_mask1500 // CHECK: @llvm.x86.avx512fp16.mask.cmp.sh1501 return _mm_cmp_sh_mask(__X, __Y, _CMP_NLT_US);1502}1503 1504__mmask8 test_mm_mask_cmp_sh_mask(__mmask8 __M, __m128h __X, __m128h __Y) {1505 // CHECK-LABEL: test_mm_mask_cmp_sh_mask1506 // CHECK: @llvm.x86.avx512fp16.mask.cmp.sh1507 return _mm_mask_cmp_sh_mask(__M, __X, __Y, _CMP_NLT_US);1508}1509 1510// VMOVSH1511 1512__m128h test_mm_load_sh(void const *A) {1513 // CHECK-LABEL: test_mm_load_sh1514 // CHECK: load half, ptr %{{.*}}, align 1{{$}}1515 return _mm_load_sh(A);1516}1517 1518__m128h test_mm_mask_load_sh(__m128h __A, __mmask8 __U, const void *__W) {1519 // CHECK-LABEL: test_mm_mask_load_sh1520 // CHECK: @llvm.masked.load.v8f16.p0(ptr align 1 %{{.*}}, <8 x i1> %{{.*}}, <8 x half> %{{.*}})1521 return _mm_mask_load_sh(__A, __U, __W);1522}1523 1524__m128h test_mm_maskz_load_sh(__mmask8 __U, const void *__W) {1525 // CHECK-LABEL: test_mm_maskz_load_sh1526 // CHECK: @llvm.masked.load.v8f16.p0(ptr align 1 %{{.*}}, <8 x i1> %{{.*}}, <8 x half> %{{.*}})1527 return _mm_maskz_load_sh(__U, __W);1528}1529 1530__m512h test_mm512_load_ph(void *p) {1531 // CHECK-LABEL: test_mm512_load_ph1532 // CHECK: load <32 x half>, ptr %{{.*}}, align 64{{$}}1533 return _mm512_load_ph(p);1534}1535 1536__m256h test_mm256_load_ph(void *p) {1537 // CHECK-LABEL: test_mm256_load_ph1538 // CHECK: load <16 x half>, ptr %{{.*}}, align 32{{$}}1539 return _mm256_load_ph(p);1540}1541 1542__m128h test_mm_load_ph(void *p) {1543 // CHECK-LABEL: test_mm_load_ph1544 // CHECK: load <8 x half>, ptr %{{.*}}, align 16{{$}}1545 return _mm_load_ph(p);1546}1547 1548__m512h test_mm512_loadu_ph(void *p) {1549 // CHECK-LABEL: test_mm512_loadu_ph1550 // CHECK: load <32 x half>, ptr {{.*}}, align 1{{$}}1551 return _mm512_loadu_ph(p);1552}1553 1554__m256h test_mm256_loadu_ph(void *p) {1555 // CHECK-LABEL: test_mm256_loadu_ph1556 // CHECK: load <16 x half>, ptr {{.*}}, align 1{{$}}1557 return _mm256_loadu_ph(p);1558}1559 1560__m128h test_mm_loadu_ph(void *p) {1561 // CHECK-LABEL: test_mm_loadu_ph1562 // CHECK: load <8 x half>, ptr {{.*}}, align 1{{$}}1563 return _mm_loadu_ph(p);1564}1565 1566void test_mm_store_sh(void *A, __m128h B) {1567 // CHECK-LABEL: test_mm_store_sh1568 // CHECK: extractelement <8 x half> %{{.*}}, i32 01569 // CHECK: store half %{{.*}}, ptr %{{.*}}, align 1{{$}}1570 _mm_store_sh(A, B);1571}1572 1573void test_mm_mask_store_sh(void *__P, __mmask8 __U, __m128h __A) {1574 // CHECK-LABEL: test_mm_mask_store_sh1575 // CHECK: call void @llvm.masked.store.v8f16.p0(<8 x half> %{{.*}}, ptr align 1 %{{.*}}, <8 x i1> %{{.*}})1576 _mm_mask_store_sh(__P, __U, __A);1577}1578 1579void test_mm512_store_ph(void *p, __m512h a) {1580 // CHECK-LABEL: test_mm512_store_ph1581 // CHECK: store <32 x half> %{{.*}}, ptr %{{.*}}, align 641582 _mm512_store_ph(p, a);1583}1584 1585void test_mm256_store_ph(void *p, __m256h a) {1586 // CHECK-LABEL: test_mm256_store_ph1587 // CHECK: store <16 x half> %{{.*}}, ptr %{{.*}}, align 321588 _mm256_store_ph(p, a);1589}1590 1591void test_mm_store_ph(void *p, __m128h a) {1592 // CHECK-LABEL: test_mm_store_ph1593 // CHECK: store <8 x half> %{{.*}}, ptr %{{.*}}, align 161594 _mm_store_ph(p, a);1595}1596 1597void test_mm512_storeu_ph(void *p, __m512h a) {1598 // CHECK-LABEL: test_mm512_storeu_ph1599 // CHECK: store <32 x half> %{{.*}}, ptr %{{.*}}, align 1{{$}}1600 // CHECK-NEXT: ret void1601 _mm512_storeu_ph(p, a);1602}1603 1604void test_mm256_storeu_ph(void *p, __m256h a) {1605 // CHECK-LABEL: test_mm256_storeu_ph1606 // CHECK: store <16 x half> %{{.*}}, ptr %{{.*}}, align 1{{$}}1607 // CHECK-NEXT: ret void1608 _mm256_storeu_ph(p, a);1609}1610 1611void test_mm_storeu_ph(void *p, __m128h a) {1612 // CHECK-LABEL: test_mm_storeu_ph1613 // CHECK: store <8 x half> %{{.*}}, ptr %{{.*}}, align 1{{$}}1614 // CHECK-NEXT: ret void1615 _mm_storeu_ph(p, a);1616}1617 1618__m128h test_mm_move_sh(__m128h A, __m128h B) {1619 // CHECK-LABEL: test_mm_move_sh1620 // CHECK: extractelement <8 x half> %{{.*}}, i32 01621 // CHECK: insertelement <8 x half> %{{.*}}, half %{{.*}}, i32 01622 return _mm_move_sh(A, B);1623}1624 1625__m128h test_mm_mask_move_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1626 // CHECK-LABEL: test_mm_mask_move_sh1627 // CHECK: [[EXT:%.*]] = extractelement <8 x half> %{{.*}}, i32 01628 // CHECK: insertelement <8 x half> %{{.*}}, half [[EXT]], i32 01629 // CHECK: [[A:%.*]] = extractelement <8 x half> [[VEC:%.*]], i64 01630 // CHECK-NEXT: [[B:%.*]] = extractelement <8 x half> %{{.*}}, i64 01631 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>1632 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 01633 // CHECK-NEXT: [[SEL:%.*]] = select i1 %{{.*}}, half [[A]], half [[B]]1634 // CHECK-NEXT: insertelement <8 x half> [[VEC]], half [[SEL]], i64 01635 return _mm_mask_move_sh(__W, __U, __A, __B);1636}1637TEST_CONSTEXPR(match_m128h(_mm_mask_move_sh((__m128h)(__v8hf){1.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f}, (__mmask8)0x01, (__m128h)(__v8hf){10.0f,20.0f,30.0f,40.0f,50.0f,60.0f,70.0f,80.0f}, (__m128h)(__v8hf){100.0f,200.0f,300.0f,400.0f,500.0f,600.0f,700.0f,800.0f}), 100.0f,2.0f,3.0f,4.0f,5.0f,6.0f,7.0f,8.0f));1638 1639__m128h test_mm_maskz_move_sh(__mmask8 __U, __m128h __A, __m128h __B) {1640 // CHECK-LABEL: test_mm_maskz_move_sh1641 // CHECK: [[EXT:%.*]] = extractelement <8 x half> %{{.*}}, i32 01642 // CHECK: insertelement <8 x half> %{{.*}}, half [[EXT]], i32 01643 // CHECK: [[A:%.*]] = extractelement <8 x half> [[VEC:%.*]], i64 01644 // CHECK-NEXT: [[B:%.*]] = extractelement <8 x half> %{{.*}}, i64 01645 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>1646 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 01647 // CHECK-NEXT: [[SEL:%.*]] = select i1 %{{.*}}, half [[A]], half [[B]]1648 // CHECK-NEXT: insertelement <8 x half> [[VEC]], half [[SEL]], i64 01649 return _mm_maskz_move_sh(__U, __A, __B);1650}1651TEST_CONSTEXPR(match_m128h(_mm_maskz_move_sh((__mmask8)0x01, (__m128h)(__v8hf){10.0f,20.0f,30.0f,40.0f,50.0f,60.0f,70.0f,80.0f}, (__m128h)(__v8hf){100.0f,200.0f,300.0f,400.0f,500.0f,600.0f,700.0f,800.0f}), 100.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f,0.0f));1652 1653short test_mm_cvtsi128_si16(__m128i A) {1654 // CHECK-LABEL: test_mm_cvtsi128_si161655 // CHECK: extractelement <8 x i16> %{{.*}}, i32 01656 return _mm_cvtsi128_si16(A);1657}1658 1659__m128i test_mm_cvtsi16_si128(short A) {1660 // CHECK-LABEL: test_mm_cvtsi16_si1281661 // CHECK: insertelement <8 x i16> poison, i16 %{{.*}}, i32 01662 // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 11663 // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 21664 // CHECK: insertelement <8 x i16> %{{.*}}, i16 0, i32 31665 return _mm_cvtsi16_si128(A);1666}1667 1668__m512h test_mm512_rcp_ph(__m512h __A) {1669 // CHECK-LABEL: test_mm512_rcp_ph1670 // CHECK: @llvm.x86.avx512fp16.mask.rcp.ph.5121671 return _mm512_rcp_ph(__A);1672}1673 1674__m512h test_mm512_mask_rcp_ph(__m512h __W, __mmask32 __U, __m512h __A) {1675 // CHECK-LABEL: test_mm512_mask_rcp_ph1676 // CHECK: @llvm.x86.avx512fp16.mask.rcp.ph.5121677 return (__m512h)_mm512_mask_rcp_ph(__W, __U, __A);1678}1679 1680__m512h test_mm512_maskz_rcp_ph(__mmask32 __U, __m512h __A) {1681 // CHECK-LABEL: test_mm512_maskz_rcp_ph1682 // CHECK: @llvm.x86.avx512fp16.mask.rcp.ph.5121683 return _mm512_maskz_rcp_ph(__U, __A);1684}1685 1686__m512h test_mm512_rsqrt_ph(__m512h __A) {1687 // CHECK-LABEL: test_mm512_rsqrt_ph1688 // CHECK: @llvm.x86.avx512fp16.mask.rsqrt.ph.5121689 return _mm512_rsqrt_ph(__A);1690}1691 1692__m512h test_mm512_mask_rsqrt_ph(__m512h __W, __mmask32 __U, __m512h __A) {1693 // CHECK-LABEL: test_mm512_mask_rsqrt_ph1694 // CHECK: @llvm.x86.avx512fp16.mask.rsqrt.ph.5121695 return (__m512h)_mm512_mask_rsqrt_ph(__W, __U, __A);1696}1697 1698__m512h test_mm512_maskz_rsqrt_ph(__mmask32 __U, __m512h __A) {1699 // CHECK-LABEL: test_mm512_maskz_rsqrt_ph1700 // CHECK: @llvm.x86.avx512fp16.mask.rsqrt.ph.5121701 return _mm512_maskz_rsqrt_ph(__U, __A);1702}1703 1704__m512h test_mm512_getmant_round_ph(__m512h __A) {1705 // CHECK-LABEL: test_mm512_getmant_round_ph1706 // CHECK: @llvm.x86.avx512fp16.mask.getmant.ph.5121707 return _mm512_getmant_round_ph(__A, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);1708}1709 1710__m512h test_mm512_mask_getmant_round_ph(__m512h __W, __mmask32 __U, __m512h __A) {1711 // CHECK-LABEL: test_mm512_mask_getmant_round_ph1712 // CHECK: @llvm.x86.avx512fp16.mask.getmant.ph.5121713 return _mm512_mask_getmant_round_ph(__W, __U, __A, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);1714}1715 1716__m512h test_mm512_maskz_getmant_round_ph(__mmask32 __U, __m512h __A) {1717 // CHECK-LABEL: test_mm512_maskz_getmant_round_ph1718 // CHECK: @llvm.x86.avx512fp16.mask.getmant.ph.5121719 return _mm512_maskz_getmant_round_ph(__U, __A, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan, _MM_FROUND_NO_EXC);1720}1721 1722__m512h test_mm512_getmant_ph(__m512h __A) {1723 // CHECK-LABEL: test_mm512_getmant_ph1724 // CHECK: @llvm.x86.avx512fp16.mask.getmant.ph.5121725 return _mm512_getmant_ph(__A, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan);1726}1727 1728__m512h test_mm512_mask_getmant_ph(__m512h __W, __mmask32 __U, __m512h __A) {1729 // CHECK-LABEL: test_mm512_mask_getmant_ph1730 // CHECK: @llvm.x86.avx512fp16.mask.getmant.ph.5121731 return _mm512_mask_getmant_ph(__W, __U, __A, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan);1732}1733 1734__m512h test_mm512_maskz_getmant_ph(__mmask32 __U, __m512h __A) {1735 // CHECK-LABEL: test_mm512_maskz_getmant_ph1736 // CHECK: @llvm.x86.avx512fp16.mask.getmant.ph.5121737 return _mm512_maskz_getmant_ph(__U, __A, _MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan);1738}1739 1740__m512h test_mm512_scalef_round_ph(__m512h __A, __m512h __B) {1741 // CHECK-LABEL: test_mm512_scalef_round_ph1742 // CHECK: @llvm.x86.avx512fp16.mask.scalef.ph.5121743 return _mm512_scalef_round_ph(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1744}1745 1746__m512h test_mm512_mask_scalef_round_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {1747 // CHECK-LABEL: test_mm512_mask_scalef_round_ph1748 // CHECK: @llvm.x86.avx512fp16.mask.scalef.ph.5121749 return _mm512_mask_scalef_round_ph(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1750}1751 1752__m512h test_mm512_maskz_scalef_round_ph(__mmask32 __U, __m512h __A, __m512h __B) {1753 // CHECK-LABEL: test_mm512_maskz_scalef_round_ph1754 // CHECK: @llvm.x86.avx512fp16.mask.scalef.ph.5121755 return _mm512_maskz_scalef_round_ph(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1756}1757 1758__m512h test_mm512_scalef_ph(__m512h __A, __m512h __B) {1759 // CHECK-LABEL: test_mm512_scalef_ph1760 // CHECK: @llvm.x86.avx512fp16.mask.scalef.ph.5121761 return _mm512_scalef_ph(__A, __B);1762}1763 1764__m512h test_mm512_mask_scalef_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {1765 // CHECK-LABEL: test_mm512_mask_scalef_ph1766 // CHECK: @llvm.x86.avx512fp16.mask.scalef.ph.5121767 return _mm512_mask_scalef_ph(__W, __U, __A, __B);1768}1769 1770__m512h test_mm512_maskz_scalef_ph(__mmask32 __U, __m512h __A, __m512h __B) {1771 // CHECK-LABEL: test_mm512_maskz_scalef_ph1772 // CHECK: @llvm.x86.avx512fp16.mask.scalef.ph.5121773 return _mm512_maskz_scalef_ph(__U, __A, __B);1774}1775 1776__m512h test_mm512_mask_roundscale_ph(__m512h __W, __mmask16 __U, __m512h __A) {1777 // CHECK-LABEL: test_mm512_mask_roundscale_ph1778 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.ph.5121779 return _mm512_mask_roundscale_ph(__W, __U, __A, 1);1780}1781 1782__m512h test_mm512_maskz_roundscale_ph(__mmask16 __U, __m512h __A) {1783 // CHECK-LABEL: test_mm512_maskz_roundscale_ph1784 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.ph.5121785 return _mm512_maskz_roundscale_ph(__U, __A, 1);1786}1787 1788__m512h test_mm512_mask_roundscale_round_ph(__m512h __A, __mmask16 __U, __m512h __C) {1789 // CHECK-LABEL: test_mm512_mask_roundscale_round_ph1790 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.ph.5121791 return _mm512_mask_roundscale_round_ph(__A, __U, __C, 3, _MM_FROUND_NO_EXC);1792}1793 1794__m512h test_mm512_maskz_roundscale_round_ph(__m512h __A, __mmask16 __U) {1795 // CHECK-LABEL: test_mm512_maskz_roundscale_round_ph1796 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.ph.5121797 return _mm512_maskz_roundscale_round_ph(__U, __A, 3, _MM_FROUND_NO_EXC);1798}1799 1800__m512h test_mm512_roundscale_round_ph(__m512h __A) {1801 // CHECK-LABEL: test_mm512_roundscale_round_ph1802 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.ph.5121803 return _mm512_roundscale_round_ph(__A, 3, _MM_FROUND_NO_EXC);1804}1805 1806__m512h test_mm512_roundscale_ph(__m512h __A) {1807 // CHECK-LABEL: test_mm512_roundscale_ph1808 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.ph.5121809 return _mm512_roundscale_ph(__A, 3);1810}1811 1812__m512h test_mm512_getexp_round_ph(__m512h __A) {1813 // CHECK-LABEL: test_mm512_getexp_round_ph1814 // CHECK: @llvm.x86.avx512fp16.mask.getexp.ph.5121815 return _mm512_getexp_round_ph(__A, _MM_FROUND_NO_EXC);1816}1817 1818__m512h test_mm512_mask_getexp_round_ph(__m512h __W, __mmask32 __U, __m512h __A) {1819 // CHECK-LABEL: test_mm512_mask_getexp_round_ph1820 // CHECK: @llvm.x86.avx512fp16.mask.getexp.ph.5121821 return _mm512_mask_getexp_round_ph(__W, __U, __A, _MM_FROUND_NO_EXC);1822}1823 1824__m512h test_mm512_maskz_getexp_round_ph(__mmask32 __U, __m512h __A) {1825 // CHECK-LABEL: test_mm512_maskz_getexp_round_ph1826 // CHECK: @llvm.x86.avx512fp16.mask.getexp.ph.5121827 return _mm512_maskz_getexp_round_ph(__U, __A, _MM_FROUND_NO_EXC);1828}1829 1830__m512h test_mm512_getexp_ph(__m512h __A) {1831 // CHECK-LABEL: test_mm512_getexp_ph1832 // CHECK: @llvm.x86.avx512fp16.mask.getexp.ph.5121833 return _mm512_getexp_ph(__A);1834}1835 1836__m512h test_mm512_mask_getexp_ph(__m512h __W, __mmask32 __U, __m512h __A) {1837 // CHECK-LABEL: test_mm512_mask_getexp_ph1838 // CHECK: @llvm.x86.avx512fp16.mask.getexp.ph.5121839 return _mm512_mask_getexp_ph(__W, __U, __A);1840}1841 1842__m512h test_mm512_maskz_getexp_ph(__mmask32 __U, __m512h __A) {1843 // CHECK-LABEL: test_mm512_maskz_getexp_ph1844 // CHECK: @llvm.x86.avx512fp16.mask.getexp.ph.5121845 return _mm512_maskz_getexp_ph(__U, __A);1846}1847 1848__m512h test_mm512_mask_reduce_ph(__m512h __W, __mmask16 __U, __m512h __A) {1849 // CHECK-LABEL: test_mm512_mask_reduce_ph1850 // CHECK: @llvm.x86.avx512fp16.mask.reduce.ph.5121851 return _mm512_mask_reduce_ph(__W, __U, __A, 1);1852}1853 1854__m512h test_mm512_maskz_reduce_ph(__mmask16 __U, __m512h __A) {1855 // CHECK-LABEL: test_mm512_maskz_reduce_ph1856 // CHECK: @llvm.x86.avx512fp16.mask.reduce.ph.5121857 return _mm512_maskz_reduce_ph(__U, __A, 1);1858}1859 1860__m512h test_mm512_mask_reduce_round_ph(__m512h __A, __mmask16 __U, __m512h __C) {1861 // CHECK-LABEL: test_mm512_mask_reduce_round_ph1862 // CHECK: @llvm.x86.avx512fp16.mask.reduce.ph.5121863 return _mm512_mask_reduce_round_ph(__A, __U, __C, 3, _MM_FROUND_NO_EXC);1864}1865 1866__m512h test_mm512_maskz_reduce_round_ph(__m512h __A, __mmask16 __U) {1867 // CHECK-LABEL: test_mm512_maskz_reduce_round_ph1868 // CHECK: @llvm.x86.avx512fp16.mask.reduce.ph.5121869 return _mm512_maskz_reduce_round_ph(__U, __A, 3, _MM_FROUND_NO_EXC);1870}1871 1872__m512h test_mm512_reduce_round_ph(__m512h __A) {1873 // CHECK-LABEL: test_mm512_reduce_round_ph1874 // CHECK: @llvm.x86.avx512fp16.mask.reduce.ph.5121875 return _mm512_reduce_round_ph(__A, 3, _MM_FROUND_NO_EXC);1876}1877 1878__m512h test_mm512_reduce_ph(__m512h __A) {1879 // CHECK-LABEL: test_mm512_reduce_ph1880 // CHECK: @llvm.x86.avx512fp16.mask.reduce.ph.5121881 return _mm512_reduce_ph(__A, 3);1882}1883__m128h test_mm_rcp_sh(__m128h __A, __m128h __B) {1884 // CHECK-LABEL: test_mm_rcp_sh1885 // CHECK: @llvm.x86.avx512fp16.mask.rcp.sh1886 return _mm_rcp_sh(__A, __B);1887}1888 1889__m128h test_mm_mask_rcp_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1890 // CHECK-LABEL: test_mm_mask_rcp_sh1891 // CHECK: @llvm.x86.avx512fp16.mask.rcp.sh1892 return _mm_mask_rcp_sh(__W, __U, __A, __B);1893}1894 1895__m128h test_mm_maskz_rcp_sh(__mmask8 __U, __m128h __A, __m128h __B) {1896 // CHECK-LABEL: test_mm_maskz_rcp_sh1897 // CHECK: @llvm.x86.avx512fp16.mask.rcp.sh1898 return _mm_maskz_rcp_sh(__U, __A, __B);1899}1900 1901__m128h test_mm_rsqrt_sh(__m128h __A, __m128h __B) {1902 // CHECK-LABEL: test_mm_rsqrt_sh1903 // CHECK: @llvm.x86.avx512fp16.mask.rsqrt.sh1904 return _mm_rsqrt_sh(__A, __B);1905}1906 1907__m128h test_mm_mask_rsqrt_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1908 // CHECK-LABEL: test_mm_mask_rsqrt_sh1909 // CHECK: @llvm.x86.avx512fp16.mask.rsqrt.sh1910 return _mm_mask_rsqrt_sh(__W, __U, __A, __B);1911}1912 1913__m128h test_mm_maskz_rsqrt_sh(__mmask8 __U, __m128h __A, __m128h __B) {1914 // CHECK-LABEL: test_mm_maskz_rsqrt_sh1915 // CHECK: @llvm.x86.avx512fp16.mask.rsqrt.sh1916 return _mm_maskz_rsqrt_sh(__U, __A, __B);1917}1918 1919__m128h test_mm_getmant_round_sh(__m128h __A, __m128h __B) {1920 // CHECK-LABEL: test_mm_getmant_round_sh1921 // CHECK: @llvm.x86.avx512fp16.mask.getmant.sh1922 return _mm_getmant_round_sh(__A, __B, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_src, 8);1923}1924 1925__m128h test_mm_getmant_sh(__m128h __A, __m128h __B) {1926 // CHECK-LABEL: test_mm_getmant_sh1927 // CHECK: @llvm.x86.avx512fp16.mask.getmant.sh1928 return _mm_getmant_sh(__A, __B, _MM_MANT_NORM_1_2, _MM_MANT_SIGN_src);1929}1930 1931__m128h test_mm_mask_getmant_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1932 // CHECK-LABEL: test_mm_mask_getmant_sh1933 // CHECK: @llvm.x86.avx512fp16.mask.getmant.sh1934 return _mm_mask_getmant_sh(__W, __U, __A, __B, 1, 2);1935}1936 1937__m128h test_mm_mask_getmant_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1938 // CHECK-LABEL: test_mm_mask_getmant_round_sh1939 // CHECK: @llvm.x86.avx512fp16.mask.getmant.sh1940 return _mm_mask_getmant_round_sh(__W, __U, __A, __B, 1, 2, _MM_FROUND_NO_EXC);1941}1942 1943__m128h test_mm_maskz_getmant_sh(__mmask8 __U, __m128h __A, __m128h __B) {1944 // CHECK-LABEL: test_mm_maskz_getmant_sh1945 // CHECK: @llvm.x86.avx512fp16.mask.getmant.sh1946 return _mm_maskz_getmant_sh(__U, __A, __B, 1, 2);1947}1948 1949__m128h test_mm_maskz_getmant_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {1950 // CHECK-LABEL: test_mm_maskz_getmant_round_sh1951 // CHECK: @llvm.x86.avx512fp16.mask.getmant.sh1952 return _mm_maskz_getmant_round_sh(__U, __A, __B, 1, 2, _MM_FROUND_NO_EXC);1953}1954 1955__m128h test_mm_getexp_round_sh(__m128h __A, __m128h __B) {1956 // CHECK-LABEL: test_mm_getexp_round_sh1957 // CHECK: @llvm.x86.avx512fp16.mask.getexp.sh1958 return _mm_getexp_round_sh(__A, __B, 8);1959}1960 1961__m128h test_mm_getexp_sh(__m128h __A, __m128h __B) {1962 // CHECK-LABEL: test_mm_getexp_sh1963 // CHECK: @llvm.x86.avx512fp16.mask.getexp.sh1964 return _mm_getexp_sh(__A, __B);1965}1966 1967__m128h test_mm_mask_getexp_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1968 // CHECK-LABEL: test_mm_mask_getexp_sh1969 // CHECK: @llvm.x86.avx512fp16.mask.getexp.sh1970 return _mm_mask_getexp_sh(__W, __U, __A, __B);1971}1972 1973__m128h test_mm_mask_getexp_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {1974 // CHECK-LABEL: test_mm_mask_getexp_round_sh1975 // CHECK: @llvm.x86.avx512fp16.mask.getexp.sh1976 return _mm_mask_getexp_round_sh(__W, __U, __A, __B, _MM_FROUND_NO_EXC);1977}1978 1979__m128h test_mm_maskz_getexp_sh(__mmask8 __U, __m128h __A, __m128h __B) {1980 // CHECK-LABEL: test_mm_maskz_getexp_sh1981 // CHECK: @llvm.x86.avx512fp16.mask.getexp.sh1982 return _mm_maskz_getexp_sh(__U, __A, __B);1983}1984 1985__m128h test_mm_maskz_getexp_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {1986 // CHECK-LABEL: test_mm_maskz_getexp_round_sh1987 // CHECK: @llvm.x86.avx512fp16.mask.getexp.sh1988 return _mm_maskz_getexp_round_sh(__U, __A, __B, _MM_FROUND_NO_EXC);1989}1990 1991__m128h test_mm_scalef_round_sh(__m128h __A, __m128h __B) {1992 // CHECK-LABEL: test_mm_scalef_round_sh1993 // CHECK: @llvm.x86.avx512fp16.mask.scalef.sh(<8 x half> %{{.*}}, <8 x half> %{{.*}}, <8 x half> %{{.*}}, i8 -1, i32 11)1994 return _mm_scalef_round_sh(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);1995}1996 1997__m128h test_mm_scalef_sh(__m128h __A, __m128h __B) {1998 // CHECK-LABEL: test_mm_scalef_sh1999 // CHECK: @llvm.x86.avx512fp16.mask.scalef.sh2000 return _mm_scalef_sh(__A, __B);2001}2002 2003__m128h test_mm_mask_scalef_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {2004 // CHECK-LABEL: test_mm_mask_scalef_sh2005 // CHECK: @llvm.x86.avx512fp16.mask.scalef.sh2006 return _mm_mask_scalef_sh(__W, __U, __A, __B);2007}2008 2009__m128h test_mm_mask_scalef_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {2010 // CHECK-LABEL: test_mm_mask_scalef_round_sh2011 // CHECK: @llvm.x86.avx512fp16.mask.scalef.sh(<8 x half> %{{.*}}, <8 x half> %{{.*}}, <8 x half> %{{.*}}, i8 %{{.*}}, i32 11)2012 return _mm_mask_scalef_round_sh(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2013}2014 2015__m128h test_mm_maskz_scalef_sh(__mmask8 __U, __m128h __A, __m128h __B) {2016 // CHECK-LABEL: test_mm_maskz_scalef_sh2017 // CHECK: @llvm.x86.avx512fp16.mask.scalef.sh2018 return _mm_maskz_scalef_sh(__U, __A, __B);2019}2020 2021__m128h test_mm_maskz_scalef_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {2022 // CHECK-LABEL: test_mm_maskz_scalef_round_sh2023 // CHECK: @llvm.x86.avx512fp16.mask.scalef.sh(<8 x half> %{{.*}}, <8 x half> %{{.*}}, <8 x half> %{{.*}}, i8 %{{.*}}, i32 11)2024 return _mm_maskz_scalef_round_sh(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2025}2026 2027__m128h test_mm_roundscale_round_sh(__m128h __A, __m128h __B) {2028 // CHECK-LABEL: test_mm_roundscale_round_sh2029 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.sh2030 return _mm_roundscale_round_sh(__A, __B, 3, _MM_FROUND_NO_EXC);2031}2032 2033__m128h test_mm_roundscale_sh(__m128h __A, __m128h __B) {2034 // CHECK-LABEL: test_mm_roundscale_sh2035 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.sh2036 return _mm_roundscale_sh(__A, __B, 3);2037}2038 2039__m128h test_mm_mask_roundscale_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {2040 // CHECK-LABEL: test_mm_mask_roundscale_sh2041 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.sh2042 return _mm_mask_roundscale_sh(__W, __U, __A, __B, 3);2043}2044 2045__m128h test_mm_mask_roundscale_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {2046 // CHECK-LABEL: test_mm_mask_roundscale_round_sh2047 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.sh2048 return _mm_mask_roundscale_round_sh(__W, __U, __A, __B, 3, _MM_FROUND_NO_EXC);2049}2050 2051__m128h test_mm_maskz_roundscale_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {2052 // CHECK-LABEL: test_mm_maskz_roundscale_round_sh2053 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.sh2054 return _mm_maskz_roundscale_round_sh(__U, __A, __B, 3, _MM_FROUND_NO_EXC);2055}2056 2057__m128h test_mm_maskz_roundscale_sh(__mmask8 __U, __m128h __A, __m128h __B) {2058 // CHECK-LABEL: test_mm_maskz_roundscale_sh2059 // CHECK: @llvm.x86.avx512fp16.mask.rndscale.sh2060 return _mm_maskz_roundscale_sh(__U, __A, __B, 3);2061}2062 2063__m128h test_mm_reduce_sh(__m128h __A, __m128h __B) {2064 // CHECK-LABEL: test_mm_reduce_sh2065 // CHECK: @llvm.x86.avx512fp16.mask.reduce.sh2066 return _mm_reduce_sh(__A, __B, 4);2067}2068 2069__m128h test_mm_mask_reduce_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {2070 // CHECK-LABEL: test_mm_mask_reduce_sh2071 // CHECK: @llvm.x86.avx512fp16.mask.reduce.sh2072 return _mm_mask_reduce_sh(__W, __U, __A, __B, 4);2073}2074 2075__m128h test_mm_maskz_reduce_sh(__mmask8 __U, __m128h __A, __m128h __B) {2076 // CHECK-LABEL: test_mm_maskz_reduce_sh2077 // CHECK: @llvm.x86.avx512fp16.mask.reduce.sh2078 return _mm_maskz_reduce_sh(__U, __A, __B, 4);2079}2080 2081__m128h test_mm_reduce_round_sh(__m128h __A, __m128h __B) {2082 // CHECK-LABEL: test_mm_reduce_round_sh2083 // CHECK: @llvm.x86.avx512fp16.mask.reduce.sh2084 return _mm_reduce_round_sh(__A, __B, 4, 8);2085}2086 2087__m128h test_mm_mask_reduce_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {2088 // CHECK-LABEL: test_mm_mask_reduce_round_sh2089 // CHECK: @llvm.x86.avx512fp16.mask.reduce.sh2090 return _mm_mask_reduce_round_sh(__W, __U, __A, __B, 4, 8);2091}2092 2093__m128h test_mm_maskz_reduce_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {2094 // CHECK-LABEL: test_mm_maskz_reduce_round_sh2095 // CHECK: @llvm.x86.avx512fp16.mask.reduce.sh2096 return _mm_maskz_reduce_round_sh(__U, __A, __B, 4, 8);2097}2098 2099__m512h test_mm512_sqrt_round_ph(__m512h __A) {2100 // CHECK-LABEL: test_mm512_sqrt_round_ph2101 // CHECK: @llvm.x86.avx512fp16.sqrt.ph.512(<32 x half> %{{.*}}, i32 11)2102 return _mm512_sqrt_round_ph(__A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2103}2104 2105__m512h test_mm512_mask_sqrt_round_ph(__m512h __W, __mmask32 __U, __m512h __A) {2106 // CHECK-LABEL: test_mm512_mask_sqrt_round_ph2107 // CHECK: @llvm.x86.avx512fp16.sqrt.ph.512(<32 x half> %{{.*}}, i32 11)2108 // CHECK: bitcast i32 %{{.*}} to <32 x i1>2109 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}2110 return _mm512_mask_sqrt_round_ph(__W, __U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2111}2112 2113__m512h test_mm512_maskz_sqrt_round_ph(__mmask32 __U, __m512h __A) {2114 // CHECK-LABEL: test_mm512_maskz_sqrt_round_ph2115 // CHECK: @llvm.x86.avx512fp16.sqrt.ph.512(<32 x half> %{{.*}}, i32 11)2116 // CHECK: bitcast i32 %{{.*}} to <32 x i1>2117 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> {{.*}}2118 return _mm512_maskz_sqrt_round_ph(__U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2119}2120 2121__m512h test_mm512_sqrt_ph(__m512h __A) {2122 // CHECK-LABEL: test_mm512_sqrt_ph2123 // CHECK: @llvm.sqrt.v32f16(<32 x half> %{{.*}})2124 return _mm512_sqrt_ph(__A);2125}2126__m512h test_mm512_mask_sqrt_ph(__m512h __W, __mmask32 __U, __m512h __A) {2127 // CHECK-LABEL: test_mm512_mask_sqrt_ph2128 // CHECK: @llvm.sqrt.v32f16(<32 x half> %{{.*}})2129 // CHECK: bitcast i32 %{{.*}} to <32 x i1>2130 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}2131 return _mm512_mask_sqrt_ph(__W, __U, __A);2132}2133__m512h test_mm512_maskz_sqrt_ph(__mmask32 __U, __m512h __A) {2134 // CHECK-LABEL: test_mm512_maskz_sqrt_ph2135 // CHECK: @llvm.sqrt.v32f16(<32 x half> %{{.*}})2136 // CHECK: bitcast i32 %{{.*}} to <32 x i1>2137 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> {{.*}}2138 return _mm512_maskz_sqrt_ph(__U, __A);2139}2140 2141__m128h test_mm_sqrt_round_sh(__m128h __A, __m128h __B) {2142 // CHECK-LABEL: test_mm_sqrt_round_sh2143 // CHECK: call <8 x half> @llvm.x86.avx512fp16.mask.sqrt.sh(<8 x half> %{{.*}}, <8 x half> %{{.*}}, <8 x half> %{{.*}}, i8 -1, i32 11)2144 return _mm_sqrt_round_sh(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2145}2146 2147__m128h test_mm_mask_sqrt_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {2148 // CHECK-LABEL: test_mm_mask_sqrt_round_sh2149 // CHECK: call <8 x half> @llvm.x86.avx512fp16.mask.sqrt.sh(<8 x half> %{{.*}}, <8 x half> %{{.*}}, <8 x half> %{{.*}}, i8 {{.*}}, i32 11)2150 return _mm_mask_sqrt_round_sh(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2151}2152 2153__m128h test_mm_maskz_sqrt_round_sh(__mmask8 __U, __m128h __A, __m128h __B) {2154 // CHECK-LABEL: test_mm_maskz_sqrt_round_sh2155 // CHECK: call <8 x half> @llvm.x86.avx512fp16.mask.sqrt.sh(<8 x half> %{{.*}}, <8 x half> %{{.*}}, <8 x half> %{{.*}}, i8 {{.*}}, i32 11)2156 return _mm_maskz_sqrt_round_sh(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2157}2158 2159__m128h test_mm_sqrt_sh(__m128h __A, __m128h __B) {2160 // CHECK-LABEL: test_mm_sqrt_sh2161 // CHECK: %{{.*}} = call half @llvm.sqrt.f16(half %{{.*}})2162 return _mm_sqrt_sh(__A, __B);2163}2164__m128h test_mm_mask_sqrt_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {2165 // CHECK-LABEL: test_mm_mask_sqrt_sh2166 // CHECK: %{{.*}} = call half @llvm.sqrt.f16(half %{{.*}})2167 return _mm_mask_sqrt_sh(__W, __U, __A, __B);2168}2169__m128h test_mm_maskz_sqrt_sh(__mmask8 __U, __m128h __A, __m128h __B) {2170 // CHECK-LABEL: test_mm_maskz_sqrt_sh2171 // CHECK: %{{.*}} = call half @llvm.sqrt.f16(half %{{.*}})2172 return _mm_maskz_sqrt_sh(__U, __A, __B);2173}2174 2175__mmask32 test_mm512_mask_fpclass_ph_mask(__mmask32 __U, __m512h __A) {2176 // CHECK-LABEL: test_mm512_mask_fpclass_ph_mask2177 // CHECK: @llvm.x86.avx512fp16.fpclass.ph.5122178 return _mm512_mask_fpclass_ph_mask(__U, __A, 4);2179}2180 2181__mmask32 test_mm512_fpclass_ph_mask(__m512h __A) {2182 // CHECK-LABEL: test_mm512_fpclass_ph_mask2183 // CHECK: @llvm.x86.avx512fp16.fpclass.ph.5122184 return _mm512_fpclass_ph_mask(__A, 4);2185}2186 2187__mmask8 test_mm_fpclash_sh_mask(__m128 __A) {2188 // CHECK-LABEL: test_mm_fpclash_sh_mask2189 // CHECK: @llvm.x86.avx512fp16.mask.fpclass.sh2190 return _mm_fpclass_sh_mask(__A, 2);2191}2192 2193__mmask8 test_mm_mask_fpclash_sh_mask(__mmask8 __U, __m128 __A) {2194 // CHECK-LABEL: test_mm_mask_fpclash_sh_mask2195 // CHECK: @llvm.x86.avx512fp16.mask.fpclass.sh2196 return _mm_mask_fpclass_sh_mask(__U, __A, 2);2197}2198 2199__m128h test_mm512_cvt_roundpd_ph(__m512d A) {2200 // CHECK-LABEL: test_mm512_cvt_roundpd_ph2201 // CHECK: @llvm.x86.avx512fp16.mask.vcvtpd2ph.5122202 return _mm512_cvt_roundpd_ph(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2203}2204 2205__m128h test_mm512_mask_cvt_roundpd_ph(__m128h A, __mmask8 B, __m512d C) {2206 // CHECK-LABEL: test_mm512_mask_cvt_roundpd_ph2207 // CHECK: @llvm.x86.avx512fp16.mask.vcvtpd2ph.5122208 return _mm512_mask_cvt_roundpd_ph(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2209}2210 2211__m128h test_mm512_maskz_cvt_roundpd_ph(__mmask8 A, __m512d B) {2212 // CHECK-LABEL: test_mm512_maskz_cvt_roundpd_ph2213 // CHECK: @llvm.x86.avx512fp16.mask.vcvtpd2ph.5122214 return _mm512_maskz_cvt_roundpd_ph(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2215}2216 2217__m128h test_mm512_cvtpd_ph(__m512d A) {2218 // CHECK-LABEL: test_mm512_cvtpd_ph2219 // CHECK: @llvm.x86.avx512fp16.mask.vcvtpd2ph.5122220 return _mm512_cvtpd_ph(A);2221}2222 2223__m128h test_mm512_mask_cvtpd_ph(__m128h A, __mmask8 B, __m512d C) {2224 // CHECK-LABEL: test_mm512_mask_cvtpd_ph2225 // CHECK: @llvm.x86.avx512fp16.mask.vcvtpd2ph.5122226 return _mm512_mask_cvtpd_ph(A, B, C);2227}2228 2229__m128h test_mm512_maskz_cvtpd_ph(__mmask8 A, __m512d B) {2230 // CHECK-LABEL: test_mm512_maskz_cvtpd_ph2231 // CHECK: @llvm.x86.avx512fp16.mask.vcvtpd2ph.5122232 return _mm512_maskz_cvtpd_ph(A, B);2233}2234 2235__m512d test_mm512_cvt_roundph_pd(__m128h A) {2236 // CHECK-LABEL: test_mm512_cvt_roundph_pd2237 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2pd.5122238 return _mm512_cvt_roundph_pd(A, _MM_FROUND_NO_EXC);2239}2240 2241__m512d test_mm512_mask_cvt_roundph_pd(__m512d A, __mmask8 B, __m128h C) {2242 // CHECK-LABEL: test_mm512_mask_cvt_roundph_pd2243 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2pd.5122244 return _mm512_mask_cvt_roundph_pd(A, B, C, _MM_FROUND_NO_EXC);2245}2246 2247__m512d test_mm512_maskz_cvt_roundph_pd(__mmask8 A, __m128h B) {2248 // CHECK-LABEL: test_mm512_maskz_cvt_roundph_pd2249 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2pd.5122250 return _mm512_maskz_cvt_roundph_pd(A, B, _MM_FROUND_NO_EXC);2251}2252 2253__m512d test_mm512_cvtph_pd(__m128h A) {2254 // CHECK-LABEL: test_mm512_cvtph_pd2255 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2pd.5122256 return _mm512_cvtph_pd(A);2257}2258 2259__m512d test_mm512_mask_cvtph_pd(__m512d A, __mmask8 B, __m128h C) {2260 // CHECK-LABEL: test_mm512_mask_cvtph_pd2261 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2pd.5122262 return _mm512_mask_cvtph_pd(A, B, C);2263}2264 2265__m512d test_mm512_maskz_cvtph_pd(__mmask8 A, __m128h B) {2266 // CHECK-LABEL: test_mm512_maskz_cvtph_pd2267 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2pd.5122268 return _mm512_maskz_cvtph_pd(A, B);2269}2270 2271__m128 test_mm_cvt_roundsh_ss(__m128 A, __m128h B) {2272 // CHECK-LABEL: test_mm_cvt_roundsh_ss2273 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2ss.round2274 return _mm_cvt_roundsh_ss(A, B, _MM_FROUND_NO_EXC);2275}2276 2277__m128 test_mm_mask_cvt_roundsh_ss(__m128 A, __mmask8 B, __m128 C, __m128h D) {2278 // CHECK-LABEL: test_mm_mask_cvt_roundsh_ss2279 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2ss.round2280 return _mm_mask_cvt_roundsh_ss(A, B, C, D, _MM_FROUND_NO_EXC);2281}2282 2283__m128 test_mm_maskz_cvt_roundsh_ss(__mmask8 A, __m128 B, __m128h C) {2284 // CHECK-LABEL: test_mm_maskz_cvt_roundsh_ss2285 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2ss.round2286 return _mm_maskz_cvt_roundsh_ss(A, B, C, _MM_FROUND_NO_EXC);2287}2288 2289__m128 test_mm_cvtsh_ss(__m128 A, __m128h B) {2290 // CHECK-LABEL: test_mm_cvtsh_ss2291 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2ss.round2292 return _mm_cvtsh_ss(A, B);2293}2294 2295__m128 test_mm_mask_cvtsh_ss(__m128 A, __mmask8 B, __m128 C, __m128h D) {2296 // CHECK-LABEL: test_mm_mask_cvtsh_ss2297 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2ss.round2298 return _mm_mask_cvtsh_ss(A, B, C, D);2299}2300 2301__m128 test_mm_maskz_cvtsh_ss(__mmask8 A, __m128 B, __m128h C) {2302 // CHECK-LABEL: test_mm_maskz_cvtsh_ss2303 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2ss.round2304 return _mm_maskz_cvtsh_ss(A, B, C);2305}2306 2307__m128h test_mm_cvt_roundss_sh(__m128h A, __m128 B) {2308 // CHECK-LABEL: test_mm_cvt_roundss_sh2309 // CHECK: @llvm.x86.avx512fp16.mask.vcvtss2sh.round2310 return _mm_cvt_roundss_sh(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2311}2312 2313__m128h test_mm_mask_cvt_roundss_sh(__m128h A, __mmask8 B, __m128h C, __m128 D) {2314 // CHECK-LABEL: test_mm_mask_cvt_roundss_sh2315 // CHECK: @llvm.x86.avx512fp16.mask.vcvtss2sh.round2316 return _mm_mask_cvt_roundss_sh(A, B, C, D, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2317}2318 2319__m128h test_mm_maskz_cvt_roundss_sh(__mmask8 A, __m128h B, __m128 C) {2320 // CHECK-LABEL: test_mm_maskz_cvt_roundss_sh2321 // CHECK: @llvm.x86.avx512fp16.mask.vcvtss2sh.round2322 return _mm_maskz_cvt_roundss_sh(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2323}2324 2325__m128h test_mm_cvtss_sh(__m128h A, __m128 B) {2326 // CHECK-LABEL: test_mm_cvtss_sh2327 // CHECK: @llvm.x86.avx512fp16.mask.vcvtss2sh.round2328 return _mm_cvtss_sh(A, B);2329}2330 2331__m128h test_mm_mask_cvtss_sh(__m128h A, __mmask8 B, __m128h C, __m128 D) {2332 // CHECK-LABEL: test_mm_mask_cvtss_sh2333 // CHECK: @llvm.x86.avx512fp16.mask.vcvtss2sh.round2334 return _mm_mask_cvtss_sh(A, B, C, D);2335}2336 2337__m128h test_mm_maskz_cvtss_sh(__mmask8 A, __m128h B, __m128 C) {2338 // CHECK-LABEL: test_mm_maskz_cvtss_sh2339 // CHECK: @llvm.x86.avx512fp16.mask.vcvtss2sh.round2340 return _mm_maskz_cvtss_sh(A, B, C);2341}2342 2343__m128h test_mm_cvt_roundsd_sh(__m128h A, __m128d B) {2344 // CHECK-LABEL: test_mm_cvt_roundsd_sh2345 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsd2sh.round2346 return _mm_cvt_roundsd_sh(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2347}2348 2349__m128h test_mm_mask_cvt_roundsd_sh(__m128h A, __mmask8 B, __m128h C, __m128d D) {2350 // CHECK-LABEL: test_mm_mask_cvt_roundsd_sh2351 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsd2sh.round2352 return _mm_mask_cvt_roundsd_sh(A, B, C, D, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2353}2354 2355__m128h test_mm_maskz_cvt_roundsd_sh(__mmask8 A, __m128h B, __m128d C) {2356 // CHECK-LABEL: test_mm_maskz_cvt_roundsd_sh2357 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsd2sh.round2358 return _mm_maskz_cvt_roundsd_sh(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2359}2360 2361__m128h test_mm_cvtsd_sh(__m128h A, __m128d B) {2362 // CHECK-LABEL: test_mm_cvtsd_sh2363 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsd2sh.round2364 return _mm_cvtsd_sh(A, B);2365}2366 2367__m128h test_mm_mask_cvtsd_sh(__m128h A, __mmask8 B, __m128h C, __m128d D) {2368 // CHECK-LABEL: test_mm_mask_cvtsd_sh2369 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsd2sh.round2370 return _mm_mask_cvtsd_sh(A, B, C, D);2371}2372 2373__m128h test_mm_maskz_cvtsd_sh(__mmask8 A, __m128h B, __m128d C) {2374 // CHECK-LABEL: test_mm_maskz_cvtsd_sh2375 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsd2sh.round2376 return _mm_maskz_cvtsd_sh(A, B, C);2377}2378 2379__m128d test_mm_cvt_roundsh_sd(__m128d A, __m128h B) {2380 // CHECK-LABEL: test_mm_cvt_roundsh_sd2381 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2sd.round2382 return _mm_cvt_roundsh_sd(A, B, _MM_FROUND_NO_EXC);2383}2384 2385__m128d test_mm_mask_cvt_roundsh_sd(__m128d A, __mmask8 B, __m128d C, __m128h D) {2386 // CHECK-LABEL: test_mm_mask_cvt_roundsh_sd2387 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2sd.round2388 return _mm_mask_cvt_roundsh_sd(A, B, C, D, _MM_FROUND_NO_EXC);2389}2390 2391__m128d test_mm_maskz_cvt_roundsh_sd(__mmask8 A, __m128d B, __m128h C) {2392 // CHECK-LABEL: test_mm_maskz_cvt_roundsh_sd2393 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2sd.round2394 return _mm_maskz_cvt_roundsh_sd(A, B, C, _MM_FROUND_NO_EXC);2395}2396 2397__m128d test_mm_cvtsh_sd(__m128d A, __m128h B) {2398 // CHECK-LABEL: test_mm_cvtsh_sd2399 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2sd.round2400 return _mm_cvtsh_sd(A, B);2401}2402 2403__m128d test_mm_mask_cvtsh_sd(__m128d A, __mmask8 B, __m128d C, __m128h D) {2404 // CHECK-LABEL: test_mm_mask_cvtsh_sd2405 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2sd.round2406 return _mm_mask_cvtsh_sd(A, B, C, D);2407}2408 2409__m128d test_mm_maskz_cvtsh_sd(__mmask8 A, __m128d B, __m128h C) {2410 // CHECK-LABEL: test_mm_maskz_cvtsh_sd2411 // CHECK: @llvm.x86.avx512fp16.mask.vcvtsh2sd.round2412 return _mm_maskz_cvtsh_sd(A, B, C);2413}2414 2415__m512i test_mm512_cvt_roundph_epi16(__m512h A) {2416 // CHECK-LABEL: test_mm512_cvt_roundph_epi162417 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2w.5122418 return _mm512_cvt_roundph_epi16(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2419}2420 2421__m512i test_mm512_mask_cvt_roundph_epi16(__m512i A, __mmask32 B, __m512h C) {2422 // CHECK-LABEL: test_mm512_mask_cvt_roundph_epi162423 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2w.5122424 return _mm512_mask_cvt_roundph_epi16(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2425}2426 2427__m512i test_mm512_maskz_cvt_roundph_epi16(__mmask32 A, __m512h B) {2428 // CHECK-LABEL: test_mm512_maskz_cvt_roundph_epi162429 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2w.5122430 return _mm512_maskz_cvt_roundph_epi16(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2431}2432 2433__m512i test_mm512_cvtph_epi16(__m512h A) {2434 // CHECK-LABEL: test_mm512_cvtph_epi162435 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2w.5122436 return _mm512_cvtph_epi16(A);2437}2438 2439__m512i test_mm512_mask_cvtph_epi16(__m512i A, __mmask32 B, __m512h C) {2440 // CHECK-LABEL: test_mm512_mask_cvtph_epi162441 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2w.5122442 return _mm512_mask_cvtph_epi16(A, B, C);2443}2444 2445__m512i test_mm512_maskz_cvtph_epi16(__mmask32 A, __m512h B) {2446 // CHECK-LABEL: test_mm512_maskz_cvtph_epi162447 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2w.5122448 return _mm512_maskz_cvtph_epi16(A, B);2449}2450 2451__m512i test_mm512_cvtt_roundph_epi16(__m512h A) {2452 // CHECK-LABEL: test_mm512_cvtt_roundph_epi162453 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2w.5122454 return _mm512_cvtt_roundph_epi16(A, _MM_FROUND_NO_EXC);2455}2456 2457__m512i test_mm512_mask_cvtt_roundph_epi16(__m512i A, __mmask32 B, __m512h C) {2458 // CHECK-LABEL: test_mm512_mask_cvtt_roundph_epi162459 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2w.5122460 return _mm512_mask_cvtt_roundph_epi16(A, B, C, _MM_FROUND_NO_EXC);2461}2462 2463__m512i test_mm512_maskz_cvtt_roundph_epi16(__mmask32 A, __m512h B) {2464 // CHECK-LABEL: test_mm512_maskz_cvtt_roundph_epi162465 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2w.5122466 return _mm512_maskz_cvtt_roundph_epi16(A, B, _MM_FROUND_NO_EXC);2467}2468 2469__m512i test_mm512_cvttph_epi16(__m512h A) {2470 // CHECK-LABEL: test_mm512_cvttph_epi162471 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2w.5122472 return _mm512_cvttph_epi16(A);2473}2474 2475__m512i test_mm512_mask_cvttph_epi16(__m512i A, __mmask32 B, __m512h C) {2476 // CHECK-LABEL: test_mm512_mask_cvttph_epi162477 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2w.5122478 return _mm512_mask_cvttph_epi16(A, B, C);2479}2480 2481__m512i test_mm512_maskz_cvttph_epi16(__mmask32 A, __m512h B) {2482 // CHECK-LABEL: test_mm512_maskz_cvttph_epi162483 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2w.5122484 return _mm512_maskz_cvttph_epi16(A, B);2485}2486 2487__m512h test_mm512_cvt_roundepi16_ph(__m512i A) {2488 // CHECK-LABEL: test_mm512_cvt_roundepi16_ph2489 // CHECK: @llvm.x86.avx512.sitofp.round.v32f16.v32i162490 return _mm512_cvt_roundepi16_ph(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2491}2492 2493__m512h test_mm512_mask_cvt_roundepi16_ph(__m512h A, __mmask32 B, __m512i C) {2494 // CHECK-LABEL: test_mm512_mask_cvt_roundepi16_ph2495 // CHECK: @llvm.x86.avx512.sitofp.round.v32f16.v32i162496 return _mm512_mask_cvt_roundepi16_ph(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2497}2498 2499__m512h test_mm512_maskz_cvt_roundepi16_ph(__mmask32 A, __m512i B) {2500 // CHECK-LABEL: test_mm512_maskz_cvt_roundepi16_ph2501 // CHECK: @llvm.x86.avx512.sitofp.round.v32f16.v32i162502 return _mm512_maskz_cvt_roundepi16_ph(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2503}2504 2505__m512h test_mm512_cvtepi16_ph(__m512i A) {2506 // CHECK-LABEL: test_mm512_cvtepi16_ph2507 // CHECK: %{{.*}} = sitofp <32 x i16> %{{.*}} to <32 x half>2508 return _mm512_cvtepi16_ph(A);2509}2510 2511__m512h test_mm512_mask_cvtepi16_ph(__m512h A, __mmask32 B, __m512i C) {2512 // CHECK-LABEL: test_mm512_mask_cvtepi16_ph2513 // CHECK: %{{.*}} = sitofp <32 x i16> %{{.*}} to <32 x half>2514 return _mm512_mask_cvtepi16_ph(A, B, C);2515}2516 2517__m512h test_mm512_maskz_cvtepi16_ph(__mmask32 A, __m512i B) {2518 // CHECK-LABEL: test_mm512_maskz_cvtepi16_ph2519 // CHECK: %{{.*}} = sitofp <32 x i16> %{{.*}} to <32 x half>2520 return _mm512_maskz_cvtepi16_ph(A, B);2521}2522 2523__m512i test_mm512_cvt_roundph_epu16(__m512h A) {2524 // CHECK-LABEL: test_mm512_cvt_roundph_epu162525 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uw.5122526 return _mm512_cvt_roundph_epu16(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2527}2528 2529__m512i test_mm512_mask_cvt_roundph_epu16(__m512i A, __mmask32 B, __m512h C) {2530 // CHECK-LABEL: test_mm512_mask_cvt_roundph_epu162531 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uw.5122532 return _mm512_mask_cvt_roundph_epu16(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2533}2534 2535__m512i test_mm512_maskz_cvt_roundph_epu16(__mmask32 A, __m512h B) {2536 // CHECK-LABEL: test_mm512_maskz_cvt_roundph_epu162537 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uw.5122538 return _mm512_maskz_cvt_roundph_epu16(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2539}2540 2541__m512i test_mm512_cvtph_epu16(__m512h A) {2542 // CHECK-LABEL: test_mm512_cvtph_epu162543 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uw.5122544 return _mm512_cvtph_epu16(A);2545}2546 2547__m512i test_mm512_mask_cvtph_epu16(__m512i A, __mmask32 B, __m512h C) {2548 // CHECK-LABEL: test_mm512_mask_cvtph_epu162549 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uw.5122550 return _mm512_mask_cvtph_epu16(A, B, C);2551}2552 2553__m512i test_mm512_maskz_cvtph_epu16(__mmask32 A, __m512h B) {2554 // CHECK-LABEL: test_mm512_maskz_cvtph_epu162555 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uw.5122556 return _mm512_maskz_cvtph_epu16(A, B);2557}2558 2559__m512i test_mm512_cvtt_roundph_epu16(__m512h A) {2560 // CHECK-LABEL: test_mm512_cvtt_roundph_epu162561 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uw.5122562 return _mm512_cvtt_roundph_epu16(A, _MM_FROUND_NO_EXC);2563}2564 2565__m512i test_mm512_mask_cvtt_roundph_epu16(__m512i A, __mmask32 B, __m512h C) {2566 // CHECK-LABEL: test_mm512_mask_cvtt_roundph_epu162567 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uw.5122568 return _mm512_mask_cvtt_roundph_epu16(A, B, C, _MM_FROUND_NO_EXC);2569}2570 2571__m512i test_mm512_maskz_cvtt_roundph_epu16(__mmask32 A, __m512h B) {2572 // CHECK-LABEL: test_mm512_maskz_cvtt_roundph_epu162573 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uw.5122574 return _mm512_maskz_cvtt_roundph_epu16(A, B, _MM_FROUND_NO_EXC);2575}2576 2577__m512i test_mm512_cvttph_epu16(__m512h A) {2578 // CHECK-LABEL: test_mm512_cvttph_epu162579 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uw.5122580 return _mm512_cvttph_epu16(A);2581}2582 2583__m512i test_mm512_mask_cvttph_epu16(__m512i A, __mmask32 B, __m512h C) {2584 // CHECK-LABEL: test_mm512_mask_cvttph_epu162585 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uw.5122586 return _mm512_mask_cvttph_epu16(A, B, C);2587}2588 2589__m512i test_mm512_maskz_cvttph_epu16(__mmask32 A, __m512h B) {2590 // CHECK-LABEL: test_mm512_maskz_cvttph_epu162591 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uw.5122592 return _mm512_maskz_cvttph_epu16(A, B);2593}2594 2595__m512h test_mm512_cvt_roundepu16_ph(__m512i A) {2596 // CHECK-LABEL: test_mm512_cvt_roundepu16_ph2597 // CHECK: @llvm.x86.avx512.uitofp.round.v32f16.v32i162598 return _mm512_cvt_roundepu16_ph(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2599}2600 2601__m512h test_mm512_mask_cvt_roundepu16_ph(__m512h A, __mmask32 B, __m512i C) {2602 // CHECK-LABEL: test_mm512_mask_cvt_roundepu16_ph2603 // CHECK: @llvm.x86.avx512.uitofp.round.v32f16.v32i162604 return _mm512_mask_cvt_roundepu16_ph(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2605}2606 2607__m512h test_mm512_maskz_cvt_roundepu16_ph(__mmask32 A, __m512i B) {2608 // CHECK-LABEL: test_mm512_maskz_cvt_roundepu16_ph2609 // CHECK: @llvm.x86.avx512.uitofp.round.v32f16.v32i162610 return _mm512_maskz_cvt_roundepu16_ph(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2611}2612 2613__m512h test_mm512_cvtepu16_ph(__m512i A) {2614 // CHECK-LABEL: test_mm512_cvtepu16_ph2615 // CHECK: %{{.*}} = uitofp <32 x i16> %{{.*}} to <32 x half>2616 return _mm512_cvtepu16_ph(A);2617}2618 2619__m512h test_mm512_mask_cvtepu16_ph(__m512h A, __mmask32 B, __m512i C) {2620 // CHECK-LABEL: test_mm512_mask_cvtepu16_ph2621 // CHECK: %{{.*}} = uitofp <32 x i16> %{{.*}} to <32 x half>2622 return _mm512_mask_cvtepu16_ph(A, B, C);2623}2624 2625__m512h test_mm512_maskz_cvtepu16_ph(__mmask32 A, __m512i B) {2626 // CHECK-LABEL: test_mm512_maskz_cvtepu16_ph2627 // CHECK: %{{.*}} = uitofp <32 x i16> %{{.*}} to <32 x half>2628 return _mm512_maskz_cvtepu16_ph(A, B);2629}2630 2631__m512i test_mm512_cvt_roundph_epi32(__m256h A) {2632 // CHECK-LABEL: test_mm512_cvt_roundph_epi322633 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2dq.5122634 return _mm512_cvt_roundph_epi32(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2635}2636 2637__m512i test_mm512_mask_cvt_roundph_epi32(__m512i A, __mmask16 B, __m256h C) {2638 // CHECK-LABEL: test_mm512_mask_cvt_roundph_epi322639 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2dq.5122640 return _mm512_mask_cvt_roundph_epi32(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2641}2642 2643__m512i test_mm512_maskz_cvt_roundph_epi32(__mmask16 A, __m256h B) {2644 // CHECK-LABEL: test_mm512_maskz_cvt_roundph_epi322645 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2dq.5122646 return _mm512_maskz_cvt_roundph_epi32(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2647}2648 2649__m512i test_mm512_cvtph_epi32(__m256h A) {2650 // CHECK-LABEL: test_mm512_cvtph_epi322651 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2dq.5122652 return _mm512_cvtph_epi32(A);2653}2654 2655__m512i test_mm512_mask_cvtph_epi32(__m512i A, __mmask16 B, __m256h C) {2656 // CHECK-LABEL: test_mm512_mask_cvtph_epi322657 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2dq.5122658 return _mm512_mask_cvtph_epi32(A, B, C);2659}2660 2661__m512i test_mm512_maskz_cvtph_epi32(__mmask16 A, __m256h B) {2662 // CHECK-LABEL: test_mm512_maskz_cvtph_epi322663 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2dq.5122664 return _mm512_maskz_cvtph_epi32(A, B);2665}2666 2667__m512i test_mm512_cvt_roundph_epu32(__m256h A) {2668 // CHECK-LABEL: test_mm512_cvt_roundph_epu322669 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2udq.5122670 return _mm512_cvt_roundph_epu32(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2671}2672 2673__m512i test_mm512_mask_cvt_roundph_epu32(__m512i A, __mmask16 B, __m256h C) {2674 // CHECK-LABEL: test_mm512_mask_cvt_roundph_epu322675 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2udq.5122676 return _mm512_mask_cvt_roundph_epu32(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2677}2678 2679__m512i test_mm512_maskz_cvt_roundph_epu32(__mmask16 A, __m256h B) {2680 // CHECK-LABEL: test_mm512_maskz_cvt_roundph_epu322681 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2udq.5122682 return _mm512_maskz_cvt_roundph_epu32(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2683}2684 2685__m512i test_mm512_cvtph_epu32(__m256h A) {2686 // CHECK-LABEL: test_mm512_cvtph_epu322687 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2udq.5122688 return _mm512_cvtph_epu32(A);2689}2690 2691__m512i test_mm512_mask_cvtph_epu32(__m512i A, __mmask16 B, __m256h C) {2692 // CHECK-LABEL: test_mm512_mask_cvtph_epu322693 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2udq.5122694 return _mm512_mask_cvtph_epu32(A, B, C);2695}2696 2697__m512i test_mm512_maskz_cvtph_epu32(__mmask16 A, __m256h B) {2698 // CHECK-LABEL: test_mm512_maskz_cvtph_epu322699 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2udq.5122700 return _mm512_maskz_cvtph_epu32(A, B);2701}2702 2703__m256h test_mm512_cvt_roundepi32_ph(__m512i A) {2704 // CHECK-LABEL: test_mm512_cvt_roundepi32_ph2705 // CHECK: @llvm.x86.avx512.sitofp.round.v16f16.v16i322706 return _mm512_cvt_roundepi32_ph(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2707}2708 2709__m256h test_mm512_mask_cvt_roundepi32_ph(__m256h A, __mmask16 B, __m512i C) {2710 // CHECK-LABEL: test_mm512_mask_cvt_roundepi32_ph2711 // CHECK: @llvm.x86.avx512.sitofp.round.v16f16.v16i322712 return _mm512_mask_cvt_roundepi32_ph(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2713}2714 2715__m256h test_mm512_maskz_cvt_roundepi32_ph(__mmask16 A, __m512i B) {2716 // CHECK-LABEL: test_mm512_maskz_cvt_roundepi32_ph2717 // CHECK: @llvm.x86.avx512.sitofp.round.v16f16.v16i322718 return _mm512_maskz_cvt_roundepi32_ph(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2719}2720 2721__m256h test_mm512_cvtepi32_ph(__m512i A) {2722 // CHECK-LABEL: test_mm512_cvtepi32_ph2723 // CHECK: %{{.*}} = sitofp <16 x i32> %{{.*}} to <16 x half>2724 return _mm512_cvtepi32_ph(A);2725}2726 2727__m256h test_mm512_mask_cvtepi32_ph(__m256h A, __mmask16 B, __m512i C) {2728 // CHECK-LABEL: test_mm512_mask_cvtepi32_ph2729 // CHECK: %{{.*}} = sitofp <16 x i32> %{{.*}} to <16 x half>2730 return _mm512_mask_cvtepi32_ph(A, B, C);2731}2732 2733__m256h test_mm512_maskz_cvtepi32_ph(__mmask16 A, __m512i B) {2734 // CHECK-LABEL: test_mm512_maskz_cvtepi32_ph2735 // CHECK: %{{.*}} = sitofp <16 x i32> %{{.*}} to <16 x half>2736 return _mm512_maskz_cvtepi32_ph(A, B);2737}2738 2739__m256h test_mm512_cvt_roundepu32_ph(__m512i A) {2740 // CHECK-LABEL: test_mm512_cvt_roundepu32_ph2741 // CHECK: @llvm.x86.avx512.uitofp.round.v16f16.v16i322742 return _mm512_cvt_roundepu32_ph(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2743}2744 2745__m256h test_mm512_mask_cvt_roundepu32_ph(__m256h A, __mmask16 B, __m512i C) {2746 // CHECK-LABEL: test_mm512_mask_cvt_roundepu32_ph2747 // CHECK: @llvm.x86.avx512.uitofp.round.v16f16.v16i322748 return _mm512_mask_cvt_roundepu32_ph(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2749}2750 2751__m256h test_mm512_maskz_cvt_roundepu32_ph(__mmask16 A, __m512i B) {2752 // CHECK-LABEL: test_mm512_maskz_cvt_roundepu32_ph2753 // CHECK: @llvm.x86.avx512.uitofp.round.v16f16.v16i322754 return _mm512_maskz_cvt_roundepu32_ph(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2755}2756 2757__m256h test_mm512_cvtepu32_ph(__m512i A) {2758 // CHECK-LABEL: test_mm512_cvtepu32_ph2759 // CHECK: %{{.*}} = uitofp <16 x i32> %{{.*}} to <16 x half>2760 return _mm512_cvtepu32_ph(A);2761}2762 2763__m256h test_mm512_mask_cvtepu32_ph(__m256h A, __mmask16 B, __m512i C) {2764 // CHECK-LABEL: test_mm512_mask_cvtepu32_ph2765 // CHECK: %{{.*}} = uitofp <16 x i32> %{{.*}} to <16 x half>2766 return _mm512_mask_cvtepu32_ph(A, B, C);2767}2768 2769__m256h test_mm512_maskz_cvtepu32_ph(__mmask16 A, __m512i B) {2770 // CHECK-LABEL: test_mm512_maskz_cvtepu32_ph2771 // CHECK: %{{.*}} = uitofp <16 x i32> %{{.*}} to <16 x half>2772 return _mm512_maskz_cvtepu32_ph(A, B);2773}2774 2775__m512i test_mm512_cvtt_roundph_epi32(__m256h A) {2776 // CHECK-LABEL: test_mm512_cvtt_roundph_epi322777 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2dq.5122778 return _mm512_cvtt_roundph_epi32(A, _MM_FROUND_NO_EXC);2779}2780 2781__m512i test_mm512_mask_cvtt_roundph_epi32(__m512i A, __mmask16 B, __m256h C) {2782 // CHECK-LABEL: test_mm512_mask_cvtt_roundph_epi322783 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2dq.5122784 return _mm512_mask_cvtt_roundph_epi32(A, B, C, _MM_FROUND_NO_EXC);2785}2786 2787__m512i test_mm512_maskz_cvtt_roundph_epi32(__mmask16 A, __m256h B) {2788 // CHECK-LABEL: test_mm512_maskz_cvtt_roundph_epi322789 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2dq.5122790 return _mm512_maskz_cvtt_roundph_epi32(A, B, _MM_FROUND_NO_EXC);2791}2792 2793__m512i test_mm512_cvttph_epi32(__m256h A) {2794 // CHECK-LABEL: test_mm512_cvttph_epi322795 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2dq.5122796 return _mm512_cvttph_epi32(A);2797}2798 2799__m512i test_mm512_mask_cvttph_epi32(__m512i A, __mmask16 B, __m256h C) {2800 // CHECK-LABEL: test_mm512_mask_cvttph_epi322801 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2dq.5122802 return _mm512_mask_cvttph_epi32(A, B, C);2803}2804 2805__m512i test_mm512_maskz_cvttph_epi32(__mmask16 A, __m256h B) {2806 // CHECK-LABEL: test_mm512_maskz_cvttph_epi322807 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2dq.5122808 return _mm512_maskz_cvttph_epi32(A, B);2809}2810 2811__m512i test_mm512_cvtt_roundph_epu32(__m256h A) {2812 // CHECK-LABEL: test_mm512_cvtt_roundph_epu322813 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2udq.5122814 return _mm512_cvtt_roundph_epu32(A, _MM_FROUND_NO_EXC);2815}2816 2817__m512i test_mm512_mask_cvtt_roundph_epu32(__m512i A, __mmask16 B, __m256h C) {2818 // CHECK-LABEL: test_mm512_mask_cvtt_roundph_epu322819 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2udq.5122820 return _mm512_mask_cvtt_roundph_epu32(A, B, C, _MM_FROUND_NO_EXC);2821}2822 2823__m512i test_mm512_maskz_cvtt_roundph_epu32(__mmask16 A, __m256h B) {2824 // CHECK-LABEL: test_mm512_maskz_cvtt_roundph_epu322825 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2udq.5122826 return _mm512_maskz_cvtt_roundph_epu32(A, B, _MM_FROUND_NO_EXC);2827}2828 2829__m512i test_mm512_cvttph_epu32(__m256h A) {2830 // CHECK-LABEL: test_mm512_cvttph_epu322831 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2udq.5122832 return _mm512_cvttph_epu32(A);2833}2834 2835__m512i test_mm512_mask_cvttph_epu32(__m512i A, __mmask16 B, __m256h C) {2836 // CHECK-LABEL: test_mm512_mask_cvttph_epu322837 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2udq.5122838 return _mm512_mask_cvttph_epu32(A, B, C);2839}2840 2841__m512i test_mm512_maskz_cvttph_epu32(__mmask16 A, __m256h B) {2842 // CHECK-LABEL: test_mm512_maskz_cvttph_epu322843 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2udq.5122844 return _mm512_maskz_cvttph_epu32(A, B);2845}2846 2847__m128h test_mm512_cvt_roundepi64_ph(__m512i A) {2848 // CHECK-LABEL: test_mm512_cvt_roundepi64_ph2849 // CHECK: @llvm.x86.avx512.sitofp.round.v8f16.v8i642850 return _mm512_cvt_roundepi64_ph(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2851}2852 2853__m128h test_mm512_mask_cvt_roundepi64_ph(__m128h A, __mmask8 B, __m512i C) {2854 // CHECK-LABEL: test_mm512_mask_cvt_roundepi64_ph2855 // CHECK: @llvm.x86.avx512.sitofp.round.v8f16.v8i642856 return _mm512_mask_cvt_roundepi64_ph(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2857}2858 2859__m128h test_mm512_maskz_cvt_roundepi64_ph(__mmask8 A, __m512i B) {2860 // CHECK-LABEL: test_mm512_maskz_cvt_roundepi64_ph2861 // CHECK: @llvm.x86.avx512.sitofp.round.v8f16.v8i642862 return _mm512_maskz_cvt_roundepi64_ph(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2863}2864 2865__m128h test_mm512_cvtepi64_ph(__m512i A) {2866 // CHECK-LABEL: test_mm512_cvtepi64_ph2867 // CHECK: %{{.*}} = sitofp <8 x i64> %{{.*}} to <8 x half>2868 return _mm512_cvtepi64_ph(A);2869}2870 2871__m128h test_mm512_mask_cvtepi64_ph(__m128h A, __mmask8 B, __m512i C) {2872 // CHECK-LABEL: test_mm512_mask_cvtepi64_ph2873 // CHECK: %{{.*}} = sitofp <8 x i64> %{{.*}} to <8 x half>2874 return _mm512_mask_cvtepi64_ph(A, B, C);2875}2876 2877__m128h test_mm512_maskz_cvtepi64_ph(__mmask8 A, __m512i B) {2878 // CHECK-LABEL: test_mm512_maskz_cvtepi64_ph2879 // CHECK: %{{.*}} = sitofp <8 x i64> %{{.*}} to <8 x half>2880 return _mm512_maskz_cvtepi64_ph(A, B);2881}2882 2883__m512i test_mm512_cvt_roundph_epi64(__m128h A) {2884 // CHECK-LABEL: test_mm512_cvt_roundph_epi642885 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2qq.5122886 return _mm512_cvt_roundph_epi64(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2887}2888 2889__m512i test_mm512_mask_cvt_roundph_epi64(__m512i A, __mmask8 B, __m128h C) {2890 // CHECK-LABEL: test_mm512_mask_cvt_roundph_epi642891 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2qq.5122892 return _mm512_mask_cvt_roundph_epi64(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2893}2894 2895__m512i test_mm512_maskz_cvt_roundph_epi64(__mmask8 A, __m128h B) {2896 // CHECK-LABEL: test_mm512_maskz_cvt_roundph_epi642897 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2qq.5122898 return _mm512_maskz_cvt_roundph_epi64(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2899}2900 2901__m512i test_mm512_cvtph_epi64(__m128h A) {2902 // CHECK-LABEL: test_mm512_cvtph_epi642903 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2qq.5122904 return _mm512_cvtph_epi64(A);2905}2906 2907__m512i test_mm512_mask_cvtph_epi64(__m512i A, __mmask8 B, __m128h C) {2908 // CHECK-LABEL: test_mm512_mask_cvtph_epi642909 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2qq.5122910 return _mm512_mask_cvtph_epi64(A, B, C);2911}2912 2913__m512i test_mm512_maskz_cvtph_epi64(__mmask8 A, __m128h B) {2914 // CHECK-LABEL: test_mm512_maskz_cvtph_epi642915 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2qq.5122916 return _mm512_maskz_cvtph_epi64(A, B);2917}2918 2919__m128h test_mm512_cvt_roundepu64_ph(__m512i A) {2920 // CHECK-LABEL: test_mm512_cvt_roundepu64_ph2921 // CHECK: @llvm.x86.avx512.uitofp.round.v8f16.v8i642922 return _mm512_cvt_roundepu64_ph(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2923}2924 2925__m128h test_mm512_mask_cvt_roundepu64_ph(__m128h A, __mmask8 B, __m512i C) {2926 // CHECK-LABEL: test_mm512_mask_cvt_roundepu64_ph2927 // CHECK: @llvm.x86.avx512.uitofp.round.v8f16.v8i642928 return _mm512_mask_cvt_roundepu64_ph(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2929}2930 2931__m128h test_mm512_maskz_cvt_roundepu64_ph(__mmask8 A, __m512i B) {2932 // CHECK-LABEL: test_mm512_maskz_cvt_roundepu64_ph2933 // CHECK: @llvm.x86.avx512.uitofp.round.v8f16.v8i642934 return _mm512_maskz_cvt_roundepu64_ph(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2935}2936 2937__m128h test_mm512_cvtepu64_ph(__m512i A) {2938 // CHECK-LABEL: test_mm512_cvtepu64_ph2939 // CHECK: %{{.*}} = uitofp <8 x i64> %{{.*}} to <8 x half>2940 return _mm512_cvtepu64_ph(A);2941}2942 2943__m128h test_mm512_mask_cvtepu64_ph(__m128h A, __mmask8 B, __m512i C) {2944 // CHECK-LABEL: test_mm512_mask_cvtepu64_ph2945 // CHECK: %{{.*}} = uitofp <8 x i64> %{{.*}} to <8 x half>2946 return _mm512_mask_cvtepu64_ph(A, B, C);2947}2948 2949__m128h test_mm512_maskz_cvtepu64_ph(__mmask8 A, __m512i B) {2950 // CHECK-LABEL: test_mm512_maskz_cvtepu64_ph2951 // CHECK: %{{.*}} = uitofp <8 x i64> %{{.*}} to <8 x half>2952 return _mm512_maskz_cvtepu64_ph(A, B);2953}2954 2955__m512i test_mm512_cvt_roundph_epu64(__m128h A) {2956 // CHECK-LABEL: test_mm512_cvt_roundph_epu642957 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uqq.5122958 return _mm512_cvt_roundph_epu64(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2959}2960 2961__m512i test_mm512_mask_cvt_roundph_epu64(__m512i A, __mmask8 B, __m128h C) {2962 // CHECK-LABEL: test_mm512_mask_cvt_roundph_epu642963 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uqq.5122964 return _mm512_mask_cvt_roundph_epu64(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2965}2966 2967__m512i test_mm512_maskz_cvt_roundph_epu64(__mmask8 A, __m128h B) {2968 // CHECK-LABEL: test_mm512_maskz_cvt_roundph_epu642969 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uqq.5122970 return _mm512_maskz_cvt_roundph_epu64(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);2971}2972 2973__m512i test_mm512_cvtph_epu64(__m128h A) {2974 // CHECK-LABEL: test_mm512_cvtph_epu642975 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uqq.5122976 return _mm512_cvtph_epu64(A);2977}2978 2979__m512i test_mm512_mask_cvtph_epu64(__m512i A, __mmask8 B, __m128h C) {2980 // CHECK-LABEL: test_mm512_mask_cvtph_epu642981 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uqq.5122982 return _mm512_mask_cvtph_epu64(A, B, C);2983}2984 2985__m512i test_mm512_maskz_cvtph_epu64(__mmask8 A, __m128h B) {2986 // CHECK-LABEL: test_mm512_maskz_cvtph_epu642987 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2uqq.5122988 return _mm512_maskz_cvtph_epu64(A, B);2989}2990 2991__m512i test_mm512_cvtt_roundph_epi64(__m128h A) {2992 // CHECK-LABEL: test_mm512_cvtt_roundph_epi642993 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2qq.5122994 return _mm512_cvtt_roundph_epi64(A, _MM_FROUND_NO_EXC);2995}2996 2997__m512i test_mm512_mask_cvtt_roundph_epi64(__m512i A, __mmask8 B, __m128h C) {2998 // CHECK-LABEL: test_mm512_mask_cvtt_roundph_epi642999 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2qq.5123000 return _mm512_mask_cvtt_roundph_epi64(A, B, C, _MM_FROUND_NO_EXC);3001}3002 3003__m512i test_mm512_maskz_cvtt_roundph_epi64(__mmask8 A, __m128h B) {3004 // CHECK-LABEL: test_mm512_maskz_cvtt_roundph_epi643005 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2qq.5123006 return _mm512_maskz_cvtt_roundph_epi64(A, B, _MM_FROUND_NO_EXC);3007}3008 3009__m512i test_mm512_cvttph_epi64(__m128h A) {3010 // CHECK-LABEL: test_mm512_cvttph_epi643011 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2qq.5123012 return _mm512_cvttph_epi64(A);3013}3014 3015__m512i test_mm512_mask_cvttph_epi64(__m512i A, __mmask8 B, __m128h C) {3016 // CHECK-LABEL: test_mm512_mask_cvttph_epi643017 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2qq.5123018 return _mm512_mask_cvttph_epi64(A, B, C);3019}3020 3021__m512i test_mm512_maskz_cvttph_epi64(__mmask8 A, __m128h B) {3022 // CHECK-LABEL: test_mm512_maskz_cvttph_epi643023 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2qq.5123024 return _mm512_maskz_cvttph_epi64(A, B);3025}3026 3027__m512i test_mm512_cvtt_roundph_epu64(__m128h A) {3028 // CHECK-LABEL: test_mm512_cvtt_roundph_epu643029 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uqq.5123030 return _mm512_cvtt_roundph_epu64(A, _MM_FROUND_NO_EXC);3031}3032 3033__m512i test_mm512_mask_cvtt_roundph_epu64(__m512i A, __mmask8 B, __m128h C) {3034 // CHECK-LABEL: test_mm512_mask_cvtt_roundph_epu643035 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uqq.5123036 return _mm512_mask_cvtt_roundph_epu64(A, B, C, _MM_FROUND_NO_EXC);3037}3038 3039__m512i test_mm512_maskz_cvtt_roundph_epu64(__mmask8 A, __m128h B) {3040 // CHECK-LABEL: test_mm512_maskz_cvtt_roundph_epu643041 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uqq.5123042 return _mm512_maskz_cvtt_roundph_epu64(A, B, _MM_FROUND_NO_EXC);3043}3044 3045__m512i test_mm512_cvttph_epu64(__m128h A) {3046 // CHECK-LABEL: test_mm512_cvttph_epu643047 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uqq.5123048 return _mm512_cvttph_epu64(A);3049}3050 3051__m512i test_mm512_mask_cvttph_epu64(__m512i A, __mmask8 B, __m128h C) {3052 // CHECK-LABEL: test_mm512_mask_cvttph_epu643053 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uqq.5123054 return _mm512_mask_cvttph_epu64(A, B, C);3055}3056 3057__m512i test_mm512_maskz_cvttph_epu64(__mmask8 A, __m128h B) {3058 // CHECK-LABEL: test_mm512_maskz_cvttph_epu643059 // CHECK: @llvm.x86.avx512fp16.mask.vcvttph2uqq.5123060 return _mm512_maskz_cvttph_epu64(A, B);3061}3062 3063int test_mm_cvt_roundsh_i32(__m128h A) {3064 // CHECK-LABEL: test_mm_cvt_roundsh_i323065 // CHECK: @llvm.x86.avx512fp16.vcvtsh2si323066 return _mm_cvt_roundsh_i32(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3067}3068 3069int test_mm_cvtsh_i32(__m128h A) {3070 // CHECK-LABEL: test_mm_cvtsh_i323071 // CHECK: @llvm.x86.avx512fp16.vcvtsh2si323072 return _mm_cvtsh_i32(A);3073}3074 3075unsigned int test_mm_cvt_roundsh_u32(__m128h A) {3076 // CHECK-LABEL: test_mm_cvt_roundsh_u323077 // CHECK: @llvm.x86.avx512fp16.vcvtsh2usi323078 return _mm_cvt_roundsh_u32(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3079}3080 3081unsigned int test_mm_cvtsh_u32(__m128h A) {3082 // CHECK-LABEL: test_mm_cvtsh_u323083 // CHECK: @llvm.x86.avx512fp16.vcvtsh2usi323084 return _mm_cvtsh_u32(A);3085}3086 3087#ifdef __x86_64__3088long long test_mm_cvt_roundsh_i64(__m128h A) {3089 // X64-LABEL: test_mm_cvt_roundsh_i643090 // X64: @llvm.x86.avx512fp16.vcvtsh2si643091 return _mm_cvt_roundsh_i64(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3092}3093 3094long long test_mm_cvtsh_i64(__m128h A) {3095 // X64-LABEL: test_mm_cvtsh_i643096 // X64: @llvm.x86.avx512fp16.vcvtsh2si643097 return _mm_cvtsh_i64(A);3098}3099 3100unsigned long long test_mm_cvt_roundsh_u64(__m128h A) {3101 // X64-LABEL: test_mm_cvt_roundsh_u643102 // X64: @llvm.x86.avx512fp16.vcvtsh2usi643103 return _mm_cvt_roundsh_u64(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3104}3105 3106unsigned long long test_mm_cvtsh_u64(__m128h A) {3107 // X64-LABEL: test_mm_cvtsh_u643108 // X64: @llvm.x86.avx512fp16.vcvtsh2usi643109 return _mm_cvtsh_u64(A);3110}3111#endif3112 3113__m128h test_mm_cvt_roundu32_sh(__m128h A, unsigned int B) {3114 // CHECK-LABEL: test_mm_cvt_roundu32_sh3115 // CHECK: @llvm.x86.avx512fp16.vcvtusi2sh3116 return _mm_cvt_roundu32_sh(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3117}3118 3119__m128h test_mm_cvtu32_sh(__m128h A, unsigned int B) {3120 // CHECK-LABEL: test_mm_cvtu32_sh3121 // CHECK: %{{.*}} = uitofp i32 %{{.*}} to half3122 return _mm_cvtu32_sh(A, B);3123}3124 3125#ifdef __x86_64__3126__m128h test_mm_cvt_roundu64_sh(__m128h A, unsigned long long B) {3127 // X64-LABEL: test_mm_cvt_roundu64_sh3128 // X64: @llvm.x86.avx512fp16.vcvtusi642sh3129 return _mm_cvt_roundu64_sh(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3130}3131 3132__m128h test_mm_cvtu64_sh(__m128h A, unsigned long long B) {3133 // X64-LABEL: test_mm_cvtu64_sh3134 // X64: %{{.*}} = uitofp i64 %{{.*}} to half3135 return _mm_cvtu64_sh(A, B);3136}3137#endif3138 3139__m128h test_mm_cvt_roundi32_sh(__m128h A, int B) {3140 // CHECK-LABEL: test_mm_cvt_roundi32_sh3141 // CHECK: @llvm.x86.avx512fp16.vcvtsi2sh3142 return _mm_cvt_roundi32_sh(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3143}3144 3145__m128h test_mm_cvti32_sh(__m128h A, int B) {3146 // CHECK-LABEL: test_mm_cvti32_sh3147 // CHECK: %{{.*}} = sitofp i32 %{{.*}} to half3148 return _mm_cvti32_sh(A, B);3149}3150 3151#ifdef __x86_64__3152__m128h test_mm_cvt_roundi64_sh(__m128h A, long long B) {3153 // X64-LABEL: test_mm_cvt_roundi64_sh3154 // X64: @llvm.x86.avx512fp16.vcvtsi642sh3155 return _mm_cvt_roundi64_sh(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3156}3157 3158__m128h test_mm_cvti64_sh(__m128h A, long long B) {3159 // X64-LABEL: test_mm_cvti64_sh3160 // X64: %{{.*}} = sitofp i64 %{{.*}} to half3161 return _mm_cvti64_sh(A, B);3162}3163#endif3164 3165int test_mm_cvtt_roundsh_i32(__m128h A) {3166 // CHECK-LABEL: test_mm_cvtt_roundsh_i323167 // CHECK: @llvm.x86.avx512fp16.vcvttsh2si323168 return _mm_cvtt_roundsh_i32(A, _MM_FROUND_NO_EXC);3169}3170 3171int test_mm_cvttsh_i32(__m128h A) {3172 // CHECK-LABEL: test_mm_cvttsh_i323173 // CHECK: @llvm.x86.avx512fp16.vcvttsh2si323174 return _mm_cvttsh_i32(A);3175}3176 3177#ifdef __x86_64__3178long long test_mm_cvtt_roundsh_i64(__m128h A) {3179 // X64-LABEL: test_mm_cvtt_roundsh_i643180 // X64: @llvm.x86.avx512fp16.vcvttsh2si643181 return _mm_cvtt_roundsh_i64(A, _MM_FROUND_NO_EXC);3182}3183 3184long long test_mm_cvttsh_i64(__m128h A) {3185 // X64-LABEL: test_mm_cvttsh_i643186 // X64: @llvm.x86.avx512fp16.vcvttsh2si643187 return _mm_cvttsh_i64(A);3188}3189#endif3190 3191unsigned int test_mm_cvtt_roundsh_u32(__m128h A) {3192 // CHECK-LABEL: test_mm_cvtt_roundsh_u323193 // CHECK: @llvm.x86.avx512fp16.vcvttsh2usi323194 return _mm_cvtt_roundsh_u32(A, _MM_FROUND_NO_EXC);3195}3196 3197unsigned int test_mm_cvttsh_u32(__m128h A) {3198 // CHECK-LABEL: test_mm_cvttsh_u323199 // CHECK: @llvm.x86.avx512fp16.vcvttsh2usi323200 return _mm_cvttsh_u32(A);3201}3202 3203#ifdef __x86_64__3204unsigned long long test_mm_cvtt_roundsh_u64(__m128h A) {3205 // X64-LABEL: test_mm_cvtt_roundsh_u643206 // X64: @llvm.x86.avx512fp16.vcvttsh2usi643207 return _mm_cvtt_roundsh_u64(A, _MM_FROUND_NO_EXC);3208}3209 3210unsigned long long test_mm_cvttsh_u64(__m128h A) {3211 // X64-LABEL: test_mm_cvttsh_u643212 // X64: @llvm.x86.avx512fp16.vcvttsh2usi643213 return _mm_cvttsh_u64(A);3214}3215#endif3216 3217__m512 test_mm512_cvtx_roundph_ps(__m256h A) {3218 // CHECK-LABEL: test_mm512_cvtx_roundph_ps3219 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2psx.5123220 return _mm512_cvtx_roundph_ps(A, _MM_FROUND_NO_EXC);3221}3222 3223__m512 test_mm512_mask_cvtx_roundph_ps(__m512 A, __mmask16 B, __m256h C) {3224 // CHECK-LABEL: test_mm512_mask_cvtx_roundph_ps3225 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2psx.5123226 return _mm512_mask_cvtx_roundph_ps(A, B, C, _MM_FROUND_NO_EXC);3227}3228 3229__m512 test_mm512_maskz_cvtx_roundph_ps(__mmask16 A, __m256h B) {3230 // CHECK-LABEL: test_mm512_maskz_cvtx_roundph_ps3231 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2psx.5123232 return _mm512_maskz_cvtx_roundph_ps(A, B, _MM_FROUND_NO_EXC);3233}3234 3235__m512 test_mm512_cvtxph_ps(__m256h A) {3236 // CHECK-LABEL: test_mm512_cvtxph_ps3237 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2psx.5123238 return _mm512_cvtxph_ps(A);3239}3240 3241__m512 test_mm512_mask_cvtxph_ps(__m512 A, __mmask16 B, __m256h C) {3242 // CHECK-LABEL: test_mm512_mask_cvtxph_ps3243 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2psx.5123244 return _mm512_mask_cvtxph_ps(A, B, C);3245}3246 3247__m512 test_mm512_maskz_cvtxph_ps(__mmask16 A, __m256h B) {3248 // CHECK-LABEL: test_mm512_maskz_cvtxph_ps3249 // CHECK: @llvm.x86.avx512fp16.mask.vcvtph2psx.5123250 return _mm512_maskz_cvtxph_ps(A, B);3251}3252 3253__m256h test_mm512_cvtx_roundps_ph(__m512 A) {3254 // CHECK-LABEL: test_mm512_cvtx_roundps_ph3255 // CHECK: @llvm.x86.avx512fp16.mask.vcvtps2phx.5123256 return _mm512_cvtx_roundps_ph(A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3257}3258 3259__m256h test_mm512_mask_cvtx_roundps_ph(__m256h A, __mmask16 B, __m512 C) {3260 // CHECK-LABEL: test_mm512_mask_cvtx_roundps_ph3261 // CHECK: @llvm.x86.avx512fp16.mask.vcvtps2phx.5123262 return _mm512_mask_cvtx_roundps_ph(A, B, C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3263}3264 3265__m256h test_mm512_maskz_cvtx_roundps_ph(__mmask16 A, __m512 B) {3266 // CHECK-LABEL: test_mm512_maskz_cvtx_roundps_ph3267 // CHECK: @llvm.x86.avx512fp16.mask.vcvtps2phx.5123268 return _mm512_maskz_cvtx_roundps_ph(A, B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3269}3270 3271__m256h test_mm512_cvtxps_ph(__m512 A) {3272 // CHECK-LABEL: test_mm512_cvtxps_ph3273 // CHECK: @llvm.x86.avx512fp16.mask.vcvtps2phx.5123274 return _mm512_cvtxps_ph(A);3275}3276 3277__m256h test_mm512_mask_cvtxps_ph(__m256h A, __mmask16 B, __m512 C) {3278 // CHECK-LABEL: test_mm512_mask_cvtxps_ph3279 // CHECK: @llvm.x86.avx512fp16.mask.vcvtps2phx.5123280 return _mm512_mask_cvtxps_ph(A, B, C);3281}3282 3283__m256h test_mm512_maskz_cvtxps_ph(__mmask16 A, __m512 B) {3284 // CHECK-LABEL: test_mm512_maskz_cvtxps_ph3285 // CHECK: @llvm.x86.avx512fp16.mask.vcvtps2phx.5123286 return _mm512_maskz_cvtxps_ph(A, B);3287}3288 3289__m512h test_mm512_fmadd_round_ph(__m512h __A, __m512h __B, __m512h __C) {3290 // CHECK-LABEL: test_mm512_fmadd_round_ph3291 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123292 return _mm512_fmadd_round_ph(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3293}3294 3295__m512h test_mm512_mask_fmadd_round_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3296 // CHECK-LABEL: test_mm512_mask_fmadd_round_ph3297 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123298 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3299 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3300 return _mm512_mask_fmadd_round_ph(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3301}3302 3303__m512h test_mm512_mask3_fmadd_round_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3304 // CHECK-LABEL: test_mm512_mask3_fmadd_round_ph3305 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123306 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3307 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3308 return _mm512_mask3_fmadd_round_ph(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3309}3310 3311__m512h test_mm512_maskz_fmadd_round_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3312 // CHECK-LABEL: test_mm512_maskz_fmadd_round_ph3313 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123314 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3315 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3316 return _mm512_maskz_fmadd_round_ph(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3317}3318 3319__m512h test_mm512_fmsub_round_ph(__m512h __A, __m512h __B, __m512h __C) {3320 // CHECK-LABEL: test_mm512_fmsub_round_ph3321 // CHECK: fneg3322 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123323 return _mm512_fmsub_round_ph(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3324}3325 3326__m512h test_mm512_mask_fmsub_round_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3327 // CHECK-LABEL: test_mm512_mask_fmsub_round_ph3328 // CHECK: fneg3329 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123330 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3331 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3332 return _mm512_mask_fmsub_round_ph(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3333}3334 3335__m512h test_mm512_maskz_fmsub_round_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3336 // CHECK-LABEL: test_mm512_maskz_fmsub_round_ph3337 // CHECK: fneg3338 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123339 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3340 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3341 return _mm512_maskz_fmsub_round_ph(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3342}3343 3344__m512h test_mm512_fnmadd_round_ph(__m512h __A, __m512h __B, __m512h __C) {3345 // CHECK-LABEL: test_mm512_fnmadd_round_ph3346 // CHECK: fneg3347 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123348 return _mm512_fnmadd_round_ph(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3349}3350 3351__m512h test_mm512_mask3_fnmadd_round_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3352 // CHECK-LABEL: test_mm512_mask3_fnmadd_round_ph3353 // CHECK: fneg3354 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123355 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3356 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3357 return _mm512_mask3_fnmadd_round_ph(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3358}3359 3360__m512h test_mm512_maskz_fnmadd_round_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3361 // CHECK-LABEL: test_mm512_maskz_fnmadd_round_ph3362 // CHECK: fneg3363 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123364 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3365 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3366 return _mm512_maskz_fnmadd_round_ph(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3367}3368 3369__m512h test_mm512_fnmsub_round_ph(__m512h __A, __m512h __B, __m512h __C) {3370 // CHECK-LABEL: test_mm512_fnmsub_round_ph3371 // CHECK: fneg3372 // CHECK: fneg3373 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123374 return _mm512_fnmsub_round_ph(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3375}3376 3377__m512h test_mm512_maskz_fnmsub_round_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3378 // CHECK-LABEL: test_mm512_maskz_fnmsub_round_ph3379 // CHECK: fneg3380 // CHECK: fneg3381 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123382 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3383 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3384 return _mm512_maskz_fnmsub_round_ph(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3385}3386 3387__m512h test_mm512_fmadd_ph(__m512h __A, __m512h __B, __m512h __C) {3388 // CHECK-LABEL: test_mm512_fmadd_ph3389 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3390 return _mm512_fmadd_ph(__A, __B, __C);3391}3392 3393__m512h test_mm512_mask_fmadd_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3394 // CHECK-LABEL: test_mm512_mask_fmadd_ph3395 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3396 return _mm512_mask_fmadd_ph(__A, __U, __B, __C);3397}3398 3399__m512h test_mm512_mask3_fmadd_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3400 // CHECK-LABEL: test_mm512_mask3_fmadd_ph3401 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3402 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3403 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3404 return _mm512_mask3_fmadd_ph(__A, __B, __C, __U);3405}3406 3407__m512h test_mm512_maskz_fmadd_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3408 // CHECK-LABEL: test_mm512_maskz_fmadd_ph3409 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3410 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3411 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3412 return _mm512_maskz_fmadd_ph(__U, __A, __B, __C);3413}3414 3415__m512h test_mm512_fmsub_ph(__m512h __A, __m512h __B, __m512h __C) {3416 // CHECK-LABEL: test_mm512_fmsub_ph3417 // CHECK: fneg3418 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3419 return _mm512_fmsub_ph(__A, __B, __C);3420}3421 3422__m512h test_mm512_mask_fmsub_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3423 // CHECK-LABEL: test_mm512_mask_fmsub_ph3424 // CHECK: fneg3425 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3426 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3427 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3428 return _mm512_mask_fmsub_ph(__A, __U, __B, __C);3429}3430 3431__m512h test_mm512_maskz_fmsub_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3432 // CHECK-LABEL: test_mm512_maskz_fmsub_ph3433 // CHECK: fneg3434 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3435 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3436 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3437 return _mm512_maskz_fmsub_ph(__U, __A, __B, __C);3438}3439 3440__m512h test_mm512_fnmadd_ph(__m512h __A, __m512h __B, __m512h __C) {3441 // CHECK-LABEL: test_mm512_fnmadd_ph3442 // CHECK: fneg3443 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3444 return _mm512_fnmadd_ph(__A, __B, __C);3445}3446 3447__m512h test_mm512_mask3_fnmadd_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3448 // CHECK-LABEL: test_mm512_mask3_fnmadd_ph3449 // CHECK: fneg3450 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3451 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3452 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3453 return _mm512_mask3_fnmadd_ph(__A, __B, __C, __U);3454}3455 3456__m512h test_mm512_maskz_fnmadd_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3457 // CHECK-LABEL: test_mm512_maskz_fnmadd_ph3458 // CHECK: fneg3459 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3460 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3461 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3462 return _mm512_maskz_fnmadd_ph(__U, __A, __B, __C);3463}3464 3465__m512h test_mm512_fnmsub_ph(__m512h __A, __m512h __B, __m512h __C) {3466 // CHECK-LABEL: test_mm512_fnmsub_ph3467 // CHECK: fneg3468 // CHECK: fneg3469 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3470 return _mm512_fnmsub_ph(__A, __B, __C);3471}3472 3473__m512h test_mm512_maskz_fnmsub_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3474 // CHECK-LABEL: test_mm512_maskz_fnmsub_ph3475 // CHECK: fneg3476 // CHECK: fneg3477 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3478 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3479 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3480 return _mm512_maskz_fnmsub_ph(__U, __A, __B, __C);3481}3482 3483__m512h test_mm512_fmaddsub_round_ph(__m512h __A, __m512h __B, __m512h __C) {3484 // CHECK-LABEL: test_mm512_fmaddsub_round_ph3485 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.5123486 return _mm512_fmaddsub_round_ph(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3487}3488 3489__m512h test_mm512_mask_fmaddsub_round_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3490 // CHECK-LABEL: test_mm512_mask_fmaddsub_round_ph3491 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.5123492 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3493 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3494 return _mm512_mask_fmaddsub_round_ph(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3495}3496 3497__m512h test_mm512_mask3_fmaddsub_round_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3498 // CHECK-LABEL: test_mm512_mask3_fmaddsub_round_ph3499 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.5123500 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3501 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3502 return _mm512_mask3_fmaddsub_round_ph(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3503}3504 3505__m512h test_mm512_maskz_fmaddsub_round_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3506 // CHECK-LABEL: test_mm512_maskz_fmaddsub_round_ph3507 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.5123508 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3509 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3510 return _mm512_maskz_fmaddsub_round_ph(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3511}3512 3513__m512h test_mm512_fmsubadd_round_ph(__m512h __A, __m512h __B, __m512h __C) {3514 // CHECK-LABEL: test_mm512_fmsubadd_round_ph3515 // CHECK: fneg3516 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.5123517 return _mm512_fmsubadd_round_ph(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3518}3519 3520__m512h test_mm512_mask_fmsubadd_round_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3521 // CHECK-LABEL: test_mm512_mask_fmsubadd_round_ph3522 // CHECK: fneg3523 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.5123524 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3525 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3526 return _mm512_mask_fmsubadd_round_ph(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3527}3528 3529__m512h test_mm512_maskz_fmsubadd_round_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3530 // CHECK-LABEL: test_mm512_maskz_fmsubadd_round_ph3531 // CHECK: fneg3532 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.5123533 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3534 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3535 return _mm512_maskz_fmsubadd_round_ph(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3536}3537 3538__m512h test_mm512_fmaddsub_ph(__m512h __A, __m512h __B, __m512h __C) {3539 // CHECK-LABEL: test_mm512_fmaddsub_ph3540 // CHECK-NOT: fneg3541 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.512(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}, i32 4)3542 return _mm512_fmaddsub_ph(__A, __B, __C);3543}3544 3545__m512h test_mm512_mask_fmaddsub_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3546 // CHECK-LABEL: test_mm512_mask_fmaddsub_ph3547 // CHECK-NOT: fneg3548 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.512(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}, i32 4)3549 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3550 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3551 return _mm512_mask_fmaddsub_ph(__A, __U, __B, __C);3552}3553 3554__m512h test_mm512_mask3_fmaddsub_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3555 // CHECK-LABEL: test_mm512_mask3_fmaddsub_ph3556 // CHECK-NOT: fneg3557 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.512(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}, i32 4)3558 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3559 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3560 return _mm512_mask3_fmaddsub_ph(__A, __B, __C, __U);3561}3562 3563__m512h test_mm512_maskz_fmaddsub_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3564 // CHECK-LABEL: test_mm512_maskz_fmaddsub_ph3565 // CHECK-NOT: fneg3566 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.512(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}, i32 4)3567 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3568 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3569 return _mm512_maskz_fmaddsub_ph(__U, __A, __B, __C);3570}3571 3572__m512h test_mm512_fmsubadd_ph(__m512h __A, __m512h __B, __m512h __C) {3573 // CHECK-LABEL: test_mm512_fmsubadd_ph3574 // CHECK: [[NEG:%.+]] = fneg3575 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.512(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> [[NEG]], i32 4)3576 return _mm512_fmsubadd_ph(__A, __B, __C);3577}3578 3579__m512h test_mm512_mask_fmsubadd_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3580 // CHECK-LABEL: test_mm512_mask_fmsubadd_ph3581 // CHECK: [[NEG:%.+]] = fneg3582 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.512(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> [[NEG]], i32 4)3583 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3584 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3585 return _mm512_mask_fmsubadd_ph(__A, __U, __B, __C);3586}3587 3588__m512h test_mm512_maskz_fmsubadd_ph(__mmask32 __U, __m512h __A, __m512h __B, __m512h __C) {3589 // CHECK-LABEL: test_mm512_maskz_fmsubadd_ph3590 // CHECK: [[NEG:%.+]] = fneg3591 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.512(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> [[NEG]], i32 4)3592 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3593 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> zeroinitializer3594 return _mm512_maskz_fmsubadd_ph(__U, __A, __B, __C);3595}3596 3597__m512h test_mm512_mask3_fmsub_round_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3598 // CHECK-LABEL: test_mm512_mask3_fmsub_round_ph3599 // CHECK: fneg3600 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123601 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3602 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3603 return _mm512_mask3_fmsub_round_ph(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3604}3605 3606__m512h test_mm512_mask3_fmsub_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3607 // CHECK-LABEL: test_mm512_mask3_fmsub_ph3608 // CHECK: fneg3609 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3610 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3611 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3612 return _mm512_mask3_fmsub_ph(__A, __B, __C, __U);3613}3614 3615__m512h test_mm512_mask3_fmsubadd_round_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3616 // CHECK-LABEL: test_mm512_mask3_fmsubadd_round_ph3617 // CHECK: fneg3618 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.5123619 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3620 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3621 return _mm512_mask3_fmsubadd_round_ph(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3622}3623 3624__m512h test_mm512_mask3_fmsubadd_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3625 // CHECK-LABEL: test_mm512_mask3_fmsubadd_ph3626 // CHECK: [[NEG:%.+]] = fneg3627 // CHECK: @llvm.x86.avx512fp16.vfmaddsub.ph.512(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> [[NEG]], i32 4)3628 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3629 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3630 return _mm512_mask3_fmsubadd_ph(__A, __B, __C, __U);3631}3632 3633__m512h test_mm512_mask_fnmadd_round_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3634 // CHECK-LABEL: test_mm512_mask_fnmadd_round_ph3635 // CHECK: fneg3636 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123637 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3638 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3639 return _mm512_mask_fnmadd_round_ph(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3640}3641 3642__m512h test_mm512_mask_fnmadd_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3643 // CHECK-LABEL: test_mm512_mask_fnmadd_ph3644 // CHECK: fneg3645 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3646 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3647 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3648 return _mm512_mask_fnmadd_ph(__A, __U, __B, __C);3649}3650 3651__m512h test_mm512_mask_fnmsub_round_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3652 // CHECK-LABEL: test_mm512_mask_fnmsub_round_ph3653 // CHECK: fneg3654 // CHECK: fneg3655 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123656 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3657 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3658 return _mm512_mask_fnmsub_round_ph(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3659}3660 3661__m512h test_mm512_mask3_fnmsub_round_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3662 // CHECK-LABEL: test_mm512_mask3_fnmsub_round_ph3663 // CHECK: fneg3664 // CHECK: fneg3665 // CHECK: @llvm.x86.avx512fp16.vfmadd.ph.5123666 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3667 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3668 return _mm512_mask3_fnmsub_round_ph(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3669}3670 3671__m512h test_mm512_mask_fnmsub_ph(__m512h __A, __mmask32 __U, __m512h __B, __m512h __C) {3672 // CHECK-LABEL: test_mm512_mask_fnmsub_ph3673 // CHECK: fneg3674 // CHECK: fneg3675 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3676 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3677 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3678 return _mm512_mask_fnmsub_ph(__A, __U, __B, __C);3679}3680 3681__m512h test_mm512_mask3_fnmsub_ph(__m512h __A, __m512h __B, __m512h __C, __mmask32 __U) {3682 // CHECK-LABEL: test_mm512_mask3_fnmsub_ph3683 // CHECK: fneg3684 // CHECK: fneg3685 // CHECK: @llvm.fma.v32f16(<32 x half> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}})3686 // CHECK: bitcast i32 %{{.*}} to <32 x i1>3687 // CHECK: select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}3688 return _mm512_mask3_fnmsub_ph(__A, __B, __C, __U);3689}3690 3691__m128h test_mm_fmadd_sh(__m128h __W, __m128h __A, __m128h __B) {3692 // CHECK-LABEL: test_mm_fmadd_sh3693 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03694 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03695 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03696 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3697 return _mm_fmadd_sh(__W, __A, __B);3698}3699 3700__m128h test_mm_mask_fmadd_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {3701 // CHECK-LABEL: test_mm_mask_fmadd_sh3702 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03703 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03704 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03705 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3706 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3707 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03708 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[A]]3709 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 03710 return _mm_mask_fmadd_sh(__W, __U, __A, __B);3711}3712 3713__m128h test_mm_fmadd_round_sh(__m128h __A, __m128h __B, __m128h __C) {3714 // CHECK-LABEL: test_mm_fmadd_round_sh3715 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03716 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03717 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03718 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)3719 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[FMA]], i64 03720 return _mm_fmadd_round_sh(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3721}3722 3723__m128h test_mm_mask_fmadd_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {3724 // CHECK-LABEL: test_mm_mask_fmadd_round_sh3725 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03726 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03727 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03728 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)3729 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3730 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03731 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[A]]3732 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 03733 return _mm_mask_fmadd_round_sh(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3734}3735 3736__m128h test_mm_maskz_fmadd_sh(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {3737 // CHECK-LABEL: test_mm_maskz_fmadd_sh3738 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03739 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03740 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03741 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3742 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3743 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03744 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half 0xH00003745 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 03746 return _mm_maskz_fmadd_sh(__U, __A, __B, __C);3747}3748 3749__m128h test_mm_maskz_fmadd_round_sh(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {3750 // CHECK-LABEL: test_mm_maskz_fmadd_round_sh3751 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03752 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03753 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03754 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)3755 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3756 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03757 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half 0xH00003758 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 03759 return _mm_maskz_fmadd_round_sh(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3760}3761 3762__m128h test_mm_mask3_fmadd_sh(__m128h __W, __m128h __X, __m128h __Y, __mmask8 __U) {3763 // CHECK-LABEL: test_mm_mask3_fmadd_sh3764 // CHECK: [[A:%.+]] = extractelement <8 x half> %{{.*}}, i64 03765 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03766 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> [[ORIGC:%.+]], i64 03767 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3768 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3769 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03770 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[C]]3771 // CHECK-NEXT: insertelement <8 x half> [[ORIGC]], half [[SEL]], i64 03772 return _mm_mask3_fmadd_sh(__W, __X, __Y, __U);3773}3774 3775__m128h test_mm_mask3_fmadd_round_sh(__m128h __W, __m128h __X, __m128h __Y, __mmask8 __U) {3776 // CHECK-LABEL: test_mm_mask3_fmadd_round_sh3777 // CHECK: [[A:%.+]] = extractelement <8 x half> %{{.*}}, i64 03778 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03779 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> [[ORIGC:%.+]], i64 03780 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)3781 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3782 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03783 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[C]]3784 // CHECK-NEXT: insertelement <8 x half> [[ORIGC]], half [[SEL]], i64 03785 return _mm_mask3_fmadd_round_sh(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3786}3787 3788__m128h test_mm_fmsub_sh(__m128h __W, __m128h __A, __m128h __B) {3789 // CHECK-LABEL: test_mm_fmsub_sh3790 // CHECK: %{{.*}} = fneg <8 x half> %{{.*}}3791 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03792 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03793 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03794 // CHECK-NEXT: %{{.*}} = call half @llvm.fma.f16(half %{{.*}}, half %{{.*}}, half %{{.*}})3795 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 03796 // CHECK-NEXT: ret <8 x half> %{{.*}}3797 return _mm_fmsub_sh(__W, __A, __B);3798}3799 3800__m128h test_mm_mask_fmsub_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {3801 // CHECK-LABEL: test_mm_mask_fmsub_sh3802 // CHECK: %{{.*}} = fneg <8 x half> %{{.*}}3803 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03804 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03805 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03806 // CHECK-NEXT: %{{.*}} = call half @llvm.fma.f16(half %{{.*}}, half %{{.*}}, half %{{.*}})3807 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>3808 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 03809 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}3810 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 03811 // CHECK-NEXT: ret <8 x half> %{{.*}}3812 return _mm_mask_fmsub_sh(__W, __U, __A, __B);3813}3814 3815__m128h test_mm_fmsub_round_sh(__m128h __A, __m128h __B, __m128h __C) {3816 // CHECK-LABEL: test_mm_fmsub_round_sh3817 // CHECK: %{{.*}} = fneg <8 x half> %{{.*}}3818 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03819 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03820 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03821 // CHECK-NEXT: %{{.*}} = call half @llvm.x86.avx512fp16.vfmadd.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, i32 11)3822 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 03823 // CHECK-NEXT: ret <8 x half> %{{.*}}3824 return _mm_fmsub_round_sh(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3825}3826 3827__m128h test_mm_mask_fmsub_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {3828 // CHECK-LABEL: test_mm_mask_fmsub_round_sh3829 // CHECK: %{{.*}} = fneg <8 x half> %{{.*}}3830 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03831 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03832 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03833 // CHECK-NEXT: %{{.*}} = call half @llvm.x86.avx512fp16.vfmadd.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, i32 11)3834 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>3835 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 03836 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half %{{.*}}3837 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 03838 // CHECK-NEXT: ret <8 x half> %{{.*}}3839 return _mm_mask_fmsub_round_sh(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3840}3841 3842__m128h test_mm_maskz_fmsub_sh(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {3843 // CHECK-LABEL: test_mm_maskz_fmsub_sh3844 // CHECK: %{{.*}} = fneg <8 x half> %{{.*}}3845 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03846 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03847 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03848 // CHECK-NEXT: %{{.*}} = call half @llvm.fma.f16(half %{{.*}}, half %{{.*}}, half %{{.*}})3849 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>3850 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 03851 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half 0xH00003852 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 03853 // CHECK-NEXT: ret <8 x half> %{{.*}}3854 return _mm_maskz_fmsub_sh(__U, __A, __B, __C);3855}3856 3857__m128h test_mm_maskz_fmsub_round_sh(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {3858 // CHECK-LABEL: test_mm_maskz_fmsub_round_sh3859 // CHECK: %{{.*}} = fneg <8 x half> %{{.*}}3860 // CHECK: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03861 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03862 // CHECK-NEXT: %{{.*}} = extractelement <8 x half> %{{.*}}, i64 03863 // CHECK-NEXT: %{{.*}} = call half @llvm.x86.avx512fp16.vfmadd.f16(half %{{.*}}, half %{{.*}}, half %{{.*}}, i32 11)3864 // CHECK-NEXT: %{{.*}} = bitcast i8 %{{.*}} to <8 x i1>3865 // CHECK-NEXT: %{{.*}} = extractelement <8 x i1> %{{.*}}, i64 03866 // CHECK-NEXT: %{{.*}} = select i1 %{{.*}}, half %{{.*}}, half 0xH00003867 // CHECK-NEXT: %{{.*}} = insertelement <8 x half> %{{.*}}, half %{{.*}}, i64 03868 // CHECK-NEXT: ret <8 x half> %{{.*}}3869 return _mm_maskz_fmsub_round_sh(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3870}3871 3872__m128h test_mm_mask3_fmsub_sh(__m128h __W, __m128h __X, __m128h __Y, __mmask8 __U) {3873 // CHECK-LABEL: test_mm_mask3_fmsub_sh3874 // CHECK: [[NEG:%.+]] = fneg3875 // CHECK: [[A:%.+]] = extractelement <8 x half> %{{.*}}, i64 03876 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03877 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03878 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3879 // CHECK-NEXT: [[C2:%.+]] = extractelement <8 x half> [[ORIGC:%.+]], i64 03880 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3881 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03882 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[C2]]3883 // CHECK-NEXT: insertelement <8 x half> [[ORIGC]], half [[SEL]], i64 03884 return _mm_mask3_fmsub_sh(__W, __X, __Y, __U);3885}3886 3887__m128h test_mm_mask3_fmsub_round_sh(__m128h __W, __m128h __X, __m128h __Y, __mmask8 __U) {3888 // CHECK-LABEL: test_mm_mask3_fmsub_round_sh3889 // CHECK: [[NEG:%.+]] = fneg3890 // CHECK: [[A:%.+]] = extractelement <8 x half> %{{.*}}, i64 03891 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03892 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03893 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)3894 // CHECK-NEXT: [[C2:%.+]] = extractelement <8 x half> [[ORIGC:%.+]], i64 03895 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3896 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03897 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[C2]]3898 // CHECK-NEXT: insertelement <8 x half> [[ORIGC]], half [[SEL]], i64 03899 return _mm_mask3_fmsub_round_sh(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3900}3901 3902__m128h test_mm_fnmadd_sh(__m128h __W, __m128h __A, __m128h __B) {3903 // CHECK-LABEL: test_mm_fnmadd_sh3904 // CHECK: [[NEG:%.+]] = fneg3905 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03906 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03907 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03908 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3909 return _mm_fnmadd_sh(__W, __A, __B);3910}3911 3912__m128h test_mm_mask_fnmadd_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {3913 // CHECK-LABEL: test_mm_mask_fnmadd_sh3914 // CHECK: [[NEG:%.+]] = fneg3915 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03916 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03917 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03918 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3919 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3920 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03921 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[A]]3922 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 03923 return _mm_mask_fnmadd_sh(__W, __U, __A, __B);3924}3925 3926__m128h test_mm_fnmadd_round_sh(__m128h __A, __m128h __B, __m128h __C) {3927 // CHECK-LABEL: test_mm_fnmadd_round_sh3928 // CHECK: [[NEG:%.+]] = fneg3929 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03930 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03931 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03932 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)3933 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[FMA]], i64 03934 return _mm_fnmadd_round_sh(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3935}3936 3937__m128h test_mm_mask_fnmadd_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {3938 // CHECK-LABEL: test_mm_mask_fnmadd_round_sh3939 // CHECK: [[NEG:%.+]] = fneg3940 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03941 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03942 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03943 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)3944 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3945 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03946 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[A]]3947 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 03948 return _mm_mask_fnmadd_round_sh(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3949}3950 3951__m128h test_mm_maskz_fnmadd_sh(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {3952 // CHECK-LABEL: test_mm_maskz_fnmadd_sh3953 // CHECK: [[NEG:%.+]] = fneg3954 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03955 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03956 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03957 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3958 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3959 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03960 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half 0xH00003961 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 03962 return _mm_maskz_fnmadd_sh(__U, __A, __B, __C);3963}3964 3965__m128h test_mm_maskz_fnmadd_round_sh(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {3966 // CHECK-LABEL: test_mm_maskz_fnmadd_round_sh3967 // CHECK: [[NEG:%.+]] = fneg3968 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 03969 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03970 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 03971 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)3972 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3973 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03974 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half 0xH00003975 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 03976 return _mm_maskz_fnmadd_round_sh(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);3977}3978 3979__m128h test_mm_mask3_fnmadd_sh(__m128h __W, __m128h __X, __m128h __Y, __mmask8 __U) {3980 // CHECK-LABEL: test_mm_mask3_fnmadd_sh3981 // CHECK: [[NEG:%.+]] = fneg3982 // CHECK: [[A:%.+]] = extractelement <8 x half> %{{.*}}, i64 03983 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03984 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> [[ORIGC:%.+]], i64 03985 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])3986 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>3987 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 03988 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[C]]3989 // CHECK-NEXT: insertelement <8 x half> [[ORIGC]], half [[SEL]], i64 03990 return _mm_mask3_fnmadd_sh(__W, __X, __Y, __U);3991}3992 3993__m128h test_mm_mask3_fnmadd_round_sh(__m128h __W, __m128h __X, __m128h __Y, __mmask8 __U) {3994 // CHECK-LABEL: test_mm_mask3_fnmadd_round_sh3995 // CHECK: [[NEG:%.+]] = fneg3996 // CHECK: [[A:%.+]] = extractelement <8 x half> %{{.*}}, i64 03997 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 03998 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> [[ORIGC:%.+]], i64 03999 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)4000 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>4001 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 04002 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[C]]4003 // CHECK-NEXT: insertelement <8 x half> [[ORIGC]], half [[SEL]], i64 04004 return _mm_mask3_fnmadd_round_sh(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4005}4006 4007__m128h test_mm_fnmsub_sh(__m128h __W, __m128h __A, __m128h __B) {4008 // CHECK-LABEL: test_mm_fnmsub_sh4009 // CHECK: [[NEG:%.+]] = fneg4010 // CHECK: [[NEG2:%.+]] = fneg4011 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 04012 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 04013 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 04014 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])4015 return _mm_fnmsub_sh(__W, __A, __B);4016}4017 4018__m128h test_mm_mask_fnmsub_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4019 // CHECK-LABEL: test_mm_mask_fnmsub_sh4020 // CHECK: [[NEG:%.+]] = fneg4021 // CHECK: [[NEG2:%.+]] = fneg4022 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 04023 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 04024 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 04025 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])4026 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>4027 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 04028 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[A]]4029 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 04030 return _mm_mask_fnmsub_sh(__W, __U, __A, __B);4031}4032 4033__m128h test_mm_fnmsub_round_sh(__m128h __A, __m128h __B, __m128h __C) {4034 // CHECK-LABEL: test_mm_fnmsub_round_sh4035 // CHECK: [[NEG:%.+]] = fneg4036 // CHECK: [[NEG2:%.+]] = fneg4037 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 04038 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 04039 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 04040 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)4041 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[FMA]], i64 04042 return _mm_fnmsub_round_sh(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4043}4044 4045__m128h test_mm_mask_fnmsub_round_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4046 // CHECK-LABEL: test_mm_mask_fnmsub_round_sh4047 // CHECK: [[NEG:%.+]] = fneg4048 // CHECK: [[NEG2:%.+]] = fneg4049 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 04050 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 04051 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 04052 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)4053 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>4054 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 04055 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[A]]4056 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 04057 return _mm_mask_fnmsub_round_sh(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4058}4059 4060__m128h test_mm_maskz_fnmsub_sh(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {4061 // CHECK-LABEL: test_mm_maskz_fnmsub_sh4062 // CHECK: [[NEG:%.+]] = fneg4063 // CHECK: [[NEG2:%.+]] = fneg4064 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 04065 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 04066 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 04067 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])4068 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>4069 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 04070 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half 0xH00004071 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 04072 return _mm_maskz_fnmsub_sh(__U, __A, __B, __C);4073}4074 4075__m128h test_mm_maskz_fnmsub_round_sh(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {4076 // CHECK-LABEL: test_mm_maskz_fnmsub_round_sh4077 // CHECK: [[NEG:%.+]] = fneg4078 // CHECK: [[NEG2:%.+]] = fneg4079 // CHECK: [[A:%.+]] = extractelement <8 x half> [[ORIGA:%.+]], i64 04080 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 04081 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 04082 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)4083 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>4084 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 04085 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half 0xH00004086 // CHECK-NEXT: insertelement <8 x half> [[ORIGA]], half [[SEL]], i64 04087 return _mm_maskz_fnmsub_round_sh(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4088}4089 4090__m128h test_mm_mask3_fnmsub_sh(__m128h __W, __m128h __X, __m128h __Y, __mmask8 __U) {4091 // CHECK-LABEL: test_mm_mask3_fnmsub_sh4092 // CHECK: [[NEG:%.+]] = fneg4093 // CHECK: [[NEG2:%.+]] = fneg4094 // CHECK: [[A:%.+]] = extractelement <8 x half> %{{.*}}, i64 04095 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 04096 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 04097 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.fma.f16(half [[A]], half [[B]], half [[C]])4098 // CHECK-NEXT: [[C2:%.+]] = extractelement <8 x half> [[ORIGC:%.+]], i64 04099 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>4100 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 04101 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[C2]]4102 // CHECK-NEXT: insertelement <8 x half> [[ORIGC]], half [[SEL]], i64 04103 return _mm_mask3_fnmsub_sh(__W, __X, __Y, __U);4104}4105 4106__m128h test_mm_mask3_fnmsub_round_sh(__m128h __W, __m128h __X, __m128h __Y, __mmask8 __U) {4107 // CHECK-LABEL: test_mm_mask3_fnmsub_round_sh4108 // CHECK: [[NEG:%.+]] = fneg4109 // CHECK: [[NEG2:%.+]] = fneg4110 // CHECK: [[A:%.+]] = extractelement <8 x half> %{{.*}}, i64 04111 // CHECK-NEXT: [[B:%.+]] = extractelement <8 x half> %{{.*}}, i64 04112 // CHECK-NEXT: [[C:%.+]] = extractelement <8 x half> %{{.*}}, i64 04113 // CHECK-NEXT: [[FMA:%.+]] = call half @llvm.x86.avx512fp16.vfmadd.f16(half [[A]], half [[B]], half [[C]], i32 11)4114 // CHECK-NEXT: [[C2:%.+]] = extractelement <8 x half> [[ORIGC:%.+]], i64 04115 // CHECK-NEXT: bitcast i8 %{{.*}} to <8 x i1>4116 // CHECK-NEXT: extractelement <8 x i1> %{{.*}}, i64 04117 // CHECK-NEXT: [[SEL:%.+]] = select i1 %{{.*}}, half [[FMA]], half [[C2]]4118 // CHECK-NEXT: insertelement <8 x half> [[ORIGC]], half [[SEL]], i64 04119 return _mm_mask3_fnmsub_round_sh(__W, __X, __Y, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4120}4121 4122__m128h test_mm_fcmadd_sch(__m128h __A, __m128h __B, __m128h __C) {4123 // CHECK-LABEL: test_mm_fcmadd_sch4124 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.csh4125 return _mm_fcmadd_sch(__A, __B, __C);4126}4127 4128__m128h test_mm_mask_fcmadd_sch(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) {4129 // CHECK-LABEL: test_mm_mask_fcmadd_sch4130 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.csh4131 // CHECK: %{{.*}} = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>4132 // CHECK: %{{.*}} = select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}4133 return _mm_mask_fcmadd_sch(__A, __U, __B, __C);4134}4135 4136__m128h test_mm_maskz_fcmadd_sch(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {4137 // CHECK-LABEL: test_mm_maskz_fcmadd_sch4138 // CHECK: @llvm.x86.avx512fp16.maskz.vfcmadd.csh4139 return _mm_maskz_fcmadd_sch(__U, __A, __B, __C);4140}4141 4142__m128h test_mm_mask3_fcmadd_sch(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {4143 // CHECK-LABEL: test_mm_mask3_fcmadd_sch4144 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4145 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4146 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4147 // CHECK: %{{.*}} = call <4 x float> @llvm.x86.avx512fp16.mask.vfcmadd.csh(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 %{{.*}}, i32 4)4148 // CHECK: %{{.*}} = shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>4149 // CHECK: %{{.*}} = bitcast <4 x float> %{{.*}} to <8 x half>4150 return _mm_mask3_fcmadd_sch(__A, __B, __C, __U);4151}4152 4153__m128h test_mm_fcmadd_round_sch(__m128h __A, __m128h __B, __m128h __C) {4154 // CHECK-LABEL: test_mm_fcmadd_round_sch4155 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.csh4156 return _mm_fcmadd_round_sch(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4157}4158 4159__m128h test_mm_mask_fcmadd_round_sch(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) {4160 // CHECK-LABEL: test_mm_mask_fcmadd_round_sch4161 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.csh4162 // CHECK: %{{.*}} = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>4163 // CHECK: %{{.*}} = select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}4164 return _mm_mask_fcmadd_round_sch(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4165}4166 4167__m128h test_mm_maskz_fcmadd_round_sch(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {4168 // CHECK-LABEL: test_mm_maskz_fcmadd_round_sch4169 // CHECK: @llvm.x86.avx512fp16.maskz.vfcmadd.csh4170 return _mm_maskz_fcmadd_round_sch(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4171}4172 4173__m128h test_mm_mask3_fcmadd_round_sch(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {4174 // CHECK-LABEL: test_mm_mask3_fcmadd_round_sch4175 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4176 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4177 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4178 // CHECK: %{{.*}} = call <4 x float> @llvm.x86.avx512fp16.mask.vfcmadd.csh(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 %{{.*}}, i32 11)4179 // CHECK: %{{.*}} = shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>4180 // CHECK: %{{.*}} = bitcast <4 x float> %{{.*}} to <8 x half>4181 return _mm_mask3_fcmadd_round_sch(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4182}4183 4184__m128h test_mm_fmadd_sch(__m128h __A, __m128h __B, __m128h __C) {4185 // CHECK-LABEL: test_mm_fmadd_sch4186 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.csh4187 return _mm_fmadd_sch(__A, __B, __C);4188}4189 4190__m128h test_mm_mask_fmadd_sch(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) {4191 // CHECK-LABEL: test_mm_mask_fmadd_sch4192 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.csh4193 // CHECK: %{{.*}} = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>4194 // CHECK: %{{.*}} = select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}4195 return _mm_mask_fmadd_sch(__A, __U, __B, __C);4196}4197 4198__m128h test_mm_maskz_fmadd_sch(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {4199 // CHECK-LABEL: test_mm_maskz_fmadd_sch4200 // CHECK: @llvm.x86.avx512fp16.maskz.vfmadd.csh4201 return _mm_maskz_fmadd_sch(__U, __A, __B, __C);4202}4203 4204__m128h test_mm_mask3_fmadd_sch(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {4205 // CHECK-LABEL: test_mm_mask3_fmadd_sch4206 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4207 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4208 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4209 // CHECK: %{{.*}} = call <4 x float> @llvm.x86.avx512fp16.mask.vfmadd.csh(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 %{{.*}}, i32 4)4210 // CHECK: %{{.*}} = shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>4211 // CHECK: %{{.*}} = bitcast <4 x float> %{{.*}} to <8 x half>4212 return _mm_mask3_fmadd_sch(__A, __B, __C, __U);4213}4214 4215__m128h test_mm_fmadd_round_sch(__m128h __A, __m128h __B, __m128h __C) {4216 // CHECK-LABEL: test_mm_fmadd_round_sch4217 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.csh4218 return _mm_fmadd_round_sch(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4219}4220 4221__m128h test_mm_mask_fmadd_round_sch(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) {4222 // CHECK-LABEL: test_mm_mask_fmadd_round_sch4223 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.csh4224 // CHECK: %{{.*}} = shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>4225 // CHECK: %{{.*}} = select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}4226 return _mm_mask_fmadd_round_sch(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4227}4228 4229__m128h test_mm_maskz_fmadd_round_sch(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {4230 // CHECK-LABEL: test_mm_maskz_fmadd_round_sch4231 // CHECK: @llvm.x86.avx512fp16.maskz.vfmadd.csh4232 return _mm_maskz_fmadd_round_sch(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4233}4234 4235__m128h test_mm_mask3_fmadd_round_sch(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {4236 // CHECK-LABEL: test_mm_mask3_fmadd_round_sch4237 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4238 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4239 // CHECK: %{{.*}} = bitcast <8 x half> %{{.*}} to <4 x float>4240 // CHECK: %{{.*}} = call <4 x float> @llvm.x86.avx512fp16.mask.vfmadd.csh(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 %{{.*}}, i32 11)4241 // CHECK: %{{.*}} = shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>4242 // CHECK: %{{.*}} = bitcast <4 x float> %{{.*}} to <8 x half>4243 return _mm_mask3_fmadd_round_sch(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4244}4245 4246__m128h test_mm_fcmul_sch(__m128h __A, __m128h __B) {4247 // CHECK-LABEL: test_mm_fcmul_sch4248 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4249 return _mm_fcmul_sch(__A, __B);4250}4251 4252__m128h test_mm_mask_fcmul_sch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4253 // CHECK-LABEL: test_mm_mask_fcmul_sch4254 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4255 return _mm_mask_fcmul_sch(__W, __U, __A, __B);4256}4257 4258__m128h test_mm_maskz_fcmul_sch(__mmask8 __U, __m128h __A, __m128h __B) {4259 // CHECK-LABEL: test_mm_maskz_fcmul_sch4260 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4261 return _mm_maskz_fcmul_sch(__U, __A, __B);4262}4263 4264__m128h test_mm_fcmul_round_sch(__m128h __A, __m128h __B) {4265 // CHECK-LABEL: test_mm_fcmul_round_sch4266 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4267 return _mm_fcmul_round_sch(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4268}4269 4270__m128h test_mm_mask_fcmul_round_sch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4271 // CHECK-LABEL: test_mm_mask_fcmul_round_sch4272 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4273 return _mm_mask_fcmul_round_sch(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4274}4275 4276__m128h test_mm_maskz_fcmul_round_sch(__mmask8 __U, __m128h __A, __m128h __B) {4277 // CHECK-LABEL: test_mm_maskz_fcmul_round_sch4278 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4279 return _mm_maskz_fcmul_round_sch(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4280}4281 4282__m512h test_mm512_fcmul_pch(__m512h __A, __m512h __B) {4283 // CHECK-LABEL: test_mm512_fcmul_pch4284 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124285 return _mm512_fcmul_pch(__A, __B);4286}4287 4288__m512h test_mm512_mask_fcmul_pch(__m512h __W, __mmask16 __U, __m512h __A, __m512h __B) {4289 // CHECK-LABEL: test_mm512_mask_fcmul_pch4290 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124291 return _mm512_mask_fcmul_pch(__W, __U, __A, __B);4292}4293 4294__m512h test_mm512_maskz_fcmul_pch(__mmask16 __U, __m512h __A, __m512h __B) {4295 // CHECK-LABEL: test_mm512_maskz_fcmul_pch4296 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124297 return _mm512_maskz_fcmul_pch(__U, __A, __B);4298}4299 4300__m512h test_mm512_fcmul_round_pch(__m512h __A, __m512h __B) {4301 // CHECK-LABEL: test_mm512_fcmul_round_pch4302 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124303 return _mm512_fcmul_round_pch(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4304}4305 4306__m512h test_mm512_mask_fcmul_round_pch(__m512h __W, __mmask16 __U, __m512h __A, __m512h __B) {4307 // CHECK-LABEL: test_mm512_mask_fcmul_round_pch4308 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124309 return _mm512_mask_fcmul_round_pch(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4310}4311 4312__m512h test_mm512_maskz_fcmul_round_pch(__mmask16 __U, __m512h __A, __m512h __B) {4313 // CHECK-LABEL: test_mm512_maskz_fcmul_round_pch4314 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124315 return _mm512_maskz_fcmul_round_pch(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4316}4317 4318__m512h test_mm512_fcmadd_pch(__m512h __A, __m512h __B, __m512h __C) {4319 // CHECK-LABEL: test_mm512_fcmadd_pch4320 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.cph.5124321 return _mm512_fcmadd_pch(__A, __B, __C);4322}4323 4324__m512h test_mm512_mask_fcmadd_pch(__m512h __A, __mmask16 __U, __m512h __B, __m512h __C) {4325 // CHECK-LABEL: test_mm512_mask_fcmadd_pch4326 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.cph.5124327 // CHECK: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}4328 return _mm512_mask_fcmadd_pch(__A, __U, __B, __C);4329}4330 4331__m512h test_mm512_mask3_fcmadd_pch(__m512h __A, __m512h __B, __m512h __C, __mmask16 __U) {4332 // CHECK-LABEL: test_mm512_mask3_fcmadd_pch4333 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.cph.5124334 // CHECK-NOT: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}4335 return _mm512_mask3_fcmadd_pch(__A, __B, __C, __U);4336}4337 4338__m512h test_mm512_maskz_fcmadd_pch(__mmask16 __U, __m512h __A, __m512h __B, __m512h __C) {4339 // CHECK-LABEL: test_mm512_maskz_fcmadd_pch4340 // CHECK: @llvm.x86.avx512fp16.maskz.vfcmadd.cph.5124341 return _mm512_maskz_fcmadd_pch(__U, __A, __B, __C);4342}4343 4344__m512h test_mm512_fcmadd_round_pch(__m512h __A, __m512h __B, __m512h __C) {4345 // CHECK-LABEL: test_mm512_fcmadd_round_pch4346 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.cph.5124347 return _mm512_fcmadd_round_pch(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4348}4349 4350__m512h test_mm512_mask_fcmadd_round_pch(__m512h __A, __mmask16 __U, __m512h __B, __m512h __C) {4351 // CHECK-LABEL: test_mm512_mask_fcmadd_round_pch4352 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.cph.5124353 // CHECK: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}4354 return _mm512_mask_fcmadd_round_pch(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4355}4356 4357__m512h test_mm512_mask3_fcmadd_round_pch(__m512h __A, __m512h __B, __m512h __C, __mmask16 __U) {4358 // CHECK-LABEL: test_mm512_mask3_fcmadd_round_pch4359 // CHECK: @llvm.x86.avx512fp16.mask.vfcmadd.cph.5124360 // CHECK-NOT: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}4361 return _mm512_mask3_fcmadd_round_pch(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4362}4363 4364__m512h test_mm512_maskz_fcmadd_round_pch(__mmask16 __U, __m512h __A, __m512h __B, __m512h __C) {4365 // CHECK-LABEL: test_mm512_maskz_fcmadd_round_pch4366 // CHECK: @llvm.x86.avx512fp16.maskz.vfcmadd.cph.5124367 return _mm512_maskz_fcmadd_round_pch(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4368}4369 4370__m512h test_mm512_fmul_pch(__m512h __A, __m512h __B) {4371 // CHECK-LABEL: test_mm512_fmul_pch4372 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124373 return _mm512_fmul_pch(__A, __B);4374}4375 4376__m512h test_mm512_mask_fmul_pch(__m512h __W, __mmask16 __U, __m512h __A, __m512h __B) {4377 // CHECK-LABEL: test_mm512_mask_fmul_pch4378 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124379 return _mm512_mask_fmul_pch(__W, __U, __A, __B);4380}4381 4382__m512h test_mm512_maskz_fmul_pch(__mmask16 __U, __m512h __A, __m512h __B) {4383 // CHECK-LABEL: test_mm512_maskz_fmul_pch4384 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124385 return _mm512_maskz_fmul_pch(__U, __A, __B);4386}4387 4388__m512h test_mm512_fmul_round_pch(__m512h __A, __m512h __B) {4389 // CHECK-LABEL: test_mm512_fmul_round_pch4390 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124391 return _mm512_fmul_round_pch(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4392}4393 4394__m512h test_mm512_mask_fmul_round_pch(__m512h __W, __mmask16 __U, __m512h __A, __m512h __B) {4395 // CHECK-LABEL: test_mm512_mask_fmul_round_pch4396 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124397 return _mm512_mask_fmul_round_pch(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4398}4399 4400__m512h test_mm512_maskz_fmul_round_pch(__mmask16 __U, __m512h __A, __m512h __B) {4401 // CHECK-LABEL: test_mm512_maskz_fmul_round_pch4402 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124403 return _mm512_maskz_fmul_round_pch(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4404}4405 4406__m512h test_mm512_fmadd_pch(__m512h __A, __m512h __B, __m512h __C) {4407 // CHECK-LABEL: test_mm512_fmadd_pch4408 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.cph.5124409 return _mm512_fmadd_pch(__A, __B, __C);4410}4411 4412__m512h test_mm512_mask_fmadd_pch(__m512h __A, __mmask16 __U, __m512h __B, __m512h __C) {4413 // CHECK-LABEL: test_mm512_mask_fmadd_pch4414 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.cph.5124415 // CHECK: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}4416 return _mm512_mask_fmadd_pch(__A, __U, __B, __C);4417}4418 4419__m512h test_mm512_mask3_fmadd_pch(__m512h __A, __m512h __B, __m512h __C, __mmask16 __U) {4420 // CHECK-LABEL: test_mm512_mask3_fmadd_pch4421 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.cph.5124422 // CHECK-NOT: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}4423 return _mm512_mask3_fmadd_pch(__A, __B, __C, __U);4424}4425 4426__m512h test_mm512_maskz_fmadd_pch(__mmask16 __U, __m512h __A, __m512h __B, __m512h __C) {4427 // CHECK-LABEL: test_mm512_maskz_fmadd_pch4428 // CHECK: @llvm.x86.avx512fp16.maskz.vfmadd.cph.5124429 return _mm512_maskz_fmadd_pch(__U, __A, __B, __C);4430}4431 4432__m512h test_mm512_fmadd_round_pch(__m512h __A, __m512h __B, __m512h __C) {4433 // CHECK-LABEL: test_mm512_fmadd_round_pch4434 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.cph.5124435 return _mm512_fmadd_round_pch(__A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4436}4437 4438__m512h test_mm512_mask_fmadd_round_pch(__m512h __A, __mmask16 __U, __m512h __B, __m512h __C) {4439 // CHECK-LABEL: test_mm512_mask_fmadd_round_pch4440 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.cph.5124441 // CHECK: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}4442 return _mm512_mask_fmadd_round_pch(__A, __U, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4443}4444 4445__m512h test_mm512_mask3_fmadd_round_pch(__m512h __A, __m512h __B, __m512h __C, __mmask16 __U) {4446 // CHECK-LABEL: test_mm512_mask3_fmadd_round_pch4447 // CHECK: @llvm.x86.avx512fp16.mask.vfmadd.cph.5124448 // CHECK-NOT: %{{.*}} = select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}4449 return _mm512_mask3_fmadd_round_pch(__A, __B, __C, __U, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4450}4451 4452__m512h test_mm512_maskz_fmadd_round_pch(__mmask16 __U, __m512h __A, __m512h __B, __m512h __C) {4453 // CHECK-LABEL: test_mm512_maskz_fmadd_round_pch4454 // CHECK: @llvm.x86.avx512fp16.maskz.vfmadd.cph.5124455 return _mm512_maskz_fmadd_round_pch(__U, __A, __B, __C, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4456}4457 4458__m128h test_mm_fmul_sch(__m128h __A, __m128h __B) {4459 // CHECK-LABEL: test_mm_fmul_sch4460 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4461 return _mm_fmul_sch(__A, __B);4462}4463 4464__m128h test_mm_mask_fmul_sch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4465 // CHECK-LABEL: test_mm_mask_fmul_sch4466 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4467 return _mm_mask_fmul_sch(__W, __U, __A, __B);4468}4469 4470__m128h test_mm_maskz_fmul_sch(__mmask8 __U, __m128h __A, __m128h __B) {4471 // CHECK-LABEL: test_mm_maskz_fmul_sch4472 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4473 return _mm_maskz_fmul_sch(__U, __A, __B);4474}4475 4476__m128h test_mm_fmul_round_sch(__m128h __A, __m128h __B) {4477 // CHECK-LABEL: test_mm_fmul_round_sch4478 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4479 return _mm_fmul_round_sch(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4480}4481 4482__m128h test_mm_mask_fmul_round_sch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4483 // CHECK-LABEL: test_mm_mask_fmul_round_sch4484 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4485 return _mm_mask_fmul_round_sch(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4486}4487 4488__m128h test_mm_maskz_fmul_round_sch(__mmask8 __U, __m128h __A, __m128h __B) {4489 // CHECK-LABEL: test_mm_maskz_fmul_round_sch4490 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4491 return _mm_maskz_fmul_round_sch(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4492}4493 4494_Float16 test_mm512_reduce_add_ph(__m512h __W) {4495 // CHECK-LABEL: test_mm512_reduce_add_ph4496 // CHECK: @llvm.vector.reduce.fadd.v32f16(half 0xH8000, <32 x half> %{{.*}})4497 return _mm512_reduce_add_ph(__W);4498}4499 4500_Float16 test_mm512_reduce_mul_ph(__m512h __W) {4501 // CHECK-LABEL: test_mm512_reduce_mul_ph4502 // CHECK: @llvm.vector.reduce.fmul.v32f16(half 0xH3C00, <32 x half> %{{.*}})4503 return _mm512_reduce_mul_ph(__W);4504}4505 4506_Float16 test_mm512_reduce_max_ph(__m512h __W) {4507 // CHECK-LABEL: test_mm512_reduce_max_ph4508 // CHECK: @llvm.vector.reduce.fmax.v32f16(<32 x half> %{{.*}})4509 return _mm512_reduce_max_ph(__W);4510}4511 4512_Float16 test_mm512_reduce_min_ph(__m512h __W) {4513 // CHECK-LABEL: test_mm512_reduce_min_ph4514 // CHECK: @llvm.vector.reduce.fmin.v32f16(<32 x half> %{{.*}})4515 return _mm512_reduce_min_ph(__W);4516}4517 4518__m512h test_mm512_mask_blend_ph(__mmask32 __U, __m512h __A, __m512h __W) {4519 // CHECK-LABEL: test_mm512_mask_blend_ph4520 // CHECK: %{{.*}} = bitcast i32 %{{.*}} to <32 x i1>4521 // CHECK: %{{.*}} = select <32 x i1> %{{.*}}, <32 x half> %{{.*}}, <32 x half> %{{.*}}4522 return _mm512_mask_blend_ph(__U, __A, __W);4523}4524 4525__m512h test_mm512_permutex2var_ph(__m512h __A, __m512i __I, __m512h __B) {4526 // CHECK-LABEL: test_mm512_permutex2var_ph4527 // CHECK: %{{.*}} = bitcast <32 x half> %{{.*}} to <32 x i16>4528 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <32 x i16>4529 // CHECK: %{{.*}} = bitcast <32 x half> %{{.*}} to <32 x i16>4530 // CHECK: %{{.*}} = call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}})4531 // CHECK: %{{.*}} = bitcast <32 x i16> %{{.*}} to <32 x half>4532 return _mm512_permutex2var_ph(__A, __I, __B);4533}4534 4535__m512h test_mm512_permutexvar_epi16(__m512i __A, __m512h __B) {4536 // CHECK-LABEL: test_mm512_permutexvar_epi164537 // CHECK: %{{.*}} = bitcast <32 x half> %{{.*}} to <32 x i16>4538 // CHECK: %{{.*}} = bitcast <8 x i64> %{{.*}} to <32 x i16>4539 // CHECK: %{{.*}} = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %{{.*}}, <32 x i16> %{{.*}})4540 // CHECK: %{{.*}} = bitcast <32 x i16> %{{.*}} to <32 x half>4541 return _mm512_permutexvar_ph(__A, __B);4542}4543 4544// tests below are for alias intrinsics.4545__m512h test_mm512_mul_pch(__m512h __A, __m512h __B) {4546 // CHECK-LABEL: test_mm512_mul_pch4547 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124548 return _mm512_mul_pch(__A, __B);4549}4550 4551__m512h test_mm512_mask_mul_pch(__m512h __W, __mmask16 __U, __m512h __A, __m512h __B) {4552 // CHECK-LABEL: test_mm512_mask_mul_pch4553 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124554 return _mm512_mask_mul_pch(__W, __U, __A, __B);4555}4556 4557__m512h test_mm512_maskz_mul_pch(__mmask16 __U, __m512h __A, __m512h __B) {4558 // CHECK-LABEL: test_mm512_maskz_mul_pch4559 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124560 return _mm512_maskz_mul_pch(__U, __A, __B);4561}4562 4563__m512h test_mm512_cmul_pch(__m512h __A, __m512h __B) {4564 // CHECK-LABEL: test_mm512_cmul_pch4565 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124566 return _mm512_cmul_pch(__A, __B);4567}4568__m512h test_mm512_mask_cmul_pch(__m512h __W, __mmask16 __U, __m512h __A, __m512h __B) {4569 // CHECK-LABEL: test_mm512_mask_cmul_pch4570 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124571 return _mm512_mask_cmul_pch(__W, __U, __A, __B);4572}4573 4574__m512h test_mm512_maskz_cmul_pch(__mmask16 __U, __m512h __A, __m512h __B) {4575 // CHECK-LABEL: test_mm512_maskz_cmul_pch4576 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124577 return _mm512_maskz_cmul_pch(__U, __A, __B);4578}4579 4580__m128h test_mm_mul_sch(__m128h __A, __m128h __B) {4581 // CHECK-LABEL: test_mm_mul_sch4582 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4583 return _mm_mul_sch(__A, __B);4584}4585 4586__m128h test_mm_mask_mul_sch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4587 // CHECK-LABEL: test_mm_mask_mul_sch4588 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4589 return _mm_mask_mul_sch(__W, __U, __A, __B);4590}4591 4592__m128h test_mm_maskz_mul_sch(__mmask8 __U, __m128h __A, __m128h __B) {4593 // CHECK-LABEL: test_mm_maskz_mul_sch4594 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4595 return _mm_maskz_mul_sch(__U, __A, __B);4596}4597 4598__m128h test_mm_mul_round_sch(__m128h __A, __m128h __B) {4599 // CHECK-LABEL: test_mm_mul_round_sch4600 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4601 return _mm_mul_round_sch(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4602}4603 4604__m128h test_mm_mask_mul_round_sch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4605 // CHECK-LABEL: test_mm_mask_mul_round_sch4606 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4607 return _mm_mask_mul_round_sch(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4608}4609 4610__m128h test_mm_maskz_mul_round_sch(__mmask8 __U, __m128h __A, __m128h __B) {4611 // CHECK-LABEL: test_mm_maskz_mul_round_sch4612 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.csh4613 return _mm_maskz_mul_round_sch(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4614}4615 4616__m512h test_mm512_mul_round_pch(__m512h __A, __m512h __B) {4617 // CHECK-LABEL: test_mm512_mul_round_pch4618 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124619 return _mm512_mul_round_pch(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4620}4621 4622__m512h test_mm512_mask_mul_round_pch(__m512h __W, __mmask16 __U, __m512h __A, __m512h __B) {4623 // CHECK-LABEL: test_mm512_mask_mul_round_pch4624 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124625 return _mm512_mask_mul_round_pch(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4626}4627 4628__m512h test_mm512_maskz_mul_round_pch(__mmask16 __U, __m512h __A, __m512h __B) {4629 // CHECK-LABEL: test_mm512_maskz_mul_round_pch4630 // CHECK: @llvm.x86.avx512fp16.mask.vfmul.cph.5124631 return _mm512_maskz_mul_round_pch(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4632}4633 4634__m512h test_mm512_cmul_round_pch(__m512h __A, __m512h __B) {4635 // CHECK-LABEL: test_mm512_cmul_round_pch4636 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124637 return _mm512_cmul_round_pch(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4638}4639 4640__m512h test_mm512_mask_cmul_round_pch(__m512h __W, __mmask16 __U, __m512h __A, __m512h __B) {4641 // CHECK-LABEL: test_mm512_mask_cmul_round_pch4642 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124643 return _mm512_mask_cmul_round_pch(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4644}4645 4646__m512h test_mm512_maskz_cmul_round_pch(__mmask16 __U, __m512h __A, __m512h __B) {4647 // CHECK-LABEL: test_mm512_maskz_cmul_round_pch4648 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.cph.5124649 return _mm512_maskz_cmul_round_pch(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4650}4651 4652__m128h test_mm_cmul_sch(__m128h __A, __m128h __B) {4653 // CHECK-LABEL: test_mm_cmul_sch4654 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4655 return _mm_cmul_sch(__A, __B);4656}4657 4658__m128h test_mm_mask_cmul_sch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4659 // CHECK-LABEL: test_mm_mask_cmul_sch4660 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4661 return _mm_mask_cmul_sch(__W, __U, __A, __B);4662}4663 4664__m128h test_mm_maskz_cmul_sch(__mmask8 __U, __m128h __A, __m128h __B) {4665 // CHECK-LABEL: test_mm_maskz_cmul_sch4666 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4667 return _mm_maskz_cmul_sch(__U, __A, __B);4668}4669 4670__m128h test_mm_cmul_round_sch(__m128h __A, __m128h __B) {4671 // CHECK-LABEL: test_mm_cmul_round_sch4672 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4673 return _mm_cmul_round_sch(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4674}4675 4676__m128h test_mm_mask_cmul_round_sch(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {4677 // CHECK-LABEL: test_mm_mask_cmul_round_sch4678 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4679 return _mm_mask_cmul_round_sch(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4680}4681 4682__m128h test_mm_maskz_cmul_round_sch(__mmask8 __U, __m128h __A, __m128h __B) {4683 // CHECK-LABEL: test_mm_maskz_cmul_round_sch4684 // CHECK: @llvm.x86.avx512fp16.mask.vfcmul.csh4685 return _mm_maskz_cmul_round_sch(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);4686}4687