98 lines · c
1// REQUIRES: x86-registered-target2// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux-gnu -target-feature +avx512f -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s3// RUN: %clang_cc1 -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s4// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux-gnu -target-feature +avx512f -target-feature +avx512vl -ffp-exception-behavior=strict -emit-llvm -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s5// RUN: %clang_cc1 -flax-vector-conversions=none -fms-compatibility -ffreestanding %s -triple=x86_64-unknown-linux-gnu -target-feature +avx512f -target-feature +avx512vl -ffp-exception-behavior=strict -emit-llvm -o - -Wall -Werror | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s6 7#include <immintrin.h>8 9__m128 test_mm_mask_cvtph_ps(__m128 __W, __mmask8 __U, __m128i __A) {10 // COMMON-LABEL: @test_mm_mask_cvtph_ps11 // COMMONIR: bitcast <2 x i64> %{{.*}} to <8 x i16>12 // COMMONIR: shufflevector <8 x i16> %{{.*}}, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>13 // COMMONIR: bitcast <4 x i16> %{{.*}} to <4 x half>14 // UNCONSTRAINED: fpext <4 x half> %{{.*}} to <4 x float>15 // CONSTRAINED: call <4 x float> @llvm.experimental.constrained.fpext.v4f32.v4f16(<4 x half> %{{.*}}, metadata !"fpexcept.strict")16 // COMMONIR: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}17 return _mm_mask_cvtph_ps(__W, __U, __A);18}19 20__m128 test_mm_maskz_cvtph_ps(__mmask8 __U, __m128i __A) {21 // COMMON-LABEL: @test_mm_maskz_cvtph_ps22 // COMMONIR: bitcast <2 x i64> %{{.*}} to <8 x i16>23 // COMMONIR: shufflevector <8 x i16> %{{.*}}, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>24 // COMMONIR: bitcast <4 x i16> %{{.*}} to <4 x half>25 // UNCONSTRAINED: fpext <4 x half> %{{.*}} to <4 x float>26 // CONSTRAINED: call <4 x float> @llvm.experimental.constrained.fpext.v4f32.v4f16(<4 x half> %{{.*}}, metadata !"fpexcept.strict")27 // COMMONIR: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}28 return _mm_maskz_cvtph_ps(__U, __A);29}30 31__m256 test_mm256_mask_cvtph_ps(__m256 __W, __mmask8 __U, __m128i __A) {32 // COMMON-LABEL: @test_mm256_mask_cvtph_ps33 // COMMONIR: bitcast <2 x i64> %{{.*}} to <8 x i16>34 // COMMONIR: bitcast <8 x i16> %{{.*}} to <8 x half>35 // UNCONSTRAINED: fpext <8 x half> %{{.*}} to <8 x float>36 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.fpext.v8f32.v8f16(<8 x half> %{{.*}}, metadata !"fpexcept.strict") 37 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}38 return _mm256_mask_cvtph_ps(__W, __U, __A);39}40 41__m256 test_mm256_maskz_cvtph_ps(__mmask8 __U, __m128i __A) {42 // COMMON-LABEL: @test_mm256_maskz_cvtph_ps43 // COMMONIR: bitcast <2 x i64> %{{.*}} to <8 x i16>44 // COMMONIR: bitcast <8 x i16> %{{.*}} to <8 x half>45 // UNCONSTRAINED: fpext <8 x half> %{{.*}} to <8 x float>46 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.fpext.v8f32.v8f16(<8 x half> %{{.*}}, metadata !"fpexcept.strict") 47 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}48 return _mm256_maskz_cvtph_ps(__U, __A);49}50 51__m128i test_mm_mask_cvtps_ph(__m128i __W, __mmask8 __U, __m128 __A) {52 // COMMON-LABEL: @test_mm_mask_cvtps_ph53 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.12854 return _mm_mask_cvtps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);55}56 57__m128i test_mm_maskz_cvtps_ph(__mmask8 __U, __m128 __A) {58 // COMMON-LABEL: @test_mm_maskz_cvtps_ph59 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.12860 return _mm_maskz_cvtps_ph(__U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);61}62 63__m128i test_mm256_mask_cvtps_ph(__m128i __W, __mmask8 __U, __m256 __A) {64 // COMMON-LABEL: @test_mm256_mask_cvtps_ph65 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.25666 return _mm256_mask_cvtps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);67}68 69__m128i test_mm256_maskz_cvtps_ph(__mmask8 __U, __m256 __A) {70 // COMMON-LABEL: @test_mm256_maskz_cvtps_ph71 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.25672 return _mm256_maskz_cvtps_ph(__U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);73}74 75__m128i test_mm_mask_cvt_roundps_ph(__m128i __W, __mmask8 __U, __m128 __A) {76 // COMMON-LABEL: @test_mm_mask_cvt_roundps_ph77 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.12878 return _mm_mask_cvt_roundps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO);79}80 81__m128i test_mm_maskz_cvt_roundps_ph(__mmask8 __U, __m128 __A) {82 // COMMON-LABEL: @test_mm_maskz_cvt_roundps_ph83 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.12884 return _mm_maskz_cvt_roundps_ph(__U, __A, _MM_FROUND_TO_ZERO);85}86 87__m128i test_mm256_mask_cvt_roundps_ph(__m128i __W, __mmask8 __U, __m256 __A) {88 // COMMON-LABEL: @test_mm256_mask_cvt_roundps_ph89 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.25690 return _mm256_mask_cvt_roundps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO);91}92 93__m128i test_mm256_maskz_cvt_roundps_ph(__mmask8 __U, __m256 __A) {94 // COMMON-LABEL: @test_mm256_maskz_cvt_roundps_ph95 // COMMONIR: @llvm.x86.avx512.mask.vcvtps2ph.25696 return _mm256_maskz_cvt_roundps_ph(__U, __A, _MM_FROUND_TO_ZERO);97}98