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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 %s -O0 -ffreestanding -triple=x86_64-unknown-unknown -target-feature +kl -target-feature +widekl -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=CHECK643// RUN: %clang_cc1 %s -O0 -ffreestanding -triple=i386-unknown-unknown -target-feature +kl -target-feature +widekl -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=CHECK324 5#include <x86intrin.h>6 7// CHECK64-LABEL: @test_loadiwkey(8// CHECK64-NEXT:  entry:9// CHECK64-NEXT:    [[__CTL_ADDR_I:%.*]] = alloca i32, align 410// CHECK64-NEXT:    [[__INTKEY_ADDR_I:%.*]] = alloca <2 x i64>, align 1611// CHECK64-NEXT:    [[__ENKEY_LO_ADDR_I:%.*]] = alloca <2 x i64>, align 1612// CHECK64-NEXT:    [[__ENKEY_HI_ADDR_I:%.*]] = alloca <2 x i64>, align 1613// CHECK64-NEXT:    [[CTL_ADDR:%.*]] = alloca i32, align 414// CHECK64-NEXT:    [[INTKEY_ADDR:%.*]] = alloca <2 x i64>, align 1615// CHECK64-NEXT:    [[ENKEY_LO_ADDR:%.*]] = alloca <2 x i64>, align 1616// CHECK64-NEXT:    [[ENKEY_HI_ADDR:%.*]] = alloca <2 x i64>, align 1617// CHECK64-NEXT:    store i32 [[CTL:%.*]], ptr [[CTL_ADDR]], align 418// CHECK64-NEXT:    store <2 x i64> [[INTKEY:%.*]], ptr [[INTKEY_ADDR]], align 1619// CHECK64-NEXT:    store <2 x i64> [[ENKEY_LO:%.*]], ptr [[ENKEY_LO_ADDR]], align 1620// CHECK64-NEXT:    store <2 x i64> [[ENKEY_HI:%.*]], ptr [[ENKEY_HI_ADDR]], align 1621// CHECK64-NEXT:    [[TMP0:%.*]] = load i32, ptr [[CTL_ADDR]], align 422// CHECK64-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[INTKEY_ADDR]], align 1623// CHECK64-NEXT:    [[TMP2:%.*]] = load <2 x i64>, ptr [[ENKEY_LO_ADDR]], align 1624// CHECK64-NEXT:    [[TMP3:%.*]] = load <2 x i64>, ptr [[ENKEY_HI_ADDR]], align 1625// CHECK64-NEXT:    store i32 [[TMP0]], ptr [[__CTL_ADDR_I]], align 426// CHECK64-NEXT:    store <2 x i64> [[TMP1]], ptr [[__INTKEY_ADDR_I]], align 1627// CHECK64-NEXT:    store <2 x i64> [[TMP2]], ptr [[__ENKEY_LO_ADDR_I]], align 1628// CHECK64-NEXT:    store <2 x i64> [[TMP3]], ptr [[__ENKEY_HI_ADDR_I]], align 1629// CHECK64-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__INTKEY_ADDR_I]], align 1630// CHECK64-NEXT:    [[TMP5:%.*]] = load <2 x i64>, ptr [[__ENKEY_LO_ADDR_I]], align 1631// CHECK64-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[__ENKEY_HI_ADDR_I]], align 1632// CHECK64-NEXT:    [[TMP7:%.*]] = load i32, ptr [[__CTL_ADDR_I]], align 433// CHECK64-NEXT:    call void @llvm.x86.loadiwkey(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], i32 [[TMP7]])34// CHECK64-NEXT:    ret void35//36// CHECK32-LABEL: @test_loadiwkey(37// CHECK32-NEXT:  entry:38// CHECK32-NEXT:    [[__CTL_ADDR_I:%.*]] = alloca i32, align 439// CHECK32-NEXT:    [[__INTKEY_ADDR_I:%.*]] = alloca <2 x i64>, align 1640// CHECK32-NEXT:    [[__ENKEY_LO_ADDR_I:%.*]] = alloca <2 x i64>, align 1641// CHECK32-NEXT:    [[__ENKEY_HI_ADDR_I:%.*]] = alloca <2 x i64>, align 1642// CHECK32-NEXT:    [[CTL_ADDR:%.*]] = alloca i32, align 443// CHECK32-NEXT:    [[INTKEY_ADDR:%.*]] = alloca <2 x i64>, align 1644// CHECK32-NEXT:    [[ENKEY_LO_ADDR:%.*]] = alloca <2 x i64>, align 1645// CHECK32-NEXT:    [[ENKEY_HI_ADDR:%.*]] = alloca <2 x i64>, align 1646// CHECK32-NEXT:    store i32 [[CTL:%.*]], ptr [[CTL_ADDR]], align 447// CHECK32-NEXT:    store <2 x i64> [[INTKEY:%.*]], ptr [[INTKEY_ADDR]], align 1648// CHECK32-NEXT:    store <2 x i64> [[ENKEY_LO:%.*]], ptr [[ENKEY_LO_ADDR]], align 1649// CHECK32-NEXT:    store <2 x i64> [[ENKEY_HI:%.*]], ptr [[ENKEY_HI_ADDR]], align 1650// CHECK32-NEXT:    [[TMP0:%.*]] = load i32, ptr [[CTL_ADDR]], align 451// CHECK32-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[INTKEY_ADDR]], align 1652// CHECK32-NEXT:    [[TMP2:%.*]] = load <2 x i64>, ptr [[ENKEY_LO_ADDR]], align 1653// CHECK32-NEXT:    [[TMP3:%.*]] = load <2 x i64>, ptr [[ENKEY_HI_ADDR]], align 1654// CHECK32-NEXT:    store i32 [[TMP0]], ptr [[__CTL_ADDR_I]], align 455// CHECK32-NEXT:    store <2 x i64> [[TMP1]], ptr [[__INTKEY_ADDR_I]], align 1656// CHECK32-NEXT:    store <2 x i64> [[TMP2]], ptr [[__ENKEY_LO_ADDR_I]], align 1657// CHECK32-NEXT:    store <2 x i64> [[TMP3]], ptr [[__ENKEY_HI_ADDR_I]], align 1658// CHECK32-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__INTKEY_ADDR_I]], align 1659// CHECK32-NEXT:    [[TMP5:%.*]] = load <2 x i64>, ptr [[__ENKEY_LO_ADDR_I]], align 1660// CHECK32-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[__ENKEY_HI_ADDR_I]], align 1661// CHECK32-NEXT:    [[TMP7:%.*]] = load i32, ptr [[__CTL_ADDR_I]], align 462// CHECK32-NEXT:    call void @llvm.x86.loadiwkey(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], i32 [[TMP7]])63// CHECK32-NEXT:    ret void64//65void test_loadiwkey(unsigned int ctl, __m128i intkey, __m128i enkey_lo, __m128i enkey_hi) {66  _mm_loadiwkey(ctl, intkey, enkey_lo, enkey_hi);67}68 69// CHECK64-LABEL: @test_encodekey128_u32(70// CHECK64-NEXT:  entry:71// CHECK64-NEXT:    [[__HTYPE_ADDR_I:%.*]] = alloca i32, align 472// CHECK64-NEXT:    [[__KEY_ADDR_I:%.*]] = alloca <2 x i64>, align 1673// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 874// CHECK64-NEXT:    [[HTYPE_ADDR:%.*]] = alloca i32, align 475// CHECK64-NEXT:    [[KEY_ADDR:%.*]] = alloca <2 x i64>, align 1676// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 877// CHECK64-NEXT:    store i32 [[HTYPE:%.*]], ptr [[HTYPE_ADDR]], align 478// CHECK64-NEXT:    store <2 x i64> [[KEY:%.*]], ptr [[KEY_ADDR]], align 1679// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 880// CHECK64-NEXT:    [[TMP0:%.*]] = load i32, ptr [[HTYPE_ADDR]], align 481// CHECK64-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[KEY_ADDR]], align 1682// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 883// CHECK64-NEXT:    store i32 [[TMP0]], ptr [[__HTYPE_ADDR_I]], align 484// CHECK64-NEXT:    store <2 x i64> [[TMP1]], ptr [[__KEY_ADDR_I]], align 1685// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 886// CHECK64-NEXT:    [[TMP3:%.*]] = load i32, ptr [[__HTYPE_ADDR_I]], align 487// CHECK64-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__KEY_ADDR_I]], align 1688// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 889// CHECK64-NEXT:    [[TMP6:%.*]] = call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey128(i32 [[TMP3]], <2 x i64> [[TMP4]])90// CHECK64-NEXT:    [[TMP7:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 191// CHECK64-NEXT:    store <2 x i64> [[TMP7]], ptr [[TMP5]], align 192// CHECK64-NEXT:    [[TMP9:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 293// CHECK64-NEXT:    [[TMP10:%.*]] = getelementptr i8, ptr [[TMP5]], i32 1694// CHECK64-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP10]], align 195// CHECK64-NEXT:    [[TMP12:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 396// CHECK64-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP5]], i32 3297// CHECK64-NEXT:    store <2 x i64> [[TMP12]], ptr [[TMP13]], align 198// CHECK64-NEXT:    [[TMP15:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 099// CHECK64-NEXT:    ret i32 [[TMP15]]100//101// CHECK32-LABEL: @test_encodekey128_u32(102// CHECK32-NEXT:  entry:103// CHECK32-NEXT:    [[__HTYPE_ADDR_I:%.*]] = alloca i32, align 4104// CHECK32-NEXT:    [[__KEY_ADDR_I:%.*]] = alloca <2 x i64>, align 16105// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4106// CHECK32-NEXT:    [[HTYPE_ADDR:%.*]] = alloca i32, align 4107// CHECK32-NEXT:    [[KEY_ADDR:%.*]] = alloca <2 x i64>, align 16108// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 4109// CHECK32-NEXT:    store i32 [[HTYPE:%.*]], ptr [[HTYPE_ADDR]], align 4110// CHECK32-NEXT:    store <2 x i64> [[KEY:%.*]], ptr [[KEY_ADDR]], align 16111// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 4112// CHECK32-NEXT:    [[TMP0:%.*]] = load i32, ptr [[HTYPE_ADDR]], align 4113// CHECK32-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[KEY_ADDR]], align 16114// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 4115// CHECK32-NEXT:    store i32 [[TMP0]], ptr [[__HTYPE_ADDR_I]], align 4116// CHECK32-NEXT:    store <2 x i64> [[TMP1]], ptr [[__KEY_ADDR_I]], align 16117// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 4118// CHECK32-NEXT:    [[TMP3:%.*]] = load i32, ptr [[__HTYPE_ADDR_I]], align 4119// CHECK32-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__KEY_ADDR_I]], align 16120// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 4121// CHECK32-NEXT:    [[TMP6:%.*]] = call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey128(i32 [[TMP3]], <2 x i64> [[TMP4]])122// CHECK32-NEXT:    [[TMP7:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 1123// CHECK32-NEXT:    store <2 x i64> [[TMP7]], ptr [[TMP5]], align 1124// CHECK32-NEXT:    [[TMP9:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 2125// CHECK32-NEXT:    [[TMP10:%.*]] = getelementptr i8, ptr [[TMP5]], i32 16126// CHECK32-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP10]], align 1127// CHECK32-NEXT:    [[TMP12:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 3128// CHECK32-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP5]], i32 32129// CHECK32-NEXT:    store <2 x i64> [[TMP12]], ptr [[TMP13]], align 1130// CHECK32-NEXT:    [[TMP15:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 0131// CHECK32-NEXT:    ret i32 [[TMP15]]132//133unsigned int test_encodekey128_u32(unsigned int htype, __m128i key, void *h) {134  return _mm_encodekey128_u32(htype, key, h);135}136 137// CHECK64-LABEL: @test_encodekey256_u32(138// CHECK64-NEXT:  entry:139// CHECK64-NEXT:    [[__HTYPE_ADDR_I:%.*]] = alloca i32, align 4140// CHECK64-NEXT:    [[__KEY_LO_ADDR_I:%.*]] = alloca <2 x i64>, align 16141// CHECK64-NEXT:    [[__KEY_HI_ADDR_I:%.*]] = alloca <2 x i64>, align 16142// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 8143// CHECK64-NEXT:    [[HTYPE_ADDR:%.*]] = alloca i32, align 4144// CHECK64-NEXT:    [[KEY_LO_ADDR:%.*]] = alloca <2 x i64>, align 16145// CHECK64-NEXT:    [[KEY_HI_ADDR:%.*]] = alloca <2 x i64>, align 16146// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 8147// CHECK64-NEXT:    store i32 [[HTYPE:%.*]], ptr [[HTYPE_ADDR]], align 4148// CHECK64-NEXT:    store <2 x i64> [[KEY_LO:%.*]], ptr [[KEY_LO_ADDR]], align 16149// CHECK64-NEXT:    store <2 x i64> [[KEY_HI:%.*]], ptr [[KEY_HI_ADDR]], align 16150// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 8151// CHECK64-NEXT:    [[TMP0:%.*]] = load i32, ptr [[HTYPE_ADDR]], align 4152// CHECK64-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[KEY_LO_ADDR]], align 16153// CHECK64-NEXT:    [[TMP2:%.*]] = load <2 x i64>, ptr [[KEY_HI_ADDR]], align 16154// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[H_ADDR]], align 8155// CHECK64-NEXT:    store i32 [[TMP0]], ptr [[__HTYPE_ADDR_I]], align 4156// CHECK64-NEXT:    store <2 x i64> [[TMP1]], ptr [[__KEY_LO_ADDR_I]], align 16157// CHECK64-NEXT:    store <2 x i64> [[TMP2]], ptr [[__KEY_HI_ADDR_I]], align 16158// CHECK64-NEXT:    store ptr [[TMP3]], ptr [[__H_ADDR_I]], align 8159// CHECK64-NEXT:    [[TMP4:%.*]] = load i32, ptr [[__HTYPE_ADDR_I]], align 4160// CHECK64-NEXT:    [[TMP5:%.*]] = load <2 x i64>, ptr [[__KEY_LO_ADDR_I]], align 16161// CHECK64-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[__KEY_HI_ADDR_I]], align 16162// CHECK64-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 8163// CHECK64-NEXT:    [[TMP8:%.*]] = call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey256(i32 [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]])164// CHECK64-NEXT:    [[TMP9:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 1165// CHECK64-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP7]], align 1166// CHECK64-NEXT:    [[TMP11:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 2167// CHECK64-NEXT:    [[TMP12:%.*]] = getelementptr i8, ptr [[TMP7]], i32 16168// CHECK64-NEXT:    store <2 x i64> [[TMP11]], ptr [[TMP12]], align 1169// CHECK64-NEXT:    [[TMP14:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 3170// CHECK64-NEXT:    [[TMP15:%.*]] = getelementptr i8, ptr [[TMP7]], i32 32171// CHECK64-NEXT:    store <2 x i64> [[TMP14]], ptr [[TMP15]], align 1172// CHECK64-NEXT:    [[TMP17:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 4173// CHECK64-NEXT:    [[TMP18:%.*]] = getelementptr i8, ptr [[TMP7]], i32 48174// CHECK64-NEXT:    store <2 x i64> [[TMP17]], ptr [[TMP18]], align 1175// CHECK64-NEXT:    [[TMP20:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 0176// CHECK64-NEXT:    ret i32 [[TMP20]]177//178// CHECK32-LABEL: @test_encodekey256_u32(179// CHECK32-NEXT:  entry:180// CHECK32-NEXT:    [[__HTYPE_ADDR_I:%.*]] = alloca i32, align 4181// CHECK32-NEXT:    [[__KEY_LO_ADDR_I:%.*]] = alloca <2 x i64>, align 16182// CHECK32-NEXT:    [[__KEY_HI_ADDR_I:%.*]] = alloca <2 x i64>, align 16183// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4184// CHECK32-NEXT:    [[HTYPE_ADDR:%.*]] = alloca i32, align 4185// CHECK32-NEXT:    [[KEY_LO_ADDR:%.*]] = alloca <2 x i64>, align 16186// CHECK32-NEXT:    [[KEY_HI_ADDR:%.*]] = alloca <2 x i64>, align 16187// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 4188// CHECK32-NEXT:    store i32 [[HTYPE:%.*]], ptr [[HTYPE_ADDR]], align 4189// CHECK32-NEXT:    store <2 x i64> [[KEY_LO:%.*]], ptr [[KEY_LO_ADDR]], align 16190// CHECK32-NEXT:    store <2 x i64> [[KEY_HI:%.*]], ptr [[KEY_HI_ADDR]], align 16191// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 4192// CHECK32-NEXT:    [[TMP0:%.*]] = load i32, ptr [[HTYPE_ADDR]], align 4193// CHECK32-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[KEY_LO_ADDR]], align 16194// CHECK32-NEXT:    [[TMP2:%.*]] = load <2 x i64>, ptr [[KEY_HI_ADDR]], align 16195// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[H_ADDR]], align 4196// CHECK32-NEXT:    store i32 [[TMP0]], ptr [[__HTYPE_ADDR_I]], align 4197// CHECK32-NEXT:    store <2 x i64> [[TMP1]], ptr [[__KEY_LO_ADDR_I]], align 16198// CHECK32-NEXT:    store <2 x i64> [[TMP2]], ptr [[__KEY_HI_ADDR_I]], align 16199// CHECK32-NEXT:    store ptr [[TMP3]], ptr [[__H_ADDR_I]], align 4200// CHECK32-NEXT:    [[TMP4:%.*]] = load i32, ptr [[__HTYPE_ADDR_I]], align 4201// CHECK32-NEXT:    [[TMP5:%.*]] = load <2 x i64>, ptr [[__KEY_LO_ADDR_I]], align 16202// CHECK32-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[__KEY_HI_ADDR_I]], align 16203// CHECK32-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 4204// CHECK32-NEXT:    [[TMP8:%.*]] = call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey256(i32 [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]])205// CHECK32-NEXT:    [[TMP9:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 1206// CHECK32-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP7]], align 1207// CHECK32-NEXT:    [[TMP11:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 2208// CHECK32-NEXT:    [[TMP12:%.*]] = getelementptr i8, ptr [[TMP7]], i32 16209// CHECK32-NEXT:    store <2 x i64> [[TMP11]], ptr [[TMP12]], align 1210// CHECK32-NEXT:    [[TMP14:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 3211// CHECK32-NEXT:    [[TMP15:%.*]] = getelementptr i8, ptr [[TMP7]], i32 32212// CHECK32-NEXT:    store <2 x i64> [[TMP14]], ptr [[TMP15]], align 1213// CHECK32-NEXT:    [[TMP17:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 4214// CHECK32-NEXT:    [[TMP18:%.*]] = getelementptr i8, ptr [[TMP7]], i32 48215// CHECK32-NEXT:    store <2 x i64> [[TMP17]], ptr [[TMP18]], align 1216// CHECK32-NEXT:    [[TMP20:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 0217// CHECK32-NEXT:    ret i32 [[TMP20]]218//219unsigned int test_encodekey256_u32(unsigned int htype, __m128i key_lo, __m128i key_hi, void *h) {220  return _mm_encodekey256_u32(htype, key_lo, key_hi, h);221}222 223// CHECK64-LABEL: @test_mm_aesenc256kl_u8(224// CHECK64-NEXT:  entry:225// CHECK64-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 8226// CHECK64-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16227// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 8228// CHECK64-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 8229// CHECK64-NEXT:    [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16230// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 8231// CHECK64-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 8232// CHECK64-NEXT:    store <2 x i64> [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 16233// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 8234// CHECK64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 8235// CHECK64-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDATA_ADDR]], align 16236// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 8237// CHECK64-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 8238// CHECK64-NEXT:    store <2 x i64> [[TMP1]], ptr [[__IDATA_ADDR_I]], align 16239// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 8240// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 8241// CHECK64-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__IDATA_ADDR_I]], align 16242// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 8243// CHECK64-NEXT:    [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesenc256kl(<2 x i64> [[TMP4]], ptr [[TMP5]])244// CHECK64-NEXT:    [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0245// CHECK64-NEXT:    [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1246// CHECK64-NEXT:    [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1247// CHECK64-NEXT:    br i1 [[TMP8]], label [[AESENC256KL_NO_ERROR_I:%.*]], label [[AESENC256KL_ERROR_I:%.*]]248// CHECK64:       aesenc256kl_no_error.i:249// CHECK64-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP3]], align 16250// CHECK64-NEXT:    br label [[_MM_AESENC256KL_U8_EXIT:%.*]]251// CHECK64:       aesenc256kl_error.i:252// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16253// CHECK64-NEXT:    br label [[_MM_AESENC256KL_U8_EXIT]]254// CHECK64:       _mm_aesenc256kl_u8.exit:255// CHECK64-NEXT:    [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0256// CHECK64-NEXT:    ret i8 [[TMP10]]257//258// CHECK32-LABEL: @test_mm_aesenc256kl_u8(259// CHECK32-NEXT:  entry:260// CHECK32-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 4261// CHECK32-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16262// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4263// CHECK32-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 4264// CHECK32-NEXT:    [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16265// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 4266// CHECK32-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 4267// CHECK32-NEXT:    store <2 x i64> [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 16268// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 4269// CHECK32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 4270// CHECK32-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDATA_ADDR]], align 16271// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 4272// CHECK32-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 4273// CHECK32-NEXT:    store <2 x i64> [[TMP1]], ptr [[__IDATA_ADDR_I]], align 16274// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 4275// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 4276// CHECK32-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__IDATA_ADDR_I]], align 16277// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 4278// CHECK32-NEXT:    [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesenc256kl(<2 x i64> [[TMP4]], ptr [[TMP5]])279// CHECK32-NEXT:    [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0280// CHECK32-NEXT:    [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1281// CHECK32-NEXT:    [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1282// CHECK32-NEXT:    br i1 [[TMP8]], label [[AESENC256KL_NO_ERROR_I:%.*]], label [[AESENC256KL_ERROR_I:%.*]]283// CHECK32:       aesenc256kl_no_error.i:284// CHECK32-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP3]], align 16285// CHECK32-NEXT:    br label [[_MM_AESENC256KL_U8_EXIT:%.*]]286// CHECK32:       aesenc256kl_error.i:287// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16288// CHECK32-NEXT:    br label [[_MM_AESENC256KL_U8_EXIT]]289// CHECK32:       _mm_aesenc256kl_u8.exit:290// CHECK32-NEXT:    [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0291// CHECK32-NEXT:    ret i8 [[TMP10]]292//293unsigned char test_mm_aesenc256kl_u8(__m128i *odata, __m128i idata, const void *h) {294  return _mm_aesenc256kl_u8(odata, idata, h);295}296 297// CHECK64-LABEL: @test_mm_aesdec256kl_u8(298// CHECK64-NEXT:  entry:299// CHECK64-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 8300// CHECK64-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16301// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 8302// CHECK64-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 8303// CHECK64-NEXT:    [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16304// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 8305// CHECK64-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 8306// CHECK64-NEXT:    store <2 x i64> [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 16307// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 8308// CHECK64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 8309// CHECK64-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDATA_ADDR]], align 16310// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 8311// CHECK64-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 8312// CHECK64-NEXT:    store <2 x i64> [[TMP1]], ptr [[__IDATA_ADDR_I]], align 16313// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 8314// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 8315// CHECK64-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__IDATA_ADDR_I]], align 16316// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 8317// CHECK64-NEXT:    [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesdec256kl(<2 x i64> [[TMP4]], ptr [[TMP5]])318// CHECK64-NEXT:    [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0319// CHECK64-NEXT:    [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1320// CHECK64-NEXT:    [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1321// CHECK64-NEXT:    br i1 [[TMP8]], label [[AESDEC256KL_NO_ERROR_I:%.*]], label [[AESDEC256KL_ERROR_I:%.*]]322// CHECK64:       aesdec256kl_no_error.i:323// CHECK64-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP3]], align 16324// CHECK64-NEXT:    br label [[_MM_AESDEC256KL_U8_EXIT:%.*]]325// CHECK64:       aesdec256kl_error.i:326// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16327// CHECK64-NEXT:    br label [[_MM_AESDEC256KL_U8_EXIT]]328// CHECK64:       _mm_aesdec256kl_u8.exit:329// CHECK64-NEXT:    [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0330// CHECK64-NEXT:    ret i8 [[TMP10]]331//332// CHECK32-LABEL: @test_mm_aesdec256kl_u8(333// CHECK32-NEXT:  entry:334// CHECK32-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 4335// CHECK32-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16336// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4337// CHECK32-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 4338// CHECK32-NEXT:    [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16339// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 4340// CHECK32-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 4341// CHECK32-NEXT:    store <2 x i64> [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 16342// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 4343// CHECK32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 4344// CHECK32-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDATA_ADDR]], align 16345// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 4346// CHECK32-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 4347// CHECK32-NEXT:    store <2 x i64> [[TMP1]], ptr [[__IDATA_ADDR_I]], align 16348// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 4349// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 4350// CHECK32-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__IDATA_ADDR_I]], align 16351// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 4352// CHECK32-NEXT:    [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesdec256kl(<2 x i64> [[TMP4]], ptr [[TMP5]])353// CHECK32-NEXT:    [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0354// CHECK32-NEXT:    [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1355// CHECK32-NEXT:    [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1356// CHECK32-NEXT:    br i1 [[TMP8]], label [[AESDEC256KL_NO_ERROR_I:%.*]], label [[AESDEC256KL_ERROR_I:%.*]]357// CHECK32:       aesdec256kl_no_error.i:358// CHECK32-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP3]], align 16359// CHECK32-NEXT:    br label [[_MM_AESDEC256KL_U8_EXIT:%.*]]360// CHECK32:       aesdec256kl_error.i:361// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16362// CHECK32-NEXT:    br label [[_MM_AESDEC256KL_U8_EXIT]]363// CHECK32:       _mm_aesdec256kl_u8.exit:364// CHECK32-NEXT:    [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0365// CHECK32-NEXT:    ret i8 [[TMP10]]366//367unsigned char test_mm_aesdec256kl_u8(__m128i *odata, __m128i idata, const void *h) {368  return _mm_aesdec256kl_u8(odata, idata, h);369}370 371// CHECK64-LABEL: @test_mm_aesenc128kl_u8(372// CHECK64-NEXT:  entry:373// CHECK64-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 8374// CHECK64-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16375// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 8376// CHECK64-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 8377// CHECK64-NEXT:    [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16378// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 8379// CHECK64-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 8380// CHECK64-NEXT:    store <2 x i64> [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 16381// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 8382// CHECK64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 8383// CHECK64-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDATA_ADDR]], align 16384// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 8385// CHECK64-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 8386// CHECK64-NEXT:    store <2 x i64> [[TMP1]], ptr [[__IDATA_ADDR_I]], align 16387// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 8388// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 8389// CHECK64-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__IDATA_ADDR_I]], align 16390// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 8391// CHECK64-NEXT:    [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesenc128kl(<2 x i64> [[TMP4]], ptr [[TMP5]])392// CHECK64-NEXT:    [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0393// CHECK64-NEXT:    [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1394// CHECK64-NEXT:    [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1395// CHECK64-NEXT:    br i1 [[TMP8]], label [[AESENC128KL_NO_ERROR_I:%.*]], label [[AESENC128KL_ERROR_I:%.*]]396// CHECK64:       aesenc128kl_no_error.i:397// CHECK64-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP3]], align 16398// CHECK64-NEXT:    br label [[_MM_AESENC128KL_U8_EXIT:%.*]]399// CHECK64:       aesenc128kl_error.i:400// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16401// CHECK64-NEXT:    br label [[_MM_AESENC128KL_U8_EXIT]]402// CHECK64:       _mm_aesenc128kl_u8.exit:403// CHECK64-NEXT:    [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0404// CHECK64-NEXT:    ret i8 [[TMP10]]405//406// CHECK32-LABEL: @test_mm_aesenc128kl_u8(407// CHECK32-NEXT:  entry:408// CHECK32-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 4409// CHECK32-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16410// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4411// CHECK32-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 4412// CHECK32-NEXT:    [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16413// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 4414// CHECK32-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 4415// CHECK32-NEXT:    store <2 x i64> [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 16416// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 4417// CHECK32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 4418// CHECK32-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDATA_ADDR]], align 16419// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 4420// CHECK32-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 4421// CHECK32-NEXT:    store <2 x i64> [[TMP1]], ptr [[__IDATA_ADDR_I]], align 16422// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 4423// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 4424// CHECK32-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__IDATA_ADDR_I]], align 16425// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 4426// CHECK32-NEXT:    [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesenc128kl(<2 x i64> [[TMP4]], ptr [[TMP5]])427// CHECK32-NEXT:    [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0428// CHECK32-NEXT:    [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1429// CHECK32-NEXT:    [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1430// CHECK32-NEXT:    br i1 [[TMP8]], label [[AESENC128KL_NO_ERROR_I:%.*]], label [[AESENC128KL_ERROR_I:%.*]]431// CHECK32:       aesenc128kl_no_error.i:432// CHECK32-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP3]], align 16433// CHECK32-NEXT:    br label [[_MM_AESENC128KL_U8_EXIT:%.*]]434// CHECK32:       aesenc128kl_error.i:435// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16436// CHECK32-NEXT:    br label [[_MM_AESENC128KL_U8_EXIT]]437// CHECK32:       _mm_aesenc128kl_u8.exit:438// CHECK32-NEXT:    [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0439// CHECK32-NEXT:    ret i8 [[TMP10]]440//441unsigned char test_mm_aesenc128kl_u8(__m128i *odata, __m128i idata, const void *h) {442  return _mm_aesenc128kl_u8(odata, idata, h);443}444 445// CHECK64-LABEL: @test_mm_aesdec128kl_u8(446// CHECK64-NEXT:  entry:447// CHECK64-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 8448// CHECK64-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16449// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 8450// CHECK64-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 8451// CHECK64-NEXT:    [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16452// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 8453// CHECK64-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 8454// CHECK64-NEXT:    store <2 x i64> [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 16455// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 8456// CHECK64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 8457// CHECK64-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDATA_ADDR]], align 16458// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 8459// CHECK64-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 8460// CHECK64-NEXT:    store <2 x i64> [[TMP1]], ptr [[__IDATA_ADDR_I]], align 16461// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 8462// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 8463// CHECK64-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__IDATA_ADDR_I]], align 16464// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 8465// CHECK64-NEXT:    [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesdec128kl(<2 x i64> [[TMP4]], ptr [[TMP5]])466// CHECK64-NEXT:    [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0467// CHECK64-NEXT:    [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1468// CHECK64-NEXT:    [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1469// CHECK64-NEXT:    br i1 [[TMP8]], label [[AESDEC128KL_NO_ERROR_I:%.*]], label [[AESDEC128KL_ERROR_I:%.*]]470// CHECK64:       aesdec128kl_no_error.i:471// CHECK64-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP3]], align 16472// CHECK64-NEXT:    br label [[_MM_AESDEC128KL_U8_EXIT:%.*]]473// CHECK64:       aesdec128kl_error.i:474// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16475// CHECK64-NEXT:    br label [[_MM_AESDEC128KL_U8_EXIT]]476// CHECK64:       _mm_aesdec128kl_u8.exit:477// CHECK64-NEXT:    [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0478// CHECK64-NEXT:    ret i8 [[TMP10]]479//480// CHECK32-LABEL: @test_mm_aesdec128kl_u8(481// CHECK32-NEXT:  entry:482// CHECK32-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 4483// CHECK32-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16484// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4485// CHECK32-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 4486// CHECK32-NEXT:    [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16487// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 4488// CHECK32-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 4489// CHECK32-NEXT:    store <2 x i64> [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 16490// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 4491// CHECK32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 4492// CHECK32-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDATA_ADDR]], align 16493// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 4494// CHECK32-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 4495// CHECK32-NEXT:    store <2 x i64> [[TMP1]], ptr [[__IDATA_ADDR_I]], align 16496// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 4497// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 4498// CHECK32-NEXT:    [[TMP4:%.*]] = load <2 x i64>, ptr [[__IDATA_ADDR_I]], align 16499// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 4500// CHECK32-NEXT:    [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesdec128kl(<2 x i64> [[TMP4]], ptr [[TMP5]])501// CHECK32-NEXT:    [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0502// CHECK32-NEXT:    [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1503// CHECK32-NEXT:    [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1504// CHECK32-NEXT:    br i1 [[TMP8]], label [[AESDEC128KL_NO_ERROR_I:%.*]], label [[AESDEC128KL_ERROR_I:%.*]]505// CHECK32:       aesdec128kl_no_error.i:506// CHECK32-NEXT:    store <2 x i64> [[TMP9]], ptr [[TMP3]], align 16507// CHECK32-NEXT:    br label [[_MM_AESDEC128KL_U8_EXIT:%.*]]508// CHECK32:       aesdec128kl_error.i:509// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16510// CHECK32-NEXT:    br label [[_MM_AESDEC128KL_U8_EXIT]]511// CHECK32:       _mm_aesdec128kl_u8.exit:512// CHECK32-NEXT:    [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0513// CHECK32-NEXT:    ret i8 [[TMP10]]514//515unsigned char test_mm_aesdec128kl_u8(__m128i *odata, __m128i idata, const void *h) {516  return _mm_aesdec128kl_u8(odata, idata, h);517}518 519// CHECK64-LABEL: @test__mm_aesencwide128kl_u8(520// CHECK64-NEXT:  entry:521// CHECK64-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 8522// CHECK64-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca ptr, align 8523// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 8524// CHECK64-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 8525// CHECK64-NEXT:    [[IDATA_ADDR:%.*]] = alloca ptr, align 8526// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 8527// CHECK64-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 8528// CHECK64-NEXT:    store ptr [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 8529// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 8530// CHECK64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 8531// CHECK64-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[IDATA_ADDR]], align 8532// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 8533// CHECK64-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 8534// CHECK64-NEXT:    store ptr [[TMP1]], ptr [[__IDATA_ADDR_I]], align 8535// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 8536// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 8537// CHECK64-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[__IDATA_ADDR_I]], align 8538// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 8539// CHECK64-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[TMP4]], align 16540// CHECK64-NEXT:    [[TMP7:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 1541// CHECK64-NEXT:    [[TMP8:%.*]] = load <2 x i64>, ptr [[TMP7]], align 16542// CHECK64-NEXT:    [[TMP9:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 2543// CHECK64-NEXT:    [[TMP10:%.*]] = load <2 x i64>, ptr [[TMP9]], align 16544// CHECK64-NEXT:    [[TMP11:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 3545// CHECK64-NEXT:    [[TMP12:%.*]] = load <2 x i64>, ptr [[TMP11]], align 16546// CHECK64-NEXT:    [[TMP13:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 4547// CHECK64-NEXT:    [[TMP14:%.*]] = load <2 x i64>, ptr [[TMP13]], align 16548// CHECK64-NEXT:    [[TMP15:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 5549// CHECK64-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[TMP15]], align 16550// CHECK64-NEXT:    [[TMP17:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 6551// CHECK64-NEXT:    [[TMP18:%.*]] = load <2 x i64>, ptr [[TMP17]], align 16552// CHECK64-NEXT:    [[TMP19:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 7553// CHECK64-NEXT:    [[TMP20:%.*]] = load <2 x i64>, ptr [[TMP19]], align 16554// CHECK64-NEXT:    [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide128kl(ptr [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]])555// CHECK64-NEXT:    [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0556// CHECK64-NEXT:    [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1557// CHECK64-NEXT:    br i1 [[TMP23]], label [[AESENCWIDE128KL_NO_ERROR_I:%.*]], label [[AESENCWIDE128KL_ERROR_I:%.*]]558// CHECK64:       aesencwide128kl_no_error.i:559// CHECK64-NEXT:    [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1560// CHECK64-NEXT:    store <2 x i64> [[TMP24]], ptr [[TMP3]], align 16561// CHECK64-NEXT:    [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2562// CHECK64-NEXT:    [[TMP26:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1563// CHECK64-NEXT:    store <2 x i64> [[TMP25]], ptr [[TMP26]], align 16564// CHECK64-NEXT:    [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3565// CHECK64-NEXT:    [[TMP28:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2566// CHECK64-NEXT:    store <2 x i64> [[TMP27]], ptr [[TMP28]], align 16567// CHECK64-NEXT:    [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4568// CHECK64-NEXT:    [[TMP30:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3569// CHECK64-NEXT:    store <2 x i64> [[TMP29]], ptr [[TMP30]], align 16570// CHECK64-NEXT:    [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5571// CHECK64-NEXT:    [[TMP32:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4572// CHECK64-NEXT:    store <2 x i64> [[TMP31]], ptr [[TMP32]], align 16573// CHECK64-NEXT:    [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6574// CHECK64-NEXT:    [[TMP34:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5575// CHECK64-NEXT:    store <2 x i64> [[TMP33]], ptr [[TMP34]], align 16576// CHECK64-NEXT:    [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7577// CHECK64-NEXT:    [[TMP36:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6578// CHECK64-NEXT:    store <2 x i64> [[TMP35]], ptr [[TMP36]], align 16579// CHECK64-NEXT:    [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8580// CHECK64-NEXT:    [[TMP38:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7581// CHECK64-NEXT:    store <2 x i64> [[TMP37]], ptr [[TMP38]], align 16582// CHECK64-NEXT:    br label [[_MM_AESENCWIDE128KL_U8_EXIT:%.*]]583// CHECK64:       aesencwide128kl_error.i:584// CHECK64-NEXT:    [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1585// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16586// CHECK64-NEXT:    [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2587// CHECK64-NEXT:    [[TMP41:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1588// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP41]], align 16589// CHECK64-NEXT:    [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3590// CHECK64-NEXT:    [[TMP43:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2591// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP43]], align 16592// CHECK64-NEXT:    [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4593// CHECK64-NEXT:    [[TMP45:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3594// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP45]], align 16595// CHECK64-NEXT:    [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5596// CHECK64-NEXT:    [[TMP47:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4597// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP47]], align 16598// CHECK64-NEXT:    [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6599// CHECK64-NEXT:    [[TMP49:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5600// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP49]], align 16601// CHECK64-NEXT:    [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7602// CHECK64-NEXT:    [[TMP51:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6603// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP51]], align 16604// CHECK64-NEXT:    [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8605// CHECK64-NEXT:    [[TMP53:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7606// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP53]], align 16607// CHECK64-NEXT:    br label [[_MM_AESENCWIDE128KL_U8_EXIT]]608// CHECK64:       _mm_aesencwide128kl_u8.exit:609// CHECK64-NEXT:    [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0610// CHECK64-NEXT:    ret i8 [[TMP54]]611//612// CHECK32-LABEL: @test__mm_aesencwide128kl_u8(613// CHECK32-NEXT:  entry:614// CHECK32-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 4615// CHECK32-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca ptr, align 4616// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4617// CHECK32-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 4618// CHECK32-NEXT:    [[IDATA_ADDR:%.*]] = alloca ptr, align 4619// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 4620// CHECK32-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 4621// CHECK32-NEXT:    store ptr [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 4622// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 4623// CHECK32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 4624// CHECK32-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[IDATA_ADDR]], align 4625// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 4626// CHECK32-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 4627// CHECK32-NEXT:    store ptr [[TMP1]], ptr [[__IDATA_ADDR_I]], align 4628// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 4629// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 4630// CHECK32-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[__IDATA_ADDR_I]], align 4631// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 4632// CHECK32-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[TMP4]], align 16633// CHECK32-NEXT:    [[TMP7:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 1634// CHECK32-NEXT:    [[TMP8:%.*]] = load <2 x i64>, ptr [[TMP7]], align 16635// CHECK32-NEXT:    [[TMP9:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 2636// CHECK32-NEXT:    [[TMP10:%.*]] = load <2 x i64>, ptr [[TMP9]], align 16637// CHECK32-NEXT:    [[TMP11:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 3638// CHECK32-NEXT:    [[TMP12:%.*]] = load <2 x i64>, ptr [[TMP11]], align 16639// CHECK32-NEXT:    [[TMP13:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 4640// CHECK32-NEXT:    [[TMP14:%.*]] = load <2 x i64>, ptr [[TMP13]], align 16641// CHECK32-NEXT:    [[TMP15:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 5642// CHECK32-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[TMP15]], align 16643// CHECK32-NEXT:    [[TMP17:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 6644// CHECK32-NEXT:    [[TMP18:%.*]] = load <2 x i64>, ptr [[TMP17]], align 16645// CHECK32-NEXT:    [[TMP19:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 7646// CHECK32-NEXT:    [[TMP20:%.*]] = load <2 x i64>, ptr [[TMP19]], align 16647// CHECK32-NEXT:    [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide128kl(ptr [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]])648// CHECK32-NEXT:    [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0649// CHECK32-NEXT:    [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1650// CHECK32-NEXT:    br i1 [[TMP23]], label [[AESENCWIDE128KL_NO_ERROR_I:%.*]], label [[AESENCWIDE128KL_ERROR_I:%.*]]651// CHECK32:       aesencwide128kl_no_error.i:652// CHECK32-NEXT:    [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1653// CHECK32-NEXT:    store <2 x i64> [[TMP24]], ptr [[TMP3]], align 16654// CHECK32-NEXT:    [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2655// CHECK32-NEXT:    [[TMP26:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1656// CHECK32-NEXT:    store <2 x i64> [[TMP25]], ptr [[TMP26]], align 16657// CHECK32-NEXT:    [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3658// CHECK32-NEXT:    [[TMP28:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2659// CHECK32-NEXT:    store <2 x i64> [[TMP27]], ptr [[TMP28]], align 16660// CHECK32-NEXT:    [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4661// CHECK32-NEXT:    [[TMP30:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3662// CHECK32-NEXT:    store <2 x i64> [[TMP29]], ptr [[TMP30]], align 16663// CHECK32-NEXT:    [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5664// CHECK32-NEXT:    [[TMP32:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4665// CHECK32-NEXT:    store <2 x i64> [[TMP31]], ptr [[TMP32]], align 16666// CHECK32-NEXT:    [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6667// CHECK32-NEXT:    [[TMP34:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5668// CHECK32-NEXT:    store <2 x i64> [[TMP33]], ptr [[TMP34]], align 16669// CHECK32-NEXT:    [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7670// CHECK32-NEXT:    [[TMP36:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6671// CHECK32-NEXT:    store <2 x i64> [[TMP35]], ptr [[TMP36]], align 16672// CHECK32-NEXT:    [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8673// CHECK32-NEXT:    [[TMP38:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7674// CHECK32-NEXT:    store <2 x i64> [[TMP37]], ptr [[TMP38]], align 16675// CHECK32-NEXT:    br label [[_MM_AESENCWIDE128KL_U8_EXIT:%.*]]676// CHECK32:       aesencwide128kl_error.i:677// CHECK32-NEXT:    [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1678// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16679// CHECK32-NEXT:    [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2680// CHECK32-NEXT:    [[TMP41:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1681// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP41]], align 16682// CHECK32-NEXT:    [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3683// CHECK32-NEXT:    [[TMP43:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2684// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP43]], align 16685// CHECK32-NEXT:    [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4686// CHECK32-NEXT:    [[TMP45:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3687// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP45]], align 16688// CHECK32-NEXT:    [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5689// CHECK32-NEXT:    [[TMP47:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4690// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP47]], align 16691// CHECK32-NEXT:    [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6692// CHECK32-NEXT:    [[TMP49:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5693// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP49]], align 16694// CHECK32-NEXT:    [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7695// CHECK32-NEXT:    [[TMP51:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6696// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP51]], align 16697// CHECK32-NEXT:    [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8698// CHECK32-NEXT:    [[TMP53:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7699// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP53]], align 16700// CHECK32-NEXT:    br label [[_MM_AESENCWIDE128KL_U8_EXIT]]701// CHECK32:       _mm_aesencwide128kl_u8.exit:702// CHECK32-NEXT:    [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0703// CHECK32-NEXT:    ret i8 [[TMP54]]704//705unsigned char test__mm_aesencwide128kl_u8(__m128i odata[8], const __m128i idata[8], const void* h) {706  return _mm_aesencwide128kl_u8(odata, idata, h);707}708 709// CHECK64-LABEL: @test__mm_aesdecwide128kl_u8(710// CHECK64-NEXT:  entry:711// CHECK64-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 8712// CHECK64-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca ptr, align 8713// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 8714// CHECK64-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 8715// CHECK64-NEXT:    [[IDATA_ADDR:%.*]] = alloca ptr, align 8716// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 8717// CHECK64-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 8718// CHECK64-NEXT:    store ptr [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 8719// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 8720// CHECK64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 8721// CHECK64-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[IDATA_ADDR]], align 8722// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 8723// CHECK64-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 8724// CHECK64-NEXT:    store ptr [[TMP1]], ptr [[__IDATA_ADDR_I]], align 8725// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 8726// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 8727// CHECK64-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[__IDATA_ADDR_I]], align 8728// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 8729// CHECK64-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[TMP4]], align 16730// CHECK64-NEXT:    [[TMP7:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 1731// CHECK64-NEXT:    [[TMP8:%.*]] = load <2 x i64>, ptr [[TMP7]], align 16732// CHECK64-NEXT:    [[TMP9:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 2733// CHECK64-NEXT:    [[TMP10:%.*]] = load <2 x i64>, ptr [[TMP9]], align 16734// CHECK64-NEXT:    [[TMP11:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 3735// CHECK64-NEXT:    [[TMP12:%.*]] = load <2 x i64>, ptr [[TMP11]], align 16736// CHECK64-NEXT:    [[TMP13:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 4737// CHECK64-NEXT:    [[TMP14:%.*]] = load <2 x i64>, ptr [[TMP13]], align 16738// CHECK64-NEXT:    [[TMP15:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 5739// CHECK64-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[TMP15]], align 16740// CHECK64-NEXT:    [[TMP17:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 6741// CHECK64-NEXT:    [[TMP18:%.*]] = load <2 x i64>, ptr [[TMP17]], align 16742// CHECK64-NEXT:    [[TMP19:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 7743// CHECK64-NEXT:    [[TMP20:%.*]] = load <2 x i64>, ptr [[TMP19]], align 16744// CHECK64-NEXT:    [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide128kl(ptr [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]])745// CHECK64-NEXT:    [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0746// CHECK64-NEXT:    [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1747// CHECK64-NEXT:    br i1 [[TMP23]], label [[AESDECWIDE128KL_NO_ERROR_I:%.*]], label [[AESDECWIDE128KL_ERROR_I:%.*]]748// CHECK64:       aesdecwide128kl_no_error.i:749// CHECK64-NEXT:    [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1750// CHECK64-NEXT:    store <2 x i64> [[TMP24]], ptr [[TMP3]], align 16751// CHECK64-NEXT:    [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2752// CHECK64-NEXT:    [[TMP26:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1753// CHECK64-NEXT:    store <2 x i64> [[TMP25]], ptr [[TMP26]], align 16754// CHECK64-NEXT:    [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3755// CHECK64-NEXT:    [[TMP28:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2756// CHECK64-NEXT:    store <2 x i64> [[TMP27]], ptr [[TMP28]], align 16757// CHECK64-NEXT:    [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4758// CHECK64-NEXT:    [[TMP30:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3759// CHECK64-NEXT:    store <2 x i64> [[TMP29]], ptr [[TMP30]], align 16760// CHECK64-NEXT:    [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5761// CHECK64-NEXT:    [[TMP32:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4762// CHECK64-NEXT:    store <2 x i64> [[TMP31]], ptr [[TMP32]], align 16763// CHECK64-NEXT:    [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6764// CHECK64-NEXT:    [[TMP34:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5765// CHECK64-NEXT:    store <2 x i64> [[TMP33]], ptr [[TMP34]], align 16766// CHECK64-NEXT:    [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7767// CHECK64-NEXT:    [[TMP36:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6768// CHECK64-NEXT:    store <2 x i64> [[TMP35]], ptr [[TMP36]], align 16769// CHECK64-NEXT:    [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8770// CHECK64-NEXT:    [[TMP38:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7771// CHECK64-NEXT:    store <2 x i64> [[TMP37]], ptr [[TMP38]], align 16772// CHECK64-NEXT:    br label [[_MM_AESDECWIDE128KL_U8_EXIT:%.*]]773// CHECK64:       aesdecwide128kl_error.i:774// CHECK64-NEXT:    [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1775// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16776// CHECK64-NEXT:    [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2777// CHECK64-NEXT:    [[TMP41:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1778// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP41]], align 16779// CHECK64-NEXT:    [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3780// CHECK64-NEXT:    [[TMP43:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2781// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP43]], align 16782// CHECK64-NEXT:    [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4783// CHECK64-NEXT:    [[TMP45:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3784// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP45]], align 16785// CHECK64-NEXT:    [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5786// CHECK64-NEXT:    [[TMP47:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4787// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP47]], align 16788// CHECK64-NEXT:    [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6789// CHECK64-NEXT:    [[TMP49:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5790// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP49]], align 16791// CHECK64-NEXT:    [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7792// CHECK64-NEXT:    [[TMP51:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6793// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP51]], align 16794// CHECK64-NEXT:    [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8795// CHECK64-NEXT:    [[TMP53:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7796// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP53]], align 16797// CHECK64-NEXT:    br label [[_MM_AESDECWIDE128KL_U8_EXIT]]798// CHECK64:       _mm_aesdecwide128kl_u8.exit:799// CHECK64-NEXT:    [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0800// CHECK64-NEXT:    ret i8 [[TMP54]]801//802// CHECK32-LABEL: @test__mm_aesdecwide128kl_u8(803// CHECK32-NEXT:  entry:804// CHECK32-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 4805// CHECK32-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca ptr, align 4806// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4807// CHECK32-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 4808// CHECK32-NEXT:    [[IDATA_ADDR:%.*]] = alloca ptr, align 4809// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 4810// CHECK32-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 4811// CHECK32-NEXT:    store ptr [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 4812// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 4813// CHECK32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 4814// CHECK32-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[IDATA_ADDR]], align 4815// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 4816// CHECK32-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 4817// CHECK32-NEXT:    store ptr [[TMP1]], ptr [[__IDATA_ADDR_I]], align 4818// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 4819// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 4820// CHECK32-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[__IDATA_ADDR_I]], align 4821// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 4822// CHECK32-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[TMP4]], align 16823// CHECK32-NEXT:    [[TMP7:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 1824// CHECK32-NEXT:    [[TMP8:%.*]] = load <2 x i64>, ptr [[TMP7]], align 16825// CHECK32-NEXT:    [[TMP9:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 2826// CHECK32-NEXT:    [[TMP10:%.*]] = load <2 x i64>, ptr [[TMP9]], align 16827// CHECK32-NEXT:    [[TMP11:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 3828// CHECK32-NEXT:    [[TMP12:%.*]] = load <2 x i64>, ptr [[TMP11]], align 16829// CHECK32-NEXT:    [[TMP13:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 4830// CHECK32-NEXT:    [[TMP14:%.*]] = load <2 x i64>, ptr [[TMP13]], align 16831// CHECK32-NEXT:    [[TMP15:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 5832// CHECK32-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[TMP15]], align 16833// CHECK32-NEXT:    [[TMP17:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 6834// CHECK32-NEXT:    [[TMP18:%.*]] = load <2 x i64>, ptr [[TMP17]], align 16835// CHECK32-NEXT:    [[TMP19:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 7836// CHECK32-NEXT:    [[TMP20:%.*]] = load <2 x i64>, ptr [[TMP19]], align 16837// CHECK32-NEXT:    [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide128kl(ptr [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]])838// CHECK32-NEXT:    [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0839// CHECK32-NEXT:    [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1840// CHECK32-NEXT:    br i1 [[TMP23]], label [[AESDECWIDE128KL_NO_ERROR_I:%.*]], label [[AESDECWIDE128KL_ERROR_I:%.*]]841// CHECK32:       aesdecwide128kl_no_error.i:842// CHECK32-NEXT:    [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1843// CHECK32-NEXT:    store <2 x i64> [[TMP24]], ptr [[TMP3]], align 16844// CHECK32-NEXT:    [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2845// CHECK32-NEXT:    [[TMP26:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1846// CHECK32-NEXT:    store <2 x i64> [[TMP25]], ptr [[TMP26]], align 16847// CHECK32-NEXT:    [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3848// CHECK32-NEXT:    [[TMP28:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2849// CHECK32-NEXT:    store <2 x i64> [[TMP27]], ptr [[TMP28]], align 16850// CHECK32-NEXT:    [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4851// CHECK32-NEXT:    [[TMP30:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3852// CHECK32-NEXT:    store <2 x i64> [[TMP29]], ptr [[TMP30]], align 16853// CHECK32-NEXT:    [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5854// CHECK32-NEXT:    [[TMP32:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4855// CHECK32-NEXT:    store <2 x i64> [[TMP31]], ptr [[TMP32]], align 16856// CHECK32-NEXT:    [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6857// CHECK32-NEXT:    [[TMP34:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5858// CHECK32-NEXT:    store <2 x i64> [[TMP33]], ptr [[TMP34]], align 16859// CHECK32-NEXT:    [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7860// CHECK32-NEXT:    [[TMP36:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6861// CHECK32-NEXT:    store <2 x i64> [[TMP35]], ptr [[TMP36]], align 16862// CHECK32-NEXT:    [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8863// CHECK32-NEXT:    [[TMP38:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7864// CHECK32-NEXT:    store <2 x i64> [[TMP37]], ptr [[TMP38]], align 16865// CHECK32-NEXT:    br label [[_MM_AESDECWIDE128KL_U8_EXIT:%.*]]866// CHECK32:       aesdecwide128kl_error.i:867// CHECK32-NEXT:    [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1868// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16869// CHECK32-NEXT:    [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2870// CHECK32-NEXT:    [[TMP41:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1871// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP41]], align 16872// CHECK32-NEXT:    [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3873// CHECK32-NEXT:    [[TMP43:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2874// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP43]], align 16875// CHECK32-NEXT:    [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4876// CHECK32-NEXT:    [[TMP45:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3877// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP45]], align 16878// CHECK32-NEXT:    [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5879// CHECK32-NEXT:    [[TMP47:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4880// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP47]], align 16881// CHECK32-NEXT:    [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6882// CHECK32-NEXT:    [[TMP49:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5883// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP49]], align 16884// CHECK32-NEXT:    [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7885// CHECK32-NEXT:    [[TMP51:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6886// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP51]], align 16887// CHECK32-NEXT:    [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8888// CHECK32-NEXT:    [[TMP53:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7889// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP53]], align 16890// CHECK32-NEXT:    br label [[_MM_AESDECWIDE128KL_U8_EXIT]]891// CHECK32:       _mm_aesdecwide128kl_u8.exit:892// CHECK32-NEXT:    [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0893// CHECK32-NEXT:    ret i8 [[TMP54]]894//895unsigned char test__mm_aesdecwide128kl_u8(__m128i odata[8], const __m128i idata[8], const void* h) {896  return _mm_aesdecwide128kl_u8(odata, idata, h);897}898 899// CHECK64-LABEL: @test__mm_aesencwide256kl_u8(900// CHECK64-NEXT:  entry:901// CHECK64-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 8902// CHECK64-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca ptr, align 8903// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 8904// CHECK64-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 8905// CHECK64-NEXT:    [[IDATA_ADDR:%.*]] = alloca ptr, align 8906// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 8907// CHECK64-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 8908// CHECK64-NEXT:    store ptr [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 8909// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 8910// CHECK64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 8911// CHECK64-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[IDATA_ADDR]], align 8912// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 8913// CHECK64-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 8914// CHECK64-NEXT:    store ptr [[TMP1]], ptr [[__IDATA_ADDR_I]], align 8915// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 8916// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 8917// CHECK64-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[__IDATA_ADDR_I]], align 8918// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 8919// CHECK64-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[TMP4]], align 16920// CHECK64-NEXT:    [[TMP7:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 1921// CHECK64-NEXT:    [[TMP8:%.*]] = load <2 x i64>, ptr [[TMP7]], align 16922// CHECK64-NEXT:    [[TMP9:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 2923// CHECK64-NEXT:    [[TMP10:%.*]] = load <2 x i64>, ptr [[TMP9]], align 16924// CHECK64-NEXT:    [[TMP11:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 3925// CHECK64-NEXT:    [[TMP12:%.*]] = load <2 x i64>, ptr [[TMP11]], align 16926// CHECK64-NEXT:    [[TMP13:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 4927// CHECK64-NEXT:    [[TMP14:%.*]] = load <2 x i64>, ptr [[TMP13]], align 16928// CHECK64-NEXT:    [[TMP15:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 5929// CHECK64-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[TMP15]], align 16930// CHECK64-NEXT:    [[TMP17:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 6931// CHECK64-NEXT:    [[TMP18:%.*]] = load <2 x i64>, ptr [[TMP17]], align 16932// CHECK64-NEXT:    [[TMP19:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 7933// CHECK64-NEXT:    [[TMP20:%.*]] = load <2 x i64>, ptr [[TMP19]], align 16934// CHECK64-NEXT:    [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide256kl(ptr [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]])935// CHECK64-NEXT:    [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0936// CHECK64-NEXT:    [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1937// CHECK64-NEXT:    br i1 [[TMP23]], label [[AESENCWIDE256KL_NO_ERROR_I:%.*]], label [[AESENCWIDE256KL_ERROR_I:%.*]]938// CHECK64:       aesencwide256kl_no_error.i:939// CHECK64-NEXT:    [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1940// CHECK64-NEXT:    store <2 x i64> [[TMP24]], ptr [[TMP3]], align 16941// CHECK64-NEXT:    [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2942// CHECK64-NEXT:    [[TMP26:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1943// CHECK64-NEXT:    store <2 x i64> [[TMP25]], ptr [[TMP26]], align 16944// CHECK64-NEXT:    [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3945// CHECK64-NEXT:    [[TMP28:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2946// CHECK64-NEXT:    store <2 x i64> [[TMP27]], ptr [[TMP28]], align 16947// CHECK64-NEXT:    [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4948// CHECK64-NEXT:    [[TMP30:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3949// CHECK64-NEXT:    store <2 x i64> [[TMP29]], ptr [[TMP30]], align 16950// CHECK64-NEXT:    [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5951// CHECK64-NEXT:    [[TMP32:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4952// CHECK64-NEXT:    store <2 x i64> [[TMP31]], ptr [[TMP32]], align 16953// CHECK64-NEXT:    [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6954// CHECK64-NEXT:    [[TMP34:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5955// CHECK64-NEXT:    store <2 x i64> [[TMP33]], ptr [[TMP34]], align 16956// CHECK64-NEXT:    [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7957// CHECK64-NEXT:    [[TMP36:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6958// CHECK64-NEXT:    store <2 x i64> [[TMP35]], ptr [[TMP36]], align 16959// CHECK64-NEXT:    [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8960// CHECK64-NEXT:    [[TMP38:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7961// CHECK64-NEXT:    store <2 x i64> [[TMP37]], ptr [[TMP38]], align 16962// CHECK64-NEXT:    br label [[_MM_AESENCWIDE256KL_U8_EXIT:%.*]]963// CHECK64:       aesencwide256kl_error.i:964// CHECK64-NEXT:    [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1965// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 16966// CHECK64-NEXT:    [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2967// CHECK64-NEXT:    [[TMP41:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 1968// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP41]], align 16969// CHECK64-NEXT:    [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3970// CHECK64-NEXT:    [[TMP43:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 2971// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP43]], align 16972// CHECK64-NEXT:    [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4973// CHECK64-NEXT:    [[TMP45:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 3974// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP45]], align 16975// CHECK64-NEXT:    [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5976// CHECK64-NEXT:    [[TMP47:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 4977// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP47]], align 16978// CHECK64-NEXT:    [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6979// CHECK64-NEXT:    [[TMP49:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 5980// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP49]], align 16981// CHECK64-NEXT:    [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7982// CHECK64-NEXT:    [[TMP51:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 6983// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP51]], align 16984// CHECK64-NEXT:    [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8985// CHECK64-NEXT:    [[TMP53:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 7986// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP53]], align 16987// CHECK64-NEXT:    br label [[_MM_AESENCWIDE256KL_U8_EXIT]]988// CHECK64:       _mm_aesencwide256kl_u8.exit:989// CHECK64-NEXT:    [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0990// CHECK64-NEXT:    ret i8 [[TMP54]]991//992// CHECK32-LABEL: @test__mm_aesencwide256kl_u8(993// CHECK32-NEXT:  entry:994// CHECK32-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 4995// CHECK32-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca ptr, align 4996// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 4997// CHECK32-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 4998// CHECK32-NEXT:    [[IDATA_ADDR:%.*]] = alloca ptr, align 4999// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 41000// CHECK32-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 41001// CHECK32-NEXT:    store ptr [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 41002// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 41003// CHECK32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 41004// CHECK32-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[IDATA_ADDR]], align 41005// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 41006// CHECK32-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 41007// CHECK32-NEXT:    store ptr [[TMP1]], ptr [[__IDATA_ADDR_I]], align 41008// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 41009// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 41010// CHECK32-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[__IDATA_ADDR_I]], align 41011// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 41012// CHECK32-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[TMP4]], align 161013// CHECK32-NEXT:    [[TMP7:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 11014// CHECK32-NEXT:    [[TMP8:%.*]] = load <2 x i64>, ptr [[TMP7]], align 161015// CHECK32-NEXT:    [[TMP9:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 21016// CHECK32-NEXT:    [[TMP10:%.*]] = load <2 x i64>, ptr [[TMP9]], align 161017// CHECK32-NEXT:    [[TMP11:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 31018// CHECK32-NEXT:    [[TMP12:%.*]] = load <2 x i64>, ptr [[TMP11]], align 161019// CHECK32-NEXT:    [[TMP13:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 41020// CHECK32-NEXT:    [[TMP14:%.*]] = load <2 x i64>, ptr [[TMP13]], align 161021// CHECK32-NEXT:    [[TMP15:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 51022// CHECK32-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[TMP15]], align 161023// CHECK32-NEXT:    [[TMP17:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 61024// CHECK32-NEXT:    [[TMP18:%.*]] = load <2 x i64>, ptr [[TMP17]], align 161025// CHECK32-NEXT:    [[TMP19:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 71026// CHECK32-NEXT:    [[TMP20:%.*]] = load <2 x i64>, ptr [[TMP19]], align 161027// CHECK32-NEXT:    [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide256kl(ptr [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]])1028// CHECK32-NEXT:    [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 01029// CHECK32-NEXT:    [[TMP23:%.*]] = trunc i8 [[TMP22]] to i11030// CHECK32-NEXT:    br i1 [[TMP23]], label [[AESENCWIDE256KL_NO_ERROR_I:%.*]], label [[AESENCWIDE256KL_ERROR_I:%.*]]1031// CHECK32:       aesencwide256kl_no_error.i:1032// CHECK32-NEXT:    [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 11033// CHECK32-NEXT:    store <2 x i64> [[TMP24]], ptr [[TMP3]], align 161034// CHECK32-NEXT:    [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 21035// CHECK32-NEXT:    [[TMP26:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 11036// CHECK32-NEXT:    store <2 x i64> [[TMP25]], ptr [[TMP26]], align 161037// CHECK32-NEXT:    [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 31038// CHECK32-NEXT:    [[TMP28:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 21039// CHECK32-NEXT:    store <2 x i64> [[TMP27]], ptr [[TMP28]], align 161040// CHECK32-NEXT:    [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 41041// CHECK32-NEXT:    [[TMP30:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 31042// CHECK32-NEXT:    store <2 x i64> [[TMP29]], ptr [[TMP30]], align 161043// CHECK32-NEXT:    [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 51044// CHECK32-NEXT:    [[TMP32:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 41045// CHECK32-NEXT:    store <2 x i64> [[TMP31]], ptr [[TMP32]], align 161046// CHECK32-NEXT:    [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 61047// CHECK32-NEXT:    [[TMP34:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 51048// CHECK32-NEXT:    store <2 x i64> [[TMP33]], ptr [[TMP34]], align 161049// CHECK32-NEXT:    [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 71050// CHECK32-NEXT:    [[TMP36:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 61051// CHECK32-NEXT:    store <2 x i64> [[TMP35]], ptr [[TMP36]], align 161052// CHECK32-NEXT:    [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 81053// CHECK32-NEXT:    [[TMP38:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 71054// CHECK32-NEXT:    store <2 x i64> [[TMP37]], ptr [[TMP38]], align 161055// CHECK32-NEXT:    br label [[_MM_AESENCWIDE256KL_U8_EXIT:%.*]]1056// CHECK32:       aesencwide256kl_error.i:1057// CHECK32-NEXT:    [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 11058// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 161059// CHECK32-NEXT:    [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 21060// CHECK32-NEXT:    [[TMP41:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 11061// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP41]], align 161062// CHECK32-NEXT:    [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 31063// CHECK32-NEXT:    [[TMP43:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 21064// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP43]], align 161065// CHECK32-NEXT:    [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 41066// CHECK32-NEXT:    [[TMP45:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 31067// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP45]], align 161068// CHECK32-NEXT:    [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 51069// CHECK32-NEXT:    [[TMP47:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 41070// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP47]], align 161071// CHECK32-NEXT:    [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 61072// CHECK32-NEXT:    [[TMP49:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 51073// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP49]], align 161074// CHECK32-NEXT:    [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 71075// CHECK32-NEXT:    [[TMP51:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 61076// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP51]], align 161077// CHECK32-NEXT:    [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 81078// CHECK32-NEXT:    [[TMP53:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 71079// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP53]], align 161080// CHECK32-NEXT:    br label [[_MM_AESENCWIDE256KL_U8_EXIT]]1081// CHECK32:       _mm_aesencwide256kl_u8.exit:1082// CHECK32-NEXT:    [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 01083// CHECK32-NEXT:    ret i8 [[TMP54]]1084//1085unsigned char test__mm_aesencwide256kl_u8(__m128i odata[8], const __m128i idata[8], const void* h) {1086  return _mm_aesencwide256kl_u8(odata, idata, h);1087}1088 1089// CHECK64-LABEL: @test__mm_aesdecwide256kl_u8(1090// CHECK64-NEXT:  entry:1091// CHECK64-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 81092// CHECK64-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca ptr, align 81093// CHECK64-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 81094// CHECK64-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 81095// CHECK64-NEXT:    [[IDATA_ADDR:%.*]] = alloca ptr, align 81096// CHECK64-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 81097// CHECK64-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 81098// CHECK64-NEXT:    store ptr [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 81099// CHECK64-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 81100// CHECK64-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 81101// CHECK64-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[IDATA_ADDR]], align 81102// CHECK64-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 81103// CHECK64-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 81104// CHECK64-NEXT:    store ptr [[TMP1]], ptr [[__IDATA_ADDR_I]], align 81105// CHECK64-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 81106// CHECK64-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 81107// CHECK64-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[__IDATA_ADDR_I]], align 81108// CHECK64-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 81109// CHECK64-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[TMP4]], align 161110// CHECK64-NEXT:    [[TMP7:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 11111// CHECK64-NEXT:    [[TMP8:%.*]] = load <2 x i64>, ptr [[TMP7]], align 161112// CHECK64-NEXT:    [[TMP9:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 21113// CHECK64-NEXT:    [[TMP10:%.*]] = load <2 x i64>, ptr [[TMP9]], align 161114// CHECK64-NEXT:    [[TMP11:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 31115// CHECK64-NEXT:    [[TMP12:%.*]] = load <2 x i64>, ptr [[TMP11]], align 161116// CHECK64-NEXT:    [[TMP13:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 41117// CHECK64-NEXT:    [[TMP14:%.*]] = load <2 x i64>, ptr [[TMP13]], align 161118// CHECK64-NEXT:    [[TMP15:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 51119// CHECK64-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[TMP15]], align 161120// CHECK64-NEXT:    [[TMP17:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 61121// CHECK64-NEXT:    [[TMP18:%.*]] = load <2 x i64>, ptr [[TMP17]], align 161122// CHECK64-NEXT:    [[TMP19:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 71123// CHECK64-NEXT:    [[TMP20:%.*]] = load <2 x i64>, ptr [[TMP19]], align 161124// CHECK64-NEXT:    [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide256kl(ptr [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]])1125// CHECK64-NEXT:    [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 01126// CHECK64-NEXT:    [[TMP23:%.*]] = trunc i8 [[TMP22]] to i11127// CHECK64-NEXT:    br i1 [[TMP23]], label [[AESDECWIDE256KL_NO_ERROR_I:%.*]], label [[AESDECWIDE256KL_ERROR_I:%.*]]1128// CHECK64:       aesdecwide256kl_no_error.i:1129// CHECK64-NEXT:    [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 11130// CHECK64-NEXT:    store <2 x i64> [[TMP24]], ptr [[TMP3]], align 161131// CHECK64-NEXT:    [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 21132// CHECK64-NEXT:    [[TMP26:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 11133// CHECK64-NEXT:    store <2 x i64> [[TMP25]], ptr [[TMP26]], align 161134// CHECK64-NEXT:    [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 31135// CHECK64-NEXT:    [[TMP28:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 21136// CHECK64-NEXT:    store <2 x i64> [[TMP27]], ptr [[TMP28]], align 161137// CHECK64-NEXT:    [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 41138// CHECK64-NEXT:    [[TMP30:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 31139// CHECK64-NEXT:    store <2 x i64> [[TMP29]], ptr [[TMP30]], align 161140// CHECK64-NEXT:    [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 51141// CHECK64-NEXT:    [[TMP32:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 41142// CHECK64-NEXT:    store <2 x i64> [[TMP31]], ptr [[TMP32]], align 161143// CHECK64-NEXT:    [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 61144// CHECK64-NEXT:    [[TMP34:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 51145// CHECK64-NEXT:    store <2 x i64> [[TMP33]], ptr [[TMP34]], align 161146// CHECK64-NEXT:    [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 71147// CHECK64-NEXT:    [[TMP36:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 61148// CHECK64-NEXT:    store <2 x i64> [[TMP35]], ptr [[TMP36]], align 161149// CHECK64-NEXT:    [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 81150// CHECK64-NEXT:    [[TMP38:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 71151// CHECK64-NEXT:    store <2 x i64> [[TMP37]], ptr [[TMP38]], align 161152// CHECK64-NEXT:    br label [[_MM_AESDECWIDE256KL_U8_EXIT:%.*]]1153// CHECK64:       aesdecwide256kl_error.i:1154// CHECK64-NEXT:    [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 11155// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 161156// CHECK64-NEXT:    [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 21157// CHECK64-NEXT:    [[TMP41:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 11158// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP41]], align 161159// CHECK64-NEXT:    [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 31160// CHECK64-NEXT:    [[TMP43:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 21161// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP43]], align 161162// CHECK64-NEXT:    [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 41163// CHECK64-NEXT:    [[TMP45:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 31164// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP45]], align 161165// CHECK64-NEXT:    [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 51166// CHECK64-NEXT:    [[TMP47:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 41167// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP47]], align 161168// CHECK64-NEXT:    [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 61169// CHECK64-NEXT:    [[TMP49:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 51170// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP49]], align 161171// CHECK64-NEXT:    [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 71172// CHECK64-NEXT:    [[TMP51:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 61173// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP51]], align 161174// CHECK64-NEXT:    [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 81175// CHECK64-NEXT:    [[TMP53:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 71176// CHECK64-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP53]], align 161177// CHECK64-NEXT:    br label [[_MM_AESDECWIDE256KL_U8_EXIT]]1178// CHECK64:       _mm_aesdecwide256kl_u8.exit:1179// CHECK64-NEXT:    [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 01180// CHECK64-NEXT:    ret i8 [[TMP54]]1181//1182// CHECK32-LABEL: @test__mm_aesdecwide256kl_u8(1183// CHECK32-NEXT:  entry:1184// CHECK32-NEXT:    [[__ODATA_ADDR_I:%.*]] = alloca ptr, align 41185// CHECK32-NEXT:    [[__IDATA_ADDR_I:%.*]] = alloca ptr, align 41186// CHECK32-NEXT:    [[__H_ADDR_I:%.*]] = alloca ptr, align 41187// CHECK32-NEXT:    [[ODATA_ADDR:%.*]] = alloca ptr, align 41188// CHECK32-NEXT:    [[IDATA_ADDR:%.*]] = alloca ptr, align 41189// CHECK32-NEXT:    [[H_ADDR:%.*]] = alloca ptr, align 41190// CHECK32-NEXT:    store ptr [[ODATA:%.*]], ptr [[ODATA_ADDR]], align 41191// CHECK32-NEXT:    store ptr [[IDATA:%.*]], ptr [[IDATA_ADDR]], align 41192// CHECK32-NEXT:    store ptr [[H:%.*]], ptr [[H_ADDR]], align 41193// CHECK32-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ODATA_ADDR]], align 41194// CHECK32-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[IDATA_ADDR]], align 41195// CHECK32-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[H_ADDR]], align 41196// CHECK32-NEXT:    store ptr [[TMP0]], ptr [[__ODATA_ADDR_I]], align 41197// CHECK32-NEXT:    store ptr [[TMP1]], ptr [[__IDATA_ADDR_I]], align 41198// CHECK32-NEXT:    store ptr [[TMP2]], ptr [[__H_ADDR_I]], align 41199// CHECK32-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[__ODATA_ADDR_I]], align 41200// CHECK32-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[__IDATA_ADDR_I]], align 41201// CHECK32-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[__H_ADDR_I]], align 41202// CHECK32-NEXT:    [[TMP6:%.*]] = load <2 x i64>, ptr [[TMP4]], align 161203// CHECK32-NEXT:    [[TMP7:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 11204// CHECK32-NEXT:    [[TMP8:%.*]] = load <2 x i64>, ptr [[TMP7]], align 161205// CHECK32-NEXT:    [[TMP9:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 21206// CHECK32-NEXT:    [[TMP10:%.*]] = load <2 x i64>, ptr [[TMP9]], align 161207// CHECK32-NEXT:    [[TMP11:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 31208// CHECK32-NEXT:    [[TMP12:%.*]] = load <2 x i64>, ptr [[TMP11]], align 161209// CHECK32-NEXT:    [[TMP13:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 41210// CHECK32-NEXT:    [[TMP14:%.*]] = load <2 x i64>, ptr [[TMP13]], align 161211// CHECK32-NEXT:    [[TMP15:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 51212// CHECK32-NEXT:    [[TMP16:%.*]] = load <2 x i64>, ptr [[TMP15]], align 161213// CHECK32-NEXT:    [[TMP17:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 61214// CHECK32-NEXT:    [[TMP18:%.*]] = load <2 x i64>, ptr [[TMP17]], align 161215// CHECK32-NEXT:    [[TMP19:%.*]] = getelementptr <2 x i64>, ptr [[TMP4]], i32 71216// CHECK32-NEXT:    [[TMP20:%.*]] = load <2 x i64>, ptr [[TMP19]], align 161217// CHECK32-NEXT:    [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide256kl(ptr [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]])1218// CHECK32-NEXT:    [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 01219// CHECK32-NEXT:    [[TMP23:%.*]] = trunc i8 [[TMP22]] to i11220// CHECK32-NEXT:    br i1 [[TMP23]], label [[AESDECWIDE256KL_NO_ERROR_I:%.*]], label [[AESDECWIDE256KL_ERROR_I:%.*]]1221// CHECK32:       aesdecwide256kl_no_error.i:1222// CHECK32-NEXT:    [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 11223// CHECK32-NEXT:    store <2 x i64> [[TMP24]], ptr [[TMP3]], align 161224// CHECK32-NEXT:    [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 21225// CHECK32-NEXT:    [[TMP26:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 11226// CHECK32-NEXT:    store <2 x i64> [[TMP25]], ptr [[TMP26]], align 161227// CHECK32-NEXT:    [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 31228// CHECK32-NEXT:    [[TMP28:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 21229// CHECK32-NEXT:    store <2 x i64> [[TMP27]], ptr [[TMP28]], align 161230// CHECK32-NEXT:    [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 41231// CHECK32-NEXT:    [[TMP30:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 31232// CHECK32-NEXT:    store <2 x i64> [[TMP29]], ptr [[TMP30]], align 161233// CHECK32-NEXT:    [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 51234// CHECK32-NEXT:    [[TMP32:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 41235// CHECK32-NEXT:    store <2 x i64> [[TMP31]], ptr [[TMP32]], align 161236// CHECK32-NEXT:    [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 61237// CHECK32-NEXT:    [[TMP34:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 51238// CHECK32-NEXT:    store <2 x i64> [[TMP33]], ptr [[TMP34]], align 161239// CHECK32-NEXT:    [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 71240// CHECK32-NEXT:    [[TMP36:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 61241// CHECK32-NEXT:    store <2 x i64> [[TMP35]], ptr [[TMP36]], align 161242// CHECK32-NEXT:    [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 81243// CHECK32-NEXT:    [[TMP38:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 71244// CHECK32-NEXT:    store <2 x i64> [[TMP37]], ptr [[TMP38]], align 161245// CHECK32-NEXT:    br label [[_MM_AESDECWIDE256KL_U8_EXIT:%.*]]1246// CHECK32:       aesdecwide256kl_error.i:1247// CHECK32-NEXT:    [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 11248// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP3]], align 161249// CHECK32-NEXT:    [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 21250// CHECK32-NEXT:    [[TMP41:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 11251// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP41]], align 161252// CHECK32-NEXT:    [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 31253// CHECK32-NEXT:    [[TMP43:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 21254// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP43]], align 161255// CHECK32-NEXT:    [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 41256// CHECK32-NEXT:    [[TMP45:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 31257// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP45]], align 161258// CHECK32-NEXT:    [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 51259// CHECK32-NEXT:    [[TMP47:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 41260// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP47]], align 161261// CHECK32-NEXT:    [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 61262// CHECK32-NEXT:    [[TMP49:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 51263// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP49]], align 161264// CHECK32-NEXT:    [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 71265// CHECK32-NEXT:    [[TMP51:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 61266// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP51]], align 161267// CHECK32-NEXT:    [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 81268// CHECK32-NEXT:    [[TMP53:%.*]] = getelementptr <2 x i64>, ptr [[TMP3]], i32 71269// CHECK32-NEXT:    store <2 x i64> zeroinitializer, ptr [[TMP53]], align 161270// CHECK32-NEXT:    br label [[_MM_AESDECWIDE256KL_U8_EXIT]]1271// CHECK32:       _mm_aesdecwide256kl_u8.exit:1272// CHECK32-NEXT:    [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 01273// CHECK32-NEXT:    ret i8 [[TMP54]]1274//1275unsigned char test__mm_aesdecwide256kl_u8(__m128i odata[8], const __m128i idata[8], const void* h) {1276  return _mm_aesdecwide256kl_u8(odata, idata, h);1277}1278