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1// REQUIRES: arm-registered-target2// RUN: not %clang_cc1 -triple armv7 -target-feature +neon %s -S -o /dev/null 2>&1 | FileCheck %s3 4typedef __attribute__((neon_vector_type(2))) long long int64x2_t;5typedef struct int64x2x4_t {6 int64x2_t val[4];7} int64x2x4_t;8int64x2x4_t t1(const long long a[]) {9 int64x2x4_t r;10 __asm__("vldm %[a], { %q[r0], %q[r1], %q[r2], %q[r3] }"11 : [r0] "=r"(r.val[0]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}12 [r1] "=r"(r.val[1]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}13 [r2] "=r"(r.val[2]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}14 [r3] "=r"(r.val[3]) // expected-warning {{value size does not match register size specified by the constraint and modifier}}15 : [a] "r"(a));16 return r;17}18// We should see all four errors, rather than report a fatal error after the first.19// CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type20// CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type21// CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type22// CHECK: error: non-trivial scalar-to-vector conversion, possible invalid constraint for vector type23