32 lines · c
1// REQUIRES: arm-registered-target2// RUN: %clang_cc1 -triple armv7 -target-feature +neon %s -emit-llvm -o /dev/null3 4char bar();5 6void t1(int x, char y) {7 __asm__ volatile("mcr p15, 0, %1, c9, c12, 5;"8 "mrc p15, 0, %0, c9, c13, 2;"9 : "=r" (x)10 : "r" (bar())); // no warning11 __asm__ volatile("foo %0, %1"12 : "+r" (x),13 "+r" (y)14 :);15 __asm__ volatile("ldrb %0, [%1]" : "=r" (y) : "r" (x)); // no warning16}17 18typedef __attribute__((neon_vector_type(2))) long long int64x2_t;19typedef struct int64x2x4_t {20 int64x2_t val[4];21} int64x2x4_t;22int64x2x4_t t2(const long long a[]) {23 int64x2x4_t r;24 __asm__("vldm %[a], { %q[r0], %q[r1], %q[r2], %q[r3] }"25 : [r0] "=r"(r.val[0]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}26 [r1] "=r"(r.val[1]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}27 [r2] "=r"(r.val[2]), // expected-warning {{value size does not match register size specified by the constraint and modifier}}28 [r3] "=r"(r.val[3]) // expected-warning {{value size does not match register size specified by the constraint and modifier}}29 : [a] "r"(a));30 return r;31}32