163 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi \3// RUN: -target-feature +cdecp0 -target-feature +cdecp1 \4// RUN: -mfloat-abi hard -O0 -disable-O0-optnone \5// RUN: -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s6 7// REQUIRES: aarch64-registered-target || arm-registered-target8 9#include <arm_cde.h>10 11// CHECK-LABEL: @test_cx1(12// CHECK-NEXT: entry:13// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx1(i32 0, i32 123)14// CHECK-NEXT: ret i32 [[TMP0]]15//16uint32_t test_cx1(void) {17 return __arm_cx1(0, 123);18}19 20// CHECK-LABEL: @test_cx1a(21// CHECK-NEXT: entry:22// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx1a(i32 0, i32 [[ACC:%.*]], i32 345)23// CHECK-NEXT: ret i32 [[TMP0]]24//25uint32_t test_cx1a(uint32_t acc) {26 return __arm_cx1a(0, acc, 345);27}28 29// CHECK-LABEL: @test_cx1d(30// CHECK-NEXT: entry:31// CHECK-NEXT: [[TMP0:%.*]] = call { i32, i32 } @llvm.arm.cde.cx1d(i32 1, i32 567)32// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 133// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i6434// CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 3235// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP0]], 036// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i6437// CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]38// CHECK-NEXT: ret i64 [[TMP6]]39//40uint64_t test_cx1d(void) {41 return __arm_cx1d(1, 567);42}43 44// CHECK-LABEL: @test_cx1da(45// CHECK-NEXT: entry:46// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[ACC:%.*]], 3247// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i3248// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[ACC]] to i3249// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.cde.cx1da(i32 0, i32 [[TMP2]], i32 [[TMP1]], i32 789)50// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 151// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i6452// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 3253// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 054// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i6455// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]56// CHECK-NEXT: ret i64 [[TMP9]]57//58uint64_t test_cx1da(uint64_t acc) {59 return __arm_cx1da(0, acc, 789);60}61 62// CHECK-LABEL: @test_cx2(63// CHECK-NEXT: entry:64// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx2(i32 0, i32 [[N:%.*]], i32 11)65// CHECK-NEXT: ret i32 [[TMP0]]66//67uint32_t test_cx2(uint32_t n) {68 return __arm_cx2(0, n, 11);69}70 71// CHECK-LABEL: @test_cx2a(72// CHECK-NEXT: entry:73// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx2a(i32 1, i32 [[ACC:%.*]], i32 [[N:%.*]], i32 22)74// CHECK-NEXT: ret i32 [[TMP0]]75//76uint32_t test_cx2a(uint32_t acc, uint32_t n) {77 return __arm_cx2a(1, acc, n, 22);78}79 80// CHECK-LABEL: @test_cx2d(81// CHECK-NEXT: entry:82// CHECK-NEXT: [[TMP0:%.*]] = call { i32, i32 } @llvm.arm.cde.cx2d(i32 1, i32 [[N:%.*]], i32 33)83// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 184// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i6485// CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 3286// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP0]], 087// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i6488// CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]89// CHECK-NEXT: ret i64 [[TMP6]]90//91uint64_t test_cx2d(uint32_t n) {92 return __arm_cx2d(1, n, 33);93}94 95// CHECK-LABEL: @test_cx2da(96// CHECK-NEXT: entry:97// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[ACC:%.*]], 3298// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i3299// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[ACC]] to i32100// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.cde.cx2da(i32 0, i32 [[TMP2]], i32 [[TMP1]], i32 [[N:%.*]], i32 44)101// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1102// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64103// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32104// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0105// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64106// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]107// CHECK-NEXT: ret i64 [[TMP9]]108//109uint64_t test_cx2da(uint64_t acc, uint32_t n) {110 return __arm_cx2da(0, acc, n, 44);111}112 113// CHECK-LABEL: @test_cx3(114// CHECK-NEXT: entry:115// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx3(i32 0, i32 [[N:%.*]], i32 [[M:%.*]], i32 1)116// CHECK-NEXT: ret i32 [[TMP0]]117//118uint32_t test_cx3(uint32_t n, uint32_t m) {119 return __arm_cx3(0, n, m, 1);120}121 122// CHECK-LABEL: @test_cx3a(123// CHECK-NEXT: entry:124// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx3a(i32 1, i32 [[ACC:%.*]], i32 [[N:%.*]], i32 [[M:%.*]], i32 2)125// CHECK-NEXT: ret i32 [[TMP0]]126//127uint32_t test_cx3a(uint32_t acc, uint32_t n, uint32_t m) {128 return __arm_cx3a(1, acc, n, m, 2);129}130 131// CHECK-LABEL: @test_cx3d(132// CHECK-NEXT: entry:133// CHECK-NEXT: [[TMP0:%.*]] = call { i32, i32 } @llvm.arm.cde.cx3d(i32 1, i32 [[N:%.*]], i32 [[M:%.*]], i32 3)134// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1135// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64136// CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 32137// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP0]], 0138// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64139// CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]140// CHECK-NEXT: ret i64 [[TMP6]]141//142uint64_t test_cx3d(uint32_t n, uint32_t m) {143 return __arm_cx3d(1, n, m, 3);144}145 146// CHECK-LABEL: @test_cx3da(147// CHECK-NEXT: entry:148// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[ACC:%.*]], 32149// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32150// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[ACC]] to i32151// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.cde.cx3da(i32 0, i32 [[TMP2]], i32 [[TMP1]], i32 [[N:%.*]], i32 [[M:%.*]], i32 4)152// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1153// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64154// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32155// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0156// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64157// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]158// CHECK-NEXT: ret i64 [[TMP9]]159//160uint64_t test_cx3da(uint64_t acc, uint32_t n, uint32_t m) {161 return __arm_cx3da(0, acc, n, m, 4);162}163