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1// RUN: %clang_cc1 -triple armv8-none-linux-gnueabi -target-feature +crc \2// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s3// RUN: %clang_cc1 -verify -emit-llvm-only -triple armv7-none-linux-gnueabi %s4 5int crc32b(int a, char b)6{7// expected-error@+1 {{'__builtin_arm_crc32b' needs target feature crc}}8 return __builtin_arm_crc32b(a,b);9// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i3210// CHECK: call i32 @llvm.arm.crc32b(i32 %a, i32 [[T0]])11}12 13int crc32cb(int a, char b)14{15 return __builtin_arm_crc32cb(a,b);16// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i3217// CHECK: call i32 @llvm.arm.crc32cb(i32 %a, i32 [[T0]])18}19 20int crc32h(int a, short b)21{22 return __builtin_arm_crc32h(a,b);23// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i3224// CHECK: call i32 @llvm.arm.crc32h(i32 %a, i32 [[T0]])25}26 27int crc32ch(int a, short b)28{29 return __builtin_arm_crc32ch(a,b);30// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i3231// CHECK: call i32 @llvm.arm.crc32ch(i32 %a, i32 [[T0]])32}33 34int crc32w(int a, int b)35{36 return __builtin_arm_crc32w(a,b);37// CHECK: call i32 @llvm.arm.crc32w(i32 %a, i32 %b)38}39 40int crc32cw(int a, int b)41{42 return __builtin_arm_crc32cw(a,b);43// CHECK: call i32 @llvm.arm.crc32cw(i32 %a, i32 %b)44}45 46int crc32d(int a, long long b)47{48 return __builtin_arm_crc32d(a,b);49// CHECK: [[T0:%[0-9]+]] = trunc i64 %b to i3250// CHECK: [[T1:%[0-9]+]] = lshr i64 %b, 3251// CHECK: [[T2:%[0-9]+]] = trunc i64 [[T1]] to i3252// CHECK: [[T3:%[0-9]+]] = call i32 @llvm.arm.crc32w(i32 %a, i32 [[T0]])53// CHECK: call i32 @llvm.arm.crc32w(i32 [[T3]], i32 [[T2]])54}55 56int crc32cd(int a, long long b)57{58 return __builtin_arm_crc32cd(a,b);59// CHECK: [[T0:%[0-9]+]] = trunc i64 %b to i3260// CHECK: [[T1:%[0-9]+]] = lshr i64 %b, 3261// CHECK: [[T2:%[0-9]+]] = trunc i64 [[T1]] to i3262// CHECK: [[T3:%[0-9]+]] = call i32 @llvm.arm.crc32cw(i32 %a, i32 [[T0]])63// CHECK: call i32 @llvm.arm.crc32cw(i32 [[T3]], i32 [[T2]])64}65