405 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s3// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s4 5// REQUIRES: aarch64-registered-target || arm-registered-target6 7#include <arm_mve.h>8 9// CHECK-LABEL: @test_vbicq_n_s16(10// CHECK-NEXT: entry:11// CHECK-NEXT: [[TMP0:%.*]] = and <8 x i16> [[A:%.*]], splat (i16 11007)12// CHECK-NEXT: ret <8 x i16> [[TMP0]]13//14int16x8_t test_vbicq_n_s16(int16x8_t a)15{16#ifdef POLYMORPHIC17 return vbicq(a, 0xd500);18#else /* POLYMORPHIC */19 return vbicq_n_s16(a, 0xd500);20#endif /* POLYMORPHIC */21}22 23// CHECK-LABEL: @test_vbicq_n_s32(24// CHECK-NEXT: entry:25// CHECK-NEXT: [[TMP0:%.*]] = and <4 x i32> [[A:%.*]], splat (i32 -252)26// CHECK-NEXT: ret <4 x i32> [[TMP0]]27//28int32x4_t test_vbicq_n_s32(int32x4_t a)29{30#ifdef POLYMORPHIC31 return vbicq(a, 0xfb);32#else /* POLYMORPHIC */33 return vbicq_n_s32(a, 0xfb);34#endif /* POLYMORPHIC */35}36 37// CHECK-LABEL: @test_vbicq_n_u16(38// CHECK-NEXT: entry:39// CHECK-NEXT: [[TMP0:%.*]] = and <8 x i16> [[A:%.*]], splat (i16 -243)40// CHECK-NEXT: ret <8 x i16> [[TMP0]]41//42uint16x8_t test_vbicq_n_u16(uint16x8_t a)43{44#ifdef POLYMORPHIC45 return vbicq(a, 0xf2);46#else /* POLYMORPHIC */47 return vbicq_n_u16(a, 0xf2);48#endif /* POLYMORPHIC */49}50 51// CHECK-LABEL: @test_vbicq_n_u32(52// CHECK-NEXT: entry:53// CHECK-NEXT: [[TMP0:%.*]] = and <4 x i32> [[A:%.*]], splat (i32 -8193)54// CHECK-NEXT: ret <4 x i32> [[TMP0]]55//56uint32x4_t test_vbicq_n_u32(uint32x4_t a)57{58#ifdef POLYMORPHIC59 return vbicq(a, 0x2000);60#else /* POLYMORPHIC */61 return vbicq_n_u32(a, 0x2000);62#endif /* POLYMORPHIC */63}64 65// CHECK-LABEL: @test_vorrq_n_s16(66// CHECK-NEXT: entry:67// CHECK-NEXT: [[TMP0:%.*]] = or <8 x i16> [[A:%.*]], splat (i16 195)68// CHECK-NEXT: ret <8 x i16> [[TMP0]]69//70int16x8_t test_vorrq_n_s16(int16x8_t a)71{72#ifdef POLYMORPHIC73 return vorrq(a, 0xc3);74#else /* POLYMORPHIC */75 return vorrq_n_s16(a, 0xc3);76#endif /* POLYMORPHIC */77}78 79// CHECK-LABEL: @test_vorrq_n_s32(80// CHECK-NEXT: entry:81// CHECK-NEXT: [[TMP0:%.*]] = or <4 x i32> [[A:%.*]], splat (i32 65536)82// CHECK-NEXT: ret <4 x i32> [[TMP0]]83//84int32x4_t test_vorrq_n_s32(int32x4_t a)85{86#ifdef POLYMORPHIC87 return vorrq(a, 0x10000);88#else /* POLYMORPHIC */89 return vorrq_n_s32(a, 0x10000);90#endif /* POLYMORPHIC */91}92 93// CHECK-LABEL: @test_vorrq_n_u16(94// CHECK-NEXT: entry:95// CHECK-NEXT: [[TMP0:%.*]] = or <8 x i16> [[A:%.*]], splat (i16 -4096)96// CHECK-NEXT: ret <8 x i16> [[TMP0]]97//98uint16x8_t test_vorrq_n_u16(uint16x8_t a)99{100#ifdef POLYMORPHIC101 return vorrq(a, 0xf000);102#else /* POLYMORPHIC */103 return vorrq_n_u16(a, 0xf000);104#endif /* POLYMORPHIC */105}106 107// CHECK-LABEL: @test_vorrq_n_u32(108// CHECK-NEXT: entry:109// CHECK-NEXT: [[TMP0:%.*]] = or <4 x i32> [[A:%.*]], splat (i32 8978432)110// CHECK-NEXT: ret <4 x i32> [[TMP0]]111//112uint32x4_t test_vorrq_n_u32(uint32x4_t a)113{114#ifdef POLYMORPHIC115 return vorrq(a, 0x890000);116#else /* POLYMORPHIC */117 return vorrq_n_u32(a, 0x890000);118#endif /* POLYMORPHIC */119}120 121// CHECK-LABEL: @test_vmvnq_n_s16(122// CHECK-NEXT: entry:123// CHECK-NEXT: ret <8 x i16> splat (i16 27391)124//125int16x8_t test_vmvnq_n_s16()126{127 return vmvnq_n_s16(0x9500);128}129 130// CHECK-LABEL: @test_vmvnq_n_s32(131// CHECK-NEXT: entry:132// CHECK-NEXT: ret <4 x i32> splat (i32 -5570561)133//134int32x4_t test_vmvnq_n_s32()135{136 return vmvnq_n_s32(0x550000);137}138 139// CHECK-LABEL: @test_vmvnq_n_u16(140// CHECK-NEXT: entry:141// CHECK-NEXT: ret <8 x i16> splat (i16 -18689)142//143uint16x8_t test_vmvnq_n_u16()144{145 return vmvnq_n_u16(0x4900);146}147 148// CHECK-LABEL: @test_vmvnq_n_u32(149// CHECK-NEXT: entry:150// CHECK-NEXT: ret <4 x i32> splat (i32 1023410175)151//152uint32x4_t test_vmvnq_n_u32()153{154 return vmvnq_n_u32(0xc3000000);155}156 157// CHECK-LABEL: @test_vbicq_m_n_s16(158// CHECK-NEXT: entry:159// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32160// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])161// CHECK-NEXT: [[TMP2:%.*]] = and <8 x i16> [[A:%.*]], splat (i16 -11265)162// CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[TMP2]], <8 x i16> [[A]]163// CHECK-NEXT: ret <8 x i16> [[TMP3]]164//165int16x8_t test_vbicq_m_n_s16(int16x8_t a, mve_pred16_t p)166{167#ifdef POLYMORPHIC168 return vbicq_m_n(a, 0x2c00, p);169#else /* POLYMORPHIC */170 return vbicq_m_n_s16(a, 0x2c00, p);171#endif /* POLYMORPHIC */172}173 174// CHECK-LABEL: @test_vbicq_m_n_s32(175// CHECK-NEXT: entry:176// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32177// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])178// CHECK-NEXT: [[TMP2:%.*]] = and <4 x i32> [[A:%.*]], splat (i32 -13893633)179// CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[A]]180// CHECK-NEXT: ret <4 x i32> [[TMP3]]181//182int32x4_t test_vbicq_m_n_s32(int32x4_t a, mve_pred16_t p)183{184#ifdef POLYMORPHIC185 return vbicq_m_n(a, 0xd40000, p);186#else /* POLYMORPHIC */187 return vbicq_m_n_s32(a, 0xd40000, p);188#endif /* POLYMORPHIC */189}190 191// CHECK-LABEL: @test_vbicq_m_n_u16(192// CHECK-NEXT: entry:193// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32194// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])195// CHECK-NEXT: [[TMP2:%.*]] = and <8 x i16> [[A:%.*]], splat (i16 -37)196// CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[TMP2]], <8 x i16> [[A]]197// CHECK-NEXT: ret <8 x i16> [[TMP3]]198//199uint16x8_t test_vbicq_m_n_u16(uint16x8_t a, mve_pred16_t p)200{201#ifdef POLYMORPHIC202 return vbicq_m_n(a, 0x24, p);203#else /* POLYMORPHIC */204 return vbicq_m_n_u16(a, 0x24, p);205#endif /* POLYMORPHIC */206}207 208// CHECK-LABEL: @test_vbicq_m_n_u32(209// CHECK-NEXT: entry:210// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32211// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])212// CHECK-NEXT: [[TMP2:%.*]] = and <4 x i32> [[A:%.*]], splat (i32 -1644167169)213// CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[A]]214// CHECK-NEXT: ret <4 x i32> [[TMP3]]215//216uint32x4_t test_vbicq_m_n_u32(uint32x4_t a, mve_pred16_t p)217{218#ifdef POLYMORPHIC219 return vbicq_m_n(a, 0x62000000, p);220#else /* POLYMORPHIC */221 return vbicq_m_n_u32(a, 0x62000000, p);222#endif /* POLYMORPHIC */223}224 225// CHECK-LABEL: @test_vorrq_m_n_s16(226// CHECK-NEXT: entry:227// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32228// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])229// CHECK-NEXT: [[TMP2:%.*]] = or <8 x i16> [[A:%.*]], splat (i16 13568)230// CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[TMP2]], <8 x i16> [[A]]231// CHECK-NEXT: ret <8 x i16> [[TMP3]]232//233int16x8_t test_vorrq_m_n_s16(int16x8_t a, mve_pred16_t p)234{235#ifdef POLYMORPHIC236 return vorrq_m_n(a, 0x3500, p);237#else /* POLYMORPHIC */238 return vorrq_m_n_s16(a, 0x3500, p);239#endif /* POLYMORPHIC */240}241 242// CHECK-LABEL: @test_vorrq_m_n_s32(243// CHECK-NEXT: entry:244// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32245// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])246// CHECK-NEXT: [[TMP2:%.*]] = or <4 x i32> [[A:%.*]], splat (i32 654311424)247// CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[A]]248// CHECK-NEXT: ret <4 x i32> [[TMP3]]249//250int32x4_t test_vorrq_m_n_s32(int32x4_t a, mve_pred16_t p)251{252#ifdef POLYMORPHIC253 return vorrq_m_n(a, 0x27000000, p);254#else /* POLYMORPHIC */255 return vorrq_m_n_s32(a, 0x27000000, p);256#endif /* POLYMORPHIC */257}258 259// CHECK-LABEL: @test_vorrq_m_n_u16(260// CHECK-NEXT: entry:261// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32262// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])263// CHECK-NEXT: [[TMP2:%.*]] = or <8 x i16> [[A:%.*]], splat (i16 175)264// CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[TMP2]], <8 x i16> [[A]]265// CHECK-NEXT: ret <8 x i16> [[TMP3]]266//267uint16x8_t test_vorrq_m_n_u16(uint16x8_t a, mve_pred16_t p)268{269#ifdef POLYMORPHIC270 return vorrq_m_n(a, 0xaf, p);271#else /* POLYMORPHIC */272 return vorrq_m_n_u16(a, 0xaf, p);273#endif /* POLYMORPHIC */274}275 276// CHECK-LABEL: @test_vorrq_m_n_u32(277// CHECK-NEXT: entry:278// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32279// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])280// CHECK-NEXT: [[TMP2:%.*]] = or <4 x i32> [[A:%.*]], splat (i32 89)281// CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[A]]282// CHECK-NEXT: ret <4 x i32> [[TMP3]]283//284uint32x4_t test_vorrq_m_n_u32(uint32x4_t a, mve_pred16_t p)285{286#ifdef POLYMORPHIC287 return vorrq_m_n(a, 0x59, p);288#else /* POLYMORPHIC */289 return vorrq_m_n_u32(a, 0x59, p);290#endif /* POLYMORPHIC */291}292 293// CHECK-LABEL: @test_vmvnq_m_n_s16(294// CHECK-NEXT: entry:295// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32296// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])297// CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> splat (i16 -3841), <8 x i16> [[INACTIVE:%.*]]298// CHECK-NEXT: ret <8 x i16> [[TMP2]]299//300int16x8_t test_vmvnq_m_n_s16(int16x8_t inactive, mve_pred16_t p)301{302#ifdef POLYMORPHIC303 return vmvnq_m(inactive, 0xf00, p);304#else /* POLYMORPHIC */305 return vmvnq_m_n_s16(inactive, 0xf00, p);306#endif /* POLYMORPHIC */307}308 309// CHECK-LABEL: @test_vmvnq_m_n_s32(310// CHECK-NEXT: entry:311// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32312// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])313// CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> splat (i32 -18945), <4 x i32> [[INACTIVE:%.*]]314// CHECK-NEXT: ret <4 x i32> [[TMP2]]315//316int32x4_t test_vmvnq_m_n_s32(int32x4_t inactive, mve_pred16_t p)317{318#ifdef POLYMORPHIC319 return vmvnq_m(inactive, 0x4a00, p);320#else /* POLYMORPHIC */321 return vmvnq_m_n_s32(inactive, 0x4a00, p);322#endif /* POLYMORPHIC */323}324 325// CHECK-LABEL: @test_vmvnq_m_n_u16(326// CHECK-NEXT: entry:327// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32328// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])329// CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> splat (i16 23295), <8 x i16> [[INACTIVE:%.*]]330// CHECK-NEXT: ret <8 x i16> [[TMP2]]331//332uint16x8_t test_vmvnq_m_n_u16(uint16x8_t inactive, mve_pred16_t p)333{334#ifdef POLYMORPHIC335 return vmvnq_m(inactive, 0xa500, p);336#else /* POLYMORPHIC */337 return vmvnq_m_n_u16(inactive, 0xa500, p);338#endif /* POLYMORPHIC */339}340 341// CHECK-LABEL: @test_vmvnq_m_n_u32(342// CHECK-NEXT: entry:343// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32344// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])345// CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> splat (i32 -63489), <4 x i32> [[INACTIVE:%.*]]346// CHECK-NEXT: ret <4 x i32> [[TMP2]]347//348uint32x4_t test_vmvnq_m_n_u32(uint32x4_t inactive, mve_pred16_t p)349{350#ifdef POLYMORPHIC351 return vmvnq_m(inactive, 0xf800, p);352#else /* POLYMORPHIC */353 return vmvnq_m_n_u32(inactive, 0xf800, p);354#endif /* POLYMORPHIC */355}356 357// CHECK-LABEL: @test_vmvnq_x_n_s16(358// CHECK-NEXT: entry:359// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32360// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])361// CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> splat (i16 767), <8 x i16> undef362// CHECK-NEXT: ret <8 x i16> [[TMP2]]363//364int16x8_t test_vmvnq_x_n_s16(mve_pred16_t p)365{366 return vmvnq_x_n_s16(0xfd00, p);367}368 369// CHECK-LABEL: @test_vmvnq_x_n_s32(370// CHECK-NEXT: entry:371// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32372// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])373// CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> splat (i32 -12189697), <4 x i32> undef374// CHECK-NEXT: ret <4 x i32> [[TMP2]]375//376int32x4_t test_vmvnq_x_n_s32(mve_pred16_t p)377{378 return vmvnq_x_n_s32(0xba0000, p);379}380 381// CHECK-LABEL: @test_vmvnq_x_n_u16(382// CHECK-NEXT: entry:383// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32384// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])385// CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> splat (i16 -21505), <8 x i16> undef386// CHECK-NEXT: ret <8 x i16> [[TMP2]]387//388uint16x8_t test_vmvnq_x_n_u16(mve_pred16_t p)389{390 return vmvnq_x_n_u16(0x5400, p);391}392 393// CHECK-LABEL: @test_vmvnq_x_n_u32(394// CHECK-NEXT: entry:395// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32396// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])397// CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> splat (i32 -4865), <4 x i32> undef398// CHECK-NEXT: ret <4 x i32> [[TMP2]]399//400uint32x4_t test_vmvnq_x_n_u32(mve_pred16_t p)401{402 return vmvnq_x_n_u32(0x1300, p);403}404 405