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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s3 4// REQUIRES: aarch64-registered-target || arm-registered-target5 6#include <arm_mve.h>7 8// CHECK-LABEL: @test_asrl(9// CHECK-NEXT: entry:10// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 3211// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i3212// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i3213// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.asrl(i32 [[TMP2]], i32 [[TMP1]], i32 [[SHIFT:%.*]])14// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 115// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i6416// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 3217// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 018// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i6419// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]20// CHECK-NEXT: ret i64 [[TMP9]]21//22int64_t test_asrl(int64_t value, int32_t shift)23{24 return asrl(value, shift);25}26 27// CHECK-LABEL: @test_lsll(28// CHECK-NEXT: entry:29// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 3230// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i3231// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i3232// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.lsll(i32 [[TMP2]], i32 [[TMP1]], i32 [[SHIFT:%.*]])33// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 134// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i6435// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 3236// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 037// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i6438// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]39// CHECK-NEXT: ret i64 [[TMP9]]40//41uint64_t test_lsll(uint64_t value, int32_t shift)42{43 return lsll(value, shift);44}45 46// CHECK-LABEL: @test_sqrshr(47// CHECK-NEXT: entry:48// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.sqrshr(i32 [[VALUE:%.*]], i32 [[SHIFT:%.*]])49// CHECK-NEXT: ret i32 [[TMP0]]50//51int32_t test_sqrshr(int32_t value, int32_t shift)52{53 return sqrshr(value, shift);54}55 56// CHECK-LABEL: @test_sqrshrl(57// CHECK-NEXT: entry:58// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 3259// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i3260// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i3261// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.sqrshrl(i32 [[TMP2]], i32 [[TMP1]], i32 [[SHIFT:%.*]], i32 64)62// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 163// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i6464// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 3265// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 066// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i6467// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]68// CHECK-NEXT: ret i64 [[TMP9]]69//70int64_t test_sqrshrl(int64_t value, int32_t shift)71{72 return sqrshrl(value, shift);73}74 75// CHECK-LABEL: @test_sqrshrl_sat48(76// CHECK-NEXT: entry:77// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 3278// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i3279// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i3280// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.sqrshrl(i32 [[TMP2]], i32 [[TMP1]], i32 [[SHIFT:%.*]], i32 48)81// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 182// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i6483// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 3284// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 085// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i6486// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]87// CHECK-NEXT: ret i64 [[TMP9]]88//89int64_t test_sqrshrl_sat48(int64_t value, int32_t shift)90{91 return sqrshrl_sat48(value, shift);92}93 94// CHECK-LABEL: @test_sqshl(95// CHECK-NEXT: entry:96// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.sqshl(i32 [[VALUE:%.*]], i32 2)97// CHECK-NEXT: ret i32 [[TMP0]]98//99int32_t test_sqshl(int32_t value)100{101 return sqshl(value, 2);102}103 104// CHECK-LABEL: @test_sqshll(105// CHECK-NEXT: entry:106// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 32107// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32108// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i32109// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.sqshll(i32 [[TMP2]], i32 [[TMP1]], i32 17)110// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1111// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64112// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32113// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0114// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64115// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]116// CHECK-NEXT: ret i64 [[TMP9]]117//118int64_t test_sqshll(int64_t value)119{120 return sqshll(value, 17);121}122 123// CHECK-LABEL: @test_srshr(124// CHECK-NEXT: entry:125// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.srshr(i32 [[VALUE:%.*]], i32 6)126// CHECK-NEXT: ret i32 [[TMP0]]127//128int32_t test_srshr(int32_t value)129{130 return srshr(value, 6);131}132 133// CHECK-LABEL: @test_srshrl(134// CHECK-NEXT: entry:135// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 32136// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32137// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i32138// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.srshrl(i32 [[TMP2]], i32 [[TMP1]], i32 26)139// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1140// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64141// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32142// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0143// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64144// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]145// CHECK-NEXT: ret i64 [[TMP9]]146//147int64_t test_srshrl(int64_t value)148{149 return srshrl(value, 26);150}151 152// CHECK-LABEL: @test_uqrshl(153// CHECK-NEXT: entry:154// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.uqrshl(i32 [[VALUE:%.*]], i32 [[SHIFT:%.*]])155// CHECK-NEXT: ret i32 [[TMP0]]156//157uint32_t test_uqrshl(uint32_t value, int32_t shift)158{159 return uqrshl(value, shift);160}161 162// CHECK-LABEL: @test_uqrshll(163// CHECK-NEXT: entry:164// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 32165// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32166// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i32167// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.uqrshll(i32 [[TMP2]], i32 [[TMP1]], i32 [[SHIFT:%.*]], i32 64)168// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1169// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64170// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32171// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0172// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64173// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]174// CHECK-NEXT: ret i64 [[TMP9]]175//176uint64_t test_uqrshll(uint64_t value, int32_t shift)177{178 return uqrshll(value, shift);179}180 181// CHECK-LABEL: @test_uqrshll_sat48(182// CHECK-NEXT: entry:183// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 32184// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32185// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i32186// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.uqrshll(i32 [[TMP2]], i32 [[TMP1]], i32 [[SHIFT:%.*]], i32 48)187// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1188// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64189// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32190// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0191// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64192// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]193// CHECK-NEXT: ret i64 [[TMP9]]194//195uint64_t test_uqrshll_sat48(uint64_t value, int32_t shift)196{197 return uqrshll_sat48(value, shift);198}199 200// CHECK-LABEL: @test_uqshl(201// CHECK-NEXT: entry:202// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.uqshl(i32 [[VALUE:%.*]], i32 21)203// CHECK-NEXT: ret i32 [[TMP0]]204//205uint32_t test_uqshl(uint32_t value)206{207 return uqshl(value, 21);208}209 210// CHECK-LABEL: @test_uqshll(211// CHECK-NEXT: entry:212// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 32213// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32214// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i32215// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.uqshll(i32 [[TMP2]], i32 [[TMP1]], i32 16)216// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1217// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64218// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32219// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0220// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64221// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]222// CHECK-NEXT: ret i64 [[TMP9]]223//224uint64_t test_uqshll(uint64_t value)225{226 return uqshll(value, 16);227}228 229// CHECK-LABEL: @test_urshr(230// CHECK-NEXT: entry:231// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.mve.urshr(i32 [[VALUE:%.*]], i32 22)232// CHECK-NEXT: ret i32 [[TMP0]]233//234uint32_t test_urshr(uint32_t value)235{236 return urshr(value, 22);237}238 239// CHECK-LABEL: @test_urshrl(240// CHECK-NEXT: entry:241// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[VALUE:%.*]], 32242// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32243// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[VALUE]] to i32244// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.mve.urshrl(i32 [[TMP2]], i32 [[TMP1]], i32 6)245// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1246// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64247// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32248// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0249// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64250// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]251// CHECK-NEXT: ret i64 [[TMP9]]252//253uint64_t test_urshrl(uint64_t value)254{255 return urshrl(value, 6);256}257