149 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s3// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s4 5// REQUIRES: aarch64-registered-target || arm-registered-target6 7#include <arm_mve.h>8 9// CHECK-LABEL: @test_vminq_u8(10// CHECK-NEXT: entry:11// CHECK-NEXT: [[TMP0:%.*]] = icmp ule <16 x i8> [[A:%.*]], [[B:%.*]]12// CHECK-NEXT: [[TMP1:%.*]] = select <16 x i1> [[TMP0]], <16 x i8> [[A]], <16 x i8> [[B]]13// CHECK-NEXT: ret <16 x i8> [[TMP1]]14//15uint8x16_t test_vminq_u8(uint8x16_t a, uint8x16_t b)16{17#ifdef POLYMORPHIC18 return vminq(a, b);19#else /* POLYMORPHIC */20 return vminq_u8(a, b);21#endif /* POLYMORPHIC */22}23 24// CHECK-LABEL: @test_vminq_s16(25// CHECK-NEXT: entry:26// CHECK-NEXT: [[TMP0:%.*]] = icmp sle <8 x i16> [[A:%.*]], [[B:%.*]]27// CHECK-NEXT: [[TMP1:%.*]] = select <8 x i1> [[TMP0]], <8 x i16> [[A]], <8 x i16> [[B]]28// CHECK-NEXT: ret <8 x i16> [[TMP1]]29//30int16x8_t test_vminq_s16(int16x8_t a, int16x8_t b)31{32#ifdef POLYMORPHIC33 return vminq(a, b);34#else /* POLYMORPHIC */35 return vminq_s16(a, b);36#endif /* POLYMORPHIC */37}38 39// CHECK-LABEL: @test_vminq_u32(40// CHECK-NEXT: entry:41// CHECK-NEXT: [[TMP0:%.*]] = icmp ule <4 x i32> [[A:%.*]], [[B:%.*]]42// CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[A]], <4 x i32> [[B]]43// CHECK-NEXT: ret <4 x i32> [[TMP1]]44//45uint32x4_t test_vminq_u32(uint32x4_t a, uint32x4_t b)46{47#ifdef POLYMORPHIC48 return vminq(a, b);49#else /* POLYMORPHIC */50 return vminq_u32(a, b);51#endif /* POLYMORPHIC */52}53 54// CHECK-LABEL: @test_vminq_m_s8(55// CHECK-NEXT: entry:56// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i3257// CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])58// CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.min.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 0, <16 x i1> [[TMP1]], <16 x i8> [[INACTIVE:%.*]])59// CHECK-NEXT: ret <16 x i8> [[TMP2]]60//61int8x16_t test_vminq_m_s8(int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)62{63#ifdef POLYMORPHIC64 return vminq_m(inactive, a, b, p);65#else /* POLYMORPHIC */66 return vminq_m_s8(inactive, a, b, p);67#endif /* POLYMORPHIC */68}69 70// CHECK-LABEL: @test_vminq_m_u16(71// CHECK-NEXT: entry:72// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i3273// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])74// CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.min.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 1, <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]])75// CHECK-NEXT: ret <8 x i16> [[TMP2]]76//77uint16x8_t test_vminq_m_u16(uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)78{79#ifdef POLYMORPHIC80 return vminq_m(inactive, a, b, p);81#else /* POLYMORPHIC */82 return vminq_m_u16(inactive, a, b, p);83#endif /* POLYMORPHIC */84}85 86// CHECK-LABEL: @test_vminq_m_s32(87// CHECK-NEXT: entry:88// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i3289// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])90// CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.min.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 0, <4 x i1> [[TMP1]], <4 x i32> [[INACTIVE:%.*]])91// CHECK-NEXT: ret <4 x i32> [[TMP2]]92//93int32x4_t test_vminq_m_s32(int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)94{95#ifdef POLYMORPHIC96 return vminq_m(inactive, a, b, p);97#else /* POLYMORPHIC */98 return vminq_m_s32(inactive, a, b, p);99#endif /* POLYMORPHIC */100}101 102// CHECK-LABEL: @test_vminq_x_u8(103// CHECK-NEXT: entry:104// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32105// CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])106// CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.min.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], i32 1, <16 x i1> [[TMP1]], <16 x i8> undef)107// CHECK-NEXT: ret <16 x i8> [[TMP2]]108//109uint8x16_t test_vminq_x_u8(uint8x16_t a, uint8x16_t b, mve_pred16_t p)110{111#ifdef POLYMORPHIC112 return vminq_x(a, b, p);113#else /* POLYMORPHIC */114 return vminq_x_u8(a, b, p);115#endif /* POLYMORPHIC */116}117 118// CHECK-LABEL: @test_vminq_x_s16(119// CHECK-NEXT: entry:120// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32121// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])122// CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.min.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], i32 0, <8 x i1> [[TMP1]], <8 x i16> undef)123// CHECK-NEXT: ret <8 x i16> [[TMP2]]124//125int16x8_t test_vminq_x_s16(int16x8_t a, int16x8_t b, mve_pred16_t p)126{127#ifdef POLYMORPHIC128 return vminq_x(a, b, p);129#else /* POLYMORPHIC */130 return vminq_x_s16(a, b, p);131#endif /* POLYMORPHIC */132}133 134// CHECK-LABEL: @test_vminq_x_s32(135// CHECK-NEXT: entry:136// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32137// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])138// CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.min.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], i32 1, <4 x i1> [[TMP1]], <4 x i32> undef)139// CHECK-NEXT: ret <4 x i32> [[TMP2]]140//141uint32x4_t test_vminq_x_s32(uint32x4_t a, uint32x4_t b, mve_pred16_t p)142{143#ifdef POLYMORPHIC144 return vminq_x(a, b, p);145#else /* POLYMORPHIC */146 return vminq_x_u32(a, b, p);147#endif /* POLYMORPHIC */148}149