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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s3// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s4 5// REQUIRES: aarch64-registered-target || arm-registered-target6 7#include <arm_mve.h>8 9// CHECK-LABEL: @test_vmladavaq_s8(10// CHECK-NEXT:  entry:11// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 0, i32 0, i32 0, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])12// CHECK-NEXT:    ret i32 [[TMP0]]13//14int32_t test_vmladavaq_s8(int32_t a, int8x16_t b, int8x16_t c) {15#ifdef POLYMORPHIC16  return vmladavaq(a, b, c);17#else18  return vmladavaq_s8(a, b, c);19#endif20}21 22// CHECK-LABEL: @test_vmladavaq_s16(23// CHECK-NEXT:  entry:24// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])25// CHECK-NEXT:    ret i32 [[TMP0]]26//27int32_t test_vmladavaq_s16(int32_t a, int16x8_t b, int16x8_t c) {28#ifdef POLYMORPHIC29  return vmladavaq(a, b, c);30#else31  return vmladavaq_s16(a, b, c);32#endif33}34 35// CHECK-LABEL: @test_vmladavaq_s32(36// CHECK-NEXT:  entry:37// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 0, i32 0, i32 0, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])38// CHECK-NEXT:    ret i32 [[TMP0]]39//40int32_t test_vmladavaq_s32(int32_t a, int32x4_t b, int32x4_t c) {41#ifdef POLYMORPHIC42  return vmladavaq(a, b, c);43#else44  return vmladavaq_s32(a, b, c);45#endif46}47 48// CHECK-LABEL: @test_vmladavaq_u8(49// CHECK-NEXT:  entry:50// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 1, i32 0, i32 0, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])51// CHECK-NEXT:    ret i32 [[TMP0]]52//53uint32_t test_vmladavaq_u8(uint32_t a, uint8x16_t b, uint8x16_t c) {54#ifdef POLYMORPHIC55  return vmladavaq(a, b, c);56#else57  return vmladavaq_u8(a, b, c);58#endif59}60 61// CHECK-LABEL: @test_vmladavaq_u16(62// CHECK-NEXT:  entry:63// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 1, i32 0, i32 0, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])64// CHECK-NEXT:    ret i32 [[TMP0]]65//66uint32_t test_vmladavaq_u16(uint32_t a, uint16x8_t b, uint16x8_t c) {67#ifdef POLYMORPHIC68  return vmladavaq(a, b, c);69#else70  return vmladavaq_u16(a, b, c);71#endif72}73 74// CHECK-LABEL: @test_vmladavaq_u32(75// CHECK-NEXT:  entry:76// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 1, i32 0, i32 0, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])77// CHECK-NEXT:    ret i32 [[TMP0]]78//79uint32_t test_vmladavaq_u32(uint32_t a, uint32x4_t b, uint32x4_t c) {80#ifdef POLYMORPHIC81  return vmladavaq(a, b, c);82#else83  return vmladavaq_u32(a, b, c);84#endif85}86 87// CHECK-LABEL: @test_vmladavaxq_s8(88// CHECK-NEXT:  entry:89// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 0, i32 0, i32 1, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])90// CHECK-NEXT:    ret i32 [[TMP0]]91//92int32_t test_vmladavaxq_s8(int32_t a, int8x16_t b, int8x16_t c) {93#ifdef POLYMORPHIC94  return vmladavaxq(a, b, c);95#else96  return vmladavaxq_s8(a, b, c);97#endif98}99 100// CHECK-LABEL: @test_vmladavaxq_s16(101// CHECK-NEXT:  entry:102// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 1, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])103// CHECK-NEXT:    ret i32 [[TMP0]]104//105int32_t test_vmladavaxq_s16(int32_t a, int16x8_t b, int16x8_t c) {106#ifdef POLYMORPHIC107  return vmladavaxq(a, b, c);108#else109  return vmladavaxq_s16(a, b, c);110#endif111}112 113// CHECK-LABEL: @test_vmladavaxq_s32(114// CHECK-NEXT:  entry:115// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 0, i32 0, i32 1, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])116// CHECK-NEXT:    ret i32 [[TMP0]]117//118int32_t test_vmladavaxq_s32(int32_t a, int32x4_t b, int32x4_t c) {119#ifdef POLYMORPHIC120  return vmladavaxq(a, b, c);121#else122  return vmladavaxq_s32(a, b, c);123#endif124}125 126// CHECK-LABEL: @test_vmlsdavaq_s8(127// CHECK-NEXT:  entry:128// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 0, i32 1, i32 0, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])129// CHECK-NEXT:    ret i32 [[TMP0]]130//131int32_t test_vmlsdavaq_s8(int32_t a, int8x16_t b, int8x16_t c) {132#ifdef POLYMORPHIC133  return vmlsdavaq(a, b, c);134#else135  return vmlsdavaq_s8(a, b, c);136#endif137}138 139// CHECK-LABEL: @test_vmlsdavaq_s16(140// CHECK-NEXT:  entry:141// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 1, i32 0, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])142// CHECK-NEXT:    ret i32 [[TMP0]]143//144int32_t test_vmlsdavaq_s16(int32_t a, int16x8_t b, int16x8_t c) {145#ifdef POLYMORPHIC146  return vmlsdavaq(a, b, c);147#else148  return vmlsdavaq_s16(a, b, c);149#endif150}151 152// CHECK-LABEL: @test_vmlsdavaq_s32(153// CHECK-NEXT:  entry:154// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 0, i32 1, i32 0, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])155// CHECK-NEXT:    ret i32 [[TMP0]]156//157int32_t test_vmlsdavaq_s32(int32_t a, int32x4_t b, int32x4_t c) {158#ifdef POLYMORPHIC159  return vmlsdavaq(a, b, c);160#else161  return vmlsdavaq_s32(a, b, c);162#endif163}164 165// CHECK-LABEL: @test_vmlsdavaxq_s8(166// CHECK-NEXT:  entry:167// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 0, i32 1, i32 1, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])168// CHECK-NEXT:    ret i32 [[TMP0]]169//170int32_t test_vmlsdavaxq_s8(int32_t a, int8x16_t b, int8x16_t c) {171#ifdef POLYMORPHIC172  return vmlsdavaxq(a, b, c);173#else174  return vmlsdavaxq_s8(a, b, c);175#endif176}177 178// CHECK-LABEL: @test_vmlsdavaxq_s16(179// CHECK-NEXT:  entry:180// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 1, i32 1, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])181// CHECK-NEXT:    ret i32 [[TMP0]]182//183int32_t test_vmlsdavaxq_s16(int32_t a, int16x8_t b, int16x8_t c) {184#ifdef POLYMORPHIC185  return vmlsdavaxq(a, b, c);186#else187  return vmlsdavaxq_s16(a, b, c);188#endif189}190 191// CHECK-LABEL: @test_vmlsdavaxq_s32(192// CHECK-NEXT:  entry:193// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 0, i32 1, i32 1, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])194// CHECK-NEXT:    ret i32 [[TMP0]]195//196int32_t test_vmlsdavaxq_s32(int32_t a, int32x4_t b, int32x4_t c) {197#ifdef POLYMORPHIC198  return vmlsdavaxq(a, b, c);199#else200  return vmlsdavaxq_s32(a, b, c);201#endif202}203 204// CHECK-LABEL: @test_vmladavaq_p_s8(205// CHECK-NEXT:  entry:206// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32207// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])208// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]], <16 x i1> [[TMP1]])209// CHECK-NEXT:    ret i32 [[TMP2]]210//211int32_t test_vmladavaq_p_s8(int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) {212#ifdef POLYMORPHIC213  return vmladavaq_p(a, b, c, p);214#else215  return vmladavaq_p_s8(a, b, c, p);216#endif217}218 219// CHECK-LABEL: @test_vmladavaq_p_s16(220// CHECK-NEXT:  entry:221// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32222// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])223// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]], <8 x i1> [[TMP1]])224// CHECK-NEXT:    ret i32 [[TMP2]]225//226int32_t test_vmladavaq_p_s16(int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) {227#ifdef POLYMORPHIC228  return vmladavaq_p(a, b, c, p);229#else230  return vmladavaq_p_s16(a, b, c, p);231#endif232}233 234// CHECK-LABEL: @test_vmladavaq_p_s32(235// CHECK-NEXT:  entry:236// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32237// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])238// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 0, i32 0, i32 0, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]], <4 x i1> [[TMP1]])239// CHECK-NEXT:    ret i32 [[TMP2]]240//241int32_t test_vmladavaq_p_s32(int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) {242#ifdef POLYMORPHIC243  return vmladavaq_p(a, b, c, p);244#else245  return vmladavaq_p_s32(a, b, c, p);246#endif247}248 249// CHECK-LABEL: @test_vmladavaq_p_u8(250// CHECK-NEXT:  entry:251// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32252// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])253// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 1, i32 0, i32 0, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]], <16 x i1> [[TMP1]])254// CHECK-NEXT:    ret i32 [[TMP2]]255//256uint32_t test_vmladavaq_p_u8(uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p) {257#ifdef POLYMORPHIC258  return vmladavaq_p(a, b, c, p);259#else260  return vmladavaq_p_u8(a, b, c, p);261#endif262}263 264// CHECK-LABEL: @test_vmladavaq_p_u16(265// CHECK-NEXT:  entry:266// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32267// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])268// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 1, i32 0, i32 0, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]], <8 x i1> [[TMP1]])269// CHECK-NEXT:    ret i32 [[TMP2]]270//271uint32_t test_vmladavaq_p_u16(uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) {272#ifdef POLYMORPHIC273  return vmladavaq_p(a, b, c, p);274#else275  return vmladavaq_p_u16(a, b, c, p);276#endif277}278 279// CHECK-LABEL: @test_vmladavaq_p_u32(280// CHECK-NEXT:  entry:281// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32282// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])283// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 1, i32 0, i32 0, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]], <4 x i1> [[TMP1]])284// CHECK-NEXT:    ret i32 [[TMP2]]285//286uint32_t test_vmladavaq_p_u32(uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) {287#ifdef POLYMORPHIC288  return vmladavaq_p(a, b, c, p);289#else290  return vmladavaq_p_u32(a, b, c, p);291#endif292}293 294// CHECK-LABEL: @test_vmladavaxq_p_s8(295// CHECK-NEXT:  entry:296// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32297// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])298// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 1, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]], <16 x i1> [[TMP1]])299// CHECK-NEXT:    ret i32 [[TMP2]]300//301int32_t test_vmladavaxq_p_s8(int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) {302#ifdef POLYMORPHIC303  return vmladavaxq_p(a, b, c, p);304#else305  return vmladavaxq_p_s8(a, b, c, p);306#endif307}308 309// CHECK-LABEL: @test_vmladavaxq_p_s16(310// CHECK-NEXT:  entry:311// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32312// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])313// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 1, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]], <8 x i1> [[TMP1]])314// CHECK-NEXT:    ret i32 [[TMP2]]315//316int32_t test_vmladavaxq_p_s16(int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) {317#ifdef POLYMORPHIC318  return vmladavaxq_p(a, b, c, p);319#else320  return vmladavaxq_p_s16(a, b, c, p);321#endif322}323 324// CHECK-LABEL: @test_vmladavaxq_p_s32(325// CHECK-NEXT:  entry:326// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32327// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])328// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 0, i32 0, i32 1, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]], <4 x i1> [[TMP1]])329// CHECK-NEXT:    ret i32 [[TMP2]]330//331int32_t test_vmladavaxq_p_s32(int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) {332#ifdef POLYMORPHIC333  return vmladavaxq_p(a, b, c, p);334#else335  return vmladavaxq_p_s32(a, b, c, p);336#endif337}338 339// CHECK-LABEL: @test_vmlsdavaq_p_s8(340// CHECK-NEXT:  entry:341// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32342// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])343// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 1, i32 0, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]], <16 x i1> [[TMP1]])344// CHECK-NEXT:    ret i32 [[TMP2]]345//346int32_t test_vmlsdavaq_p_s8(int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) {347#ifdef POLYMORPHIC348  return vmlsdavaq_p(a, b, c, p);349#else350  return vmlsdavaq_p_s8(a, b, c, p);351#endif352}353 354// CHECK-LABEL: @test_vmlsdavaq_p_s16(355// CHECK-NEXT:  entry:356// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32357// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])358// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 1, i32 0, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]], <8 x i1> [[TMP1]])359// CHECK-NEXT:    ret i32 [[TMP2]]360//361int32_t test_vmlsdavaq_p_s16(int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) {362#ifdef POLYMORPHIC363  return vmlsdavaq_p(a, b, c, p);364#else365  return vmlsdavaq_p_s16(a, b, c, p);366#endif367}368 369// CHECK-LABEL: @test_vmlsdavaq_p_s32(370// CHECK-NEXT:  entry:371// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32372// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])373// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 0, i32 1, i32 0, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]], <4 x i1> [[TMP1]])374// CHECK-NEXT:    ret i32 [[TMP2]]375//376int32_t test_vmlsdavaq_p_s32(int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) {377#ifdef POLYMORPHIC378  return vmlsdavaq_p(a, b, c, p);379#else380  return vmlsdavaq_p_s32(a, b, c, p);381#endif382}383 384// CHECK-LABEL: @test_vmlsdavaxq_p_s8(385// CHECK-NEXT:  entry:386// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32387// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])388// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 1, i32 1, i32 [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]], <16 x i1> [[TMP1]])389// CHECK-NEXT:    ret i32 [[TMP2]]390//391int32_t test_vmlsdavaxq_p_s8(int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) {392#ifdef POLYMORPHIC393  return vmlsdavaxq_p(a, b, c, p);394#else395  return vmlsdavaxq_p_s8(a, b, c, p);396#endif397}398 399// CHECK-LABEL: @test_vmlsdavaxq_p_s16(400// CHECK-NEXT:  entry:401// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32402// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])403// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 1, i32 1, i32 [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]], <8 x i1> [[TMP1]])404// CHECK-NEXT:    ret i32 [[TMP2]]405//406int32_t test_vmlsdavaxq_p_s16(int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) {407#ifdef POLYMORPHIC408  return vmlsdavaxq_p(a, b, c, p);409#else410  return vmlsdavaxq_p_s16(a, b, c, p);411#endif412}413 414// CHECK-LABEL: @test_vmlsdavaxq_p_s32(415// CHECK-NEXT:  entry:416// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32417// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])418// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 0, i32 1, i32 1, i32 [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]], <4 x i1> [[TMP1]])419// CHECK-NEXT:    ret i32 [[TMP2]]420//421int32_t test_vmlsdavaxq_p_s32(int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) {422#ifdef POLYMORPHIC423  return vmlsdavaxq_p(a, b, c, p);424#else425  return vmlsdavaxq_p_s32(a, b, c, p);426#endif427}428 429// CHECK-LABEL: @test_vmladavq_s8(430// CHECK-NEXT:  entry:431// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 0, i32 0, i32 0, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]])432// CHECK-NEXT:    ret i32 [[TMP0]]433//434int32_t test_vmladavq_s8(int8x16_t a, int8x16_t b) {435#ifdef POLYMORPHIC436  return vmladavq(a, b);437#else438  return vmladavq_s8(a, b);439#endif440}441 442// CHECK-LABEL: @test_vmladavq_s16(443// CHECK-NEXT:  entry:444// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 0, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]])445// CHECK-NEXT:    ret i32 [[TMP0]]446//447int32_t test_vmladavq_s16(int16x8_t a, int16x8_t b) {448#ifdef POLYMORPHIC449  return vmladavq(a, b);450#else451  return vmladavq_s16(a, b);452#endif453}454 455// CHECK-LABEL: @test_vmladavq_s32(456// CHECK-NEXT:  entry:457// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 0, i32 0, i32 0, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])458// CHECK-NEXT:    ret i32 [[TMP0]]459//460int32_t test_vmladavq_s32(int32x4_t a, int32x4_t b) {461#ifdef POLYMORPHIC462  return vmladavq(a, b);463#else464  return vmladavq_s32(a, b);465#endif466}467 468// CHECK-LABEL: @test_vmladavq_u8(469// CHECK-NEXT:  entry:470// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 1, i32 0, i32 0, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]])471// CHECK-NEXT:    ret i32 [[TMP0]]472//473uint32_t test_vmladavq_u8(uint8x16_t a, uint8x16_t b) {474#ifdef POLYMORPHIC475  return vmladavq(a, b);476#else477  return vmladavq_u8(a, b);478#endif479}480 481// CHECK-LABEL: @test_vmladavq_u16(482// CHECK-NEXT:  entry:483// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 1, i32 0, i32 0, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]])484// CHECK-NEXT:    ret i32 [[TMP0]]485//486uint32_t test_vmladavq_u16(uint16x8_t a, uint16x8_t b) {487#ifdef POLYMORPHIC488  return vmladavq(a, b);489#else490  return vmladavq_u16(a, b);491#endif492}493 494// CHECK-LABEL: @test_vmladavq_u32(495// CHECK-NEXT:  entry:496// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 1, i32 0, i32 0, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])497// CHECK-NEXT:    ret i32 [[TMP0]]498//499uint32_t test_vmladavq_u32(uint32x4_t a, uint32x4_t b) {500#ifdef POLYMORPHIC501  return vmladavq(a, b);502#else503  return vmladavq_u32(a, b);504#endif505}506 507// CHECK-LABEL: @test_vmladavxq_s8(508// CHECK-NEXT:  entry:509// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 0, i32 0, i32 1, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]])510// CHECK-NEXT:    ret i32 [[TMP0]]511//512int32_t test_vmladavxq_s8(int8x16_t a, int8x16_t b) {513#ifdef POLYMORPHIC514  return vmladavxq(a, b);515#else516  return vmladavxq_s8(a, b);517#endif518}519 520// CHECK-LABEL: @test_vmladavxq_s16(521// CHECK-NEXT:  entry:522// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 0, i32 1, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]])523// CHECK-NEXT:    ret i32 [[TMP0]]524//525int32_t test_vmladavxq_s16(int16x8_t a, int16x8_t b) {526#ifdef POLYMORPHIC527  return vmladavxq(a, b);528#else529  return vmladavxq_s16(a, b);530#endif531}532 533// CHECK-LABEL: @test_vmladavxq_s32(534// CHECK-NEXT:  entry:535// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 0, i32 0, i32 1, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])536// CHECK-NEXT:    ret i32 [[TMP0]]537//538int32_t test_vmladavxq_s32(int32x4_t a, int32x4_t b) {539#ifdef POLYMORPHIC540  return vmladavxq(a, b);541#else542  return vmladavxq_s32(a, b);543#endif544}545 546// CHECK-LABEL: @test_vmlsdavq_s8(547// CHECK-NEXT:  entry:548// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 0, i32 1, i32 0, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]])549// CHECK-NEXT:    ret i32 [[TMP0]]550//551int32_t test_vmlsdavq_s8(int8x16_t a, int8x16_t b) {552#ifdef POLYMORPHIC553  return vmlsdavq(a, b);554#else555  return vmlsdavq_s8(a, b);556#endif557}558 559// CHECK-LABEL: @test_vmlsdavq_s16(560// CHECK-NEXT:  entry:561// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 1, i32 0, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]])562// CHECK-NEXT:    ret i32 [[TMP0]]563//564int32_t test_vmlsdavq_s16(int16x8_t a, int16x8_t b) {565#ifdef POLYMORPHIC566  return vmlsdavq(a, b);567#else568  return vmlsdavq_s16(a, b);569#endif570}571 572// CHECK-LABEL: @test_vmlsdavq_s32(573// CHECK-NEXT:  entry:574// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 0, i32 1, i32 0, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])575// CHECK-NEXT:    ret i32 [[TMP0]]576//577int32_t test_vmlsdavq_s32(int32x4_t a, int32x4_t b) {578#ifdef POLYMORPHIC579  return vmlsdavq(a, b);580#else581  return vmlsdavq_s32(a, b);582#endif583}584 585// CHECK-LABEL: @test_vmlsdavxq_s8(586// CHECK-NEXT:  entry:587// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v16i8(i32 0, i32 1, i32 1, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]])588// CHECK-NEXT:    ret i32 [[TMP0]]589//590int32_t test_vmlsdavxq_s8(int8x16_t a, int8x16_t b) {591#ifdef POLYMORPHIC592  return vmlsdavxq(a, b);593#else594  return vmlsdavxq_s8(a, b);595#endif596}597 598// CHECK-LABEL: @test_vmlsdavxq_s16(599// CHECK-NEXT:  entry:600// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v8i16(i32 0, i32 1, i32 1, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]])601// CHECK-NEXT:    ret i32 [[TMP0]]602//603int32_t test_vmlsdavxq_s16(int16x8_t a, int16x8_t b) {604#ifdef POLYMORPHIC605  return vmlsdavxq(a, b);606#else607  return vmlsdavxq_s16(a, b);608#endif609}610 611// CHECK-LABEL: @test_vmlsdavxq_s32(612// CHECK-NEXT:  entry:613// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.arm.mve.vmldava.v4i32(i32 0, i32 1, i32 1, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])614// CHECK-NEXT:    ret i32 [[TMP0]]615//616int32_t test_vmlsdavxq_s32(int32x4_t a, int32x4_t b) {617#ifdef POLYMORPHIC618  return vmlsdavxq(a, b);619#else620  return vmlsdavxq_s32(a, b);621#endif622}623 624// CHECK-LABEL: @test_vmladavq_p_s8(625// CHECK-NEXT:  entry:626// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32627// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])628// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 0, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]])629// CHECK-NEXT:    ret i32 [[TMP2]]630//631int32_t test_vmladavq_p_s8(int8x16_t a, int8x16_t b, mve_pred16_t p) {632#ifdef POLYMORPHIC633  return vmladavq_p(a, b, p);634#else635  return vmladavq_p_s8(a, b, p);636#endif637}638 639// CHECK-LABEL: @test_vmladavq_p_s16(640// CHECK-NEXT:  entry:641// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32642// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])643// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 0, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]])644// CHECK-NEXT:    ret i32 [[TMP2]]645//646int32_t test_vmladavq_p_s16(int16x8_t a, int16x8_t b, mve_pred16_t p) {647#ifdef POLYMORPHIC648  return vmladavq_p(a, b, p);649#else650  return vmladavq_p_s16(a, b, p);651#endif652}653 654// CHECK-LABEL: @test_vmladavq_p_s32(655// CHECK-NEXT:  entry:656// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32657// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])658// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 0, i32 0, i32 0, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]])659// CHECK-NEXT:    ret i32 [[TMP2]]660//661int32_t test_vmladavq_p_s32(int32x4_t a, int32x4_t b, mve_pred16_t p) {662#ifdef POLYMORPHIC663  return vmladavq_p(a, b, p);664#else665  return vmladavq_p_s32(a, b, p);666#endif667}668 669// CHECK-LABEL: @test_vmladavq_p_u8(670// CHECK-NEXT:  entry:671// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32672// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])673// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 1, i32 0, i32 0, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]])674// CHECK-NEXT:    ret i32 [[TMP2]]675//676uint32_t test_vmladavq_p_u8(uint8x16_t a, uint8x16_t b, mve_pred16_t p) {677#ifdef POLYMORPHIC678  return vmladavq_p(a, b, p);679#else680  return vmladavq_p_u8(a, b, p);681#endif682}683 684// CHECK-LABEL: @test_vmladavq_p_u16(685// CHECK-NEXT:  entry:686// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32687// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])688// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 1, i32 0, i32 0, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]])689// CHECK-NEXT:    ret i32 [[TMP2]]690//691uint32_t test_vmladavq_p_u16(uint16x8_t a, uint16x8_t b, mve_pred16_t p) {692#ifdef POLYMORPHIC693  return vmladavq_p(a, b, p);694#else695  return vmladavq_p_u16(a, b, p);696#endif697}698 699// CHECK-LABEL: @test_vmladavq_p_u32(700// CHECK-NEXT:  entry:701// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32702// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])703// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 1, i32 0, i32 0, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]])704// CHECK-NEXT:    ret i32 [[TMP2]]705//706uint32_t test_vmladavq_p_u32(uint32x4_t a, uint32x4_t b, mve_pred16_t p) {707#ifdef POLYMORPHIC708  return vmladavq_p(a, b, p);709#else710  return vmladavq_p_u32(a, b, p);711#endif712}713 714// CHECK-LABEL: @test_vmladavxq_p_s8(715// CHECK-NEXT:  entry:716// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32717// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])718// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 0, i32 1, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]])719// CHECK-NEXT:    ret i32 [[TMP2]]720//721int32_t test_vmladavxq_p_s8(int8x16_t a, int8x16_t b, mve_pred16_t p) {722#ifdef POLYMORPHIC723  return vmladavxq_p(a, b, p);724#else725  return vmladavxq_p_s8(a, b, p);726#endif727}728 729// CHECK-LABEL: @test_vmladavxq_p_s16(730// CHECK-NEXT:  entry:731// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32732// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])733// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 0, i32 1, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]])734// CHECK-NEXT:    ret i32 [[TMP2]]735//736int32_t test_vmladavxq_p_s16(int16x8_t a, int16x8_t b, mve_pred16_t p) {737#ifdef POLYMORPHIC738  return vmladavxq_p(a, b, p);739#else740  return vmladavxq_p_s16(a, b, p);741#endif742}743 744// CHECK-LABEL: @test_vmladavxq_p_s32(745// CHECK-NEXT:  entry:746// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32747// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])748// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 0, i32 0, i32 1, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]])749// CHECK-NEXT:    ret i32 [[TMP2]]750//751int32_t test_vmladavxq_p_s32(int32x4_t a, int32x4_t b, mve_pred16_t p) {752#ifdef POLYMORPHIC753  return vmladavxq_p(a, b, p);754#else755  return vmladavxq_p_s32(a, b, p);756#endif757}758 759// CHECK-LABEL: @test_vmlsdavq_p_s8(760// CHECK-NEXT:  entry:761// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32762// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])763// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 1, i32 0, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]])764// CHECK-NEXT:    ret i32 [[TMP2]]765//766int32_t test_vmlsdavq_p_s8(int8x16_t a, int8x16_t b, mve_pred16_t p) {767#ifdef POLYMORPHIC768  return vmlsdavq_p(a, b, p);769#else770  return vmlsdavq_p_s8(a, b, p);771#endif772}773 774// CHECK-LABEL: @test_vmlsdavq_p_s16(775// CHECK-NEXT:  entry:776// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32777// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])778// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 1, i32 0, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]])779// CHECK-NEXT:    ret i32 [[TMP2]]780//781int32_t test_vmlsdavq_p_s16(int16x8_t a, int16x8_t b, mve_pred16_t p) {782#ifdef POLYMORPHIC783  return vmlsdavq_p(a, b, p);784#else785  return vmlsdavq_p_s16(a, b, p);786#endif787}788 789// CHECK-LABEL: @test_vmlsdavq_p_s32(790// CHECK-NEXT:  entry:791// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32792// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])793// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 0, i32 1, i32 0, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]])794// CHECK-NEXT:    ret i32 [[TMP2]]795//796int32_t test_vmlsdavq_p_s32(int32x4_t a, int32x4_t b, mve_pred16_t p) {797#ifdef POLYMORPHIC798  return vmlsdavq_p(a, b, p);799#else800  return vmlsdavq_p_s32(a, b, p);801#endif802}803 804// CHECK-LABEL: @test_vmlsdavxq_p_s8(805// CHECK-NEXT:  entry:806// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32807// CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])808// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v16i8.v16i1(i32 0, i32 1, i32 1, i32 0, <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]])809// CHECK-NEXT:    ret i32 [[TMP2]]810//811int32_t test_vmlsdavxq_p_s8(int8x16_t a, int8x16_t b, mve_pred16_t p) {812#ifdef POLYMORPHIC813  return vmlsdavxq_p(a, b, p);814#else815  return vmlsdavxq_p_s8(a, b, p);816#endif817}818 819// CHECK-LABEL: @test_vmlsdavxq_p_s16(820// CHECK-NEXT:  entry:821// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32822// CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])823// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v8i16.v8i1(i32 0, i32 1, i32 1, i32 0, <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]])824// CHECK-NEXT:    ret i32 [[TMP2]]825//826int32_t test_vmlsdavxq_p_s16(int16x8_t a, int16x8_t b, mve_pred16_t p) {827#ifdef POLYMORPHIC828  return vmlsdavxq_p(a, b, p);829#else830  return vmlsdavxq_p_s16(a, b, p);831#endif832}833 834// CHECK-LABEL: @test_vmlsdavxq_p_s32(835// CHECK-NEXT:  entry:836// CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32837// CHECK-NEXT:    [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])838// CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.arm.mve.vmldava.predicated.v4i32.v4i1(i32 0, i32 1, i32 1, i32 0, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]])839// CHECK-NEXT:    ret i32 [[TMP2]]840//841int32_t test_vmlsdavxq_p_s32(int32x4_t a, int32x4_t b, mve_pred16_t p) {842#ifdef POLYMORPHIC843  return vmlsdavxq_p(a, b, p);844#else845  return vmlsdavxq_p_s32(a, b, p);846#endif847}848