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1// REQUIRES: arm-registered-target2// RUN: %clang_cc1 -triple thumbv7-apple-darwin \3// RUN: -disable-O0-optnone \4// RUN: -target-cpu cortex-a8 \5// RUN: -ffreestanding \6// RUN: -emit-llvm -w -o - %s | opt -S -passes=mem2reg | FileCheck %s7 8#include <arm_neon.h>9 10uint8x8_t test_shift_vshr(uint8x8_t a) {11 // CHECK-LABEL: test_shift_vshr12 // CHECK: %{{.*}} = lshr <8 x i8> %a, splat (i8 5)13 return vshr_n_u8(a, 5);14}15 16int8x8_t test_shift_vshr_smax(int8x8_t a) {17 // CHECK-LABEL: test_shift_vshr_smax18 // CHECK: %{{.*}} = ashr <8 x i8> %a, splat (i8 7)19 return vshr_n_s8(a, 8);20}21 22uint8x8_t test_shift_vshr_umax(uint8x8_t a) {23 // CHECK-LABEL: test_shift_vshr_umax24 // CHECK: ret <8 x i8> zeroinitializer25 return vshr_n_u8(a, 8);26}27 28uint8x8_t test_shift_vsra(uint8x8_t a, uint8x8_t b) {29 // CHECK-LABEL: test_shift_vsra30 // CHECK: %[[SHR:.*]] = lshr <8 x i8> %b, splat (i8 5)31 // CHECK: %{{.*}} = add <8 x i8> %a, %[[SHR]]32 return vsra_n_u8(a, b, 5);33}34 35int8x8_t test_shift_vsra_smax(int8x8_t a, int8x8_t b) {36 // CHECK-LABEL: test_shift_vsra_smax37 // CHECK: %[[SHR:.*]] = ashr <8 x i8> %b, splat (i8 7)38 // CHECK: %{{.*}} = add <8 x i8> %a, %[[SHR]]39 return vsra_n_s8(a, b, 8);40}41 42uint8x8_t test_shift_vsra_umax(uint8x8_t a, uint8x8_t b) {43 // CHECK-LABEL: test_shift_vsra_umax44 // CHECK: [[RES:%.*]] = add <8 x i8> %a, zeroinitializer45 // CHECK: ret <8 x i8> [[RES]]46 return vsra_n_u8(a, b, 8);47}48