216 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature2// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg,sroa | FileCheck %s3 4// REQUIRES: aarch64-registered-target || arm-registered-target5 6#include <arm_neon.h>7 8// CHECK-LABEL: define {{[^@]+}}@test_vcvta_s32_f329// CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {10// CHECK-NEXT: entry:11// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>12// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>13// CHECK-NEXT: [[VCVTA_S32_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>14// CHECK-NEXT: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> [[VCVTA_S32_V_I]])15// CHECK-NEXT: ret <2 x i32> [[VCVTA_S32_V1_I]]16//17int32x2_t test_vcvta_s32_f32(float32x2_t a) {18 return vcvta_s32_f32(a);19}20 21// CHECK-LABEL: define {{[^@]+}}@test_vcvta_u32_f3222// CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {23// CHECK-NEXT: entry:24// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>25// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>26// CHECK-NEXT: [[VCVTA_U32_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>27// CHECK-NEXT: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> [[VCVTA_U32_V_I]])28// CHECK-NEXT: ret <2 x i32> [[VCVTA_U32_V1_I]]29//30uint32x2_t test_vcvta_u32_f32(float32x2_t a) {31 return vcvta_u32_f32(a);32}33 34// CHECK-LABEL: define {{[^@]+}}@test_vcvtaq_s32_f3235// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {36// CHECK-NEXT: entry:37// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>38// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>39// CHECK-NEXT: [[VCVTAQ_S32_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>40// CHECK-NEXT: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> [[VCVTAQ_S32_V_I]])41// CHECK-NEXT: ret <4 x i32> [[VCVTAQ_S32_V1_I]]42//43int32x4_t test_vcvtaq_s32_f32(float32x4_t a) {44 return vcvtaq_s32_f32(a);45}46 47// CHECK-LABEL: define {{[^@]+}}@test_vcvtaq_u32_f3248// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {49// CHECK-NEXT: entry:50// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>51// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>52// CHECK-NEXT: [[VCVTAQ_U32_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>53// CHECK-NEXT: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> [[VCVTAQ_U32_V_I]])54// CHECK-NEXT: ret <4 x i32> [[VCVTAQ_U32_V1_I]]55//56uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) {57 return vcvtaq_u32_f32(a);58}59 60// CHECK-LABEL: define {{[^@]+}}@test_vcvtn_s32_f3261// CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {62// CHECK-NEXT: entry:63// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>64// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>65// CHECK-NEXT: [[VCVTN_S32_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>66// CHECK-NEXT: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> [[VCVTN_S32_V_I]])67// CHECK-NEXT: ret <2 x i32> [[VCVTN_S32_V1_I]]68//69int32x2_t test_vcvtn_s32_f32(float32x2_t a) {70 return vcvtn_s32_f32(a);71}72 73// CHECK-LABEL: define {{[^@]+}}@test_vcvtn_u32_f3274// CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {75// CHECK-NEXT: entry:76// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>77// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>78// CHECK-NEXT: [[VCVTN_U32_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>79// CHECK-NEXT: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> [[VCVTN_U32_V_I]])80// CHECK-NEXT: ret <2 x i32> [[VCVTN_U32_V1_I]]81//82uint32x2_t test_vcvtn_u32_f32(float32x2_t a) {83 return vcvtn_u32_f32(a);84}85 86// CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_s32_f3287// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {88// CHECK-NEXT: entry:89// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>90// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>91// CHECK-NEXT: [[VCVTNQ_S32_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>92// CHECK-NEXT: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> [[VCVTNQ_S32_V_I]])93// CHECK-NEXT: ret <4 x i32> [[VCVTNQ_S32_V1_I]]94//95int32x4_t test_vcvtnq_s32_f32(float32x4_t a) {96 return vcvtnq_s32_f32(a);97}98 99// CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_u32_f32100// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {101// CHECK-NEXT: entry:102// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>103// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>104// CHECK-NEXT: [[VCVTNQ_U32_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>105// CHECK-NEXT: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> [[VCVTNQ_U32_V_I]])106// CHECK-NEXT: ret <4 x i32> [[VCVTNQ_U32_V1_I]]107//108uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) {109 return vcvtnq_u32_f32(a);110}111 112// CHECK-LABEL: define {{[^@]+}}@test_vcvtp_s32_f32113// CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {114// CHECK-NEXT: entry:115// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>116// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>117// CHECK-NEXT: [[VCVTP_S32_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>118// CHECK-NEXT: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> [[VCVTP_S32_V_I]])119// CHECK-NEXT: ret <2 x i32> [[VCVTP_S32_V1_I]]120//121int32x2_t test_vcvtp_s32_f32(float32x2_t a) {122 return vcvtp_s32_f32(a);123}124 125// CHECK-LABEL: define {{[^@]+}}@test_vcvtp_u32_f32126// CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {127// CHECK-NEXT: entry:128// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>129// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>130// CHECK-NEXT: [[VCVTP_U32_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>131// CHECK-NEXT: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> [[VCVTP_U32_V_I]])132// CHECK-NEXT: ret <2 x i32> [[VCVTP_U32_V1_I]]133//134uint32x2_t test_vcvtp_u32_f32(float32x2_t a) {135 return vcvtp_u32_f32(a);136}137 138// CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_s32_f32139// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {140// CHECK-NEXT: entry:141// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>142// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>143// CHECK-NEXT: [[VCVTPQ_S32_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>144// CHECK-NEXT: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> [[VCVTPQ_S32_V_I]])145// CHECK-NEXT: ret <4 x i32> [[VCVTPQ_S32_V1_I]]146//147int32x4_t test_vcvtpq_s32_f32(float32x4_t a) {148 return vcvtpq_s32_f32(a);149}150 151// CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_u32_f32152// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {153// CHECK-NEXT: entry:154// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>155// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>156// CHECK-NEXT: [[VCVTPQ_U32_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>157// CHECK-NEXT: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> [[VCVTPQ_U32_V_I]])158// CHECK-NEXT: ret <4 x i32> [[VCVTPQ_U32_V1_I]]159//160uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) {161 return vcvtpq_u32_f32(a);162}163 164// CHECK-LABEL: define {{[^@]+}}@test_vcvtm_s32_f32165// CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {166// CHECK-NEXT: entry:167// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>168// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>169// CHECK-NEXT: [[VCVTM_S32_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>170// CHECK-NEXT: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> [[VCVTM_S32_V_I]])171// CHECK-NEXT: ret <2 x i32> [[VCVTM_S32_V1_I]]172//173int32x2_t test_vcvtm_s32_f32(float32x2_t a) {174 return vcvtm_s32_f32(a);175}176 177// CHECK-LABEL: define {{[^@]+}}@test_vcvtm_u32_f32178// CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {179// CHECK-NEXT: entry:180// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <2 x i32>181// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[TMP0]] to <8 x i8>182// CHECK-NEXT: [[VCVTM_U32_V_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>183// CHECK-NEXT: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> [[VCVTM_U32_V_I]])184// CHECK-NEXT: ret <2 x i32> [[VCVTM_U32_V1_I]]185//186uint32x2_t test_vcvtm_u32_f32(float32x2_t a) {187 return vcvtm_u32_f32(a);188}189 190// CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_s32_f32191// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {192// CHECK-NEXT: entry:193// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>194// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>195// CHECK-NEXT: [[VCVTMQ_S32_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>196// CHECK-NEXT: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> [[VCVTMQ_S32_V_I]])197// CHECK-NEXT: ret <4 x i32> [[VCVTMQ_S32_V1_I]]198//199int32x4_t test_vcvtmq_s32_f32(float32x4_t a) {200 return vcvtmq_s32_f32(a);201}202 203// CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_u32_f32204// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {205// CHECK-NEXT: entry:206// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <4 x i32>207// CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>208// CHECK-NEXT: [[VCVTMQ_U32_V_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>209// CHECK-NEXT: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> [[VCVTMQ_U32_V_I]])210// CHECK-NEXT: ret <4 x i32> [[VCVTMQ_U32_V1_I]]211//212uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) {213 return vcvtmq_u32_f32(a);214}215 216