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1// RUN: %clang_cc1 %s -emit-llvm -o - -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 | FileCheck %s2// REQUIRES: x86-registered-target3 4// Also test serialization of atomic operations here, to avoid duplicating the5// test.6// RUN: %clang_cc1 %s -emit-pch -o %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin97// RUN: %clang_cc1 %s -include-pch %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 -emit-llvm -o - | FileCheck %s8#ifndef ALREADY_INCLUDED9#define ALREADY_INCLUDED10 11#include <stdatomic.h>12 13// Basic IRGen tests for __c11_atomic_* and GNU __atomic_*14 15int fi1(_Atomic(int) *i) {16  // CHECK-LABEL: @fi117  // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 418  return __c11_atomic_load(i, memory_order_seq_cst);19}20 21int fi1a(int *i) {22  // CHECK-LABEL: @fi1a23  // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 424  int v;25  __atomic_load(i, &v, memory_order_seq_cst);26  return v;27}28 29int fi1b(int *i) {30  // CHECK-LABEL: @fi1b31  // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 432  return __atomic_load_n(i, memory_order_seq_cst);33}34 35int fi1c(atomic_int *i) {36  // CHECK-LABEL: @fi1c37  // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 438  return atomic_load(i);39}40 41void fi2(_Atomic(int) *i) {42  // CHECK-LABEL: @fi243  // CHECK: store atomic i32 {{.*}} seq_cst, align 444  __c11_atomic_store(i, 1, memory_order_seq_cst);45}46 47void fi2a(int *i) {48  // CHECK-LABEL: @fi2a49  // CHECK: store atomic i32 {{.*}} seq_cst, align 450  int v = 1;51  __atomic_store(i, &v, memory_order_seq_cst);52}53 54void fi2b(int *i) {55  // CHECK-LABEL: @fi2b56  // CHECK: store atomic i32 {{.*}} seq_cst, align 457  __atomic_store_n(i, 1, memory_order_seq_cst);58}59 60void fi2c(atomic_int *i) {61  // CHECK-LABEL: @fi2c62  // CHECK: store atomic i32 {{.*}} seq_cst, align 463  atomic_store(i, 1);64}65 66int fi3(_Atomic(int) *i) {67  // CHECK-LABEL: @fi368  // CHECK: atomicrmw and {{.*}} seq_cst, align 469  // CHECK-NOT: and70  return __c11_atomic_fetch_and(i, 1, memory_order_seq_cst);71}72 73int fi3a(int *i) {74  // CHECK-LABEL: @fi3a75  // CHECK: atomicrmw xor {{.*}} seq_cst, align 476  // CHECK-NOT: xor77  return __atomic_fetch_xor(i, 1, memory_order_seq_cst);78}79 80int fi3b(int *i) {81  // CHECK-LABEL: @fi3b82  // CHECK: atomicrmw add {{.*}} seq_cst, align 483  // CHECK: add84  return __atomic_add_fetch(i, 1, memory_order_seq_cst);85}86 87int fi3c(int *i) {88  // CHECK-LABEL: @fi3c89  // CHECK: atomicrmw nand {{.*}} seq_cst, align 490  // CHECK-NOT: and91  return __atomic_fetch_nand(i, 1, memory_order_seq_cst);92}93 94int fi3d(int *i) {95  // CHECK-LABEL: @fi3d96  // CHECK: atomicrmw nand {{.*}} seq_cst, align 497  // CHECK: and98  // CHECK: xor99  return __atomic_nand_fetch(i, 1, memory_order_seq_cst);100}101 102int fi3e(atomic_int *i) {103  // CHECK-LABEL: @fi3e104  // CHECK: atomicrmw or {{.*}} seq_cst, align 4105  // CHECK-NOT: {{ or }}106  return atomic_fetch_or(i, 1);107}108 109int fi3f(int *i) {110  // CHECK-LABEL: @fi3f111  // CHECK-NOT: store volatile112  // CHECK: atomicrmw or {{.*}} seq_cst, align 4113  // CHECK-NOT: {{ or }}114  return __atomic_fetch_or(i, (short)1, memory_order_seq_cst);115}116 117_Bool fi4(_Atomic(int) *i) {118  // CHECK-LABEL: @fi4(119  // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg ptr [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] acquire acquire, align 4120  // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0121  // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1122  // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]123  // CHECK: store i32 [[OLD]]124  int cmp = 0;125  return __c11_atomic_compare_exchange_strong(i, &cmp, 1, memory_order_acquire, memory_order_acquire);126}127 128_Bool fi4a(int *i) {129  // CHECK-LABEL: @fi4a130  // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg ptr [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] acquire acquire, align 4131  // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0132  // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1133  // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]134  // CHECK: store i32 [[OLD]]135  int cmp = 0;136  int desired = 1;137  return __atomic_compare_exchange(i, &cmp, &desired, 0, memory_order_acquire, memory_order_acquire);138}139 140_Bool fi4b(int *i) {141  // CHECK-LABEL: @fi4b(142  // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg weak ptr [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] acquire acquire, align 4143  // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0144  // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1145  // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]146  // CHECK: store i32 [[OLD]]147  int cmp = 0;148  return __atomic_compare_exchange_n(i, &cmp, 1, 1, memory_order_acquire, memory_order_acquire);149}150 151_Bool fi4c(atomic_int *i) {152  // CHECK-LABEL: @fi4c153  // CHECK: cmpxchg ptr {{.*}} seq_cst seq_cst, align 4154  int cmp = 0;155  return atomic_compare_exchange_strong(i, &cmp, 1);156}157 158#define _AS1 __attribute__((address_space(1)))159_Bool fi4d(_Atomic(int) *i, int _AS1 *ptr2) {160  // CHECK-LABEL: @fi4d(161  // CHECK: [[EXPECTED:%[.0-9A-Z_a-z]+]] = load i32, ptr addrspace(1) %{{[0-9]+}}162  // CHECK: cmpxchg ptr %{{[0-9]+}}, i32 [[EXPECTED]], i32 %{{[0-9]+}} acquire acquire, align 4163  return __c11_atomic_compare_exchange_strong(i, ptr2, 1, memory_order_acquire, memory_order_acquire);164}165 166float ff1(_Atomic(float) *d) {167  // CHECK-LABEL: @ff1168  // CHECK: load atomic i32, ptr {{.*}} monotonic, align 4169  return __c11_atomic_load(d, memory_order_relaxed);170}171 172void ff2(_Atomic(float) *d) {173  // CHECK-LABEL: @ff2174  // CHECK: store atomic i32 {{.*}} release, align 4175  __c11_atomic_store(d, 1, memory_order_release);176}177 178float ff3(_Atomic(float) *d) {179  return __c11_atomic_exchange(d, 2, memory_order_seq_cst);180}181 182struct S {183  double x;184};185 186void implicit_store(_Atomic(struct S) *a, struct S s) {187  // CHECK-LABEL: @implicit_store(188  // CHECK: store atomic i64 %{{.*}}, ptr %{{.*}} seq_cst, align 8189  *a = s;190}191 192struct S implicit_load(_Atomic(struct S) *a) {193  // CHECK-LABEL: @implicit_load(194  // CHECK: load atomic i64, ptr %{{.*}} seq_cst, align 8195  return *a;196}197 198struct S fd1(struct S *a) {199  // CHECK-LABEL: @fd1200  // CHECK: [[RETVAL:%.*]] = alloca %struct.S, align 4201  // CHECK: [[TMP1:%.*]] = load atomic i64, ptr {{%.*}} seq_cst, align 4202  // CHECK-NEXT: store i64 [[TMP1]], ptr [[RETVAL]], align 4203  // CHECK: ret204  struct S ret;205  __atomic_load(a, &ret, memory_order_seq_cst);206  return ret;207}208 209void fd2(struct S *a, struct S *b) {210  // CHECK-LABEL: @fd2211  // CHECK:      [[A_ADDR:%.*]] = alloca ptr, align 4212  // CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4213  // CHECK-NEXT: store ptr %a, ptr [[A_ADDR]], align 4214  // CHECK-NEXT: store ptr %b, ptr [[B_ADDR]], align 4215  // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load ptr, ptr [[A_ADDR]], align 4216  // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load ptr, ptr [[B_ADDR]], align 4217  // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, ptr [[LOAD_B_PTR]], align 4218  // CHECK-NEXT: store atomic i64 [[LOAD_B]], ptr [[LOAD_A_PTR]] seq_cst, align 4219  // CHECK-NEXT: ret void220  __atomic_store(a, b, memory_order_seq_cst);221}222 223void fd3(struct S *a, struct S *b, struct S *c) {224  // CHECK-LABEL: @fd3225  // CHECK:      [[A_ADDR:%.*]] = alloca ptr, align 4226  // CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4227  // CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4228  // CHECK-NEXT: store ptr %a, ptr [[A_ADDR]], align 4229  // CHECK-NEXT: store ptr %b, ptr [[B_ADDR]], align 4230  // CHECK-NEXT: store ptr %c, ptr [[C_ADDR]], align 4231  // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load ptr, ptr [[A_ADDR]], align 4232  // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load ptr, ptr [[B_ADDR]], align 4233  // CHECK-NEXT: [[LOAD_C_PTR:%.*]] = load ptr, ptr [[C_ADDR]], align 4234  // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, ptr [[LOAD_B_PTR]], align 4235  // CHECK-NEXT: [[RESULT:%.*]] = atomicrmw xchg ptr [[LOAD_A_PTR]], i64 [[LOAD_B]] seq_cst, align 4236  // CHECK-NEXT: store i64 [[RESULT]], ptr [[LOAD_C_PTR]], align 4237 238  __atomic_exchange(a, b, c, memory_order_seq_cst);239}240 241_Bool fd4(struct S *a, struct S *b, struct S *c) {242  // CHECK-LABEL: @fd4243  // CHECK:      [[A_ADDR:%.*]] = alloca ptr, align 4244  // CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4245  // CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4246  // CHECK:      store ptr %a, ptr [[A_ADDR]], align 4247  // CHECK-NEXT: store ptr %b, ptr [[B_ADDR]], align 4248  // CHECK-NEXT: store ptr %c, ptr [[C_ADDR]], align 4249  // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load ptr, ptr [[A_ADDR]], align 4250  // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load ptr, ptr [[B_ADDR]], align 4251  // CHECK-NEXT: [[LOAD_C_PTR:%.*]] = load ptr, ptr [[C_ADDR]], align 4252  // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, ptr [[LOAD_B_PTR]], align 4253  // CHECK-NEXT: [[LOAD_C:%.*]] = load i64, ptr [[LOAD_C_PTR]], align 4254  // CHECK-NEXT: {{.*}} = cmpxchg weak ptr [[LOAD_A_PTR]], i64 [[LOAD_B]], i64 [[LOAD_C]] seq_cst seq_cst, align 4255  return __atomic_compare_exchange(a, b, c, 1, 5, 5);256}257 258int* fp1(_Atomic(int*) *p) {259  // CHECK-LABEL: @fp1260  // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 4261  return __c11_atomic_load(p, memory_order_seq_cst);262}263 264int* fp2(_Atomic(int*) *p) {265  // CHECK-LABEL: @fp2266  // CHECK: store i32 4267  // CHECK: atomicrmw add {{.*}} monotonic, align 4268  return __c11_atomic_fetch_add(p, 1, memory_order_relaxed);269}270 271int *fp2a(int **p) {272  // CHECK-LABEL: @fp2a273  // CHECK: store i32 4274  // CHECK: atomicrmw sub {{.*}} monotonic, align 4275  // Note, the GNU builtins do not multiply by sizeof(T)!276  return __atomic_fetch_sub(p, 4, memory_order_relaxed);277}278 279_Complex float fc(_Atomic(_Complex float) *c) {280  // CHECK-LABEL: @fc281  // CHECK: atomicrmw xchg ptr {{.*}} seq_cst, align 8282  return __c11_atomic_exchange(c, 2, memory_order_seq_cst);283}284 285typedef struct X { int x; } X;286X fs(_Atomic(X) *c) {287  // CHECK-LABEL: @fs288  // CHECK: atomicrmw xchg ptr {{.*}} seq_cst, align 4289  return __c11_atomic_exchange(c, (X){2}, memory_order_seq_cst);290}291 292X fsa(X *c, X *d) {293  // CHECK-LABEL: @fsa294  // CHECK: atomicrmw xchg ptr {{.*}} seq_cst, align 4295  X ret;296  __atomic_exchange(c, d, &ret, memory_order_seq_cst);297  return ret;298}299 300_Bool fsb(_Bool *c) {301  // CHECK-LABEL: @fsb302  // CHECK: atomicrmw xchg ptr {{.*}} seq_cst, align 1303  return __atomic_exchange_n(c, 1, memory_order_seq_cst);304}305 306char flag1;307volatile char flag2;308void test_and_set(void) {309  // CHECK: atomicrmw xchg ptr @flag1, i8 1 seq_cst, align 1310  __atomic_test_and_set(&flag1, memory_order_seq_cst);311  // CHECK: atomicrmw volatile xchg ptr @flag2, i8 1 acquire, align 1312  __atomic_test_and_set(&flag2, memory_order_acquire);313  // CHECK: store atomic volatile i8 0, ptr @flag2 release, align 1314  __atomic_clear(&flag2, memory_order_release);315  // CHECK: store atomic i8 0, ptr @flag1 seq_cst, align 1316  __atomic_clear(&flag1, memory_order_seq_cst);317}318 319struct Sixteen {320  char c[16];321} sixteen;322struct Seventeen {323  char c[17];324} seventeen;325 326struct Incomplete;327 328int lock_free(struct Incomplete *incomplete) {329  // CHECK-LABEL: @lock_free330 331  // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 3, ptr noundef null)332  __c11_atomic_is_lock_free(3);333 334  // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 16, ptr noundef {{.*}}@sixteen{{.*}})335  __atomic_is_lock_free(16, &sixteen);336 337  // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 17, ptr noundef {{.*}}@seventeen{{.*}})338  __atomic_is_lock_free(17, &seventeen);339 340  // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 4, {{.*}})341  __atomic_is_lock_free(4, incomplete);342 343  char cs[20];344  // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 4, {{.*}})345  __atomic_is_lock_free(4, cs+1);346 347  // CHECK-NOT: call348  __atomic_always_lock_free(3, 0);349  __atomic_always_lock_free(16, 0);350  __atomic_always_lock_free(17, 0);351  __atomic_always_lock_free(16, &sixteen);352  __atomic_always_lock_free(17, &seventeen);353 354  int n;355  __atomic_is_lock_free(4, &n);356 357  // CHECK: ret i32 1358  return __c11_atomic_is_lock_free(sizeof(_Atomic(int)));359}360 361// Tests for atomic operations on big values.  These should call the functions362// defined here:363// http://gcc.gnu.org/wiki/Atomic/GCCMM/LIbrary#The_Library_interface364 365struct foo {366  int big[128];367};368struct bar {369  char c[3];370};371 372struct bar smallThing, thing1, thing2;373struct foo bigThing;374_Atomic(struct foo) bigAtomic;375 376void structAtomicStore(void) {377  // CHECK-LABEL: @structAtomicStore378  struct foo f = {0};379  struct bar b = {0};380  __atomic_store(&smallThing, &b, 5);381  // CHECK: call void @__atomic_store(i32 noundef 3, ptr noundef @smallThing382 383  __atomic_store(&bigThing, &f, 5);384  // CHECK: call void @__atomic_store(i32 noundef 512, ptr noundef @bigThing385}386void structAtomicLoad(void) {387  // CHECK-LABEL: @structAtomicLoad388  struct bar b;389  __atomic_load(&smallThing, &b, 5);390  // CHECK: call void @__atomic_load(i32 noundef 3, ptr noundef  @smallThing391 392  struct foo f = {0};393  __atomic_load(&bigThing, &f, 5);394  // CHECK: call void @__atomic_load(i32 noundef 512, ptr noundef @bigThing395}396struct foo structAtomicExchange(void) {397  // CHECK-LABEL: @structAtomicExchange398  struct foo f = {0};399  struct foo old;400  __atomic_exchange(&f, &bigThing, &old, 5);401  // CHECK: call void @__atomic_exchange(i32 noundef 512, {{.*}}, ptr noundef @bigThing,402 403  return __c11_atomic_exchange(&bigAtomic, f, 5);404  // CHECK: call void @__atomic_exchange(i32 noundef 512, ptr noundef @bigAtomic,405}406int structAtomicCmpExchange(void) {407  // CHECK-LABEL: @structAtomicCmpExchange408  // CHECK: %[[x_mem:.*]] = alloca i8409  _Bool x = __atomic_compare_exchange(&smallThing, &thing1, &thing2, 1, 5, 5);410  // CHECK: %[[call1:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 noundef 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2411  // CHECK: %[[zext1:.*]] = zext i1 %[[call1]] to i8412  // CHECK: store i8 %[[zext1]], ptr %[[x_mem]], align 1413  // CHECK: %[[x:.*]] = load i8, ptr %[[x_mem]]414  // CHECK: %[[x_bool:.*]] = trunc i8 %[[x]] to i1415  // CHECK: %[[conv1:.*]] = zext i1 %[[x_bool]] to i32416 417  struct foo f = {0};418  struct foo g = {0};419  g.big[12] = 12;420  return x & __c11_atomic_compare_exchange_strong(&bigAtomic, &f, g, 5, 5);421  // CHECK: %[[call2:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 noundef 512, ptr noundef @bigAtomic,422  // CHECK: %[[conv2:.*]] = zext i1 %[[call2]] to i32423  // CHECK: %[[and:.*]] = and i32 %[[conv1]], %[[conv2]]424  // CHECK: ret i32 %[[and]]425}426 427// Check that no atomic operations are used in any initialisation of _Atomic428// types.429_Atomic(int) atomic_init_i = 42;430 431// CHECK-LABEL: @atomic_init_foo432void atomic_init_foo(void)433{434  // CHECK-NOT: }435  // CHECK-NOT: atomic436  // CHECK: store437  _Atomic(int) j = 12;438 439  // CHECK-NOT: }440  // CHECK-NOT: atomic441  // CHECK: store442  __c11_atomic_init(&j, 42);443 444  // CHECK-NOT: atomic445  // CHECK: }446}447 448// CHECK-LABEL: @failureOrder449void failureOrder(_Atomic(int) *ptr, int *ptr2) {450  __c11_atomic_compare_exchange_strong(ptr, ptr2, 43, memory_order_acquire, memory_order_relaxed);451  // CHECK: cmpxchg ptr {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} acquire monotonic, align 4452 453  __c11_atomic_compare_exchange_weak(ptr, ptr2, 43, memory_order_seq_cst, memory_order_acquire);454  // CHECK: cmpxchg weak ptr {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} seq_cst acquire, align 4455 456  // Unknown ordering: conservatively pick strongest valid option (for now!).457  __atomic_compare_exchange(ptr2, ptr2, ptr2, 0, memory_order_acq_rel, *ptr2);458  // CHECK: cmpxchg ptr {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} acq_rel acquire, align 4459 460  // Undefined behaviour: don't really care what that last ordering is so leave461  // it out:462  __atomic_compare_exchange_n(ptr2, ptr2, 43, 1, memory_order_seq_cst, 42);463  // CHECK: cmpxchg weak ptr {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} seq_cst {{.*}}, align 4464}465 466// CHECK-LABEL: @generalFailureOrder467void generalFailureOrder(_Atomic(int) *ptr, int *ptr2, int success, int fail) {468  __c11_atomic_compare_exchange_strong(ptr, ptr2, 42, success, fail);469  // CHECK: switch i32 {{.*}}, label %[[MONOTONIC:[0-9a-zA-Z._]+]] [470  // CHECK-NEXT: i32 1, label %[[ACQUIRE:[0-9a-zA-Z._]+]]471  // CHECK-NEXT: i32 2, label %[[ACQUIRE]]472  // CHECK-NEXT: i32 3, label %[[RELEASE:[0-9a-zA-Z._]+]]473  // CHECK-NEXT: i32 4, label %[[ACQREL:[0-9a-zA-Z._]+]]474  // CHECK-NEXT: i32 5, label %[[SEQCST:[0-9a-zA-Z._]+]]475 476  // CHECK: [[MONOTONIC]]477  // CHECK: switch {{.*}}, label %[[MONOTONIC_MONOTONIC:[0-9a-zA-Z._]+]] [478  // CHECK-NEXT: i32 1, label %[[MONOTONIC_ACQUIRE:[0-9a-zA-Z._]+]]479  // CHECK-NEXT: i32 2, label %[[MONOTONIC_ACQUIRE:[0-9a-zA-Z._]+]]480  // CHECK-NEXT: i32 5, label %[[MONOTONIC_SEQCST:[0-9a-zA-Z._]+]]481  // CHECK-NEXT: ]482 483  // CHECK: [[ACQUIRE]]484  // CHECK: switch {{.*}}, label %[[ACQUIRE_MONOTONIC:[0-9a-zA-Z._]+]] [485  // CHECK-NEXT: i32 1, label %[[ACQUIRE_ACQUIRE:[0-9a-zA-Z._]+]]486  // CHECK-NEXT: i32 2, label %[[ACQUIRE_ACQUIRE:[0-9a-zA-Z._]+]]487  // CHECK-NEXT: i32 5, label %[[ACQUIRE_SEQCST:[0-9a-zA-Z._]+]]488  // CHECK-NEXT: ]489 490  // CHECK: [[RELEASE]]491  // CHECK: switch {{.*}}, label %[[RELEASE_MONOTONIC:[0-9a-zA-Z._]+]] [492  // CHECK-NEXT: i32 1, label %[[RELEASE_ACQUIRE:[0-9a-zA-Z._]+]]493  // CHECK-NEXT: i32 2, label %[[RELEASE_ACQUIRE:[0-9a-zA-Z._]+]]494  // CHECK-NEXT: i32 5, label %[[RELEASE_SEQCST:[0-9a-zA-Z._]+]]495  // CHECK-NEXT: ]496 497  // CHECK: [[ACQREL]]498  // CHECK: switch {{.*}}, label %[[ACQREL_MONOTONIC:[0-9a-zA-Z._]+]] [499  // CHECK-NEXT: i32 1, label %[[ACQREL_ACQUIRE:[0-9a-zA-Z._]+]]500  // CHECK-NEXT: i32 2, label %[[ACQREL_ACQUIRE:[0-9a-zA-Z._]+]]501  // CHECK-NEXT: i32 5, label %[[ACQREL_SEQCST:[0-9a-zA-Z._]+]]502  // CHECK-NEXT: ]503 504  // CHECK: [[SEQCST]]505  // CHECK: switch {{.*}}, label %[[SEQCST_MONOTONIC:[0-9a-zA-Z._]+]] [506  // CHECK-NEXT: i32 1, label %[[SEQCST_ACQUIRE:[0-9a-zA-Z._]+]]507  // CHECK-NEXT: i32 2, label %[[SEQCST_ACQUIRE]]508  // CHECK-NEXT: i32 5, label %[[SEQCST_SEQCST:[0-9a-zA-Z._]+]]509  // CHECK-NEXT: ]510 511  // CHECK: [[MONOTONIC_MONOTONIC]]512  // CHECK: cmpxchg {{.*}} monotonic monotonic, align513  // CHECK: br514 515  // CHECK: [[MONOTONIC_ACQUIRE]]516  // CHECK: cmpxchg {{.*}} monotonic acquire, align517  // CHECK: br518 519  // CHECK: [[MONOTONIC_SEQCST]]520  // CHECK: cmpxchg {{.*}} monotonic seq_cst, align521  // CHECK: br522 523  // CHECK: [[ACQUIRE_MONOTONIC]]524  // CHECK: cmpxchg {{.*}} acquire monotonic, align525  // CHECK: br526 527  // CHECK: [[ACQUIRE_ACQUIRE]]528  // CHECK: cmpxchg {{.*}} acquire acquire, align529  // CHECK: br530 531  // CHECK: [[ACQUIRE_SEQCST]]532  // CHECK: cmpxchg {{.*}} acquire seq_cst, align533  // CHECK: br534 535  // CHECK: [[RELEASE_MONOTONIC]]536  // CHECK: cmpxchg {{.*}} release monotonic, align537  // CHECK: br538 539  // CHECK: [[RELEASE_ACQUIRE]]540  // CHECK: cmpxchg {{.*}} release acquire, align541  // CHECK: br542 543  // CHECK: [[RELEASE_SEQCST]]544  // CHECK: cmpxchg {{.*}} release seq_cst, align545  // CHECK: br546 547  // CHECK: [[ACQREL_MONOTONIC]]548  // CHECK: cmpxchg {{.*}} acq_rel monotonic, align549  // CHECK: br550 551  // CHECK: [[ACQREL_ACQUIRE]]552  // CHECK: cmpxchg {{.*}} acq_rel acquire, align553  // CHECK: br554 555  // CHECK: [[ACQREL_SEQCST]]556  // CHECK: cmpxchg {{.*}} acq_rel seq_cst, align557  // CHECK: br558 559  // CHECK: [[SEQCST_MONOTONIC]]560  // CHECK: cmpxchg {{.*}} seq_cst monotonic, align561  // CHECK: br562 563  // CHECK: [[SEQCST_ACQUIRE]]564  // CHECK: cmpxchg {{.*}} seq_cst acquire, align565  // CHECK: br566 567  // CHECK: [[SEQCST_SEQCST]]568  // CHECK: cmpxchg {{.*}} seq_cst seq_cst, align569  // CHECK: br570}571 572void generalWeakness(int *ptr, int *ptr2, _Bool weak) {573  __atomic_compare_exchange_n(ptr, ptr2, 42, weak, memory_order_seq_cst, memory_order_seq_cst);574  // CHECK: switch i1 {{.*}}, label %[[WEAK:[0-9a-zA-Z._]+]] [575  // CHECK-NEXT: i1 false, label %[[STRONG:[0-9a-zA-Z._]+]]576 577  // CHECK: [[STRONG]]578  // CHECK-NOT: br579  // CHECK: cmpxchg {{.*}} seq_cst seq_cst, align580  // CHECK: br581 582  // CHECK: [[WEAK]]583  // CHECK-NOT: br584  // CHECK: cmpxchg weak {{.*}} seq_cst seq_cst, align585  // CHECK: br586 587  __atomic_compare_exchange_n(ptr, ptr2, 42, weak, memory_order_release, memory_order_acquire);588  // CHECK: switch i1 {{.*}}, label %[[WEAK:[0-9a-zA-Z._]+]] [589  // CHECK-NEXT: i1 false, label %[[STRONG:[0-9a-zA-Z._]+]]590 591  // CHECK: [[STRONG]]592  // CHECK-NOT: br593  // CHECK: cmpxchg {{.*}} release acquire594  // CHECK: br595 596  // CHECK: [[WEAK]]597  // CHECK-NOT: br598  // CHECK: cmpxchg weak {{.*}} release acquire599  // CHECK: br600}601 602// Having checked the flow in the previous two cases, we'll trust clang to603// combine them sanely.604void EMIT_ALL_THE_THINGS(int *ptr, int *ptr2, int new, _Bool weak, int success, int fail) {605  __atomic_compare_exchange(ptr, ptr2, &new, weak, success, fail);606 607  // CHECK: = cmpxchg {{.*}} monotonic monotonic, align608  // CHECK: = cmpxchg {{.*}} monotonic acquire, align609  // CHECK: = cmpxchg {{.*}} monotonic seq_cst, align610  // CHECK: = cmpxchg weak {{.*}} monotonic monotonic, align611  // CHECK: = cmpxchg weak {{.*}} monotonic acquire, align612  // CHECK: = cmpxchg weak {{.*}} monotonic seq_cst, align613  // CHECK: = cmpxchg {{.*}} acquire monotonic, align614  // CHECK: = cmpxchg {{.*}} acquire acquire, align615  // CHECK: = cmpxchg {{.*}} acquire seq_cst, align616  // CHECK: = cmpxchg weak {{.*}} acquire monotonic, align617  // CHECK: = cmpxchg weak {{.*}} acquire acquire, align618  // CHECK: = cmpxchg weak {{.*}} acquire seq_cst, align619  // CHECK: = cmpxchg {{.*}} release monotonic, align620  // CHECK: = cmpxchg {{.*}} release acquire, align621  // CHECK: = cmpxchg {{.*}} release seq_cst, align622  // CHECK: = cmpxchg weak {{.*}} release monotonic, align623  // CHECK: = cmpxchg weak {{.*}} release acquire, align624  // CHECK: = cmpxchg weak {{.*}} release seq_cst, align625  // CHECK: = cmpxchg {{.*}} acq_rel monotonic, align626  // CHECK: = cmpxchg {{.*}} acq_rel acquire, align627  // CHECK: = cmpxchg {{.*}} acq_rel seq_cst, align628  // CHECK: = cmpxchg weak {{.*}} acq_rel monotonic, align629  // CHECK: = cmpxchg weak {{.*}} acq_rel acquire, align630  // CHECK: = cmpxchg weak {{.*}} acq_rel seq_cst, align631  // CHECK: = cmpxchg {{.*}} seq_cst monotonic, align632  // CHECK: = cmpxchg {{.*}} seq_cst acquire, align633  // CHECK: = cmpxchg {{.*}} seq_cst seq_cst, align634  // CHECK: = cmpxchg weak {{.*}} seq_cst monotonic, align635  // CHECK: = cmpxchg weak {{.*}} seq_cst acquire, align636  // CHECK: = cmpxchg weak {{.*}} seq_cst seq_cst, align637}638 639int PR21643(void) {640  return __atomic_or_fetch((int __attribute__((address_space(257))) *)0x308, 1,641                           __ATOMIC_RELAXED);642  // CHECK: %[[atomictmp:.*]] = alloca i32, align 4643  // CHECK: %[[atomicdst:.*]] = alloca i32, align 4644  // CHECK: store i32 1, ptr %[[atomictmp]]645  // CHECK: %[[one:.*]] = load i32, ptr %[[atomictmp]], align 4646  // CHECK: %[[old:.*]] = atomicrmw or ptr addrspace(257) inttoptr (i32 776 to ptr addrspace(257)), i32 %[[one]] monotonic, align 4647  // CHECK: %[[new:.*]] = or i32 %[[old]], %[[one]]648  // CHECK: store i32 %[[new]], ptr %[[atomicdst]], align 4649  // CHECK: %[[ret:.*]] = load i32, ptr %[[atomicdst]], align 4650  // CHECK: ret i32 %[[ret]]651}652 653int PR17306_1(volatile _Atomic(int) *i) {654  // CHECK-LABEL: @PR17306_1655  // CHECK:      %[[i_addr:.*]] = alloca ptr656  // CHECK-NEXT: %[[atomicdst:.*]] = alloca i32657  // CHECK-NEXT: store ptr %i, ptr %[[i_addr]]658  // CHECK-NEXT: %[[addr:.*]] = load ptr, ptr %[[i_addr]]659  // CHECK-NEXT: %[[res:.*]] = load atomic volatile i32, ptr %[[addr]] seq_cst, align 4660  // CHECK-NEXT: store i32 %[[res]], ptr %[[atomicdst]]661  // CHECK-NEXT: %[[retval:.*]] = load i32, ptr %[[atomicdst]]662  // CHECK-NEXT: ret i32 %[[retval]]663  return __c11_atomic_load(i, memory_order_seq_cst);664}665 666int PR17306_2(volatile int *i, int value) {667  // CHECK-LABEL: @PR17306_2668  // CHECK:      %[[i_addr:.*]] = alloca ptr669  // CHECK-NEXT: %[[value_addr:.*]] = alloca i32670  // CHECK-NEXT: %[[atomictmp:.*]] = alloca i32671  // CHECK-NEXT: %[[atomicdst:.*]] = alloca i32672  // CHECK-NEXT: store ptr %i, ptr %[[i_addr]]673  // CHECK-NEXT: store i32 %value, ptr %[[value_addr]]674  // CHECK-NEXT: %[[i_lval:.*]] = load ptr, ptr %[[i_addr]]675  // CHECK-NEXT: %[[value:.*]] = load i32, ptr %[[value_addr]]676  // CHECK-NEXT: store i32 %[[value]], ptr %[[atomictmp]]677  // CHECK-NEXT: %[[value_lval:.*]] = load i32, ptr %[[atomictmp]]678  // CHECK-NEXT: %[[old_val:.*]] = atomicrmw volatile add ptr %[[i_lval]], i32 %[[value_lval]] seq_cst, align 4679  // CHECK-NEXT: %[[new_val:.*]] = add i32 %[[old_val]], %[[value_lval]]680  // CHECK-NEXT: store i32 %[[new_val]], ptr %[[atomicdst]]681  // CHECK-NEXT: %[[retval:.*]] = load i32, ptr %[[atomicdst]]682  // CHECK-NEXT: ret i32 %[[retval]]683  return __atomic_add_fetch(i, value, memory_order_seq_cst);684}685 686void test_underaligned(void) {687  // CHECK-LABEL: @test_underaligned688  struct Underaligned { char c[8]; } underaligned_a, underaligned_b, underaligned_c;689 690  // CHECK: load atomic i64, {{.*}}, align 1691  __atomic_load(&underaligned_a, &underaligned_b, memory_order_seq_cst);692  // CHECK: store atomic i64 {{.*}}, align 1693  __atomic_store(&underaligned_a, &underaligned_b, memory_order_seq_cst);694  // CHECK: atomicrmw xchg ptr {{.*}}, align 1695  __atomic_exchange(&underaligned_a, &underaligned_b, &underaligned_c, memory_order_seq_cst);696  // CHECK: cmpxchg weak ptr {{.*}}, align 1697  __atomic_compare_exchange(&underaligned_a, &underaligned_b, &underaligned_c, 1, memory_order_seq_cst, memory_order_seq_cst);698 699  __attribute__((aligned)) struct Underaligned aligned_a, aligned_b, aligned_c;700 701  // CHECK: load atomic i64, {{.*}}, align 16702  __atomic_load(&aligned_a, &aligned_b, memory_order_seq_cst);703  // CHECK: store atomic i64 {{.*}}, align 16704  __atomic_store(&aligned_a, &aligned_b, memory_order_seq_cst);705  // CHECK: atomicrmw xchg ptr {{.*}}, align 16706  __atomic_exchange(&aligned_a, &aligned_b, &aligned_c, memory_order_seq_cst);707  // CHECK: cmpxchg weak ptr {{.*}}, align 16708  __atomic_compare_exchange(&aligned_a, &aligned_b, &aligned_c, 1, memory_order_seq_cst, memory_order_seq_cst);709}710 711void test_c11_minmax(_Atomic(int) * si, _Atomic(unsigned) * ui, _Atomic(short) * ss, _Atomic(unsigned char) * uc, _Atomic(long long) * sll) {712  // CHECK-LABEL: @test_c11_minmax713 714  // CHECK: atomicrmw max ptr {{.*}} acquire, align 4715  *si = __c11_atomic_fetch_max(si, 42, memory_order_acquire);716  // CHECK: atomicrmw min ptr {{.*}} acquire, align 4717  *si = __c11_atomic_fetch_min(si, 42, memory_order_acquire);718  // CHECK: atomicrmw umax ptr {{.*}} acquire, align 4719  *ui = __c11_atomic_fetch_max(ui, 42, memory_order_acquire);720  // CHECK: atomicrmw umin ptr {{.*}} acquire, align 4721  *ui = __c11_atomic_fetch_min(ui, 42, memory_order_acquire);722 723  // CHECK: atomicrmw max ptr {{.*}} acquire, align 2724  *ss = __c11_atomic_fetch_max(ss, 42, memory_order_acquire);725  // CHECK: atomicrmw min ptr {{.*}} acquire, align 2726  *ss = __c11_atomic_fetch_min(ss, 42, memory_order_acquire);727 728  // CHECK: atomicrmw umax ptr {{.*}} acquire, align 1729  *uc = __c11_atomic_fetch_max(uc, 42, memory_order_acquire);730  // CHECK: atomicrmw umin ptr {{.*}} acquire, align 1731  *uc = __c11_atomic_fetch_min(uc, 42, memory_order_acquire);732 733  // CHECK: atomicrmw max ptr {{.*}} acquire, align 8734  *sll = __c11_atomic_fetch_max(sll, 42, memory_order_acquire);735  // CHECK: atomicrmw min ptr {{.*}} acquire, align 8736  *sll = __c11_atomic_fetch_min(sll, 42, memory_order_acquire);737 738}739 740void test_minmax_postop(int *si, unsigned *ui, unsigned short *us, signed char *sc, unsigned long long *ull) {741  int val = 42;742  // CHECK-LABEL: @test_minmax_postop743 744  // CHECK: [[OLD:%.*]] = atomicrmw max ptr [[PTR:%.*]], i32 [[RHS:%.*]] release, align 4745  // CHECK: [[TST:%.*]] = icmp sgt i32 [[OLD]], [[RHS]]746  // CHECK: [[NEW:%.*]] = select i1 [[TST]], i32 [[OLD]], i32 [[RHS]]747  // CHECK: store i32 [[NEW]], ptr748  *si = __atomic_max_fetch(si, 42, memory_order_release);749 750  // CHECK: [[OLD:%.*]] = atomicrmw min ptr [[PTR:%.*]], i32 [[RHS:%.*]] release, align 4751  // CHECK: [[TST:%.*]] = icmp slt i32 [[OLD]], [[RHS]]752  // CHECK: [[NEW:%.*]] = select i1 [[TST]], i32 [[OLD]], i32 [[RHS]]753  // CHECK: store i32 [[NEW]], ptr754  *si = __atomic_min_fetch(si, 42, memory_order_release);755 756  // CHECK: [[OLD:%.*]] = atomicrmw umax ptr [[PTR:%.*]], i32 [[RHS:%.*]] release, align 4757  // CHECK: [[TST:%.*]] = icmp ugt i32 [[OLD]], [[RHS]]758  // CHECK: [[NEW:%.*]] = select i1 [[TST]], i32 [[OLD]], i32 [[RHS]]759  // CHECK: store i32 [[NEW]], ptr760  *ui = __atomic_max_fetch(ui, 42, memory_order_release);761 762  // CHECK: [[OLD:%.*]] = atomicrmw umin ptr [[PTR:%.*]], i32 [[RHS:%.*]] release, align 4763  // CHECK: [[TST:%.*]] = icmp ult i32 [[OLD]], [[RHS]]764  // CHECK: [[NEW:%.*]] = select i1 [[TST]], i32 [[OLD]], i32 [[RHS]]765  // CHECK: store i32 [[NEW]], ptr766  *ui = __atomic_min_fetch(ui, 42, memory_order_release);767 768  // CHECK: [[OLD:%.*]] = atomicrmw umin ptr [[PTR:%.*]], i16 [[RHS:%.*]] release, align 2769  // CHECK: [[TST:%.*]] = icmp ult i16 [[OLD]], [[RHS]]770  // CHECK: [[NEW:%.*]] = select i1 [[TST]], i16 [[OLD]], i16 [[RHS]]771  // CHECK: store i16 [[NEW]], ptr772  *us = __atomic_min_fetch(us, 42, memory_order_release);773 774  // CHECK: [[OLD:%.*]] = atomicrmw min ptr [[PTR:%.*]], i8 [[RHS:%.*]] release, align 1775  // CHECK: [[TST:%.*]] = icmp slt i8 [[OLD]], [[RHS]]776  // CHECK: [[NEW:%.*]] = select i1 [[TST]], i8 [[OLD]], i8 [[RHS]]777  // CHECK: store i8 [[NEW]], ptr778  *sc = __atomic_min_fetch(sc, 42, memory_order_release);779 780  // CHECK: [[OLD:%.*]] = atomicrmw umin ptr {{%.*}}, i64 [[RHS:%.*]] release, align 4781  // CHECK: [[TST:%.*]] = icmp ult i64 [[OLD]], [[RHS]]782  // CHECK: [[NEW:%.*]] = select i1 [[TST]], i64 [[OLD]], i64 [[RHS]]783  // CHECK: store i64 [[NEW]], ptr784  *ull = __atomic_min_fetch(ull, 42, memory_order_release);785 786}787 788#endif789