776 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals --include-generated-funcs --global-value-regex ".*"2// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -o - %s | FileCheck %s3// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -fmv -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-NOFMV4// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +mte -target-feature +bti -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-MTE-BTI5 6int __attribute__((target_clones("lse+aes", "sve2"))) ftc(void) { return 0; }7int __attribute__((target_clones("sha2", "sha2+memtag", " default "))) ftc_def(void) { return 1; }8int __attribute__((target_clones("sha2", "default"))) ftc_dup1(void) { return 2; }9int __attribute__((target_clones("fp", "crc+dotprod", "default"))) ftc_dup2(void) { return 3; }10int __attribute__((target_clones("memtag", "bti", "default"))) ftc_dup3(void) { return 4; }11int foo() {12 return ftc() + ftc_def() + ftc_dup1() + ftc_dup2() + ftc_dup3();13}14 15inline int __attribute__((target_clones("rng+simd", "rcpc", "sve2-aes+wfxt"))) ftc_inline1(void) { return 1; }16inline int __attribute__((target_clones("fp16", "fcma+sve2-bitperm", "default"))) ftc_inline2(void);17inline int __attribute__((target_clones("bti", "sve+sb", "default"))) ftc_inline3(void) { return 3; }18 19int __attribute__((target_clones("default"))) ftc_direct(void) { return 4; }20 21int __attribute__((target_clones("default"))) main() {22 return ftc_inline1() + ftc_inline2() + ftc_inline3() + ftc_direct();23}24inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default"))) ftc_inline2(void) { return 2; };25 26 27 28//.29// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }30// CHECK: @ftc_def = weak_odr ifunc i32 (), ptr @ftc_def.resolver31// CHECK: @ftc_dup1 = weak_odr ifunc i32 (), ptr @ftc_dup1.resolver32// CHECK: @ftc_dup2 = weak_odr ifunc i32 (), ptr @ftc_dup2.resolver33// CHECK: @ftc_dup3 = weak_odr ifunc i32 (), ptr @ftc_dup3.resolver34// CHECK: @ftc_inline2 = weak_odr ifunc i32 (), ptr @ftc_inline2.resolver35// CHECK: @ftc_inline3 = weak_odr ifunc i32 (), ptr @ftc_inline3.resolver36//.37// CHECK-MTE-BTI: @__aarch64_cpu_features = external dso_local global { i64 }38// CHECK-MTE-BTI: @ftc_def = weak_odr ifunc i32 (), ptr @ftc_def.resolver39// CHECK-MTE-BTI: @ftc_dup1 = weak_odr ifunc i32 (), ptr @ftc_dup1.resolver40// CHECK-MTE-BTI: @ftc_dup2 = weak_odr ifunc i32 (), ptr @ftc_dup2.resolver41// CHECK-MTE-BTI: @ftc_dup3 = weak_odr ifunc i32 (), ptr @ftc_dup3.resolver42// CHECK-MTE-BTI: @ftc_inline2 = weak_odr ifunc i32 (), ptr @ftc_inline2.resolver43// CHECK-MTE-BTI: @ftc_inline3 = weak_odr ifunc i32 (), ptr @ftc_inline3.resolver44//.45// CHECK: Function Attrs: noinline nounwind optnone46// CHECK-LABEL: define {{[^@]+}}@ftc._MaesMlse47// CHECK-SAME: () #[[ATTR0:[0-9]+]] {48// CHECK-NEXT: entry:49// CHECK-NEXT: ret i32 050//51//52// CHECK: Function Attrs: noinline nounwind optnone53// CHECK-LABEL: define {{[^@]+}}@ftc._Msve254// CHECK-SAME: () #[[ATTR1:[0-9]+]] {55// CHECK-NEXT: entry:56// CHECK-NEXT: ret i32 057//58//59// CHECK: Function Attrs: noinline nounwind optnone60// CHECK-LABEL: define {{[^@]+}}@ftc_def._Msha261// CHECK-SAME: () #[[ATTR2:[0-9]+]] {62// CHECK-NEXT: entry:63// CHECK-NEXT: ret i32 164//65//66// CHECK: Function Attrs: noinline nounwind optnone67// CHECK-LABEL: define {{[^@]+}}@ftc_def._MmemtagMsha268// CHECK-SAME: () #[[ATTR3:[0-9]+]] {69// CHECK-NEXT: entry:70// CHECK-NEXT: ret i32 171//72//73// CHECK: Function Attrs: noinline nounwind optnone74// CHECK-LABEL: define {{[^@]+}}@ftc_def.default75// CHECK-SAME: () #[[ATTR4:[0-9]+]] {76// CHECK-NEXT: entry:77// CHECK-NEXT: ret i32 178//79//80// CHECK: Function Attrs: noinline nounwind optnone81// CHECK-LABEL: define {{[^@]+}}@ftc_dup1._Msha282// CHECK-SAME: () #[[ATTR2]] {83// CHECK-NEXT: entry:84// CHECK-NEXT: ret i32 285//86//87// CHECK: Function Attrs: noinline nounwind optnone88// CHECK-LABEL: define {{[^@]+}}@ftc_dup1.default89// CHECK-SAME: () #[[ATTR4]] {90// CHECK-NEXT: entry:91// CHECK-NEXT: ret i32 292//93//94// CHECK: Function Attrs: noinline nounwind optnone95// CHECK-LABEL: define {{[^@]+}}@ftc_dup2._Mfp96// CHECK-SAME: () #[[ATTR5:[0-9]+]] {97// CHECK-NEXT: entry:98// CHECK-NEXT: ret i32 399//100//101// CHECK: Function Attrs: noinline nounwind optnone102// CHECK-LABEL: define {{[^@]+}}@ftc_dup2._McrcMdotprod103// CHECK-SAME: () #[[ATTR6:[0-9]+]] {104// CHECK-NEXT: entry:105// CHECK-NEXT: ret i32 3106//107//108// CHECK: Function Attrs: noinline nounwind optnone109// CHECK-LABEL: define {{[^@]+}}@ftc_dup2.default110// CHECK-SAME: () #[[ATTR4]] {111// CHECK-NEXT: entry:112// CHECK-NEXT: ret i32 3113//114//115// CHECK: Function Attrs: noinline nounwind optnone116// CHECK-LABEL: define {{[^@]+}}@ftc_dup3._Mmemtag117// CHECK-SAME: () #[[ATTR7:[0-9]+]] {118// CHECK-NEXT: entry:119// CHECK-NEXT: ret i32 4120//121//122// CHECK: Function Attrs: noinline nounwind optnone123// CHECK-LABEL: define {{[^@]+}}@ftc_dup3._Mbti124// CHECK-SAME: () #[[ATTR8:[0-9]+]] {125// CHECK-NEXT: entry:126// CHECK-NEXT: ret i32 4127//128//129// CHECK: Function Attrs: noinline nounwind optnone130// CHECK-LABEL: define {{[^@]+}}@ftc_dup3.default131// CHECK-SAME: () #[[ATTR4]] {132// CHECK-NEXT: entry:133// CHECK-NEXT: ret i32 4134//135//136// CHECK: Function Attrs: noinline nounwind optnone137// CHECK-LABEL: define {{[^@]+}}@foo138// CHECK-SAME: () #[[ATTR9:[0-9]+]] {139// CHECK-NEXT: entry:140// CHECK-NEXT: [[CALL:%.*]] = call i32 @ftc()141// CHECK-NEXT: [[CALL1:%.*]] = call i32 @ftc_def()142// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]143// CHECK-NEXT: [[CALL2:%.*]] = call i32 @ftc_dup1()144// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]145// CHECK-NEXT: [[CALL4:%.*]] = call i32 @ftc_dup2()146// CHECK-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]]147// CHECK-NEXT: [[CALL6:%.*]] = call i32 @ftc_dup3()148// CHECK-NEXT: [[ADD7:%.*]] = add nsw i32 [[ADD5]], [[CALL6]]149// CHECK-NEXT: ret i32 [[ADD7]]150//151//152// CHECK: Function Attrs: noinline nounwind optnone153// CHECK-LABEL: define {{[^@]+}}@ftc_direct154// CHECK-SAME: () #[[ATTR9]] {155// CHECK-NEXT: entry:156// CHECK-NEXT: ret i32 4157//158//159// CHECK: Function Attrs: noinline nounwind optnone160// CHECK-LABEL: define {{[^@]+}}@main161// CHECK-SAME: () #[[ATTR9]] {162// CHECK-NEXT: entry:163// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4164// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4165// CHECK-NEXT: [[CALL:%.*]] = call i32 @ftc_inline1()166// CHECK-NEXT: [[CALL1:%.*]] = call i32 @ftc_inline2()167// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]168// CHECK-NEXT: [[CALL2:%.*]] = call i32 @ftc_inline3()169// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]170// CHECK-NEXT: [[CALL4:%.*]] = call i32 @ftc_direct()171// CHECK-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]]172// CHECK-NEXT: ret i32 [[ADD5]]173//174//175// CHECK-LABEL: define {{[^@]+}}@ftc_def.resolver()176// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {177// CHECK-NEXT: resolver_entry:178// CHECK-NEXT: call void @__init_cpu_features_resolver()179// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8180// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 17592186049280181// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 17592186049280182// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]183// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]184// CHECK: resolver_return:185// CHECK-NEXT: ret ptr @ftc_def._MmemtagMsha2186// CHECK: resolver_else:187// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8188// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 4864189// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 4864190// CHECK-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]191// CHECK-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]192// CHECK: resolver_return1:193// CHECK-NEXT: ret ptr @ftc_def._Msha2194// CHECK: resolver_else2:195// CHECK-NEXT: ret ptr @ftc_def.default196//197//198// CHECK-LABEL: define {{[^@]+}}@ftc_dup1.resolver()199// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {200// CHECK-NEXT: resolver_entry:201// CHECK-NEXT: call void @__init_cpu_features_resolver()202// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8203// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 4864204// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4864205// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]206// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]207// CHECK: resolver_return:208// CHECK-NEXT: ret ptr @ftc_dup1._Msha2209// CHECK: resolver_else:210// CHECK-NEXT: ret ptr @ftc_dup1.default211//212//213// CHECK-LABEL: define {{[^@]+}}@ftc_dup2.resolver()214// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {215// CHECK-NEXT: resolver_entry:216// CHECK-NEXT: call void @__init_cpu_features_resolver()217// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8218// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1808219// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1808220// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]221// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]222// CHECK: resolver_return:223// CHECK-NEXT: ret ptr @ftc_dup2._McrcMdotprod224// CHECK: resolver_else:225// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8226// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 256227// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 256228// CHECK-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]229// CHECK-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]230// CHECK: resolver_return1:231// CHECK-NEXT: ret ptr @ftc_dup2._Mfp232// CHECK: resolver_else2:233// CHECK-NEXT: ret ptr @ftc_dup2.default234//235//236// CHECK-LABEL: define {{[^@]+}}@ftc_dup3.resolver()237// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {238// CHECK-NEXT: resolver_entry:239// CHECK-NEXT: call void @__init_cpu_features_resolver()240// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8241// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1125899906842624242// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1125899906842624243// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]244// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]245// CHECK: resolver_return:246// CHECK-NEXT: ret ptr @ftc_dup3._Mbti247// CHECK: resolver_else:248// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8249// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 17592186044416250// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 17592186044416251// CHECK-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]252// CHECK-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]253// CHECK: resolver_return1:254// CHECK-NEXT: ret ptr @ftc_dup3._Mmemtag255// CHECK: resolver_else2:256// CHECK-NEXT: ret ptr @ftc_dup3.default257//258//259// CHECK: Function Attrs: noinline nounwind optnone260// CHECK-LABEL: define {{[^@]+}}@ftc_inline2._Mfp16261// CHECK-SAME: () #[[ATTR12:[0-9]+]] {262// CHECK-NEXT: entry:263// CHECK-NEXT: ret i32 2264//265//266// CHECK: Function Attrs: noinline nounwind optnone267// CHECK-LABEL: define {{[^@]+}}@ftc_inline2._MfcmaMsve2-bitperm268// CHECK-SAME: () #[[ATTR13:[0-9]+]] {269// CHECK-NEXT: entry:270// CHECK-NEXT: ret i32 2271//272//273// CHECK: Function Attrs: noinline nounwind optnone274// CHECK-LABEL: define {{[^@]+}}@ftc_inline2.default275// CHECK-SAME: () #[[ATTR4]] {276// CHECK-NEXT: entry:277// CHECK-NEXT: ret i32 2278//279//280// CHECK-LABEL: define {{[^@]+}}@ftc_inline2.resolver()281// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {282// CHECK-NEXT: resolver_entry:283// CHECK-NEXT: call void @__init_cpu_features_resolver()284// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8285// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 619551195904286// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 619551195904287// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]288// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]289// CHECK: resolver_return:290// CHECK-NEXT: ret ptr @ftc_inline2._MfcmaMsve2-bitperm291// CHECK: resolver_else:292// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8293// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 65792294// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 65792295// CHECK-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]296// CHECK-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]297// CHECK: resolver_return1:298// CHECK-NEXT: ret ptr @ftc_inline2._Mfp16299// CHECK: resolver_else2:300// CHECK-NEXT: ret ptr @ftc_inline2.default301//302//303// CHECK: Function Attrs: noinline nounwind optnone304// CHECK-LABEL: define {{[^@]+}}@ftc_inline1._MrngMsimd305// CHECK-SAME: () #[[ATTR14:[0-9]+]] {306// CHECK-NEXT: entry:307// CHECK-NEXT: ret i32 1308//309//310// CHECK: Function Attrs: noinline nounwind optnone311// CHECK-LABEL: define {{[^@]+}}@ftc_inline1._Mrcpc312// CHECK-SAME: () #[[ATTR15:[0-9]+]] {313// CHECK-NEXT: entry:314// CHECK-NEXT: ret i32 1315//316//317// CHECK: Function Attrs: noinline nounwind optnone318// CHECK-LABEL: define {{[^@]+}}@ftc_inline1._Msve2-aesMwfxt319// CHECK-SAME: () #[[ATTR16:[0-9]+]] {320// CHECK-NEXT: entry:321// CHECK-NEXT: ret i32 1322//323//324// CHECK: Function Attrs: noinline nounwind optnone325// CHECK-LABEL: define {{[^@]+}}@ftc_inline3._Mbti326// CHECK-SAME: () #[[ATTR8]] {327// CHECK-NEXT: entry:328// CHECK-NEXT: ret i32 3329//330//331// CHECK: Function Attrs: noinline nounwind optnone332// CHECK-LABEL: define {{[^@]+}}@ftc_inline3._MsbMsve333// CHECK-SAME: () #[[ATTR17:[0-9]+]] {334// CHECK-NEXT: entry:335// CHECK-NEXT: ret i32 3336//337//338// CHECK: Function Attrs: noinline nounwind optnone339// CHECK-LABEL: define {{[^@]+}}@ftc_inline3.default340// CHECK-SAME: () #[[ATTR4]] {341// CHECK-NEXT: entry:342// CHECK-NEXT: ret i32 3343//344//345// CHECK-LABEL: define {{[^@]+}}@ftc_inline3.resolver()346// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {347// CHECK-NEXT: resolver_entry:348// CHECK-NEXT: call void @__init_cpu_features_resolver()349// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8350// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1125899906842624351// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1125899906842624352// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]353// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]354// CHECK: resolver_return:355// CHECK-NEXT: ret ptr @ftc_inline3._Mbti356// CHECK: resolver_else:357// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8358// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 70369817985280359// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 70369817985280360// CHECK-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]361// CHECK-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]362// CHECK: resolver_return1:363// CHECK-NEXT: ret ptr @ftc_inline3._MsbMsve364// CHECK: resolver_else2:365// CHECK-NEXT: ret ptr @ftc_inline3.default366//367//368// CHECK-NOFMV: Function Attrs: noinline nounwind optnone369// CHECK-NOFMV-LABEL: define {{[^@]+}}@ftc370// CHECK-NOFMV-SAME: () #[[ATTR0:[0-9]+]] {371// CHECK-NOFMV-NEXT: entry:372// CHECK-NOFMV-NEXT: ret i32 0373//374//375// CHECK-NOFMV: Function Attrs: noinline nounwind optnone376// CHECK-NOFMV-LABEL: define {{[^@]+}}@ftc_def377// CHECK-NOFMV-SAME: () #[[ATTR0]] {378// CHECK-NOFMV-NEXT: entry:379// CHECK-NOFMV-NEXT: ret i32 1380//381//382// CHECK-NOFMV: Function Attrs: noinline nounwind optnone383// CHECK-NOFMV-LABEL: define {{[^@]+}}@ftc_dup1384// CHECK-NOFMV-SAME: () #[[ATTR0]] {385// CHECK-NOFMV-NEXT: entry:386// CHECK-NOFMV-NEXT: ret i32 2387//388//389// CHECK-NOFMV: Function Attrs: noinline nounwind optnone390// CHECK-NOFMV-LABEL: define {{[^@]+}}@ftc_dup2391// CHECK-NOFMV-SAME: () #[[ATTR0]] {392// CHECK-NOFMV-NEXT: entry:393// CHECK-NOFMV-NEXT: ret i32 3394//395//396// CHECK-NOFMV: Function Attrs: noinline nounwind optnone397// CHECK-NOFMV-LABEL: define {{[^@]+}}@ftc_dup3398// CHECK-NOFMV-SAME: () #[[ATTR0]] {399// CHECK-NOFMV-NEXT: entry:400// CHECK-NOFMV-NEXT: ret i32 4401//402//403// CHECK-NOFMV: Function Attrs: noinline nounwind optnone404// CHECK-NOFMV-LABEL: define {{[^@]+}}@foo405// CHECK-NOFMV-SAME: () #[[ATTR0]] {406// CHECK-NOFMV-NEXT: entry:407// CHECK-NOFMV-NEXT: [[CALL:%.*]] = call i32 @ftc()408// CHECK-NOFMV-NEXT: [[CALL1:%.*]] = call i32 @ftc_def()409// CHECK-NOFMV-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]410// CHECK-NOFMV-NEXT: [[CALL2:%.*]] = call i32 @ftc_dup1()411// CHECK-NOFMV-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]412// CHECK-NOFMV-NEXT: [[CALL4:%.*]] = call i32 @ftc_dup2()413// CHECK-NOFMV-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]]414// CHECK-NOFMV-NEXT: [[CALL6:%.*]] = call i32 @ftc_dup3()415// CHECK-NOFMV-NEXT: [[ADD7:%.*]] = add nsw i32 [[ADD5]], [[CALL6]]416// CHECK-NOFMV-NEXT: ret i32 [[ADD7]]417//418//419// CHECK-NOFMV: Function Attrs: noinline nounwind optnone420// CHECK-NOFMV-LABEL: define {{[^@]+}}@ftc_direct421// CHECK-NOFMV-SAME: () #[[ATTR0]] {422// CHECK-NOFMV-NEXT: entry:423// CHECK-NOFMV-NEXT: ret i32 4424//425//426// CHECK-NOFMV: Function Attrs: noinline nounwind optnone427// CHECK-NOFMV-LABEL: define {{[^@]+}}@main428// CHECK-NOFMV-SAME: () #[[ATTR0]] {429// CHECK-NOFMV-NEXT: entry:430// CHECK-NOFMV-NEXT: [[RETVAL:%.*]] = alloca i32, align 4431// CHECK-NOFMV-NEXT: store i32 0, ptr [[RETVAL]], align 4432// CHECK-NOFMV-NEXT: [[CALL:%.*]] = call i32 @ftc_inline1()433// CHECK-NOFMV-NEXT: [[CALL1:%.*]] = call i32 @ftc_inline2()434// CHECK-NOFMV-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]435// CHECK-NOFMV-NEXT: [[CALL2:%.*]] = call i32 @ftc_inline3()436// CHECK-NOFMV-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]437// CHECK-NOFMV-NEXT: [[CALL4:%.*]] = call i32 @ftc_direct()438// CHECK-NOFMV-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]]439// CHECK-NOFMV-NEXT: ret i32 [[ADD5]]440//441//442// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone443// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc._MaesMlse444// CHECK-MTE-BTI-SAME: () #[[ATTR0:[0-9]+]] {445// CHECK-MTE-BTI-NEXT: entry:446// CHECK-MTE-BTI-NEXT: ret i32 0447//448//449// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone450// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc._Msve2451// CHECK-MTE-BTI-SAME: () #[[ATTR1:[0-9]+]] {452// CHECK-MTE-BTI-NEXT: entry:453// CHECK-MTE-BTI-NEXT: ret i32 0454//455//456// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone457// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_def._Msha2458// CHECK-MTE-BTI-SAME: () #[[ATTR2:[0-9]+]] {459// CHECK-MTE-BTI-NEXT: entry:460// CHECK-MTE-BTI-NEXT: ret i32 1461//462//463// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone464// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_def._MmemtagMsha2465// CHECK-MTE-BTI-SAME: () #[[ATTR3:[0-9]+]] {466// CHECK-MTE-BTI-NEXT: entry:467// CHECK-MTE-BTI-NEXT: ret i32 1468//469//470// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone471// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_def.default472// CHECK-MTE-BTI-SAME: () #[[ATTR4:[0-9]+]] {473// CHECK-MTE-BTI-NEXT: entry:474// CHECK-MTE-BTI-NEXT: ret i32 1475//476//477// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone478// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup1._Msha2479// CHECK-MTE-BTI-SAME: () #[[ATTR2]] {480// CHECK-MTE-BTI-NEXT: entry:481// CHECK-MTE-BTI-NEXT: ret i32 2482//483//484// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone485// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup1.default486// CHECK-MTE-BTI-SAME: () #[[ATTR4]] {487// CHECK-MTE-BTI-NEXT: entry:488// CHECK-MTE-BTI-NEXT: ret i32 2489//490//491// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone492// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup2._Mfp493// CHECK-MTE-BTI-SAME: () #[[ATTR5:[0-9]+]] {494// CHECK-MTE-BTI-NEXT: entry:495// CHECK-MTE-BTI-NEXT: ret i32 3496//497//498// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone499// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup2._McrcMdotprod500// CHECK-MTE-BTI-SAME: () #[[ATTR6:[0-9]+]] {501// CHECK-MTE-BTI-NEXT: entry:502// CHECK-MTE-BTI-NEXT: ret i32 3503//504//505// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone506// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup2.default507// CHECK-MTE-BTI-SAME: () #[[ATTR4]] {508// CHECK-MTE-BTI-NEXT: entry:509// CHECK-MTE-BTI-NEXT: ret i32 3510//511//512// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone513// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup3._Mmemtag514// CHECK-MTE-BTI-SAME: () #[[ATTR7:[0-9]+]] {515// CHECK-MTE-BTI-NEXT: entry:516// CHECK-MTE-BTI-NEXT: ret i32 4517//518//519// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone520// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup3._Mbti521// CHECK-MTE-BTI-SAME: () #[[ATTR8:[0-9]+]] {522// CHECK-MTE-BTI-NEXT: entry:523// CHECK-MTE-BTI-NEXT: ret i32 4524//525//526// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone527// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup3.default528// CHECK-MTE-BTI-SAME: () #[[ATTR4]] {529// CHECK-MTE-BTI-NEXT: entry:530// CHECK-MTE-BTI-NEXT: ret i32 4531//532//533// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone534// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@foo535// CHECK-MTE-BTI-SAME: () #[[ATTR9:[0-9]+]] {536// CHECK-MTE-BTI-NEXT: entry:537// CHECK-MTE-BTI-NEXT: [[CALL:%.*]] = call i32 @ftc()538// CHECK-MTE-BTI-NEXT: [[CALL1:%.*]] = call i32 @ftc_def()539// CHECK-MTE-BTI-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]540// CHECK-MTE-BTI-NEXT: [[CALL2:%.*]] = call i32 @ftc_dup1()541// CHECK-MTE-BTI-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]542// CHECK-MTE-BTI-NEXT: [[CALL4:%.*]] = call i32 @ftc_dup2()543// CHECK-MTE-BTI-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]]544// CHECK-MTE-BTI-NEXT: [[CALL6:%.*]] = call i32 @ftc_dup3()545// CHECK-MTE-BTI-NEXT: [[ADD7:%.*]] = add nsw i32 [[ADD5]], [[CALL6]]546// CHECK-MTE-BTI-NEXT: ret i32 [[ADD7]]547//548//549// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone550// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_direct551// CHECK-MTE-BTI-SAME: () #[[ATTR9]] {552// CHECK-MTE-BTI-NEXT: entry:553// CHECK-MTE-BTI-NEXT: ret i32 4554//555//556// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone557// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@main558// CHECK-MTE-BTI-SAME: () #[[ATTR9]] {559// CHECK-MTE-BTI-NEXT: entry:560// CHECK-MTE-BTI-NEXT: [[RETVAL:%.*]] = alloca i32, align 4561// CHECK-MTE-BTI-NEXT: store i32 0, ptr [[RETVAL]], align 4562// CHECK-MTE-BTI-NEXT: [[CALL:%.*]] = call i32 @ftc_inline1()563// CHECK-MTE-BTI-NEXT: [[CALL1:%.*]] = call i32 @ftc_inline2()564// CHECK-MTE-BTI-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]565// CHECK-MTE-BTI-NEXT: [[CALL2:%.*]] = call i32 @ftc_inline3()566// CHECK-MTE-BTI-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]567// CHECK-MTE-BTI-NEXT: [[CALL4:%.*]] = call i32 @ftc_direct()568// CHECK-MTE-BTI-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]]569// CHECK-MTE-BTI-NEXT: ret i32 [[ADD5]]570//571//572// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_def.resolver()573// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {574// CHECK-MTE-BTI-NEXT: resolver_entry:575// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()576// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8577// CHECK-MTE-BTI-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 17592186049280578// CHECK-MTE-BTI-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 17592186049280579// CHECK-MTE-BTI-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]580// CHECK-MTE-BTI-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]581// CHECK-MTE-BTI: resolver_return:582// CHECK-MTE-BTI-NEXT: ret ptr @ftc_def._MmemtagMsha2583// CHECK-MTE-BTI: resolver_else:584// CHECK-MTE-BTI-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8585// CHECK-MTE-BTI-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 4864586// CHECK-MTE-BTI-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 4864587// CHECK-MTE-BTI-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]588// CHECK-MTE-BTI-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]589// CHECK-MTE-BTI: resolver_return1:590// CHECK-MTE-BTI-NEXT: ret ptr @ftc_def._Msha2591// CHECK-MTE-BTI: resolver_else2:592// CHECK-MTE-BTI-NEXT: ret ptr @ftc_def.default593//594//595// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup1.resolver()596// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {597// CHECK-MTE-BTI-NEXT: resolver_entry:598// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()599// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8600// CHECK-MTE-BTI-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 4864601// CHECK-MTE-BTI-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4864602// CHECK-MTE-BTI-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]603// CHECK-MTE-BTI-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]604// CHECK-MTE-BTI: resolver_return:605// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup1._Msha2606// CHECK-MTE-BTI: resolver_else:607// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup1.default608//609//610// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup2.resolver()611// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {612// CHECK-MTE-BTI-NEXT: resolver_entry:613// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()614// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8615// CHECK-MTE-BTI-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1808616// CHECK-MTE-BTI-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1808617// CHECK-MTE-BTI-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]618// CHECK-MTE-BTI-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]619// CHECK-MTE-BTI: resolver_return:620// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup2._McrcMdotprod621// CHECK-MTE-BTI: resolver_else:622// CHECK-MTE-BTI-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8623// CHECK-MTE-BTI-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 256624// CHECK-MTE-BTI-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 256625// CHECK-MTE-BTI-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]626// CHECK-MTE-BTI-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]627// CHECK-MTE-BTI: resolver_return1:628// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup2._Mfp629// CHECK-MTE-BTI: resolver_else2:630// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup2.default631//632//633// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_dup3.resolver()634// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {635// CHECK-MTE-BTI-NEXT: resolver_entry:636// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()637// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8638// CHECK-MTE-BTI-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1125899906842624639// CHECK-MTE-BTI-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1125899906842624640// CHECK-MTE-BTI-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]641// CHECK-MTE-BTI-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]642// CHECK-MTE-BTI: resolver_return:643// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup3._Mbti644// CHECK-MTE-BTI: resolver_else:645// CHECK-MTE-BTI-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8646// CHECK-MTE-BTI-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 17592186044416647// CHECK-MTE-BTI-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 17592186044416648// CHECK-MTE-BTI-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]649// CHECK-MTE-BTI-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]650// CHECK-MTE-BTI: resolver_return1:651// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup3._Mmemtag652// CHECK-MTE-BTI: resolver_else2:653// CHECK-MTE-BTI-NEXT: ret ptr @ftc_dup3.default654//655//656// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone657// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline2._Mfp16658// CHECK-MTE-BTI-SAME: () #[[ATTR12:[0-9]+]] {659// CHECK-MTE-BTI-NEXT: entry:660// CHECK-MTE-BTI-NEXT: ret i32 2661//662//663// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone664// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline2._MfcmaMsve2-bitperm665// CHECK-MTE-BTI-SAME: () #[[ATTR13:[0-9]+]] {666// CHECK-MTE-BTI-NEXT: entry:667// CHECK-MTE-BTI-NEXT: ret i32 2668//669//670// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone671// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline2.default672// CHECK-MTE-BTI-SAME: () #[[ATTR4]] {673// CHECK-MTE-BTI-NEXT: entry:674// CHECK-MTE-BTI-NEXT: ret i32 2675//676//677// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline2.resolver()678// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {679// CHECK-MTE-BTI-NEXT: resolver_entry:680// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()681// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8682// CHECK-MTE-BTI-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 619551195904683// CHECK-MTE-BTI-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 619551195904684// CHECK-MTE-BTI-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]685// CHECK-MTE-BTI-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]686// CHECK-MTE-BTI: resolver_return:687// CHECK-MTE-BTI-NEXT: ret ptr @ftc_inline2._MfcmaMsve2-bitperm688// CHECK-MTE-BTI: resolver_else:689// CHECK-MTE-BTI-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8690// CHECK-MTE-BTI-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 65792691// CHECK-MTE-BTI-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 65792692// CHECK-MTE-BTI-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]693// CHECK-MTE-BTI-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]694// CHECK-MTE-BTI: resolver_return1:695// CHECK-MTE-BTI-NEXT: ret ptr @ftc_inline2._Mfp16696// CHECK-MTE-BTI: resolver_else2:697// CHECK-MTE-BTI-NEXT: ret ptr @ftc_inline2.default698//699//700// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone701// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline1._MrngMsimd702// CHECK-MTE-BTI-SAME: () #[[ATTR14:[0-9]+]] {703// CHECK-MTE-BTI-NEXT: entry:704// CHECK-MTE-BTI-NEXT: ret i32 1705//706//707// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone708// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline1._Mrcpc709// CHECK-MTE-BTI-SAME: () #[[ATTR15:[0-9]+]] {710// CHECK-MTE-BTI-NEXT: entry:711// CHECK-MTE-BTI-NEXT: ret i32 1712//713//714// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone715// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline1._Msve2-aesMwfxt716// CHECK-MTE-BTI-SAME: () #[[ATTR16:[0-9]+]] {717// CHECK-MTE-BTI-NEXT: entry:718// CHECK-MTE-BTI-NEXT: ret i32 1719//720//721// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone722// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline3._Mbti723// CHECK-MTE-BTI-SAME: () #[[ATTR8]] {724// CHECK-MTE-BTI-NEXT: entry:725// CHECK-MTE-BTI-NEXT: ret i32 3726//727//728// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone729// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline3._MsbMsve730// CHECK-MTE-BTI-SAME: () #[[ATTR17:[0-9]+]] {731// CHECK-MTE-BTI-NEXT: entry:732// CHECK-MTE-BTI-NEXT: ret i32 3733//734//735// CHECK-MTE-BTI: Function Attrs: noinline nounwind optnone736// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline3.default737// CHECK-MTE-BTI-SAME: () #[[ATTR4]] {738// CHECK-MTE-BTI-NEXT: entry:739// CHECK-MTE-BTI-NEXT: ret i32 3740//741//742// CHECK-MTE-BTI-LABEL: define {{[^@]+}}@ftc_inline3.resolver()743// CHECK-MTE-BTI-SAME: #[[ATTR_RESOLVER]] comdat {744// CHECK-MTE-BTI-NEXT: resolver_entry:745// CHECK-MTE-BTI-NEXT: call void @__init_cpu_features_resolver()746// CHECK-MTE-BTI-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8747// CHECK-MTE-BTI-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1125899906842624748// CHECK-MTE-BTI-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1125899906842624749// CHECK-MTE-BTI-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]750// CHECK-MTE-BTI-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]751// CHECK-MTE-BTI: resolver_return:752// CHECK-MTE-BTI-NEXT: ret ptr @ftc_inline3._Mbti753// CHECK-MTE-BTI: resolver_else:754// CHECK-MTE-BTI-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8755// CHECK-MTE-BTI-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 70369817985280756// CHECK-MTE-BTI-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 70369817985280757// CHECK-MTE-BTI-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]758// CHECK-MTE-BTI-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]759// CHECK-MTE-BTI: resolver_return1:760// CHECK-MTE-BTI-NEXT: ret ptr @ftc_inline3._MsbMsve761// CHECK-MTE-BTI: resolver_else2:762// CHECK-MTE-BTI-NEXT: ret ptr @ftc_inline3.default763//764// CHECK: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }765// CHECK-MTE-BTI: attributes #[[ATTR_RESOLVER]] = { disable_sanitizer_instrumentation }766//.767// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}768// CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}769//.770// CHECK-NOFMV: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}771// CHECK-NOFMV: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}772//.773// CHECK-MTE-BTI: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}774// CHECK-MTE-BTI: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}775//.776